CN116249957A - Sensor circuit, pixel circuit and method for controlling pixel circuit - Google Patents
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Abstract
A sensor circuit and a pixel circuit are provided that can reduce response time of an event sensor and reduce false detection. The sensor circuit has a connection point between a source terminal of the MOS transistor and the light receiving element, and an amplifier having an input connected to the connection point for outputting a voltage that depends on a logarithm of a photocurrent of the light receiving element, wherein an output of the amplifier is connected to a gate terminal of the MOS transistor, and the gate terminal is regulated to a voltage that depends on the logarithm of the photocurrent. The sensor circuit further comprises a capacitance for a negative capacitance generator (negative capacitance generator, NCG).
Description
Technical Field
The present invention relates to a sensor circuit, a pixel circuit, and a method for controlling a pixel circuit, and more particularly, to a sensor circuit having a logarithmic conversion output, a pixel circuit serving as an event sensor, and a method for controlling a pixel circuit.
Background
Event-based sensors, also known as dynamic vision sensors (dynamic vision sensor, DVS), are of interest as a new type of mobile terminal imaging device. An event-based sensor is a sensor that captures a change in brightness of each pixel as an "event" and outputs information thereof, and has advantages of low delay, low power consumption, and high dynamic range. Such detection characteristics are required in feature point extraction applied to synchronous positioning and map construction (simultaneous localization and mapping, SLAM) technology of an autonomous traveling robot. In addition, the detection characteristic is necessary for detecting a high-speed image of a high-speed moving object, reconstructing a high-resolution image, compensating for motion blur, inserting frames, and the like. However, since the response waiting time of the event sensor depends on the brightness, the time accuracy of event detection decreases with decrease in brightness.
Disclosure of Invention
It is an object of the present invention to provide a sensor circuit and a pixel circuit which can reduce the response time of an event sensor and reduce erroneous detection of the event sensor.
A first embodiment of the present invention provides a sensor circuit having a connection point between a source terminal of a MOS transistor and a light receiving element, and having a first inverting amplifier having an input connected to the connection point for outputting a voltage that depends on a logarithm of photocurrent of the light receiving element, wherein an output of the first inverting amplifier is connected to a gate terminal of the MOS transistor, and the gate terminal is regulated to a voltage that depends on the logarithm of the photocurrent. The sensor circuit further includes a second inverting amplifier having an input connected to the output of the first inverting amplifier and an output connected to the connection point through a capacitor.
According to the first embodiment, a negative capacitance can be formed using an existing inverting amplifier while suppressing enlargement of the circuit scale.
A second embodiment of the invention provides a sensor circuit having a connection point between a source terminal of a MOS transistor and a light receiving element, and having an amplifier having an input terminal connected to the connection point for outputting a voltage that depends on a logarithm of a photocurrent of the light receiving element, wherein an output terminal of the amplifier is connected to a gate terminal of the MOS transistor, and the gate terminal is regulated to a voltage that depends on the logarithm of the photocurrent, wherein the amplifier is a differential amplifier having an inverting input terminal connected to the connection point, a non-inverting output terminal connected to the gate terminal, and an inverting output terminal connected to the connection point through a capacitor.
According to the second embodiment, the addition of the second inverting amplifier in the first embodiment is not required.
A third embodiment of the present invention provides a pixel circuit including: a sensor circuit having a connection point between a source terminal of a MOS transistor and a light receiving element, and having a first inverting amplifier having an input terminal connected to the connection point for outputting a voltage that depends on a logarithm of a photocurrent of the light receiving element, wherein an output terminal of the first inverting amplifier is connected to a gate terminal of the MOS transistor, and the gate terminal is adjusted to a voltage that depends on the logarithm of the photocurrent; and has a second inverting amplifier connected to the output of the sensor circuit and operative as a sample-and-hold circuit to hold an input voltage and amplify the amount of variation of the output of the sensor circuit. The pixel circuit further includes a capacitor interposed between the output of the second inverting amplifier and the connection point.
According to the third embodiment, the negative capacitance generating circuit (negative capacitance generation, NCG) can be configured without adding a non-inverting amplifier.
In a third embodiment, a buffer amplifier may be inserted in front of the second inverting amplifier. The buffer amplifier may, for example, adjust the signal band and operating point.
A fourth embodiment of the present invention provides a method of controlling a pixel circuit, the method including: a sensor circuit having a connection point between a source terminal of a MOS transistor and a light receiving element, and having a first inverting amplifier having an input terminal connected to the connection point for outputting a voltage that depends on a logarithm of a photocurrent of the light receiving element, wherein an output terminal of the first inverting amplifier is connected to a gate terminal of the MOS transistor, and the gate terminal is adjusted to a voltage that depends on the logarithm of the photocurrent; and having a second inverting amplifier connected to an output of the sensor circuit and operative as a sample-and-hold circuit to hold an input voltage and amplify a variation of the output of the sensor circuit, the method being performed by an initial program circuit of the pixel circuit, comprising the steps of: sensing a reset signal for resetting the hold value of the sample-and-hold circuit and sending an event signal to an arbiter circuit in case the difference between the output of the sensor circuit and the hold value of the sample-and-hold circuit exceeds a given threshold voltage; the reset signal is released upon completion of communication with the arbiter circuit.
According to the fourth embodiment, the kick-back voltage at the time of reset is small, and thus the input of the photocurrent is not affected.
Drawings
FIG. 1A is a schematic diagram of a conventional sensor circuit with logarithmic converted output;
FIG. 1B is a schematic diagram of a conventional sensor circuit with logarithmic converted output;
fig. 2 is a schematic diagram of a pixel circuit according to a first embodiment of the present invention;
FIG. 3A is a schematic diagram of an operational sequence of a conventional pixel circuit;
fig. 3B is a schematic diagram of an operation sequence of the pixel circuit in the first embodiment;
fig. 4 is a pattern diagram of a pixel circuit provided by a second embodiment of the present invention;
fig. 5 is a schematic diagram of a modification of the pixel circuit provided by the second embodiment;
fig. 6A is a schematic diagram of an inverting amplifier of the pixel circuit provided by the second embodiment;
fig. 6B is a schematic diagram of a differential amplifier of a pixel circuit provided in the second embodiment;
fig. 7 is a schematic diagram of a pixel circuit according to a third embodiment of the present invention;
fig. 8A is a schematic diagram showing a capacitance structure of a negative capacitance generating circuit according to a fourth embodiment of the present invention;
fig. 8B is a schematic diagram of another structure of the capacitance of the negative capacitance generating circuit provided by the fourth embodiment;
fig. 9 is a schematic diagram of a variable capacitance structure of a negative capacitance generating circuit provided by the fourth embodiment.
Detailed Description
Embodiments of the present invention will be described in detail below with reference to the accompanying drawings.
Fig. 1A shows a conventional sensor circuit with a logarithmic conversion output. A source terminal of the MOS transistor Tr is connected to a cathode terminal of a Photodiode (PD), which is a light receiving element. The connection point is a logarithmic-converted output LOG-OUT that provides an output that depends on the logarithm of the photocurrent. When the MOS transistor Tr operates in the sub-threshold region, the gate-source voltage V gs Is proportional to the photocurrent, as shown below.
[ equation 1]
Wherein I is ph Is the drain current corresponding to the photocurrent, I 0 Is a saturated current, V th Is the threshold voltage, kT/q is the thermal voltage, and n is a constant determined by the structure of the MOS transistor.Therefore, as shown in fig. 1A, when the gate voltage is a constant value, the voltage at the connection point becomes a voltage depending on the logarithm of the photocurrent, which is the logarithm converted output LOG-OUT.
As shown in fig. 1A, since a Photodiode (PD) and a MOS transistor Tr are configured as a source follower biased by a photocurrent flowing through the Photodiode (PD), a response time of a sensor circuit is dominant in a setup time of the source follower and depends on the photocurrent. Here, the setup time of the source follower is determined by the parasitic capacitance (C g ) And parasitic capacitance (C) of Photodiode (PD) as load P ) And (5) determining. Therefore, when illuminance is low, since photocurrent of a Photodiode (PD) is small, response time is worse.
Thus, as shown in fig. 1B, it is known to reduce the effective load capacitance (C) by a Photodiode (PD) P ) Is provided. The feedback control amplifier 11 is an inverting amplifier that receives the logarithmic conversion output as a photocurrent input, and applies feedback control to the gate terminal of the MOS transistor Tr. When the gain of the amplifier 11 is-a, the voltage amplitude of the Photodiode (PD) is suppressed to 1/(1+a), so that the effective load capacitance is also suppressed to 1/(1+a).
It is also known that a negative capacitance generating circuit (negative capacitance generator) (negative capacitance generator, NCG) is used as a method of reducing the effective load capacitance (for example, see patent literature 1). NCG is a non-inverting amplifier, and is connected to the capacitor C pF Positive feedback is applied. When the gain of the amplifier is A, the input capacitance C NEG Expressed by equation 2, when gain A>At 1, the input capacitance becomes a negative capacitance.
[ equation 2]
C NEG ＝C p (1-A) (2)
Similarly to the active matrix sensor of patent document 1, by connecting NCG to the logarithmic conversion output (photocurrent input) of the pixel circuit, the effective load capacitance can be reduced. This approach can shorten the setup time of the source follower.
However, the former feedback control has a limitation in reducing the effective load capacitance for the following reasons. First, when the feedback amplifier is configured as a common source amplifier, the gain is limited to about 50 times. Second, parasitic capacitance of the gate terminal of the MOS transistor Tr (C g ) Cannot be substantially reduced. Third, the slew rate of the source follower limits the voltage variation in the Photodiode (PD). Therefore, there is a limit to shortening the response time of the event sensor.
Further, when the latter NCG is applied to the pixel circuit shown in fig. 1, there are problems in that power consumption of the pixel circuit is increased and the circuit scale is increased due to the realization of the non-inverting amplifier.
Thus, in the present embodiment, a new NCG is realized in the pixel circuit.
First embodiment
Fig. 2 shows a pixel circuit provided by the first embodiment of the invention. A source terminal of the MOS transistor Tr is connected to a cathode terminal of a Photodiode (PD), which is a light receiving element. The connection point serves as a logarithmic conversion output LOG-OUT which provides an output that depends on the logarithm of the photocurrent of the light receiving element. The amplifier 21 output voltage (V log ) The voltage depends on the logarithm of the photocurrent, which varies based on the intensity of incident light into a Photodiode (PD). Further, the output terminal of the amplifier 21 is connected to the gate terminal of the MOS transistor Tr, and the gate terminal is regulated to a voltage that depends on the logarithm of the photocurrent.
An inverting amplifier comprising capacitors C1, C2 and an amplifier 22 is connected to the output of the sensor circuit. The switch SW shorting the input and output is connected to the amplifier 22 and functions as a sample-and-hold circuit with a capacitor C1 to sample the output of the sensor circuit. One sampling period starts from the time the switch SW is turned off. Since the output of the sensor circuit at the above time is the reference level, the amplifier 22 amplifies and outputs the amount of change of the sensor circuit output. Also is provided withThat is, the input at the time when the switch SW is turned off is the reference level, and the inverting amplifier amplifies the voltage change of the logarithmic conversion output to a voltage (V diff )。
The output of the inverting amplifier is connected to detectors 23 and 24. Once the terminal voltage (V) diff ) Above a given threshold voltage, the detector 23 outputs an event detection signal (ON event ) The output terminal voltage is a difference between the output of the sensor circuit and the hold value of the sample-and-hold circuit. Similarly, once the terminal voltage (V diff ) Below a given threshold voltage, the detector 24 outputs an event detection signal (OFF) event ). Thus, the detectors 23 and 24 can detect a positive luminance change and a negative luminance change, respectively. Once the initial program circuit 25 detects that the output of the sample-and-hold circuit exceeds a given threshold, the initial program circuit 25 controls the on switch SW to reset the reference value for detecting a change in luminance. Further, when receiving the event detection signal, the initial program circuit 25 outputs an event signal for post-processing of the peripheral circuit.
In the pixel circuit of the present embodiment, the capacitance C for feedback F And is also interposed between the output of the amplifier 22 and the cathode terminal of a Photodiode (PD). That is, between the input and output of the two cascade-connected amplifiers 21 and 22, in other words, through a capacitor C F Is applied between the photocurrent input of the amplifier 21 and the luminance change output of the amplifier 22. This configuration corresponds to a logarithmic conversion output (photocurrent input) connecting the NCG to the pixel circuit. Wherein when the gain of the amplifier 21 is A 1 Input capacitance C of photocurrent input NEG Represented by equation 3.
[ equation 3]
Thus, the NCG may be configured without adding a non-inverting amplifier. The negative capacitance of the NCG can be reduced in the payload capacitance. That is, it includes MOParasitic capacitance of the gate terminal of the S transistor Tr (C g ) The effective load capacitance in the Photodiode (PD) of (a) can be reduced as the effective load capacitance is reduced by feedback control shown in fig. 1B. Thus, the response time of the event sensor can be further shortened.
Fig. 3A shows an operation sequence of a conventional pixel circuit. For comparison, a conventional sequence performed by the initial program circuit 25 is shown. Once the output terminal voltage (V diff ) Exceeding a predetermined threshold voltage is detected as a "trigger" event and the pixel circuit outputs an event signal for post-processing of the peripheral circuit.
Specifically, as the peripheral circuit, a two-dimensional encoder, also referred to as an arbiter circuit, is connected. The initial program circuit 25 of the triggered pixel circuit sends a req_r signal to the Y-axis address encoder and receives an ack_r signal in response. In addition, the triggered initial program circuit 25 sends a req_c signal to the X-axis address encoder and receives an ack_c signal in response. Once the initial program circuit 25 receives the ack_c signal from the arbiter circuit, the initial program circuit 25 sends an event transmission signal (evt.trans.) to indicate that a series of event handshakes with the peripheral circuit have been completed.
In addition, the initial program circuit 25 transmits an event transmission signal (evt.trans.) while transmitting a reset signal to the sample-and-hold circuit, and turns on the switch SW. Accordingly, the charge held in the capacitor C1 is discharged, the reference level of the input of the inverting amplifier is updated, and the next event detection period starts. That is, the hold value of the sample-and-hold circuit is reset and the next sampling period is started. However, when the kickback voltage at the time of reset is large, it may be a factor that sampling errors occur in the input as an input reference and cause erroneous detection of the detector.
Fig. 3B shows an operation sequence of the pixel circuit of the first embodiment. In the pixel circuit of the present embodiment, as shown in fig. 2, the capacitor C F Interposed between the input and output of two cascade-connected amplifiers 21 and 22 configured as NCG. Further, in the pixel circuit of the present embodiment, when the inverting amplifierOutput terminal voltage (V) diff ) When a predetermined threshold voltage is exceeded and a trigger event is detected, the initial program circuit 25 sends a reset signal to the sample-and-hold circuit to reset the reference value for detecting a brightness change without waiting for completion of a series of event handshakes. Therefore, the recoil voltage during resetting is small, and the photocurrent input is not affected. Further, since the kickback voltage is reduced in the setup time as described below, the detection accuracy of the detector can be improved.
After detecting the output terminal voltage (V diff ) After triggering of (a) a reset signal is sent, a series of event signal exchanges with the peripheral circuit are completed, and the reset signal is released until the start of the next event detection period, called set-up time. In this embodiment, compared with the prior art, the setup time can be used as a preparation period for the next event detection, so that the detection accuracy of the detector can be improved.
Second embodiment
Fig. 4 shows a pixel circuit provided by a second embodiment of the invention. The difference from the first embodiment is that the capacitance C of NCG for feedback F Is arranged in the middle of the frame. A source terminal of the MOS transistor Tr is connected to a cathode terminal of a Photodiode (PD), which is a light receiving element. The output voltage (V of the amplifier 31 having the connection point as an input terminal log ) The voltage depends on the logarithm of the photocurrent, which varies based on the intensity of incident light into a Photodiode (PD). An inverting amplifier comprising capacitors C1, C2 and an amplifier 32 is connected to the output of the sensor circuit. The output of the amplifier 32 is connected to detectors 33 and 34, the detectors 33 and 34 being capable of detecting positive and negative brightness variations, respectively. The initial program circuit 25 controls the on switch SW and outputs an event signal for post-processing of the peripheral circuit. In the second embodiment, an inverting amplifier 36 is connected to the output of the amplifier 31, the output being connected to the output via a capacitor C F Is connected to the LOG-OUT output.
[ equation 3]
C NEG ＝C F (1-A 1 A 3 )(4)
According to the second embodiment, by using an existing inverting amplifier, a negative capacitance can be formed while suppressing the enlargement of the circuit scale. Accordingly, the parasitic capacitance (C g ) A Photodiode (PD) of the integrated circuit.
Fig. 5 shows a modification of the pixel circuit provided by the second embodiment. The amplifier 31 and the inverting amplifier 36 in the above-described second embodiment are configured by one differential amplifier. A source terminal of the MOS transistor Tr is connected to a cathode terminal of a Photodiode (PD). The logarithmic-conversion output LOG-OUT as a connection point is connected to the inverting input terminal of the differential amplifier 41, and the non-inverting output terminal is connected to the gate terminal of the MOS transistor Tr and the capacitance C1. The reference potential is applied to the non-inverting input terminal of the differential amplifier 41, and the differential amplifier 41 functions as an inverting amplifier for feedback control. The non-inverting output terminal of the differential amplifier 41 is connected to a sample-and-hold circuit including an inverting amplifier configured as capacitors C1 and C2 and an amplifier 42. The output of the amplifier 42 is connected to detectors 43 and 44 which output event signals, and an initial program circuit 45 outputs event signals for post-processing of peripheral circuits from the event signals.
In modification, the inverting output terminal of the differential amplifier 41 passes through the capacitor C F Is connected to the LOG-OUT output. Since the differential amplifier 41 is used as an inverting amplifier having a gain-A1, there is no need to add an inverting amplifier in the modification.
Fig. 6A shows a circuit diagram of the inverting amplifier 36 of the pixel circuit provided by the second embodiment. Further, fig. 6B shows a circuit diagram of the differential amplifier 41 of the pixel circuit provided by the second embodiment. The differential amplifier is shown in parallel with an inverting amplifier, which is typically used in pixel circuits.
Third embodiment
Fig. 7 shows a pixel circuit provided by a third embodiment of the invention. Unlike the first embodiment, a buffer amplifier 56 is interposed between the output terminal of the amplifier 51 and the capacitor C1. Buffer amplifier 56 may, for example, adjust the signal band and operating point.
Fourth embodiment
In the fourth embodiment, for example, the feedback capacitance C of the negative capacitance generating circuit (negative capacitance generation, NCG) used in the pixel circuit is described in detail F 。
FIG. 8A shows a capacitance C of the NCG provided by the fourth embodiment of the invention F Is a structure of (a). The interlayer capacitors are provided in four metal wiring layers 61 to 64 of the substrate configured as a pixel circuit. Capacitor C F Electrodes 65a and 65b of (a) are provided in the layers 62 and 63, and metal films 66a to 66f for shielding are provided around them. According to this configuration, the capacitance C of the NGC F May be provided in a substrate configured as a pixel circuit.
Fig. 8B shows another structure of the capacitance of the NCG in the fourth embodiment. The in-layer capacitors are provided in three metal wiring layers 71 to 73 of the substrate configured as a pixel circuit. Capacitor C F Is provided in the layer 72, and metal films 75a to 75d for shielding are provided therearound. Also according to this configuration, NCG capacitor C F But may also be provided in a substrate configured as a pixel circuit.
Fig. 9 shows the structure of the variable capacitance of the NCG in the fourth embodiment. In the variable capacitance circuit, a plurality of capacitance taps 81 0 To 81 of n In the capacitor taps, the capacitive elements cap_0 to cap_n, FUSEs fuse_0 to fuse_n, and TEST switches test_0 to test_n are connected in parallel. Accordingly, the capacitance tap 81 0 Connected to power and ground through a surge switch ROW_SEL, capacitor tap 81 n Is connected to power and ground through a surge switch COL _ SEL.
Once the feedback capacitance C of the pixel circuit is determined F The desired capacitance value, the capacitance taps are selected so that the total capacitance value of the selected capacitive elements meets the desired capacitance value. The test switch of the selected capacitive tap is turned off and the test switch of the non-selected capacitive tap is shorted. Next, the surge switches row_sel and col_sel are shorted, and the fuse of the selected capacitor tap is disconnected. Once all tests are onThe switch and the surge switch are both turned off, the capacitor C F The capacitive elements of the required capacitance value are connected in series between terminals 82 and 83.
According to the present embodiment, by disposing the feedback capacitance C in the metal wiring layer F The NCG may be configured without externally connecting the capacitive element to a conventional pixel circuit.
Claims (9)
1. A sensor circuit having a connection point between a source terminal of a MOS transistor and a light receiving element, and having a first inverting amplifier having an input terminal connected to the connection point for outputting a voltage that depends on a logarithm of photocurrent of the light receiving element, wherein an output terminal of the first inverting amplifier is connected to a gate terminal of the MOS transistor and the gate terminal is adjusted to a voltage that depends on the logarithm of photocurrent, the sensor circuit comprising:
a second inverting amplifier having an input connected to the output of the first inverting amplifier and an output connected to the connection point through a capacitor.
2. A sensor circuit characterized by having a connection point between a source terminal of a MOS transistor and a light receiving element, and having an amplifier having an input terminal connected to the connection point, the connection point being for outputting a voltage that depends on a logarithm of a photocurrent of the light receiving element, wherein an output terminal of the amplifier is connected to a gate terminal of the MOS transistor, and the gate terminal is regulated to a voltage that depends on the logarithm of the photocurrent, wherein
The amplifier is a differential amplifier having an inverting input terminal connected to the connection point, a non-inverting output terminal connected to the gate terminal, and an inverting output terminal connected to the connection point through a capacitor.
3. The sensor circuit according to claim 1 or 2, wherein the capacitor is formed in a metal wiring layer.
4. A pixel circuit, comprising:
the sensor circuit of claim 1 or 2;
a sample-and-hold circuit connected to an output of the sensor circuit;
a reset circuit for resetting the hold value of the sample-and-hold circuit in case a difference between an output of the sensor circuit and the hold value of the sample-and-hold circuit exceeds a given threshold voltage.
5. A pixel circuit, comprising: a sensor circuit having a connection point between a source terminal of a MOS transistor and a light receiving element, and having a first inverting amplifier having an input terminal connected to the connection point for outputting a voltage that depends on a logarithm of a photocurrent of the light receiving element, wherein an output terminal of the first inverting amplifier is connected to a gate terminal of the MOS transistor, and the gate terminal is adjusted to a voltage that depends on the logarithm of the photocurrent; and has a second inverting amplifier connected to an output terminal of the sensor circuit and configured to operate as a sample-and-hold circuit to hold an input voltage and amplify a variation amount of the output terminal of the sensor circuit, the pixel circuit including:
a capacitance interposed between the output of the second inverting amplifier and the connection point.
6. The pixel circuit of claim 5, further comprising:
a reset circuit for resetting the hold value of the sample-and-hold circuit in case a difference between an output of the sensor circuit and the hold value of the sample-and-hold circuit exceeds a given threshold voltage.
7. The pixel circuit according to any one of claims 4, 5, and 6, further comprising:
a buffer amplifier inserted before the second inverting amplifier.
8. A pixel circuit according to any one of claims 4 to 7, wherein the capacitance is a capacitance formed in a metal wiring layer.
9. A method of controlling a pixel circuit, comprising: a sensor circuit having a connection point between a source terminal of a MOS transistor and a light receiving element, and having a first inverting amplifier having an input terminal connected to the connection point for outputting a voltage that depends on a logarithm of a photocurrent of the light receiving element, wherein an output terminal of the first inverting amplifier is connected to a gate terminal of the MOS transistor, and the gate terminal is adjusted to a voltage that depends on the logarithm of the photocurrent; and having a second inverting amplifier connected to an output of the sensor circuit and operative as a sample-and-hold circuit to hold an input voltage and amplify a variation of the output of the sensor circuit, the method being performed by an initial program circuit of the pixel circuit, comprising the steps of:
sensing a reset signal for resetting the hold value of the sample-and-hold circuit and sending an event signal to an arbiter circuit in case the difference between the output of the sensor circuit and the hold value of the sample-and-hold circuit exceeds a given threshold voltage;
the reset signal is released upon completion of communication with the arbiter circuit.
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| JP2000156616A (en) * | 1998-11-19 | 2000-06-06 | Sony Corp | Multi-input differential amplifier circuit |
| CN103148779B (en) * | 2013-01-30 | 2016-01-13 | 中国科学院长春光学精密机械与物理研究所 | The adjusting gear of light source in position measurement apparatus |
| JP5856995B2 (en) * | 2013-03-29 | 2016-02-10 | 株式会社ジャパンディスプレイ | Electronic device and control method of electronic device |
| CN112005543A (en) * | 2018-04-30 | 2020-11-27 | 普罗菲斯公司 | System and method for asynchronous time-based image sensing |
| US10827135B2 (en) * | 2018-11-26 | 2020-11-03 | Bae Systems Information And Electronic Systems Integration Inc. | BDI based pixel for synchronous frame-based and asynchronous event-driven readouts |
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