CN116247729A - Full-level mode mixed modulation method suitable for few submodules MMC - Google Patents

Full-level mode mixed modulation method suitable for few submodules MMC Download PDF

Info

Publication number
CN116247729A
CN116247729A CN202310210570.2A CN202310210570A CN116247729A CN 116247729 A CN116247729 A CN 116247729A CN 202310210570 A CN202310210570 A CN 202310210570A CN 116247729 A CN116247729 A CN 116247729A
Authority
CN
China
Prior art keywords
bridge arm
pwm
modulation
level
sub
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202310210570.2A
Other languages
Chinese (zh)
Inventor
杨桢
李艳
李鑫
李�昊
韩磊
李佳译
徐彤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Liaoning Technical University
Original Assignee
Liaoning Technical University
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Liaoning Technical University filed Critical Liaoning Technical University
Priority to CN202310210570.2A priority Critical patent/CN116247729A/en
Publication of CN116247729A publication Critical patent/CN116247729A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J3/00—Circuit arrangements for ac mains or ac distribution networks
    • H02J3/38—Arrangements for parallely feeding a single network by two or more generators, converters or transformers
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J3/00—Circuit arrangements for ac mains or ac distribution networks
    • H02J3/01—Arrangements for reducing harmonics or ripples
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J3/00—Circuit arrangements for ac mains or ac distribution networks
    • H02J3/36—Arrangements for transfer of electric power between ac networks via a high-tension dc link
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H02M1/088—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/12—Arrangements for reducing harmonics from ac input or output
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/32—Means for protecting converters other than automatic disconnection
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/5387—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
    • H02M7/53871—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Inverter Devices (AREA)

Abstract

The invention discloses a mixed modulation method suitable for a full-level mode of a few-sub-module MMC, which provides a latest level PWM (NL-PWM) mixed modulation strategy (FL-NL-PWM) suitable for a full-level (FL) mode of the few-sub-module MMC of a direct-current power distribution network. The NL-PWM is expanded to a full level mode by the strategy, so that the output level is multiplied, the voltage quality is improved, and a bridge arm reactor and a circulation suppression strategy are assisted, so that the circulation current level is not bad from the basic level mode, and no extra loss is added.

Description

Full-level mode mixed modulation method suitable for few submodules MMC
Technical Field
The invention relates to the field of full-level mode mixed modulation methods of multi-level converters, in particular to a full-level mode mixed modulation method applicable to a few submodules MMC.
Background
Along with the continuous increase of renewable energy power generation capacity and the proportion of clean energy in the total energy consumption, the modularized multi-level converter (modular multilevel converter, MMC) is widely applied to the aspects of high-voltage direct current transmission, wind power, photovoltaic grid connection, island power supply and the like by virtue of the advantages of modularized design, good expansibility, high conversion efficiency and the like. In addition, compared with a traditional voltage source converter with low level number, the MMC can increase the output level number, reduce the harmonic content of the output side and the overall loss of the converter, so that the MMC with few submodules is widely applied to medium-low voltage distribution networks.
Due to the limitation of the voltage level of the direct-current power distribution network, the quantity of MMC submodules is small, the modulation mode is a key link for ensuring the safe and stable operation and economical operation of the MMC, and according to different application occasion demands, the traditional two modes of nearest level approximation modulation (nearest level modulation, NLM) and carrier phase-shift PWM (CPS-PWM) are generally adopted. The NLM strategy enables the ladder wave to approach the modulation wave through level number accumulation, but more low-order harmonic exists in the output voltage of few submodules MMC in the direct-current power distribution network; CPS-PWM output voltage waveform quality is higher, but the operation loss is higher, and complicated voltage equalizing control and circulation suppressing algorithm are relied on. Therefore, research on modulation strategies suitable for MMC with few submodules is needed to improve the operation performance of MMC in a direct current distribution network.
Disclosure of Invention
Aiming at the defects of the prior art, the invention provides a full-level mode mixed modulation method applicable to a few submodules MMC.
The technical scheme adopted by the invention is a full-level mode mixed modulation method applicable to a few submodules MMC, comprising the following steps:
step 1: for a three-phase n+1 level converter with 6 bridge arms and 6×n sub-modules, the structure of the converter is as shown in fig. 2, the higher the level number is, the higher the fitting degree of output voltage and sine reference wave is, and the lower the harmonic distortion rate is.
Step 1.1: according to kirchhoff's law, the bridge arm inductance voltage drop is ignored, and in a typical three-phase MMC, the upper and lower bridge arm voltages refer to the wave u pj 、u nj And an alternating voltage reference wave u vj Is a relational expression of:
Figure BDA0004112596580000011
step 1.2: upper and lower bridge arm output voltage U pj 、U nj
Figure BDA0004112596580000021
Wherein: round is a rounding function; delta is the reference voltage offset, and the moment of the level step change can be changed by adjusting delta.
Step 1.3: when NLM is in the basic level mode, delta takes on a value of 0; when NLM is in full level mode, Δ can be expressed as
Figure BDA0004112596580000022
Wherein: sgn (x) is a sign function, and has a value of x > 0, sgn (x) =1, x=0, and sgn (x) =0.
Step 2: when the number of sub-modules N is determined, the switching point angle increases as the modulation ratio decreases. The upper bridge arm and the lower bridge arm approach the sine modulation wave by using an N+1 level ladder wave, and the modulation principle is shown in figure 5. The numbers of the upper bridge arm input submodules Npj and Nnj are respectively
Figure BDA0004112596580000023
Wherein round (·) is a rounding function.
Step 3: comparing the same sine modulation wave with a plurality of triangular carriers with 2 pi/N phase difference according to a CPS-PWM modulation principle, and when the modulation wave is larger than the carrier, switching on a sub-module switch to output a high level; when the modulation wave is smaller than the carrier wave, the sub-module switch is closed, low level is output, and therefore multiple groups of PWM pulses are generated to drive the switches in all the sub-modules, and in a full-level mode, the frequency of level jitter in the sum of upper and lower bridge arm voltages is higher, and the influence on circulating current is smaller. As shown in fig. 7. In the full-level mode, the frequency of level jump in the sum of the voltages of the upper bridge arm and the lower bridge arm is higher, and the influence on the circulating current is smaller;
step 3.1: the average carrier frequency f is defined herein in consideration of the difference in the number of carriers for different modulation strategies c-ave CPS-PWM modulated f c-ave And carrier frequency f c Equal.
Step 3.2: fig. 9 shows the modulation principle of CPS-PWM. The phase difference of the triangular carrier waves of N sub-modules in the bridge arm is 2 pi/N, N PWM waves are generated after the phase difference is compared with the voltage reference wave of the same bridge arm, and N+1 level PWM waves are obtained after superposition.
Step 4: each bridge arm of NL-PWM can modulate multi-level PWM waves by only one triangular carrier wave, and NL-PWM needs to consider the number of sub-modules. According to the analysis, the number N of the submodules of the upper bridge arm and the lower bridge arm in the step wave state pj-s And N nj-s Can be expressed as
Figure BDA0004112596580000024
Wherein: floor is a downward rounding function
Step 4.1 PWM reference wave u of upper and lower bridge arm pj_p And u nj_p Can be expressed as
Figure BDA0004112596580000031
Step 4.2NL-PWM modulation,PWM pulse sequence of upper and lower bridge arm is N pj＿p And N nj＿p The total number of the sub-modules put into the upper bridge arm and the lower bridge arm can be expressed as
Figure BDA0004112596580000032
Under NL-PWM modulation, there is only one carrier in each bridge arm, therefore f c-ave ＝f c N. In the basic level modulation mode, the sum of the numbers of upper and lower bridge arm input submodules of NL-PWM modulation is N; in the full level mode, the sum of the numbers of the upper bridge arm input submodule and the lower bridge arm input submodule is not N, and jumps among N-1, N and N+1.
Step 5: through correcting the capacitance voltage of the sub-module, the ordering mode of the NL-PWM modulation strategy is simplified, and the running loss of the MMC is reduced while the balance of the capacitance voltage is ensured. Taking an upper bridge arm of a phase as an example, the capacitance voltage U' of the submodule after correction " cpa i can be expressed as
U″ cpai ＝-sgn(i pa )U cpai +S i U c (8)
Step 6: the sum of the numbers of the upper bridge arm and the lower bridge arm of FL-NL-PWM is jumped among N-1, N and N+1, so that a high-frequency component exists in the circulating current; because of the fluctuation of the capacitance voltage of the submodule, a frequency tilting component correspondingly exists in the circulation. Circulating current i cir The expression of (2) is
i cir ＝I 2 sin(2ωt+θ 2 )+I k sin(kωt+θ k ) (9)
Wherein: i 2 And I K The amplitude of the low-order and high-order circulation respectively; θ 2 And theta k The phase angles of the low and high order loops, respectively. The order of the higher harmonics is
k＝2N·f c-ave (10)
Step 7: and the harmonic analysis is carried out, the voltage harmonic is mainly higher harmonic, wherein the lower harmonic content has smaller influence on an alternating current system. Therefore, the waveform quality of FL-NL-PWM is better.
The beneficial effects of adopting above-mentioned technical scheme to produce lie in: the invention provides a full-level mode mixed modulation method suitable for a few submodules MMC. On the basis of the most recent level-approximated modulation (NLM), NL-PWM can be extended to full-level mode by adjusting the phase of the carrier, the number of levels of FL-NL-PWM output voltage is increased compared to the basic level mode. According to the proposed full-level mode mixed modulation method based on the MMC suitable for the few sub-modules, NL-PWM is expanded to a full-level mode to multiply the output level, so that the voltage quality is improved, a bridge arm reactor and a circulation suppression strategy are assisted, the low harmonic distortion rate of the voltage is reduced, and the current distortion degree is improved; so that the circulating current level is not bad from the basic level mode and no extra losses are added.
Drawings
Fig. 1 is a flowchart of a full-level mode hybrid modulation method suitable for a few submodules MMC according to the present invention.
Fig. 2 is a diagram of a three-phase n+1 level converter according to the present invention.
Fig. 3 is a diagram of a full level mode modulation scheme in accordance with the present invention.
FIG. 4 is a graph of the output voltage of NLM in different modulation modes according to the present invention, wherein (a) the basic level mode; (b) full level mode.
Fig. 5 is a schematic diagram of the NLM modulation of the present invention.
Fig. 6 is a graph of harmonic distortion of the output voltage under NLM modulation according to the present invention.
Fig. 7 is a graph of the output voltage of CPS-PWM in different modulation modes according to the present invention.
Fig. 8 is a graph of THD and THDL of the CPS-PWM output voltage in different modulation modes according to the present invention.
Fig. 9 is a schematic diagram of the CPS-PWM modulation of the present invention.
Fig. 10 is a schematic diagram of NL-PWM modulation according to the present invention.
FIG. 11 is a graph of the output voltage of NL-PWM in different modulation modes according to the present invention.
FIG. 12 is a flowchart of a sub-module ordering method according to an embodiment of the invention.
FIG. 13 is a schematic view of a circulation suppression strategy according to an embodiment of the present invention.
FIG. 14 is a diagram of an MMC simulation model in accordance with an embodiment of the present invention.
FIG. 15 is a cyclic current diagram of NL-PWM modulation in an embodiment of the invention.
Fig. 16 is a graph of THD and THDL of the output voltage under NL-PWM modulation according to an embodiment of the present invention.
Fig. 17 is a graph showing harmonic distortion ratio comparison of three modulation strategies in full-level mode according to an embodiment of the present invention.
Fig. 18 is a simulation result of FLM modulation strategy according to an embodiment of the present invention.
Fig. 19 is a diagram of simulation results of three modulation strategies in an embodiment of the present invention.
Detailed Description
The following describes in further detail the embodiments of the present invention with reference to the drawings and examples. The following examples are illustrative of the invention and are not intended to limit the scope of the invention;
this embodiment takes a typical three-phase MMC, a full-level MMC with n=6 as an example;
the technical scheme adopted by the invention is a full-level mode mixed modulation method suitable for a few submodules MMC, and the flow is shown in figure 1, and comprises the following steps:
step 1: for a three-phase n+1 level converter with 6 bridge arms and 6×n sub-modules, the structure of the converter is shown in fig. 2, the higher the level number is, the higher the fitting degree of output voltage and sine reference wave is, and the lower the harmonic distortion rate is;
step 1.1 according to kirchhoff's law, neglecting bridge arm inductance voltage drop, and in a typical three-phase MMC, upper and lower bridge arm voltage reference waves u pj 、u nj And an alternating voltage reference wave u vj Is a relational expression of:
Figure BDA0004112596580000051
step 1.2 output Voltage U of upper and lower bridge arm pj 、U nj
Figure BDA0004112596580000052
Wherein: round is a rounding function; delta is the reference voltage offset, and the moment of the level step change can be changed by adjusting delta.
Step 1.3, when NLM is in the basic level mode, delta takes on a value of 0; when NLM is in full level mode, Δ can be expressed as
Figure BDA0004112596580000053
Wherein: sgn (x) is a sign function, and has a value of x > 0, sgn (x) =1, x=0, and sgn (x) =0.
In this embodiment, fig. 3 is a full-level mode modulation scheme, and includes 2n+1 levels, where N is the number of bridge arm sub-modules, and the higher the number of levels, the higher the fitting degree between the output voltage and the sinusoidal reference wave, and the lower the harmonic distortion.
In this embodiment, fig. 4 shows that the number of levels of the output voltage of the few submodules MMC is greater in the full-level mode, the fitting degree of the output voltage step wave and the sinusoidal reference wave is higher, the harmonic distortion rate is lower, and the frequency of level jitter in the sum of the voltages of the upper bridge arm and the lower bridge arm of the NLM modulation strategy is lower in the full-level mode, so that the waveform of the circulating current is disturbed.
Step 2: when the number of sub-modules N is determined, the switching point angle increases as the modulation ratio decreases. The upper bridge arm and the lower bridge arm approach the sine modulation wave by using an N+1 level ladder wave, and the modulation principle is shown in figure 5. The numbers of the upper bridge arm input submodules Npj and Nnj are respectively
Figure BDA0004112596580000054
Wherein round (·) is a rounding function.
In the present embodiment, fig. 6 shows that THDL is a main component of the output voltage of the few submodules MMC in the case of NLM; in the full level mode, THD and THDL of the NLM modulated output voltage are significantly lower than in the basic level mode; both THD and TTHDL decrease with increasing N.
Step 3: comparing the same sine modulation wave with a plurality of triangular carriers with 2 pi/N phase difference according to a CPS-PWM modulation principle, and when the modulation wave is larger than the carrier, switching on a sub-module switch to output a high level; when the modulated wave is smaller than the carrier wave, the submodule switches are closed and a low level is output, thereby generating a plurality of groups of PWM pulses to drive the switches in each submodule, as shown in figure 7. In the full-level mode, the frequency of level jump in the sum of the voltages of the upper bridge arm and the lower bridge arm is higher, and the influence on the circulating current is smaller.
Step 3.1: the average carrier frequency f is defined herein in consideration of the difference in the number of carriers for different modulation strategies c-ave CPS-PWM modulated f c-ave And carrier frequency f c Equal, as in FIG. 8 for harmonic characteristic analysis of CPS-PWM, THD and THDL of the output voltage of few sub-modules MMC can be obtained along with f c_ave Is a variation of (2).
Step 3.2: fig. 9 shows the modulation principle of CPS-PWM. The phase difference of the triangular carrier waves of N sub-modules in the bridge arm is 2 pi/N, N PWM waves are generated after the phase difference is compared with the voltage reference wave of the same bridge arm, and N+1 level PWM waves are obtained after superposition.
Step 4: each bridge arm of NL-PWM can modulate multi-level PWM waves by only one triangular carrier wave, and NL-PWM needs to consider the number of sub-modules. As can be seen from the analysis, the number N of submodules of the upper bridge arm and the lower bridge arm in the step wave state is as shown in the NL-PWM modulation principle of FIG. 10 pj-s And N nj-s Can be expressed as:
Figure BDA0004112596580000061
wherein: floor is a downward rounding function
Step 4.1 PWM reference wave u of upper and lower bridge arm pj_p And u nj_p Can be expressed as:
Figure BDA0004112596580000062
when the phases of the triangular carriers differ by 180 degrees, NL-PWM is in a basic level mode; when the triangular carriers of the upper and lower bridge arms in the phase unit are identical, NL-PWM is in full level mode, as shown in FIG. 11. In the full-level mode, the frequency of level jump in the sum of the voltages of the upper bridge arm and the lower bridge arm is higher, and the influence on the circulating current is smaller.
Step 4.2NL-PWM modulation, the PWM pulse sequence of the upper bridge arm and the lower bridge arm is N pj-p And N nj-p The total number of the sub-modules put into the upper bridge arm and the lower bridge arm can be expressed as
Figure BDA0004112596580000063
Under NL-PWM modulation, there is only one carrier in each bridge arm, therefore f c-ave ＝f c N. In the basic level modulation mode, the sum of the numbers of upper and lower bridge arm input submodules of NL-PWM modulation is N; in the full level mode, the sum of the numbers of the upper bridge arm input submodule and the lower bridge arm input submodule is not N, and jumps among N-1, N and N+1.
Step 5: through correcting the capacitance voltage of the sub-module, the ordering mode of the NL-PWM modulation strategy is simplified, and the running loss of the MMC is reduced while the balance of the capacitance voltage is ensured. Taking an upper bridge arm of a phase as an example, the capacitance voltage U' of the submodule after correction " cpa i can be expressed as
U″ cpai ＝-sgn(i pa )U cpai +S i U c (8)
Step 6: FIG. 11 (b) shows that the sum of the numbers of upper and lower arms of FL-NL-PWM is jumped between N-1, N and N+1, so that high frequency components exist in the loop; because of the fluctuation of the capacitance voltage of the submodule, a frequency tilting component correspondingly exists in the circulation. Circulating current i cir The expression of (2) is
i cir ＝I 2 sin(2ωt+θ 2 )+I k sin(kωt+θ k ) (9)
Wherein: i 2 And I K The amplitude of the low-order and high-order circulation respectively; θ 2 And theta k The phase angles of the low and high order loops, respectively. The order of the higher harmonics is
k＝2N·f c-ave (10)
Because the order of the higher harmonics is higher, the bridge arm reactors can be adopted to well inhibit, while the lower harmonics are difficult to inhibit, and the circulation inhibition strategy shown in fig. 13 is adopted to inhibit the double frequency negative sequence circulation.
Step 7: the harmonic analysis is carried out, the voltage harmonic is mainly higher harmonic, the content of lower harmonic is lower, and the influence on an alternating current system is smaller, so that the waveform quality of FL-NL-PWM is better.
In this embodiment, fig. 12 is a flowchart of a submodule sequencing method according to the present invention, in which, each time a switching operation is performed, a submodule with the highest correction capacitance voltage among the submodules in the cut-off state is preferentially put in, and a submodule with the lowest correction capacitance voltage among the submodules in the put-in state is preferentially cut off, so as to ensure the balance of the capacitance voltages. In the full-level mode, the few submodules MMC adopt a method for sorting the capacitance voltages of the corrected submodules as shown in fig. 12.
In this embodiment, fig. 14 is a diagram of an MMC simulation model of the present invention, and in order to compare the circulating currents of NL-PWM modulation schemes in the basic level mode and the full level mode, waveforms of the circulating currents in the two modulation modes are shown in fig. 15.
In the present embodiment, as can be seen from FIG. 16, FIG. 16 shows THD and THDL of the output voltage under NL-PWM modulation according to the present invention, THD of the NL-PWM output voltage follows f c-ave The increase in THDL is not greatly changed but is significantly reduced; both THD and THDL decrease with increasing N; in the full-level mode, both THD and THDL of the output voltage are smaller than in the basic-level mode.
In this embodiment, fig. 17 is a graph showing the harmonic distortion ratio of three modulation strategies in the full-level mode according to the present invention, and the lower harmonic distortion ratio of NL-PWM and CPS-PWM in the level mode follows the average carrier frequency f c-ave Is decreased by an increase in (a); when the average carrier frequency f c-ave When larger, THDL of NL-PWM is smaller than NLM and CPS-PWM; THD of NL-PWM is greater than NLM and less than CPS-PWM.
In this embodiment, fig. 18 shows simulation results of the MMC of the present invention under the FL-NL-PWM modulation. Fig. 19 shows simulation results of three modulation strategies, NLM, CPS-PWM and NL-PWM, in full-level mode. The NL-PWM can be expanded to a full-level mode by adjusting the phase of the carrier wave, and compared with a basic level mode, the level number of the FL-NL-PWM output voltage is increased, the low harmonic distortion rate of the voltage is reduced, and the current distortion degree is improved; FL-NL-PWM confirms the working state of the submodule according to the sequencing result of the corrected capacitor voltage, all submodules in the bridge arm bear high-frequency PWM switch jump together, realize the balance of the capacitor voltage, avoid the submodule switch frequency from being too high; the FL-NL-PWM modulation strategy adopts bridge arm reactors to inhibit high-order components of circulating current, adopts a circulation inhibition strategy to eliminate low-order components, and has no obvious change in circulating current compared with a basic level mode.

Claims (8)

1. The full-level mode mixed modulation method suitable for the few submodules MMC is characterized by comprising the following steps of:
step 1: for a three-phase N+1 level converter with 6 bridge arms and 6 XN sub-modules, deriving upper and lower bridge arm voltage reference waves u according to kirchhoff's law pj 、u nj And an alternating voltage reference wave u vj Is a relational expression of (2);
step 2, when the number N of the sub-modules is determined, the angle of a switching point is increased along with the reduction of the modulation ratio, the upper bridge arm and the lower bridge arm approach a sine modulation wave by using an N+1 level ladder wave, and the numbers Npj and Nnj expressions of the upper bridge arm and the lower bridge arm input sub-modules are determined;
step 3: comparing the same sine modulation wave with a plurality of triangular carriers with 2 pi/N phase difference according to a CPS-PWM modulation principle, and when the modulation wave is larger than the carrier, switching on a sub-module switch to output a high level; when the modulation wave is smaller than the carrier wave, the sub-module switch is closed, low level is output, so that a plurality of groups of PWM pulses are generated to drive the switches in each sub-module, and in a full-level mode, the frequency of level jitter in the sum of upper and lower bridge arm voltages is higher, so that the influence on circulating current is smaller;
step 4: NL-PWM (negative pulse Width modulation) is used for rounding down the bridge arm voltage reference wave to obtain a step wave, and the number N of submodules of the upper bridge arm and the lower bridge arm in the step wave state is deduced pj-s And N nj-s Upper and lower bridgeArm PWM reference wave u pj-p And u nj-p An expression and a total expression of submodules invested by the upper bridge arm and the lower bridge arm;
step 5: through correcting the capacitance voltage of the sub-module, the ordering mode of the NL-PWM modulation strategy is simplified, and the running loss of the MMC is reduced while the balance of the capacitance voltage is ensured. Taking an a-phase upper bridge arm as an example, deducing corrected submodule capacitor voltage U', cpa an expression i;
step 6: FIG. 11 shows that the sum of the numbers of the upper and lower bridge arms of FL-NL-PWM is jumped between N-1, N and N+1, so that high frequency components exist in the circulating current; because of the fluctuation of the capacitance voltage of the submodule, a frequency tilting component correspondingly exists in the circulation. Circulating current i cir An expression of higher harmonics;
step 7: and the harmonic analysis is carried out, the voltage harmonic is mainly higher harmonic, wherein the lower harmonic content has smaller influence on an alternating current system. Therefore, the waveform quality of FL-NL-PWM is better.
2. The method for mixed modulation of MMC full-level mode for few sub-modules according to claim 1, wherein the procedure of step 1 is as follows:
step 1.1 according to kirchhoff's law, neglecting bridge arm inductance voltage drop, and in a typical three-phase MMC, upper and lower bridge arm voltage reference waves u pj 、u nj And an alternating voltage reference wave u vj Is a relational expression of:
Figure QLYQS_1
step 1.2 output Voltage U of upper and lower bridge arm pj 、U nj
Figure QLYQS_2
Wherein: round is a rounding function; delta is the reference voltage offset, and the moment of the level step change can be changed by adjusting delta;
step 1.3, when NLM is in the basic level mode, delta takes on a value of 0; when NLM is in full level mode, Δ can be expressed as
Figure QLYQS_3
Wherein: sgn (x) is a sign function, and has a value of x > 0, sgn (x) =1, x=0, and sgn (x) =0.
3. The method for mixed modulation of MMC full-level mode with fewer sub-modules according to claim 1, wherein the procedure of step 2 is as follows:
when the number of sub-modules N is determined, the switching point angle increases as the modulation ratio decreases. The upper bridge arm and the lower bridge arm approach the sine modulation wave by using an N+1 level ladder wave, and the modulation principle is shown in figure 5. The numbers of the upper bridge arm input submodules Npj and Nnj are respectively
Figure QLYQS_4
Wherein round (·) is a rounding function.
4. The method for mixed modulation of MMC full-level mode with fewer sub-modules according to claim 1, wherein the procedure of step 3 is as follows:
step 3.1 the average carrier frequency f is defined herein taking into account the difference in the number of carriers for different modulation strategies c-ave CPS-PWM modulated f c-ave And carrier frequency f c Equal, as in FIG. 8 for harmonic characteristic analysis of CPS-PWM, THD and THDL of the output voltage of few sub-modules MMC can be obtained along with f c_ave Is a change in conditions of (2);
step 3.2 fig. 9 shows the modulation principle of CPS-PWM. The phase difference of the triangular carrier waves of N sub-modules in the bridge arm is 2 pi/N, N PWM waves are generated after the phase difference is compared with the voltage reference wave of the same bridge arm, and N+1 level PWM waves are obtained after superposition.
5. The method for mixed modulation of MMC full-level mode with fewer sub-modules according to claim 1, wherein the procedure of step 4 is as follows:
each bridge arm of NL-PWM can modulate multi-level PWM waves by only one triangular carrier wave, and NL-PWM needs to consider the number of sub-modules. As can be seen from the analysis, the number N of submodules of the upper bridge arm and the lower bridge arm in the step wave state is as shown in the NL-PWM modulation principle of FIG. 10 pj-s And N nj-s Can be expressed as
Figure QLYQS_5
Wherein: floor is a downward rounding function
Step 4.1 PWM reference wave u of upper and lower bridge arm pj_p And u nj_p Can be expressed as
Figure QLYQS_6
When the phases of the triangular carriers differ by 180 degrees, NL-PWM is in a basic level mode; when the triangular carriers of the upper and lower bridge arms in the phase unit are identical, NL-PWM is in full level mode, as shown in FIG. 11. In the full-level mode, the frequency of level jump in the sum of the voltages of the upper bridge arm and the lower bridge arm is higher, and the influence on the circulating current is smaller;
step 4.2NL-PWM modulation, the PWM pulse sequence of the upper bridge arm and the lower bridge arm is N pj-p And N nj-p The total number of the sub-modules put into the upper bridge arm and the lower bridge arm can be expressed as
Figure QLYQS_7
Under NL-PWM modulation, there is only one carrier in each bridge arm, therefore f c-ave ＝f c N. In the basic level modulation mode,
the sum of the numbers of the upper bridge arm and the lower bridge arm input submodules of NL-PWM modulation is N; in the full level mode, the sum of the numbers of the upper bridge arm input submodule and the lower bridge arm input submodule is not N, and jumps among N-1, N and N+1.
6. The method of claim 1, wherein the step 5 is performed as follows:
by correcting the capacitance voltage of the sub-module, the ordering mode of the NL-PWM modulation strategy is simplified, and the running loss of the MMC is reduced while the balance of the capacitance voltage is ensured. Taking an upper bridge arm of a phase as an example, the capacitance voltage U' of the submodule after correction " cpa i can be expressed as
U″ cpai ＝-sgn(i pa )U cpai +S i U c (8) 。
7. The method for mixed modulation of MMC full-level mode with fewer sub-modules according to claim 1, wherein the procedure of step 6 is as follows:
the sum of the numbers of the upper bridge arm and the lower bridge arm of FL-NL-PWM is jumped among N-1, N and N+1, so that a high-frequency component exists in the circulating current; because of the fluctuation of the capacitance voltage of the submodule, a frequency tilting component correspondingly exists in the circulation. Circulating current i cir The expression of (2) is
i cir ＝I 2 sin(2ωt+θ 2 )+I k sin(kωt+θ k ) (9)
Wherein: i 2 And I K The amplitude of the low-order and high-order circulation respectively; θ 2 And theta k The phase angles of the low and high order loops, respectively. The order of the higher harmonics is
k＝2N·f c-ave 。
8. The method of claim 1, wherein,
the process of the step 7 is as follows:
the harmonic analysis is carried out, the voltage harmonic is mainly higher harmonic, wherein the content of lower harmonic is lower, and the influence on an alternating current system is smaller; therefore, the waveform quality of FL-NL-PWM is better.
CN202310210570.2A 2023-03-07 2023-03-07 Full-level mode mixed modulation method suitable for few submodules MMC Pending CN116247729A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202310210570.2A CN116247729A (en) 2023-03-07 2023-03-07 Full-level mode mixed modulation method suitable for few submodules MMC

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202310210570.2A CN116247729A (en) 2023-03-07 2023-03-07 Full-level mode mixed modulation method suitable for few submodules MMC

Publications (1)

Publication Number Publication Date
CN116247729A true CN116247729A (en) 2023-06-09

Family

ID=86631051

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202310210570.2A Pending CN116247729A (en) 2023-03-07 2023-03-07 Full-level mode mixed modulation method suitable for few submodules MMC

Country Status (1)

Country Link
CN (1) CN116247729A (en)

Similar Documents

Publication Publication Date Title
CN109120169B (en) Voltage-sharing control method for cascade two-stage inverter
CN115250074B (en) Electrolytic hydrogen production rectifier with harmonic wave and ripple wave compensation function and control method
CN110994964B (en) Modulation method for reducing alternating current voltage low-order harmonic waves of modular multilevel converter
CN110783965B (en) Micro-source power coordination method suitable for micro-grid with MMC half-bridge series structure
CN114530883A (en) Power control method, device and system of light storage integrated grid-connected inverter
CN111740624B (en) High-gain multi-level DC/AC (direct current/alternating current) conversion topology and method
CN111756264B (en) Nearest half-level approximation PWM (pulse-Width modulation) hybrid modulation method suitable for medium-voltage three-phase MMC (modular multilevel converter)
CN112636625A (en) Improved carrier phase-shifting modulation strategy applied to MMC
CN217883245U (en) Three-phase three-level converter circuit
CN114977859B (en) Three-phase N-module cascading type unidirectional energy flow multi-level frequency converter and control method
CN116247729A (en) Full-level mode mixed modulation method suitable for few submodules MMC
Tarassodi et al. Single-phase multi-level inverter suitable for symmetrical and asymmetrical photovoltaic (PV) applications
CN110247565A (en) Cascade multi-level converter DC capacitor minimizes method
CN112803808B (en) Control method for reducing high-frequency pulsating current on direct current side of modular multilevel converter
CN113224964A (en) Control method of single-phase single-stage boost inverter
Zhang Design and Simulation Implementation of All-DC Offshore Wind Power System
CN104578731A (en) Harmonic suppression double closed loop control circuit and harmonic suppression device
CN110365244B (en) Frequency error modulation method for reducing THD of single-phase photovoltaic grid-connected inverter
CN114865935B (en) Carrier mixed pulse width modulation strategy control method of modularized multi-level converter
CN113972850B (en) NL-SPWM-based MMC double-bridge arm complementary hybrid modulation method
CN112134477B (en) Frequency reduction control method of modular multilevel converter with auxiliary sub-modules
CN113258803B (en) Capacitor voltage balance control system and method of modular multilevel converter
CN115549166A (en) Modulation level jump control method and system
Zhang et al. A High Performance of Three-phase Electrolytic Capacitor-Less LC-Type Grid-connected Inverter System with Multiple PV Arrays
Song et al. A Method for Suppressing DC-Link Ripples of Multilevel Packed U-Cell Inverter by Compensate-Control Combination

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination