CN116246585A - Display device and related system chip - Google Patents
Display device and related system chip Download PDFInfo
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- CN116246585A CN116246585A CN202111481776.6A CN202111481776A CN116246585A CN 116246585 A CN116246585 A CN 116246585A CN 202111481776 A CN202111481776 A CN 202111481776A CN 116246585 A CN116246585 A CN 116246585A
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- backlight control
- image data
- input image
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/3406—Control of illumination source
- G09G3/342—Control of illumination source using several illumination sources separately controlled corresponding to different display panel areas, e.g. along one dimension such as lines
- G09G3/3426—Control of illumination source using several illumination sources separately controlled corresponding to different display panel areas, e.g. along one dimension such as lines the different display panel areas being distributed in two dimensions, e.g. matrix
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- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
The invention discloses a display device and a related system chip. The system chip is used for generating a plurality of backlight control signals according to input image data; the driving chips are coupled to the system chip and are used for respectively receiving the backlight control signals to generate driving signals; and the plurality of groups of light emitting diodes are respectively coupled with the plurality of driving chips, and the plurality of driving signals are used for respectively controlling the brightness of the plurality of groups of light emitting diodes.
Description
Technical Field
The invention relates to backlight control of a display panel.
Background
In current liquid crystal displays (Liquid Crystal Display, LCDs), local dimming (local dimming) technology is applied in many products to improve image contrast. With the development of sub-millimeter light emitting diodes (mini LEDs), the lcd panel is divided into more areas for area light control, for example, the number of areas may be more than 1000, so that multiple driving chips are required to control the sub-millimeter LEDs in such many areas. However, in order to perform area light control by using multiple driving chips, one or more relay chips are required to receive area brightness information from the system chip, and multiple control signals are generated according to the area brightness information to multiple driving chips, and the one or more relay chips increase the signal transmission time, that is, increase the backlight delay.
Disclosure of Invention
It is therefore an object of the present invention to provide a method for reducing backlight delay, which solves the above-mentioned problems.
In one embodiment of the invention, a display device is disclosed that includes a system-on-chip, a plurality of driver chips, and a plurality of groups of light emitting diodes. The system chip is used for generating a plurality of backlight control signals according to input image data; the driving chips are coupled to the system chip and are used for respectively receiving the backlight control signals to generate driving signals; and the plurality of groups of light emitting diodes are respectively coupled with the plurality of driving chips, and the plurality of driving signals are used for respectively controlling the brightness of the plurality of groups of light emitting diodes.
In one embodiment of the invention, a system chip for a display device is disclosed, which includes an image processing circuit, and a plurality of output ports. The image processing circuit is used for generating processed input image data according to the input image data; the image processing circuit is used for generating a plurality of backlight control signals according to the input image data or the processed input image data, wherein each backlight control signal is used for controlling a group of light emitting diodes of a display panel of the display device; and the plurality of output ports are coupled to the backlight control circuit and are respectively used for receiving and outputting the plurality of backlight control signals.
In one embodiment of the present invention, a display device is disclosed, which includes a system chip, a microprocessor, a plurality of driving chips, and a plurality of groups of light emitting diodes. The system chip is used for generating an initial backlight control signal according to input image data; the microprocessor is used for receiving the initial backlight control signal and splitting the initial backlight control signal to generate a plurality of backlight control signals; the driving chips are coupled to the system chip and used for respectively receiving the backlight control signals to generate driving signals; the plurality of groups of light emitting diodes are respectively coupled with the plurality of driving chips, wherein the plurality of driving signals are used for respectively controlling the brightness of the plurality of groups of light emitting diodes; the system chip uses a single buffer transmission mode to generate and output the initial backlight control signal according to the content of the received input image data before the input image data is completely received.
Drawings
Fig. 1 is a schematic view of a display device according to an embodiment of the present invention.
FIG. 2 is a timing diagram of input image data, a plurality of backlight control signals and a plurality of driving signals according to an embodiment of the invention.
FIG. 3 is a timing diagram of input image data, a plurality of backlight control signals and a plurality of driving signals according to another embodiment of the present invention.
FIG. 4 is a timing diagram of input image data, a plurality of backlight control signals and a plurality of driving signals according to another embodiment of the present invention.
FIG. 5 is a timing diagram of input image data, a plurality of backlight control signals and a plurality of driving signals according to another embodiment of the present invention.
Fig. 6 is a schematic view of a display device according to another embodiment of the present invention.
FIG. 7 is a timing diagram of input image data, initial backlight control signals, backlight control signals and driving signals according to an embodiment of the invention.
[ symbolic description ]
100 display device
110 system chip
112 image processing circuit
114 backlight control circuit
116_1 to 116_N output ports
120_1 to 120_N driving chip
130_1 to 130_N light emitting diodes
600 display device
610 system chip
612 image processing circuit
614 backlight control circuit
616 output port
620 microprocessor
630_1 to 630_N driving chip
640_1-640_N light emitting diode
Din, input image data
Dout initial backlight control Signal
Dout 1-DoutN backlight control signals
DR 1-DRN drive signals
A-F picture frame
Backlight control signals of A1-AN: frame A
B1-BN: backlight control signals of frame B
C1 to CN backlight control signals of the picture frame C
D1 to DN, backlight control signal of frame D
E1 to EN backlight control signals of the frame E
F1-FN backlight control signal of frame F
Detailed Description
Fig. 1 is a schematic diagram of a display device 100 according to an embodiment of the invention. As shown in fig. 1, the display device 100 includes a system chip 110, a plurality of driving chips 120_1 to 120_n, and a plurality of light emitting diodes 130_1 to 130_n, wherein the system chip 110 includes an image processing circuit 112, a backlight control circuit 114, and a plurality of output ports 116_1 to 116_n. In the present embodiment, the display device 100 is a liquid crystal display device, and each of the plurality of sets of leds 130_1 to 130_n is a one-millimeter led, but the invention is not limited thereto.
In the operation of the display device 100, the system chip 110 receives an input image data Din, the image processing circuit 112 performs an image processing operation on the input image data Din to generate processed input image data to the display panel for display thereon, and the backlight control circuit 114 generates a plurality of backlight control signals Dout1 to DoutN according to the input image data Din and/or the processed input image data of the image processing circuit 112 and transmits the backlight control signals Dout1 to DoutN to the driving chips 120_1 to 120_n through the plurality of output ports 116_1 to 116_n, respectively. It should be noted that, since the focus of the present embodiment is on the design of the output port and the corresponding backlight control signal in the system chip 110, and the operation of the image processing circuit 112 is well known to those skilled in the art, the details of the image processing circuit 112 are not repeated in the specification. Then, the driving chips 120_1 to 120_n process the backlight control signals Dout1 to DoutN respectively to generate a plurality of driving signals DR1 to DRN to the plurality of light emitting diodes 130_1 to 130_n, so as to control the brightness of each of the plurality of light emitting diodes 130_1 to 130_n.
In the embodiment shown in fig. 1, each of the plurality of light emitting diodes 130_1 to 130_n is used to determine the brightness of an area on a display panel of the display device 100, and one set of light emitting diodes includes a plurality of light emitting diodes, and a driving chip is used to control the brightness of one set of light emitting diodes. For example, assuming that the display device 100 includes four sets of light emitting diodes (i.e., N is equal to 4) and each set of light emitting diodes includes 500 light emitting diodes, the backlight control circuit 114 sequentially transmits the backlight control signal Dout1 including 500 pieces of brightness information to the driving chip 120_1 through the output port 116_1 to generate the driving signal DR1 including 500 pieces of brightness information to control the brightness of 500 light emitting diodes in the first set of light emitting diodes 130_1; meanwhile, the backlight control circuit 114 sequentially transmits the backlight control signal Dout2 containing 500 pieces of brightness information to the driving chip 120_2 through the output port 116_2, so as to generate the driving signal DR2 containing 500 pieces of brightness information to control the brightness of 500 light emitting diodes in the second group of light emitting diodes 130_2; the backlight control circuit 114 sequentially transmits a backlight control signal Dout3 containing 500 pieces of brightness information to the driving chip 120_3 through the output port 116_3, so as to generate a driving signal DR3 containing 500 pieces of brightness information to control the brightness of 500 light emitting diodes in the third group of light emitting diodes 130_3; the backlight control circuit 114 sequentially transmits the backlight control signal Dout4 containing 500 pieces of brightness information to the driving chip 120_4 through the output port 116_4, so as to generate the driving signal DR4 containing 500 pieces of brightness information to control the brightness of 500 light emitting diodes in the fourth group of light emitting diodes 130_4.
Fig. 2 is a timing diagram of the input image data Din, the backlight control signals Dout1 to DoutN and the driving signals DR1 to DRN according to an embodiment of the invention. Referring to fig. 2, the input image data Din sequentially includes image data of a plurality of different frames (a to F are respectively indicated by a plurality of frames), and after receiving the image data of each frame in the input image data Din, the backlight control circuit 114 simultaneously transmits the backlight control signals Dout1 to DoutN to the driving chips 120_1 to 120_n for generating the driving signals DR1 to DRN, wherein A1 to AN are respectively indicated by the backlight control signals Dout1 to DoutN and B1 to BN of the frame a respectively indicate the backlight control signals Dout1 to DoutN and … of the frame B, and so on. It should be understood that in fig. 2 and the following figures, the arrows between the frames are used to represent the vertical synchronization signals (vertical synchronization; vsync).
In the embodiment shown in fig. 1 and 2, since the system chip 110 is provided with a plurality of output ports 116_1 to 116_n to respectively transmit a plurality of backlight control signals Dout1 to DoutN to the driving chips 120_1 to 120_n, no relay chip is required between the system chip 110 and the driving chips 120_1 to 120_n, for example, a microprocessor is not required between the system chip 110 and the driving chips 120_1 to 120_n to shunt the backlight control signals, so that not only the manufacturing cost can be reduced, but also the signal transmission time can be effectively reduced to reduce the backlight delay.
In an embodiment, in order to reduce the signal transmission time more effectively, the driving chips 120_1 to 120_n may employ a single buffer (single buffer) transmission mode to generate the driving signals DR1 to DRN sequentially according to the content of the received backlight control signals before the complete backlight control signals are received. Taking fig. 3 as AN example for illustration, the backlight control signals Dout1 to DoutN of the frame a are respectively shown in the illustrated A1 to AN, and the driving chips 120_1 to 120_n have already generated the driving signals DR1 to DRN corresponding to the frame a before the driving chips 120_1 to 120_n have not received all the A1 to AN; and B1-BN are shown to represent the backlight control signals Dout 1-DoutN of the frame B, respectively, and the driving chips 120_1-120_N have already generated the driving signals DR 1-DRN, … corresponding to the frame B before the driving chips 120_1-120_N have received all of the B1-BN, and so on. Therefore, as shown in fig. 3, the time delay of the input video data Din and the corresponding driving signals DR1 to DRN can be shorter, so that the backlight delay can be further reduced.
In another embodiment, in order to reduce the signal transmission time more effectively, the backlight control circuit 114 may employ a single buffer transmission method to generate the backlight control signals Dout1 to DoutN sequentially according to the content of the received input image data Din before the complete input image data Din is received. Taking fig. 4 as AN example, before the driving chips 120_1 to 120_n have received the complete contents of the frame a, the backlight control circuit 114 starts outputting the backlight control signals Dout1 to DoutN (denoted by A1 to AN) respectively representing the frame a; and before the driving chips 120_1 to 120_n have received the complete contents of the frame B, the backlight control circuit 114 has already started to output the backlight control signals Dout1 to DoutN (denoted by B1 to BN) respectively representing the frame B, …, and so on. Therefore, as shown in fig. 4, the time delay of the input video data Din and the corresponding driving signals DR1 to DRN can be shorter, so that the backlight delay can be further reduced.
In another embodiment, in order to reduce the signal transmission time more effectively, the backlight control circuit 114 may employ a single buffer transmission method to generate the backlight control signals Dout1 to DoutN sequentially according to the content of the received input image data Din before the complete input image data Din is not received, and the driving chips 120_1 to 120_n may employ a single buffer transmission method to generate the driving signals DR1 to DRN sequentially according to the content of the received backlight control signals before the complete backlight control signals are not received. Taking fig. 5 as AN example, before the driving chips 120_1 to 120_n have received the complete contents of the frame a, the backlight control circuit 114 has already started to output the backlight control signals Dout1 to DoutN (denoted by A1 to AN) respectively representing the frame a, and before the driving chips 120_1 to 120_n have not received all of the A1 to AN, the driving chips 120_1 to 120_n have generated the driving signals DR1 to DRN corresponding to the frame a; and
before the driving chips 120_1 to 120_n have not received the complete contents of the frame B, the backlight control circuit 114 has already started to output backlight control signals Dout1 to DoutN (denoted by B1 to BN) respectively representing the frame B, and before the driving chips 120_1 to 120_n have not received all of the B1 to BN, the driving chips 120_1 to 120_n have already generated driving signals DR1 to DRN, … corresponding to the frame B, and so on. Therefore, as shown in fig. 5, the time delay of the input video data Din and the corresponding driving signals DR1 to DRN can be shorter, so that the backlight delay can be further reduced.
Fig. 6 is a schematic diagram of a display device 600 according to an embodiment of the invention. As shown in fig. 6, the display device 600 includes a system chip 610, a microprocessor 620, a plurality of driving chips 630_1 to 630_n, and a plurality of light emitting diodes 640_1 to 640_n, wherein the system chip 610 includes an image processing circuit 612, a backlight control circuit 614, and an output port 616. In the present embodiment, the display device 600 is a liquid crystal display device, and each of the plurality of sets of leds 640_1 to 640_n is a one-millimeter led, but the invention is not limited thereto.
In the embodiment shown in fig. 6, each of the plurality of light emitting diodes 640_1 to 640_n is used to determine the brightness of an area on a display panel of the display device 600, and one light emitting diode group includes a plurality of light emitting diodes, and a driving chip is used to control the brightness of one light emitting diode group. For example, the display device 600 may include four sets of light emitting diodes (i.e., N is equal to 4), and each set of light emitting diodes may include 500 light emitting diodes.
In operation of the display device 600, the system chip 610 receives an input image data Din, the image processing circuit 612 performs an image processing operation on the input image data Din to generate processed image data to the display panel for display thereon, and the backlight control circuit 614 generates an initial backlight control signal Dout according to the input image data Din and/or the processed image data of the image processing circuit 612 and transmits the initial backlight control signal Dout to the microprocessor 620 through the output port 616. Next, the microprocessor 620 performs a splitting process on the initial backlight control signal Dout to generate a plurality of backlight control signals Dout1 to DoutN, and transmits the backlight control signals Dout1 to DoutN to the driving chips 630_1 to 630_n, respectively. Then, the driving chips 630_1 to 630_n process the backlight control signals Dout1 to DoutN respectively to generate a plurality of driving signals DR1 to DRN to the plurality of light emitting diodes 640_1 to 640_n, so as to control the brightness of each of the plurality of light emitting diodes 640_1 to 640_n.
Fig. 7 is a timing diagram of the input image data Din, the initial backlight control signal Dout, the plurality of backlight control signals Dout1 to DoutN and the plurality of driving signals DR1 to DRN according to an embodiment of the invention. Referring to fig. 7, the backlight control circuit 614 may employ a single buffer transmission method to sequentially generate the initial backlight control signal Dout according to the content of the received input image data Din before the complete input image data Din is received; the microprocessor 620 may also employ a single buffer transmission method to sequentially generate the backlight control signals Dout1 to DoutN according to the content of the received initial backlight control signal Dout before the complete initial backlight control signal Dout is received; the driving chips 630_1 to 630_n may also adopt a single buffer transmission mode to sequentially generate the driving signals DR1 to DRN according to the content of the received backlight control signals before the complete backlight control signals are received. Taking fig. 7 as AN example, before the driving chips 630_1-630_n have received the complete contents of the frame a, the backlight control circuit 614 starts outputting the initial backlight control signals Dout respectively representing the frame a, and before the microprocessor 620 has not received the complete initial backlight control signals Dout corresponding to the frame a, the backlight control signals Dout 1-DoutN (denoted as A1-AN) respectively representing the frame a are sequentially generated according to the received contents of the initial backlight control signals Dout, and before the driving chips 630_1-630_n have not received all of the A1-AN, the driving chips 630_1-630_n have generated the driving signals DR 1-DRN … corresponding to the frame a, and so on. Accordingly, as shown in fig. 7, the time delay of the input video data Din and the corresponding driving signals DR1 to DRN can be shortened, so that the backlight delay can be reduced.
Briefly summarizing the present invention, in the display device of the present invention, by directly providing a plurality of output ports in a system chip to directly output a plurality of backlight control signals to a plurality of driving chips, the cost of a relay chip can be saved and the time delay between input image data and corresponding driving signals can be shortened. In addition, by using a single buffer transfer scheme for data transfer between chips, backlight delay can be further reduced.
The foregoing description is only of the preferred embodiments of the invention, and all changes and modifications that come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein.
Claims (10)
1. A display device, comprising:
a system chip for generating a plurality of backlight control signals according to an input image data;
the driving chips are coupled to the system chip and are used for respectively receiving the backlight control signals to generate a plurality of driving signals; and
the driving signals are used for controlling the brightness of the light emitting diodes respectively.
2. The display device of claim 1, wherein the system-on-chip comprises:
an image processing circuit for generating processed input image data according to the input image data;
a backlight control circuit for generating the backlight control signals according to the input image data or the processed input image data; and
the output ports are coupled to the backlight control circuit and are respectively used for receiving and outputting the backlight control signals.
3. The display device of claim 1, wherein the system chip directly transmits the backlight control signals to the driving chips, respectively, without any relay chip between the system chip and the driving chips.
4. The display device of claim 1, wherein the input image data is a frame image data, and the system-on-chip uses a single buffer transmission to generate and output the backlight control signals according to the content of the received input image data before the input image data is completely received.
5. The display device of claim 1, wherein the plurality of backlight control signals are backlight control signals of a frame, and the plurality of driving chips respectively use a single buffer transmission mode to generate the plurality of driving signals according to the content of the received plurality of backlight control signals before the plurality of backlight control signals are completely received.
6. The display device of claim 1, wherein the input image data is a frame image data, and the system chip uses a single buffer transmission to generate and output the backlight control signals according to the content of the received input image data before the input image data is completely received; and the driving chips respectively use the single buffer transmission mode to generate the driving signals according to the received contents of the backlight control signals before the backlight control signals are completely received.
7. A system-on-chip for a display device, comprising:
an image processing circuit for generating processed input image data according to the input image data;
a backlight control circuit for generating a plurality of backlight control signals according to the input image data or the processed input image data, wherein each backlight control signal is used for controlling a group of light emitting diodes of a display panel of the display device; and
the output ports are coupled to the backlight control circuit and are respectively used for receiving and outputting the backlight control signals.
8. The system-on-chip of claim 7, wherein the input image data is frame image data, and the backlight control circuit uses a single buffer transmission to generate and output the backlight control signals according to the received input image data or the processed input image data before the input image data or the processed input image data is completely received.
9. A display device, comprising:
a system chip for generating an initial backlight control signal according to an input image data;
the microprocessor is used for receiving the initial backlight control signal and splitting the initial backlight control signal to generate a plurality of backlight control signals;
the driving chips are coupled to the microprocessor and used for respectively receiving the backlight control signals to generate driving signals; and
the light emitting diodes are respectively coupled with the driving chips, and the driving signals are used for respectively controlling the brightness of the light emitting diodes;
the system chip uses a single buffer transmission mode to generate and output the initial backlight control signal according to the content of the received input image data before the input image data is completely received.
10. The display device of claim 9, wherein the plurality of driving chips respectively use the single buffer transmission mode to generate the plurality of driving signals according to the content of the received plurality of backlight control signals before the plurality of backlight control signals are completely received.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111481776.6A CN116246585A (en) | 2021-12-07 | 2021-12-07 | Display device and related system chip |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111481776.6A CN116246585A (en) | 2021-12-07 | 2021-12-07 | Display device and related system chip |
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| Publication Number | Publication Date |
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| CN116246585A true CN116246585A (en) | 2023-06-09 |
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| CN202111481776.6A Pending CN116246585A (en) | 2021-12-07 | 2021-12-07 | Display device and related system chip |
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| CN (1) | CN116246585A (en) |
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- 2021-12-07 CN CN202111481776.6A patent/CN116246585A/en active Pending
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