CN116234293A

CN116234293A - Electronic component patch path optimization method, electronic component patch path optimization equipment, medium and terminal

Info

Publication number: CN116234293A
Application number: CN202211570527.9A
Authority: CN
Inventors: 李明辉; 石小秋; 谢心澜; 张敏; 蔡勇; 石宇强; 余家欣; 袁雪娇; 李永桥; 张德虎
Original assignee: Southwest University of Science and Technology
Current assignee: Southwest University of Science and Technology
Priority date: 2022-12-08
Filing date: 2022-12-08
Publication date: 2023-06-06

Abstract

The invention belongs to the technical field of electronics, and discloses a method, equipment, medium and terminal for optimizing a patch path of an electronic component, wherein machine parameters and PCB data file information are imported before formal production, and preparation work before production is determined; determining mounting point information of the components of the corresponding type of the suction rod mounting according to the guiding information; constructing a cycleMount structure array based on the provided information; analyzing the cycleMount structure array by adopting a clustering algorithm to determine the element serial numbers of the suction rod mounting in each pick-up period; determining the mounting sequence and the mounting path of each component by adopting an evolutionary algorithm; and (5) carrying out surface mounting by a surface mounting machine according to the surface mounting sequence and the surface mounting path of each component. The invention can be used for the formulation of a multiaxial linkage suction nozzle flying arrangement strategy and an electronic component surface mounting path optimization scheme, saves the working time of the surface mounting machine and improves the working efficiency.

Description

Electronic component patch path optimization method, electronic component patch path optimization equipment, medium and terminal

Technical Field

The invention belongs to the technical field of electronics, and particularly relates to a method, equipment, medium and terminal for optimizing a patch path of an electronic component.

Background

Today, printed Circuit Boards (PCBs) that are rapidly developing in the electronics field are becoming increasingly popular for use in life. While the pursuit of elaborate articles has been pursued, higher demands are being placed on PCB boards. Therefore, electronic components on the PCB board are also commonly used by electronic enterprises through a patch (SMT) technology. In the current electronic enterprises, SMT working procedures are mostly formulated by technicians according to own experience, but due to the characteristics of large number and various electronic components of the PCB, the schemes formulated by manual experience only have low efficiency in production practice, and the operation efficiency of the chip mounter is far away from an ideal state. The main reasons are that the nozzle is arranged on a strategy and the patch path of the electronic component is selected, and the nozzle and the patch path are closely connected and restrained. Therefore, in order to improve the operation efficiency of the chip mounter and bring various processing potential of the chip mounter into full play, a planning method needs to be developed aiming at the close relationship of the chip mounter and the suction nozzle, so that the suction nozzle is more reasonably arranged and the optimization of the chip mounting path is met.

At present, the city is relatively isolated for the arrangement of the nozzle of the Feida and the research of the patch path of the electronic component, and the compactness of the nozzle and the patch path is considered in a small part, but the research method is too single and cannot effectively solve the fundamental problem. Mainstream researches disassemble the path optimization process of the chip mounter into two mutually coupled sub-problems: nozzle fly-to arrangement and electronic component path optimization. Both of these problems are NP-hard problems, and there is no solution yet. However, the electronic component path optimization problem is similar to the business problem and is a classical combination optimization problem, so that the problem is often solved by using an intelligent algorithm to obtain a satisfactory solution.

Through the above analysis, the problems and defects existing in the prior art are as follows: in the prior art, the patch path planning algorithm is single and low in precision, the path searching time of the planning method is long, the planning effect is not ideal, and the operation efficiency of the patch machine is low. The path optimization algorithm provided by the invention combines the arrangement of the flying to suction nozzle and the path optimization of the chip mounter, so that the operation efficiency of the chip mounter can be improved, and the energy consumption can be reduced.

Disclosure of Invention

Aiming at the problems existing in the prior art, the invention provides a method, equipment, medium and terminal for optimizing a patch path of an electronic component.

The invention is realized in such a way that the electronic component patch path optimizing method comprises the following steps:

step one, importing machine parameters and PCB data file information before formal production, and determining preparation work before production; determining mounting point information of the components of the corresponding type of the suction rod mounting according to the guiding information;

step two, constructing a cycleMount structure array on the basis of the provided information;

and thirdly, clustering coordinates (a cycleMount structure array) of the components by using a clustering algorithm, and gathering positions to be mounted into several types according to the aggregation degree.

And step four, adopting an evolutionary algorithm in each class to further optimize the path.

Further, in the first step, the specific process of importing the machine parameters and the information of the PCB data file is as follows:

importing machine parameters;

importing PCB data;

further, in the second step, the specific process of constructing the cycleMount structure array based on the provided information is as follows:

further, in the third step, the specific process of the clustering algorithm is as follows:

counting the occurrence times of each class label in the K adjacent samples;

and selecting the class label with the largest occurrence frequency as the class label of the unknown sample.

In the third step, a clustering algorithm is adopted to analyze the cycleMount structure array, and the specific process is as follows:

according to a specific standard, the process of dividing the collection of physical or abstract objects into a plurality of classes composed of similar objects enables the data objects of the same class to have similarity, and the data objects in different classes have differences, so that the data classification is completed.

Further, in the fourth step, the specific process of the evolutionary algorithm is as follows:

in the fourth step, the specific process of determining the mounting sequence and the mounting path of each component by adopting the evolutionary algorithm is as follows:

determining an initial arrangement strategy and an electronic component patch path according to the related information of the clustering analysis result; calculating the time required by the whole material taking process according to the determined material taking speed and the material station position parameter information;

then adopting an evolutionary algorithm to analyze the positions of the suction nozzle and the flying head in each generation of calculation as a calculation main body; when beneficial to reducing the mounting time, is called an optimization factor; when disadvantageous for reducing mounting time, called a deleterious factor; reserving the optimization factors, adjusting the harmful factors, then performing next iterative computation, and finally converging the mounting time within a certain range through a certain number of genetic iterations to obtain a final nozzle flying arrangement strategy and an electronic component mounting path; and outputting the calculated nozzle flying arrangement strategy and the electronic component patch path in a list form which is convenient for a user to read.

Further, in the fourth step, the chip mounter is a complex of a machine-electricity-light and a computer control technology; by the suction-displacement-positioning-placing function, SMC or SMD components are quickly and accurately attached to the designated bonding pad positions of the PCB without damaging the components and the PCB; the centering of the element is in 3 modes of mechanical centering, laser centering and visual centering; the chip mounter consists of a frame, an x-y motion mechanism, a mounting head, a component feeder, a PCB bearing mechanism, a component centering detection device and a computer control system; the x-y motion mechanism comprises a ball screw, a linear guide rail and a driving motor; the motion of the whole machine is mainly realized by an x-y motion mechanism, power is transmitted through a ball screw, and directional motion is realized by a rolling linear guide rail motion pair;

in the fourth step, the SMT chip mounter adopts an SMT chip mounter, and the SMT chip mounter carries out Mark identification on a main shaft, a moving lens, a static lens, a suction nozzle seat and a feeder of an important component; automatically solving Mark center system coordinates by machine vision, establishing a conversion relation between a chip mounter system coordinate system and a PCB and mounting element coordinate system, and calculating to obtain movement accurate coordinates of the SMT chip mounter; the mounting head grabs the suction nozzle and sucks the component according to the imported packaging type and component number parameters of the mounted component to the corresponding position; the static lens detects, identifies and centers the suction element according to a vision processing program; after centering is completed, the mounting head mounts the component on a preset position on the PCB;

in the fourth step, according to the mounting sequence and the mounting path of each component, the specific process of mounting by the chip mounter is as follows:

initializing data and feeding the data; automatically learning PCBA mark and selecting a suction nozzle; selecting a feeder to control the LED lamp; mounting components through visual centering; the suction nozzle is put back to the suction nozzle seat and the board is discharged.

It is a further object of the present invention to provide a computer device comprising a memory and a processor, the memory storing a computer program which, when executed by the processor, causes the processor to perform the steps of:

step three, analyzing the cycleMount structure array by adopting a clustering algorithm to determine the element serial numbers of the suction rod mounting in each pick-up period;

determining the mounting sequence and the mounting path of each component by adopting an evolutionary algorithm; and (5) carrying out surface mounting by a surface mounting machine according to the surface mounting sequence and the surface mounting path of each component.

Another object of the present invention is to provide a computer readable storage medium storing a computer program which, when executed by a processor, causes the processor to perform the steps of:

The invention further aims to provide an information data processing terminal which is used for realizing the electronic component patch path optimization method.

In combination with the technical scheme and the technical problems to be solved, the technical scheme to be protected has the following advantages and positive effects:

the invention provides a planning method of a combined algorithm based on a multiaxial linkage suction nozzle and flyer arrangement strategy and electronic component surface mount path optimization, which can optimize the suction nozzle and flyer arrangement strategy, the electronic component surface mount path algorithm and the combined algorithm of a multiaxial linkage surface mount machine, and comprises a combined strategy and an algorithm system, so that the problems of low operation efficiency of the surface mount machine caused by single planning algorithm, low precision, long path searching time and unsatisfactory planning effect of the planning method in the prior surface mount path planning are effectively solved. The invention inputs machine parameters and PCB data file information imported by staff and outputs the mounting sequence and the mounting path scheme of electronic components.

The invention aims to solve the problems of scattered research and low path planning efficiency and longer mounting path of a chip mounter in the existing nozzle flying arrangement strategy and electronic component mounting path optimization. According to the invention, the mounting scheme can be rapidly made according to the existing suction nozzle flying device and the material information, so that the mounting efficiency is improved.

The invention can be used for the formulation of a multiaxial linkage suction nozzle flying arrangement strategy and an electronic component surface mounting path optimization scheme, saves the working time of the surface mounting machine and improves the working efficiency.

The expected benefits and commercial values after the technical scheme of the invention is converted are as follows: the chip mounter improves the mounting efficiency, reduces the energy consumption of the chip mounter, and improves the productivity of the production line.

Drawings

Fig. 1 is a flowchart of a method for optimizing a patch path of an electronic component according to an embodiment of the present invention;

FIG. 2 is a schematic diagram of an array structure of a cycleMount structure according to an embodiment of the present invention;

fig. 3 is a schematic diagram of a process of performing surface mounting by a surface mounting machine according to an embodiment of the present invention;

fig. 4 is a schematic flow chart of a specific implementation process provided in an embodiment of the present invention.

Detailed Description

The present invention will be described in further detail with reference to the following examples in order to make the objects, technical solutions and advantages of the present invention more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the invention.

In order to fully understand how the invention may be embodied by those skilled in the art, this section is an illustrative embodiment in which the claims are presented for purposes of illustration.

As shown in fig. 1, the method for optimizing the patch path of the electronic component provided by the embodiment of the invention includes:

s101: before formal production, the staff is led in machine parameters and PCB data file information to prepare before production; and determining mounting point information of the components of the corresponding type of the suction rod mounting according to the guiding information.

S102: and constructing a cycleMount structure array based on the provided information.

S103: and analyzing the cycleMount structure array by adopting a clustering algorithm to determine the element serial numbers of the suction rod mounting in each pick-up period.

S104: determining the mounting sequence and the mounting path of each component by adopting an evolutionary algorithm; and (5) carrying out surface mounting by a surface mounting machine according to the surface mounting sequence and the surface mounting path of each component.

In S101 provided by the embodiment of the present invention, the specific process of importing machine parameters and PCB data file information is:

importing machine parameters;

importing PCB data;

for i＝1：n；

arr1[ ] = a two-dimensional distance of a distance between the patch heads;

row and column corresponding sequence number indices in arr2[ ] = arr1[ ];

the suction bar index & suction bar number corresponding to the row and column in arr3=arr1;

end。

in S103 provided by the embodiment of the present invention, the specific process of the clustering algorithm is:

initializing a distance value as arr1[ ] maximum;

while；

calculating a distance dist of the classified samples and each training sample;

obtaining the maximum distance maxdist in the K nearest neighbor samples at present;

ifdist<maxdist；

training samples as K nearest neighbor samples;

end；

counting the occurrence times of each class label in the K adjacent samples;

ifnew_time<time；

retaining an optimization factor arr4[ ];

else；

adjusting a deleterious factor arr4[ ];

end。

the evolutionary algorithm in the invention mainly realizes the solution of the optimization problem through three operations of selection, recombination and mutation. By a self-organizing and self-adapting artificial intelligence technology for simulating a biological evolution process and a mechanism solving problem; biological evolution is achieved by breeding, mutation, competition and selection.

In S104 provided by the embodiment of the present invention, the specific process of determining the mounting sequence and the mounting path of each component by using the evolutionary algorithm is as follows:

designing an initial arrangement strategy and an electronic component patch path according to the related information of the clustering analysis result; calculating the time required by the whole material taking process according to the set material taking speed and the material station position parameter information; then adopting an evolutionary algorithm to analyze the positions of the suction nozzle and the flying head in each generation of calculation as a calculation main body; when beneficial to reducing the mounting time, is called an optimization factor; when disadvantageous for reducing mounting time, is called

In S103 provided by the embodiment of the present invention, a specific process of analyzing the cycleMount structure array by using a clustering algorithm is as follows:

according to a specific standard, the process of dividing the collection of physical or abstract objects into a plurality of classes composed of similar objects enables the similarity of the data objects of the same class to be as large as possible, the difference of the data objects in different classes to be as large as possible, and the function of data classification is completed.

In S104 provided by the embodiment of the present invention, the specific process of the evolutionary algorithm is:

arr4[ ] = initial electronic component patch path;

calculating the patch time;

Forj＝1：iter；

selecting, recombining, mutating arr4[ ];

calculating a patch time new_time;

a deleterious factor; reserving the optimization factors, adjusting the harmful factors, then performing next iterative computation, and finally converging the mounting time within a certain range through a certain number of genetic iterations to obtain a final nozzle flying arrangement strategy and an electronic component mounting path; and outputting the calculated nozzle flying arrangement strategy and the electronic component patch path in a list form which is convenient for a user to read.

In S104 provided by the embodiment of the present invention, the chip mounter is a complex of a machine-electricity-light and a computer control technology; through the functions of suction, displacement, positioning, placement and the like, the SMC/SMD component is quickly and accurately attached to the designated bonding pad position of the PCB without damaging the component and the PCB; the centering of the element is in 3 modes of mechanical centering, laser centering and visual centering; the chip mounter consists of a frame, an x-y motion mechanism, a mounting head, a component feeder, a PCB bearing mechanism, a component centering detection device and a computer control system; the x-y motion mechanism comprises a ball screw, a linear guide rail and a driving motor; the motion of the whole machine is mainly realized by an x-y motion mechanism, the power is transmitted through the ball screw, and the directional motion is realized by a rolling linear guide rail motion pair, so that the transmission mode has small motion resistance and compact structure, and the mounting position precision of each element is forcefully ensured by higher motion precision.

In S104 provided by the embodiment of the invention, the SMT chip mounter is an SMT chip mounter, and the SMT chip mounter performs Mark identification on important components such as a mounting spindle, a moving/static lens, a suction nozzle seat and a feeder. The machine vision can automatically calculate the coordinates of the Mark center system, establish the conversion relation between the coordinate system of the chip mounter and the coordinate system of the PCB and the mounting element, and calculate and obtain the motion accurate coordinates of the SMT chip mounter; the mounting head captures a suction nozzle and absorbs the component according to the imported parameters such as the packaging type, the component number and the like of the mounted component to the corresponding position; the static lens detects, identifies and centers the suction element according to a vision processing program; the mounting head mounts the component to a predetermined position on the PCB after centering is completed.

As shown in fig. 3, in S104 provided by the embodiment of the present invention, according to the mounting sequence and the mounting path of each component, the specific process of mounting by using the chip mounter is as follows:

In order to prove the inventive and technical value of the technical solution of the present invention, this section is an application example on specific products or related technologies of the claim technical solution.

As shown in fig. 4, electronic component patch path optimization is a critical issue in Printed Circuit Board (PCB) process optimization. Before the optimization of the patch path, the preparation work before the optimization of the path of the printed circuit board needs to be described, and the preparation work mainly comprises the parameters of an importing machine and the information of PCB data files, the task allocation of a main shaft, a moving lens, a static lens, a suction nozzle seat and a feeder, and the contents such as the information of the mounting points of the components of the corresponding types of the suction rod mounting are determined according to the importing information. The result of the mounting path planning is presented in the form of a "component suction matrix in the pick-and-place cycle" and a "component mounting sequence matrix in the pick-and-place cycle".

The patch path optimization firstly needs to read in a target file, the target file is derived from text data obtained by the PCB data file, and the PCB data file shown in table 1 is obtained after extraction and conversion.

Table 1PCB data file

The PCB data file contains serial numbers, types and coordinate information of all patch elements: cp (c) denotes the c-th element, { Cpx (c), cpy (c) } is its corresponding coordinate, e.g., cp (20) is (154, 52), and the total number of elements numcp=60. Calculating the average X-axis coordinate of the patch element:

/>

and simultaneously leading in the related information of the suction rod and the feeder groove: the number of suction bars S=6 and the slot interval slot_interval=15 are used, and the coordinates of the feeder slot h are recorded as { slot (h), slot (h) }, and the number of suction bars is

slotx(h)＝-29.267+(h-1)·slot_interval

Determining a center slot number avesilotn and corresponding (avesilotx, avesiloty) of the feeder group:

aveSlotx＝slotx(aveSlotn)＝531.653，

aveSloty＝sloty(1)＝44.534

for the purpose of simultaneous sucking, the number of feeders should be the same as the number of available sucking rods, so that the slot coordinates of the feeders are 41, 42, 45, 46, 47 and 50, respectively.

According to a specific embodiment, the optimization result of the patch path is:

and after the patch optimization result is obtained according to the specific implementation mode, classifying the patch types according to the element types.

TABLE 2 class of element types

Sequence number	Element type	Quantity of
			1	1117-3.3v	6
2	SOT23	7
			3	QFP_ATME	6
4	74SOP16	8
			5	SOJ-ds2505	8
6	TR2-TO252	4
			7	PLCC-29SF	5

The patch path planning is not directly performed using the suction nozzle type assignment result, but is performed according to the component type assignment result, as shown in table 3.

TABLE 3 component type matrix and corresponding pick-and-place cycle number in sub-cycle

Suction rod 1

Suction rod 2

Suction rod 3

Suction rod 4

Suction rod 6

Cycle time

Sub-weekStage 1

Cp5

Cp7

Cp3

Cp1

Cp2

Cp6

4

Sub-period 2

Cp3

Cp4

Cp3

Cp1

Cp3

Cp6

2

Sub-period 3

Cp3

Cp4

Cp3

Cp1

Cp3

Cp5

2

Sub-period 4

Cp2

Cp4

Cp3

Cp1

Cp3

0

1

Sub-period 5

0

Cp4

Cp3

Cp1

0

1

Sub-period 6

0

Cp4

0

1

Sub-period 7

0

Cp7

0

1

The embodiment of the invention has a great advantage in the research and development or use process, and has the following description in combination with data, charts and the like of the test process.

By comparing actual patch path lengths, table 4 compares patch path optimization results of the present invention with those of commercial software, and compared with commercial software, the present invention can achieve patch path optimization up to 13.13%.

Table 4 comparison of Patch optimization effects

	Patch path length
		The invention is that	2213.7
Certain business software	2548.2
		Improved ratio	13.13％

It should be noted that the embodiments of the present invention can be realized in hardware, software, or a combination of software and hardware. The hardware portion may be implemented using dedicated logic; the software portions may be stored in a memory and executed by a suitable instruction execution system, such as a microprocessor or special purpose design hardware. Those of ordinary skill in the art will appreciate that the apparatus and methods described above may be implemented using computer executable instructions and/or embodied in processor control code, such as provided on a carrier medium such as a magnetic disk, CD or DVD-ROM, a programmable memory such as read only memory (firmware), or a data carrier such as an optical or electronic signal carrier. The device of the present invention and its modules may be implemented by hardware circuitry, such as very large scale integrated circuits or gate arrays, semiconductors such as logic chips, transistors, etc., or programmable hardware devices such as field programmable gate arrays, programmable logic devices, etc., as well as software executed by various types of processors, or by a combination of the above hardware circuitry and software, such as firmware.

The foregoing is merely illustrative of specific embodiments of the present invention, and the scope of the invention is not limited thereto, but any modifications, equivalents, improvements and alternatives falling within the spirit and principles of the present invention will be apparent to those skilled in the art within the scope of the present invention.

Claims

1. The electronic component patch path optimization method is characterized by comprising the following steps of:

2. The method for optimizing the chip path of electronic component as claimed in claim 1, wherein in the first step, the specific process of importing the machine parameters and the PCB data file information is:

importing machine parameters;

importing PCB data;

fori＝1：n；

arr1[ ] = a two-dimensional distance of a distance between the patch heads;

row and column corresponding sequence number indices in arr2[ ] = arr1[ ];

end。

3. the method for optimizing the patch path of the electronic component as claimed in claim 1, wherein in the third step, the clustering algorithm comprises the following specific processes:

initializing a distance value as arr1[ ] maximum;

while；

calculating a distance dist of the classified samples and each training sample;

ifdist<maxdist；

training samples as K nearest neighbor samples;

end；

counting the occurrence times of each class label in the K adjacent samples;

4. The method for optimizing the patch path of the electronic component as claimed in claim 1, wherein in the third step, the concrete process of analyzing the cycleMount structure array by using a clustering algorithm is as follows:

5. The method for optimizing the patch path of the electronic component according to claim 1, wherein in the fourth step, the evolution algorithm comprises the following specific processes:

arr4[ ] = initial electronic component patch path;

calculating the patch time;

forj＝1：iter；

selecting, recombining, mutating arr4[ ];

calculating a patch time new_time;

ifnew_time<time；

retaining an optimization factor arr4[ ];

else；

adjusting a deleterious factor arr4[ ];

end。

6. the method for optimizing the mounting path of electronic components as claimed in claim 1, wherein in the fourth step, the specific process of determining the mounting sequence and the mounting path of each component by using the evolutionary algorithm is as follows:

7. The method for optimizing the mounting path of electronic components according to claim 1, wherein in the fourth step, the mounting machine is a combination of electromechanical-optical and computer control technologies; by the suction-displacement-positioning-placing function, SMC or SMD components are quickly and accurately attached to the designated bonding pad positions of the PCB without damaging the components and the PCB; the centering of the element is in 3 modes of mechanical centering, laser centering and visual centering; the chip mounter consists of a frame, an x-y motion mechanism, a mounting head, a component feeder, a PCB bearing mechanism, a component centering detection device and a computer control system; the x-y motion mechanism comprises a ball screw, a linear guide rail and a driving motor; the motion of the whole machine is realized by an x-y motion mechanism, power is transmitted through a ball screw, and directional motion is realized by a rolling linear guide rail motion pair;

8. A computer device comprising a memory and a processor, the memory storing a computer program which, when executed by the processor, causes the processor to perform the steps of:

9. A computer readable storage medium storing a computer program which, when executed by a processor, causes the processor to perform the steps of:

10. An information data processing terminal, characterized in that the information data processing terminal is configured to implement the electronic component patch path optimization method according to any one of claims 1 to 7.