CN116229882A - Array substrate, driving method thereof, display panel and display device - Google Patents
Array substrate, driving method thereof, display panel and display device Download PDFInfo
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- CN116229882A CN116229882A CN202310002693.7A CN202310002693A CN116229882A CN 116229882 A CN116229882 A CN 116229882A CN 202310002693 A CN202310002693 A CN 202310002693A CN 116229882 A CN116229882 A CN 116229882A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06V—IMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
- G06V40/00—Recognition of biometric, human-related or animal-related patterns in image or video data
- G06V40/10—Human or animal bodies, e.g. vehicle occupants or pedestrians; Body parts, e.g. hands
- G06V40/12—Fingerprints or palmprints
- G06V40/13—Sensors therefor
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
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Abstract
The application discloses an array substrate, a driving method thereof, a display panel and a display device. In one embodiment, the array substrate includes: the pixel circuit and the light sensor circuit are provided with a shared control end for sharing control signals, and the pixel circuit comprises a light emitting control end; the photosensor circuit includes: the setting unit is connected to the first power supply signal end, the shared control end and the first node, and is used for setting the first node in response to the signal of the shared control end; the optical sensing unit is connected to the first node and the second power supply signal end, and writes photoelectric conversion level into the first node in response to the received optical signal; and a sensing unit connected to the first node, the third power signal terminal, the sensing control terminal and the sensing terminal, generating a sensing current in response to the potential of the first node and outputting the sensing current to the sensing terminal in response to a signal of the sensing control terminal. This embodiment simplifies the structure by using a photosensor circuit that shares a common control terminal of the pixel circuit.
Description
Technical Field
The application relates to the field of display technology. And more particularly, to an array substrate, a driving method thereof, a display panel, and a display device.
Background
Along with the rapid development of the information industry, the biological recognition technology is increasingly widely applied, and particularly, due to the uniqueness of skin lines such as fingerprints or palmprints, user identity confirmation is facilitated, so that the line recognition technology is widely applied to a plurality of fields such as mobile terminals, intelligent home furnishings and the like, and provides safety guarantee for user information.
Currently, in order to realize full screen display while fingerprint recognition, a fingerprint recognition on display (fingerprint recognition on display, FOD) technology has been developed to place a fingerprint sensor under the screen of a display panel and sense a fingerprint on the screen. However, the current display product can only realize local fingerprint identification, and the fingerprint identification control needs independent wiring control, so that the use is inconvenient and the layout is complex.
Disclosure of Invention
An object of the present invention is to provide an array substrate, a driving method thereof, a display panel and a display device, which solve at least one of the problems of the prior art.
In order to achieve the above purpose, the following technical scheme is adopted in the application:
the first aspect of the present application provides an array substrate, including: the pixel circuit and the light sensor circuit are in one-to-one correspondence with each other, and have a common control end sharing control signals, wherein,
the pixel circuit includes: a light emission control unit configured to control the light emission unit to emit light in response to a signal of the light emission control terminal;
the photosensor circuit includes:
the setting unit is electrically connected to the first power supply signal end, the common control end and the first node and is configured to set the first node in response to the signal of the common control end;
the optical sensing unit is electrically connected to the first node and the second power supply signal end, and is used for writing photoelectric conversion level into the first node in response to the received optical signal; and
the sensing unit is electrically connected to the first node, the third power supply signal end, the sensing control end and the sensing end, and is configured to generate a sensing current in response to the potential of the first node and output the sensing current to the sensing end in response to the signal of the sensing control end.
In some alternative embodiments, the light sensing unit includes: a photosensor, and a first capacitance, wherein,
The first end of the photoelectric sensor is electrically connected to the second power signal end, the second end is electrically connected to the first node,
the first end of the first capacitor is electrically connected to the second power signal end, and the second end is electrically connected to the first node.
In some alternative embodiments, the array substrate includes: a driving circuit layer disposed on the substrate base plate, the driving circuit layer including an active layer,
the photoelectric sensor and the active layer are arranged on the same layer.
In some alternative embodiments, the method may include, among other things,
the setting unit includes: a first transistor having a first electrode electrically connected to the first power signal terminal, a second electrode electrically connected to the first node, a control electrode electrically connected to the common control terminal,
the sensing unit includes: the first electrode of the second transistor is electrically connected to the third power supply signal end, the second electrode of the second transistor is electrically connected to the first electrode of the third transistor, the control electrode of the third transistor is electrically connected to the first node, the second electrode of the third transistor is electrically connected to the sensing end, and the control electrode of the third transistor is electrically connected to the sensing control end.
In some alternative embodiments, the pixel circuit further comprises: a driving unit, a compensating unit, a data input unit, a first reset unit and a second reset unit, wherein,
A driving unit electrically connected to the second node, the third node, and the fourth node, configured to control a driving current for driving the light emitting unit to emit light in response to a signal of the fourth node,
a compensation unit electrically connected to the compensation control terminal, the second node and the fourth node, configured to perform threshold compensation on the driving unit in response to a signal of the compensation control terminal,
a data input unit electrically connected to the data signal terminal, the row scan signal terminal, and the third node, configured to write a data signal of the data signal terminal into the third node in response to a signal of the row scan signal terminal,
a first reset unit electrically connected to the reset control terminal, the second node, and the first reset signal terminal, configured to reset the potential of the second node with a signal of the first reset signal terminal in response to a signal of the reset control terminal,
and a second reset unit electrically connected to the reset control terminal, the fifth node, and the second reset signal terminal, configured to reset the potential of the fifth node with a signal of the second reset signal terminal in response to a signal of the reset control terminal.
In some alternative embodiments, the method may include, among other things,
the drive unit includes: a fourth transistor having a first electrode electrically connected to the second node, a second electrode electrically connected to the third node, a control electrode electrically connected to the fourth node,
The compensation unit includes: a fifth transistor having a first electrode electrically connected to the fourth node, a second electrode electrically connected to the second node, a control electrode electrically connected to the compensation control terminal,
the data input unit includes: a sixth transistor having a first electrode electrically connected to the data signal terminal, a second electrode electrically connected to the third node, a control electrode electrically connected to the row scan signal terminal,
the light emission control unit includes: a seventh transistor and an eighth transistor, the first electrode of the seventh transistor is electrically connected to the third power supply signal terminal, the second electrode is electrically connected to the second node, the control electrode is electrically connected to the light emission control terminal, the first electrode of the eighth transistor is electrically connected to the third node, the second electrode is electrically connected to the fifth node, the control electrode is electrically connected to the light emission control terminal,
the first reset unit includes: a ninth transistor having a first electrode electrically connected to the first reset signal terminal, a second electrode electrically connected to the second node, a control electrode electrically connected to the reset control terminal,
the second reset unit includes: and a tenth transistor having a first electrode electrically connected to the second reset signal terminal, a second electrode electrically connected to the fifth node, and a control electrode electrically connected to the reset control terminal.
In some alternative embodiments, the light emission control terminal of the pixel circuit is used as the common control terminal, and the setting unit sets the first node in response to a signal of the light emission control terminal.
In some alternative embodiments, the reset control terminal of the pixel circuit is used as the common control terminal, and the setting unit sets the first node in response to a signal of the reset control terminal.
In some alternative embodiments, the row scanning signal terminal of the pixel circuit is used as the common control terminal, and the setting unit sets the first node in response to a signal of the row scanning signal terminal.
In some alternative embodiments, the first transistor and the third transistor are metal oxide transistors and the second transistor is a low temperature polysilicon transistor.
In some alternative embodiments, the fifth transistor is a metal oxide transistor, and the fourth transistor, the seventh transistor, and the eighth transistor are low temperature polysilicon transistors.
A second aspect of the present application provides a display panel, including:
the array substrate as described above is provided with,
a light emitting unit layer formed on the array substrate, the light emitting unit layer including a plurality of light emitting units, and
The color film layer is formed on the light-emitting unit layer and comprises a black matrix and color filters arranged in front of the black matrix, each color filter corresponds to one light-emitting unit,
each pixel circuit correspondingly drives one light-emitting unit to emit light, and the orthographic projection of the photoelectric sensor in each light-sensing unit on the array substrate falls into the orthographic projection of the color filter of the corresponding light-emitting unit on the array substrate.
A third aspect of the present application provides a display device, including: the display panel described above.
A fourth aspect of the present application provides a driving method for the above-described array substrate, including:
in the first stage, the setting unit responds to the signal of the common control terminal to set the first node for the first level,
and in the second stage, the light-emitting control unit responds to the signal of the light-emitting control end to control the light-emitting unit to emit light for the second level, and the light sensing unit responds to the received light to write the photoelectric conversion level into the first node and utilizes the potential of the first node to control the sensing unit to output the sensing current to the sensing end when the sensing control end receives the effective level.
The beneficial effects of this application are as follows:
the application aims at the existing problems at present, an array substrate, a driving method thereof, a display panel and a display device are formulated, the photo-sensing circuits corresponding to the pixel circuits one by one are arranged, and the setting units of the photo-sensing circuits are electrically connected to the shared control end of the pixel circuits, so that signals of the control end shared by the pixel circuits are shared as control signals of the setting units, and therefore the full-screen fingerprint identification function can be achieved. Further, by sharing a signal of a certain signal end with the pixel circuit, the full-screen fingerprint identification function is achieved, meanwhile, wiring is greatly simplified, the circuit structure layout is simple, and the application prospect is wide.
Drawings
The following detailed description of the embodiments of the present application is provided in further detail with reference to the accompanying drawings.
FIG. 1 shows a schematic block diagram of pixel circuits and photo-sensing circuits in an array substrate according to an embodiment of the present application;
FIG. 2 shows a schematic circuit diagram of pixel circuits and photo-sensing circuits in an array substrate according to an embodiment of the present application;
FIG. 3 is a timing diagram of key signal terminals in an array substrate according to an embodiment of the present application;
fig. 4 shows a schematic cross-sectional view of a display panel according to an embodiment of the present application;
FIG. 5 shows a schematic layout top view of a display panel according to an embodiment of the present application;
fig. 6 shows a circuit schematic of a pixel circuit and a photo-sensing circuit in an array substrate according to another embodiment of the present application; and
fig. 7 shows a circuit schematic of a pixel circuit and a photo-sensing circuit in an array substrate according to still another embodiment of the present application.
Detailed Description
In order to more clearly illustrate the present application, the present application is further described below with reference to examples and drawings. Like parts in the drawings are designated by the same or similar reference numerals. It is to be understood by persons skilled in the art that the following detailed description is intended to be illustrative, and not restrictive, and that this invention is not to be limited to the specific embodiments shown.
It should be noted that, in this application, the terms "having," "including," "comprising," and the like are all open-ended, that is, when a module is described as "having," "including," or "comprising" a first element, a second element, and/or a third element, it is meant that the module includes other elements in addition to the first element, the second element, and/or the third element. In addition, ordinal numbers such as "first", "second", and "third" in this application are not intended to limit a specific order, but merely to distinguish between the individual portions.
As used herein, "on … …," "formed on … …," and "disposed on … …" may mean that one layer is formed directly on or disposed on another layer, or that one layer is formed indirectly on or disposed on another layer, i.e., that other layers are present between the two layers.
In addition, in the present application, the term "co-layer arrangement" is used to mean that two layers, components, members, elements or portions may be formed by the same manufacturing process (e.g., patterning process, etc.), and that the two layers, components, members, elements or portions are generally formed of the same material. For example, the two or more functional layers are arranged in the same layer, meaning that the functional layers arranged in the same layer may be formed using the same material layer and the same manufacturing process, so that the manufacturing process of the display substrate may be simplified.
The transistors used in all embodiments of the present invention may be thin film transistors or field effect transistors or other devices having the same characteristics, and the source and drain of the transistors used herein may be interchangeable because they are symmetrical. In the embodiment of the invention, the gate electrode of the transistor is called a control electrode, one of the source electrode and the drain electrode is called a first electrode, and the other is called a second electrode. Embodiments of the present invention may be applied to both LPTS technology products (i.e., a circuit including only low-temperature polysilicon transistors) and LTPO technology products (i.e., a circuit including both low-temperature polysilicon transistors and metal oxide transistors), and when applied to LTPO technology products, the circuit includes both P-type and N-type transistors, and for the sake of uniformity of description, the current flow direction in the transistor is defined by a first pole and a second pole, the current flow end is the first pole, and the current flow end is the second pole, i.e., the transistor is the N-type, the first pole is referred to as the drain, the second pole is referred to as the source, and the transistor is the P-type transistor, the first pole is referred to as the source, and the second pole is referred to as the drain.
Referring to fig. 1, an embodiment of the present application provides an array substrate, including: a pixel circuit 10 and a photosensor circuit 20 in one-to-one correspondence with the pixel circuit 10, the pixel circuit and the photosensor circuit having a common control terminal CTL for a common control signal, wherein,
The pixel circuit 10 includes: a light emission control unit 11 configured to control the light emission unit to emit light in response to a signal of the light emission control terminal EM;
the photosensor circuit 20 includes:
a setting unit 21 electrically connected to the first power signal terminal VDC, the common control terminal CTL, and the first node N1, configured to set the first node N1 in response to a signal of the common control terminal CTL;
the optical sensing unit 22 is electrically connected to the first node N1 and the second power signal terminal VCC, and writes a photoelectric conversion level to the first node N1 in response to the received optical signal; and
the sensing unit 23, electrically connected to the first node N1, the third power signal terminal VDD, the sensing control terminal sw_sen, and the sensing terminal Vsensor, is configured to generate a sensing current in response to the potential of the first node N1 and output the sensing current to the sensing terminal Vsensor in response to the signal of the sensing control terminal sw_sen.
In this embodiment, the photo-sensing circuits corresponding to the pixel circuits one by one are provided, and the set unit of the photo-sensing circuit and the common control end of the pixel circuits share the signal of one control end in the pixel circuits as the control signal of the set unit, so that the full-screen fingerprint identification function can be realized. As a preferred embodiment, the light sensing circuit and the pixel circuit share a light emitting control end, and the light emitting unit of the pixel circuit is used as a light source for light sensing and is used for controlling the sensing time of the light sensing circuit by utilizing the characteristic that the light emitting control end controls the light emitting time. In addition, the luminous control signal has the characteristic of long pulse width, and the luminous control signal is used as the control signal of the setting unit, so that longer setting time is provided for the light sensing circuit, the potential accuracy of the first node N1 is ensured, and the light sensing accuracy of the light sensing circuit is improved. By sharing the signal of a certain signal end with the pixel circuit, the full-screen fingerprint identification function is achieved, meanwhile, wiring is greatly simplified, and the circuit structure layout is simple.
In order to describe in detail the structural and functional advantages of the pixel circuits and the light sensing circuits corresponding thereto included in the array substrate in the embodiments of the present application, specific circuit structures are described in detail below in connection with specific examples.
In a specific embodiment, fig. 1 and fig. 2 are combined, where fig. 1 shows a block diagram of a pixel circuit and a photo-sensing circuit in an array substrate according to an embodiment of the present application, and fig. 2 shows a schematic circuit diagram of a specific embodiment of a common control terminal shared by a light emission control terminal EM as a pixel circuit and a set cell satisfying the block diagram.
As shown in fig. 1, each pixel circuit 10 in the array substrate includes a corresponding photo-sensing circuit 20. The pixel circuit 10 includes a light emission control unit 11, and the light emission control unit 11 controls the light emission unit D to emit light based on a signal of a light emission control terminal EM, which is a signal for directly controlling a light emission period of the light emission unit D, as will be understood by those skilled in the art, and the light emission unit D emits light when the signal is active with respect to the light emission control unit 11.
It should be noted that, the specific type of the light emitting unit D driven by the pixel circuit is not limited in the present application, and when the array substrate and the light emitting unit D form the display panel, the type of the light emitting unit D is related to the specific arrangement of the display panel, for example, the light emitting unit D may be: an organic Light Emitting Diode (Organic Light Emitting Diode, OLED), a quantum dot Light Emitting Diode (Quantum Light Emitting Diode, Q-LED), a Mini Light Emitting Diode (Mini LED), or a Micro Light Emitting Diode (Micro LED), or other types of Light Emitting devices, which are not described herein.
Referring specifically to fig. 2, the pixel circuit 10 includes, in addition to the light emission control unit 11: a driving unit 12, a compensation unit 13, a data input unit 14, a first reset unit 15 and a second reset unit 16.
Wherein the driving unit 12 is electrically connected to the second node N2, the third node N3, and the fourth node N4, and is configured to control a driving current for driving the light emitting unit D to emit light in response to a signal of the fourth node N4. In particular to the example of fig. 2, the driving unit 12 includes a fourth transistor T4, a first pole of the fourth transistor T4 is electrically connected to the second node N2, a second pole is electrically connected to the third node N3, and a control pole is electrically connected to the fourth node N4.
The compensation unit 13 is electrically connected to the compensation control terminal Gaten, the second node N2, and the fourth node N4, and is configured to perform threshold compensation on the driving unit 12 in response to a signal of the compensation control terminal Gaten. In particular to the example of fig. 2, the compensation unit 13 comprises: the fifth transistor T5, the first pole of the fifth transistor T5 is electrically connected to the fourth node N4, the second pole is electrically connected to the second node N2, and the control pole is electrically connected to the compensation control terminal Gaten.
The data input unit 14 is electrically connected to the data signal terminal Vdata, the row scan signal terminal Gate, and the third node N3, and is configured to write the data signal of the data signal terminal Vdata into the third node N3 in response to the signal of the row scan signal terminal Gate. Specifically to the present example, referring to fig. 2, the data input unit 14 includes: the sixth transistor T6, the first electrode of the sixth transistor T6 is electrically connected to the data signal terminal Vdata, the second electrode is electrically connected to the third node N3, and the control electrode is electrically connected to the row scan signal terminal Gate.
Referring to fig. 2, the light emission control unit 11 includes: a seventh transistor T7 and an eighth transistor T8. The seventh transistor T7 has a first electrode electrically connected to the third power signal terminal VDD, a second electrode electrically connected to the second node N2, a control electrode electrically connected to the emission control terminal EM, a first electrode electrically connected to the third node N3, a second electrode electrically connected to the fifth node N5, and a control electrode electrically connected to the emission control terminal EM.
The first Reset unit 15 is electrically connected to the Reset control terminal Reset, the second node N2, and the first Reset signal terminal Vref, and is configured to Reset the potential of the second node N2 with the signal of the first Reset signal terminal Vref in response to the signal of the Reset control terminal Reset. Specifically to the example of fig. 2, the first reset unit 15 includes: the ninth transistor T9, a first pole of the ninth transistor T9 is electrically connected to the first Reset signal terminal Vref, a second pole is electrically connected to the second node N2, and a control pole is electrically connected to the Reset control terminal Reset.
The second Reset unit 16 is electrically connected to the Reset control terminal Reset, the fifth node N5, and the second Reset signal terminal Vinit1, and is configured to Reset the potential of the fifth node N5 with the signal of the second Reset signal terminal Vinit1 in response to the signal of the Reset control terminal Reset.
The above circuit may further include a storage capacitor Cst for storing a potential of the fourth node N4 for assisting the compensation unit in accomplishing the threshold voltage compensation.
In order to reduce the leakage of the pixel circuit 10, it is preferable in the embodiment of the present application that the fifth transistor T5 electrically connected to one pole of the storage capacitor Cst is set as a metal oxide transistor (IGZO), the fourth transistor T4, the seventh transistor T7, and the eighth transistor T8 on the driving branch are low temperature polysilicon transistors (LTPS), so that the power consumption is reduced by utilizing the low leakage characteristic of IGZO, and that an excessively high refresh rate is not necessary to ensure the voltage value stored on the capacitor when displaying the still picture. In addition, the sixth transistor T6 is preferably a double-gate transistor, which has small leakage current, and prevents the third node N3 from being low in voltage during low gray scale display and prevents current from flowing backward from Vdata to the third node N3.
In particular, as shown in fig. 1, in the embodiment of the present application, each pixel circuit 10 correspondingly drives one light emitting unit D to emit light, and at the same time, each pixel circuit 10 corresponds to one light sensing single path 20 for sensing a light signal to perform fingerprint recognition.
Specifically, the photo-sensing circuit 20 includes: a set unit 21, a photo-sensing unit 22 and a sensing unit 23.
Referring to fig. 1, the set unit 21 is electrically connected to the first power signal terminal VDC, the common control terminal CTL, and the first node N1, and is configured to set the first node N1 in response to a signal of the common control terminal CTL.
Specifically, as shown in fig. 2, the setting unit 21 includes a first transistor T1, a first electrode of the first transistor T1 is electrically connected to the first power signal terminal VDC, a second electrode is electrically connected to the first node N1, a control electrode is electrically connected to the light emission control terminal EM, and a signal level of the first power signal terminal VDC is set to the first node N1 when a level of the light emission control terminal EM is an active level.
In this embodiment, when the light sensing circuit and the pixel circuit share the light emission control end, the light emission unit of the pixel circuit is used as a light source for light sensing and is used for controlling the sensing time of the light sensing circuit by utilizing the characteristic that the light emission control end controls the light emission time. In addition, the luminous control signal has the characteristic of long pulse width, and the luminous control signal is used as the control signal of the setting unit, so that longer setting time is provided for the light sensing circuit, the potential accuracy of the first node N1 is ensured, and the light sensing accuracy of the light sensing circuit is improved.
Referring to fig. 1, the photo-sensing unit 22 is electrically connected to the first node N1 and the second power signal terminal VCC, and writes a photoelectric conversion level to the first node N1 in response to a received optical signal.
Specifically, as shown with continued reference to fig. 2, the photo-sensing unit 22 includes a photo-sensor PD and a first capacitance C1. The first end of the photo sensor PD is electrically connected to the second power signal end VCC, the second end is electrically connected to the first node N1, the first end of the first capacitor C1 is electrically connected to the second power signal end VCC, and the second end is electrically connected to the first node N1. When the photoelectric sensor PD receives the optical signal, performing a corresponding photoelectric conversion process according to the signal quantity of the received optical signal to generate an electric signal, and writing a photoelectric conversion level into the first node N1; in particular, in the embodiment of the present application, by providing the first capacitor C1 connected to both ends of the photosensor PD, the potential of the first node N1 can be stabilized by utilizing the storage characteristic thereof.
In addition, although not shown at this stage, the array substrate includes a driving circuit layer provided on the substrate, and the pixel circuit 10 and the photo sensor circuit 20 are provided in the driving circuit layer, and thus the driving circuit layer includes an active layer constituting a transistor, and the photo sensor PD is provided in the same layer as the active layer.
Referring to fig. 1, the sensing unit 23 is electrically connected to the first node N1, the third power signal terminal VDD, the sensing control terminal sw_sen, and the sensing terminal Vsensor, and is configured to generate a sensing current in response to the potential of the first node N1 and output the sensing current to the sensing terminal Vsensor in response to the signal of the sensing control terminal sw_sen to complete fingerprint sensing identification.
Specifically, with continued reference to fig. 2, the sensing unit 23 includes a second transistor T2 and a third transistor T3, the first electrode of the second transistor T2 is electrically connected to the third power signal terminal VDD, the second electrode is electrically connected to the first electrode of the third transistor T3, the control electrode is electrically connected to the first node N1, the second electrode of the third transistor T3 is electrically connected to the sensing terminal Vsensor, and the control electrode is electrically connected to the sensing control terminal sw_sen. In the embodiment of the present application, the on state of the second transistor T2 is controlled by the potential of the first node N1, so that the magnitude of the sensing current in the path of the sensing unit 23 is controlled, that is, the second transistor T2 is not simultaneously turned on with the first transistor T1, the first transistor T1 is turned off when turned on and the first node N1 is set, and after the optical signal is received in the optical sensing unit 22 and the photoelectric conversion level is written into the first node N1, the second transistor T2 is controlled to be turned on based on the potential of the first node N1 at this time, and the on state of the second transistor T2 is controlled based on the potential, so that the corresponding sensing current is generated on the branch of the sensing unit 23 according to the amplification characteristic thereof, for receiving the sensing current and outputting the sensing signal. It should be noted that, in the present embodiment, the sensing signal is read out by conducting the third transistor T3, that is, the sensing terminal Vsensor is controlled to read the sensing signal on the branch of the sensing unit 23 in response to the sensing control terminal sw_sen connected to the control electrode of the third transistor T3 receiving the active level signal.
More preferably, in the embodiment of the present application, the first transistor T1 and the third transistor T3 are metal oxide transistors (IGZO), and the second transistor T2 is a low temperature polysilicon transistor (LTPS), which aims to improve the sensing accuracy of the sensing unit by using the advantage of small leakage of IGZO by replacing the non-sensing transistor with IGZO.
In the above arrangement, by providing the photo-sensing circuits 20 in one-to-one correspondence with the pixel circuits 10 and providing the light-emitting control end EM shared by the photo-sensing circuits, the light-emitting unit D driven by the pixel circuits 10 is used as a light source of the photo-sensing unit 20, the fingerprint receives light and reflects the light to the photo-sensing circuit 20 at the stage of light emission of the light-emitting unit driven by the light-emitting control end EM, and the photo-sensor PD performs photoelectric conversion to write the photoelectric conversion voltage into the first node N1 to control the sensing unit 23 to generate a sensing signal and output the sensing signal through the sensing end Vsensor. That is, with the above arrangement, the light sensing circuit 20 is provided with the sensing light source and the sensing function by the light emission control of the light emitting unit D by the signal of the common light emission control terminal EM, and the structure and the control principle are simple by the common signal line, thereby realizing the full-screen fingerprint recognition function with a simple circuit structure. In addition, by means of the function of controlling the luminous time length by the luminous control end EM, the time length of fingerprint identification is controlled, so that the time of fingerprint identification can be adjusted, and the fingerprint detection precision is improved.
To further understand the above functions, a method process of driving the array substrate including the above pixel circuit 10 and the photo-sensing circuit 20 is further described in detail with reference to a timing chart shown in fig. 3.
Referring to fig. 3, in a complete driving process of the photo-sensing circuit 20, the whole driving process can be divided into a reset circuit stage and a data reading stage, and the data reading stage of the photo-sensing circuit 20 is in a light emitting stage of the pixel circuit 10, that is, when the light emitting unit D is driven to emit light, if the sensing control terminal sw_sen is at an active level, the sensing data can be read through the sensing terminal Vsensor. Accordingly, because of the common use of the light emission control terminal EM, the respective phases of the two circuits are interrelated, and the following description of the timing is made in connection with the overall process of the two circuits. In addition, in order to facilitate the illustration of the influence of the signal of the light emission control terminal EM on the pixel circuit 10 and the light sensing circuit 20, the timings of the two light emission control terminals are illustrated in the figure corresponding to different circuit blocks, and are substantially the same and will not be explained in detail.
It should be noted that, the timing chart shown in fig. 3 is a timing chart of the array substrate in the display panel based on the LPTO technology in the preferred example, that is, the first transistor T1, the third transistor T3, and the fifth transistor T5 are IGZO and N-type transistors, and the other transistors are LTPS and P-type transistors.
Specifically, in the first stage (reset circuit stage), the light emission control terminal EM is at a high level, and only the first transistor T1 of the set cell 21 in the photo-sensing circuit is turned on, and the first node N1 is set by the potential of the first power supply signal terminal VDC.
Meanwhile, at this stage, the seventh transistor T7 and the eighth transistor T8 in the light emission control unit 11 in the pixel circuit 10 are turned off, and no light emission path is formed. However, at this stage, the Reset control terminal Reset is connected to the low level signal, the ninth transistor T9 in the first Reset unit 15 and the tenth transistor T10 in the second Reset unit 16 are turned on, and Reset the second node by using the first Reset signal terminal Vref, and Reset the fifth node N5 (i.e., the anode of the light emitting unit D) by using the second Reset signal terminal Vinit1, respectively.
In addition, in the first stage, when the compensation control terminal Gate inputs a high level and the row scan signal terminal Gate is at a low level, the sixth transistor T6, the fourth transistor T4 and the fifth transistor T5 are all turned on, and the other transistors are all turned off, the data signal terminal Vdata writes a data signal and charges the fourth node N4 via the fourth transistor T4 and the fifth transistor T5, knowing that the charging is stopped after the charging is vdata+vth (the voltage identification is represented by the identification of the signal terminal here for convenience of resolution). At this time, the voltage stored in the storage capacitor Cst is vdata+vth-VDD, and the third node voltage is Vdata.
In the second stage (i.e., the data reading stage), the light emission control terminal EM becomes a low level, and the pixel circuit 10 controls the light emission unit D to emit light.
For the photo-sensing circuit 20, the light emitted from the light emitting unit D is emitted to the surface of the display panel and reflected to the photo-sensing unit, and the photo-sensor PD receives the light signal and performs photoelectric conversion, and writes the photoelectric conversion level into the first node N1 and stores in the first capacitor C1 so that the potential of the first node N1 is stabilized. The second transistor T2 is turned on in response to the potential change of the first node N1, and the second transistor T2 generates a corresponding sensing current Ids after being amplified based on the magnitude of the photoelectric conversion level; meanwhile, in response to the sensing control terminal sw_sen being at a high level, the third transistor T3 is turned on, and the sensing terminal Vsensor reads the sensing signal to complete fingerprint recognition.
Specifically to the light emitting portion of the pixel circuit 10, the fourth transistor T4, the seventh transistor T7, and the eighth transistor T8 are turned on at this stage, and the other transistors are turned off. The potential of the fourth node N4 is vdata+vth due to the storage capacitor Cst, the potential of the second node N2 is VDD, the gate-source voltage vgs=vdata+vth-VDD of the fourth transistor T4, and the driving current ids=k (Vgs-Vth) flowing through the light emitting cell D 2 ＝K(Vdata+Vth-VDD-Vth) 2 ＝K(Vdata-VDD) 2 It can be seen that, through the compensation unit, the driving current is independent of the threshold voltage of the fourth transistor T4, and the threshold compensation of the fourth transistor T4 is achieved.
Although only one long low-level lighting phase of the lighting control end EM is shown in the drawings, the application is not intended to be limited, and it should be understood by those skilled in the art that, in practical application, the lighting control end EM may include a plurality of lighting phases, and the sum of the time of these lighting phases determines the total lighting duration of the lighting unit in one lighting phase, and accordingly, as long as a valid sensing control end signal is given in each corresponding lighting duration, each sensing signal reading can be completed, that is, the sensing time is adjusted by using the time of the lighting control end EM, so as to improve fingerprint sensing accuracy.
In accordance with the foregoing embodiment, in which the emission control terminal EM is used as the common control terminal of the setting unit and the pixel circuit, a further embodiment of the present application uses the row scanning signal terminal as the common control terminal, as shown in fig. 6, the setting unit sets the first node in response to the signal of the row scanning signal terminal Gate. Those skilled in the art will appreciate that this embodiment may be used in combination with other embodiments in the present application, and will not be described in detail herein for brevity.
In response to the foregoing embodiment in which the emission control terminal EM is used as the common control terminal of the set unit and the pixel circuit, another embodiment of the present application uses the Reset control terminal as the common control terminal, as shown in fig. 7, the set unit sets the first node in response to the signal of the Reset control terminal Reset. Those skilled in the art will appreciate that this embodiment may be used in combination with other embodiments in the present application, and will not be described in detail herein for brevity.
The signal sharing a certain signal end with the pixel circuit is used as the control signal of the light sensor circuit setting unit, so that the fingerprint identification function of different working modes is realized in a full screen mode, meanwhile, the wiring is greatly simplified, and the circuit structure layout is simple.
Corresponding to the array substrate, the embodiment of the application also provides a driving method for driving the array substrate, which comprises the following steps:
in the first stage, the setting unit responds to the signal of the light-emitting control end to set the first node for the first level,
and in the second stage, the light-emitting control unit responds to the signal of the light-emitting control end to control the light-emitting unit to emit light for the second level, and the light sensing unit responds to the received light to write the photoelectric conversion level into the first node and utilizes the potential of the first node to control the sensing unit to output the sensing current to the sensing end when the sensing control end receives the effective level.
It should be noted that, the specific process has been described in detail in the above description of the specific function of the embodiment of the array substrate, and will not be described herein again.
In this embodiment, the signal of the light emitting control end is shared as the control signal of the setting unit, so that a full-screen fingerprint identification function can be realized, and the light emitting unit of the pixel circuit is used as the light source of light sensing and used for controlling the sensing time of the light sensing circuit by utilizing the characteristic that the light emitting control end controls the light emitting time, so that a high-precision fingerprint sensing effect is realized.
Based on the same inventive concept, referring to fig. 4 and 5, an embodiment of the present application further provides a display panel including:
the array substrate described in the above embodiment;
a light emitting unit layer formed on the array substrate, the light emitting unit layer including a plurality of light emitting units, and
the color film layer is formed on the light-emitting unit layer and comprises a black matrix and color filters arranged in front of the black matrix, each color filter corresponds to one light-emitting unit,
each pixel circuit correspondingly drives one light-emitting unit to emit light, and the orthographic projection of the photoelectric sensor in each light-sensing unit on the array substrate falls into the orthographic projection of the color filter of the corresponding light-emitting unit on the array substrate.
Specifically, referring to fig. 4, the array substrate includes a driving circuit layer 102 formed on a substrate 101, a pixel circuit 10 and a photo-sensing circuit 20 are disposed in the driving circuit layer 102, a photo-sensor 112 is shown in the figure, the photo-sensor 112 is disposed with an active layer coating in the driving circuit layer, and is used for receiving light reflected from peaks and troughs of a finger when sensing the fingerprint, controlling the on-current of a second transistor T2 according to different voltage values of photoelectric conversion, so as to obtain different sensing information, and a sensing end Vsensor acquires the sensing information and transmits the sensing information to a corresponding fingerprint sensing chip to obtain a fingerprint identification result through specific calculation.
With continued reference to fig. 4, on the driving circuit layer is a light emitting unit layer 103, in which an anode 113 of a light emitting unit is shown, the light emitting layer and a cathode are omitted in the drawing, and the light emitting unit is shown in broken lines as a light source of the photosensor 112 and emits light. In addition, on the light emitting unit layer 103 is a color film layer 104, and the color film layer 104 includes a black matrix 114 and color filters disposed between the black matrices 114, each color filter corresponds to one light emitting unit and has a color consistent with a color of a light to be emitted.
In addition, with reference to fig. 4, each light emitting unit corresponds to one photo sensor, and further referring to the layout of fig. 5 (in which the black matrix is omitted, the black matrix is small in size, so that the color filter pitch is very small in the drawing, and not explained further herein), the front projection of the photo sensor in each photo sensor unit on the array substrate falls within the front projection of the color filter of the corresponding light emitting unit on the array substrate, and by this arrangement, the photo sensor 112 can effectively receive and identify the light signal reflected by the peaks and valleys of the fingerprint after being emitted by the light emitting unit as a light source, thereby improving the fingerprint sensing accuracy.
In addition, it should be noted that the specific structure between the film layers in the present application is not intended to be specifically limited by the cross-sectional view of fig. 4, that is, for example, the color film layer 104 is intended to illustrate the relative positional relationship between the film layers and the color filter 124 and the photosensor 112, and the arrangement of the black matrix therebetween is merely schematic, and in particular, the shape of the black matrix may be appropriately adjusted in order to achieve effective light receiving in the fingerprint identification process, which is not described herein.
Since the array substrate included in the display panel provided in the embodiment of the present application corresponds to the array substrate provided in the above-described several embodiments, the previous embodiment is also applicable to the present embodiment, and will not be described in detail in the present embodiment.
Through the arrangement, the light sensing circuit of the light emitting control end of the pixel circuit is shared, signals of the light emitting control end are shared to be control signals of the setting unit, so that the full-screen fingerprint identification function can be achieved, the light emitting control end is utilized to control the light emitting duration, the light emitting unit of the pixel circuit is used as a light source of light sensing and is used for controlling the sensing duration of the light sensing circuit, the high-precision fingerprint sensing effect is achieved, the full-screen fingerprint identification function of on-screen integration is achieved through the one-to-one correspondence of the pixel circuit and the light sensing circuit, and the shared circuit enables the circuit layout to be simple, so that the full-screen fingerprint identification device has wide application prospect.
Based on the same inventive concept, embodiments of the present application also provide a display device including the display panel as described in the above implementation.
Since the display panel included in the display device provided in the embodiment of the present application corresponds to the display panel provided in the above-described several embodiments, the previous embodiment is also applicable to the present embodiment, and will not be described in detail in the present embodiment.
In this embodiment, the display device may be any product or component with a display function, such as a mobile phone, a tablet computer, a television, a display, a notebook computer, a vehicle-mounted display, a digital photo frame or a navigator, and by loading the display panel, the integrated comprehensive screen fingerprint identification in the screen can be realized, and the identification precision is high and the process is simple.
The array substrate, the driving method thereof, the display panel and the display device are formulated aiming at the existing problems at present, the light sensing circuits corresponding to the pixel circuits one by one are arranged, the setting units of the light sensing circuits are electrically connected to the light emitting control ends of the pixel circuits, signals of the light emitting control ends are shared to be control signals of the setting units, so that the full-screen fingerprint identification function can be achieved, the characteristics that the light emitting control ends control the light emitting duration are utilized, the light emitting units of the pixel circuits are used as light sources for light sensing and are used for controlling the sensing duration of the light sensing circuits, wiring is greatly simplified while the full-screen fingerprint identification function is achieved through sharing the signal ends, and the circuit structure layout is simple and has wide application prospects.
It should be apparent that the foregoing examples of the present application are merely illustrative of the present application and not limiting of the embodiments of the present application, and that various other changes and modifications may be made by one of ordinary skill in the art based on the foregoing description, and it is not intended to be exhaustive of all embodiments, and all obvious changes and modifications that come within the scope of the present application are intended to be embraced by the technical solution of the present application.
Claims (14)
1. An array substrate, characterized by comprising: the pixel circuits and the light sensor circuits are in one-to-one correspondence with each other, and have a common control end sharing control signals, wherein,
the pixel circuit includes:
a light emission control unit configured to control the light emission unit to emit light in response to a signal of the light emission control terminal;
the photosensor circuit includes:
a set unit electrically connected to a first power signal terminal, a common control terminal, and a first node configured to set the first node in response to a signal of the common control terminal;
the optical sensing unit is electrically connected to the first node and the second power supply signal end, and is used for writing a photoelectric conversion level into the first node in response to a received optical signal; and
and the sensing unit is electrically connected to the first node, the third power supply signal end, the sensing control end and the sensing end and is configured to generate a sensing current in response to the potential of the first node and output the sensing current to the sensing end in response to the signal of the sensing control end.
2. The array substrate of claim 1, wherein the light sensing unit comprises: a photosensor, and a first capacitance, wherein,
The first end of the photoelectric sensor is electrically connected to the second power signal end, the second end is electrically connected to the first node,
the first end of the first capacitor is electrically connected to the second power signal end, and the second end is electrically connected to the first node.
3. The array substrate of claim 2, comprising: a driving circuit layer disposed on the substrate base plate, the driving circuit layer including an active layer,
the photoelectric sensor and the active layer are arranged on the same layer.
4. The array substrate of claim 2, wherein,
the set unit includes: a first transistor having a first electrode electrically connected to the first power signal terminal, a second electrode electrically connected to the first node, a control electrode electrically connected to the common control terminal,
the sensing unit includes: the first electrode of the second transistor is electrically connected to the third power supply signal end, the second electrode of the second transistor is electrically connected to the first electrode of the third transistor, the control electrode of the third transistor is electrically connected to the first node, the second electrode of the third transistor is electrically connected to the sensing end, and the control electrode of the third transistor is electrically connected to the sensing control end.
5. The array substrate of claim 1, wherein the pixel circuit further comprises: a driving unit, a compensating unit, a data input unit, a first reset unit and a second reset unit, wherein,
the driving unit is electrically connected to the second node, the third node and the fourth node, and is configured to control a driving current for driving the light emitting unit to emit light in response to a signal of the fourth node,
the compensation unit is electrically connected to the compensation control terminal, the second node and the fourth node and is configured to perform threshold compensation on the driving unit in response to the signal of the compensation control terminal,
the data input unit is electrically connected to the data signal terminal, the row scanning signal terminal and the third node, and is configured to write the data signal of the data signal terminal into the third node in response to the signal of the row scanning signal terminal,
the first reset unit is electrically connected to a reset control terminal, the second node and a first reset signal terminal and is configured to reset the potential of the second node by using the signal of the first reset signal terminal in response to the signal of the reset control terminal,
The second reset unit is electrically connected to the reset control terminal, the fifth node, and a second reset signal terminal, and is configured to reset the potential of the fifth node by using the signal of the second reset signal terminal in response to the signal of the reset control terminal.
6. The array substrate of claim 5, wherein,
the driving unit includes: a fourth transistor having a first electrode electrically connected to the second node, a second electrode electrically connected to the third node, a control electrode electrically connected to the fourth node,
the compensation unit includes: a fifth transistor having a first electrode electrically connected to the fourth node, a second electrode electrically connected to the second node, a control electrode electrically connected to the compensation control terminal,
the data input unit includes: a sixth transistor having a first electrode electrically connected to the data signal terminal, a second electrode electrically connected to the third node, a control electrode electrically connected to the row scan signal terminal,
the light emission control unit includes: a seventh transistor and an eighth transistor, a first pole of the seventh transistor is electrically connected to the third power signal terminal, a second pole is electrically connected to the second node, a control pole is electrically connected to the light emission control terminal, a first pole of the eighth transistor is electrically connected to the third node, a second pole is electrically connected to the fifth node, a control pole is electrically connected to the light emission control terminal,
The first reset unit includes: a ninth transistor having a first electrode electrically connected to the first reset signal terminal, a second electrode electrically connected to the second node, a control electrode electrically connected to the reset control terminal,
the second reset unit includes: and a tenth transistor having a first electrode electrically connected to the second reset signal terminal, a second electrode electrically connected to the fifth node, and a control electrode electrically connected to the reset control terminal.
7. The array substrate of claim 5, wherein a light emission control terminal of the pixel circuit serves as the common control terminal, and the set unit sets the first node in response to a signal of the light emission control terminal.
8. The array substrate of claim 5, wherein a reset control terminal of the pixel circuit is used as the common control terminal, and the set unit sets the first node in response to a signal of the reset control terminal.
9. The array substrate of claim 5, wherein a row scan signal terminal of the pixel circuit is used as the common control terminal, and the set unit sets the first node in response to a signal of the row scan signal terminal.
10. The array substrate of claim 3, wherein the first transistor and the third transistor are metal oxide transistors and the second transistor is a low temperature polysilicon transistor.
11. The array substrate of claim 6, wherein the fifth transistor is a metal oxide transistor, and the fourth transistor, the seventh transistor, and the eighth transistor are low temperature polysilicon transistors.
12. A display panel, comprising:
the array substrate of any one of claim 1 to 11,
a light emitting unit layer formed on the array substrate, the light emitting unit layer including a plurality of light emitting units, and
the color film layer is formed on the light-emitting unit layer and comprises a black matrix and color filters arranged in front of the black matrix, each color filter corresponds to one light-emitting unit,
and each pixel circuit correspondingly drives one light-emitting unit to emit light, and the orthographic projection of the photoelectric sensor in each light-sensing unit on the array substrate falls into the orthographic projection of the color filter of the corresponding light-emitting unit on the array substrate.
13. A display device, comprising: the display panel of claim 12.
14. A driving method for the array substrate of any one of claims 1 to 11, comprising:
a first stage, the setting unit responds to the signal of the common control terminal to set the first node for a first level,
and in a second stage, the light-emitting control unit responds to the signal of the light-emitting control end to control the light-emitting unit to emit light for a second level, and the light sensing unit responds to the received light to write a photoelectric conversion level into the first node and utilizes the potential of the first node to control the sensing unit to output the sensing current to the sensing end when the sensing control end receives an effective level.
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