CN116229699B - Output signal control system of infrared remote control receiving chip - Google Patents
Output signal control system of infrared remote control receiving chip Download PDFInfo
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- CN116229699B CN116229699B CN202310498404.7A CN202310498404A CN116229699B CN 116229699 B CN116229699 B CN 116229699B CN 202310498404 A CN202310498404 A CN 202310498404A CN 116229699 B CN116229699 B CN 116229699B
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- G—PHYSICS
- G08—SIGNALLING
- G08C—TRANSMISSION SYSTEMS FOR MEASURED VALUES, CONTROL OR SIMILAR SIGNALS
- G08C23/00—Non-electrical signal transmission systems, e.g. optical systems
- G08C23/04—Non-electrical signal transmission systems, e.g. optical systems using light waves, e.g. infrared
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P90/00—Enabling technologies with a potential contribution to greenhouse gas [GHG] emissions mitigation
- Y02P90/02—Total factory control, e.g. smart factories, flexible manufacturing systems [FMS] or integrated manufacturing systems [IMS]
Abstract
The invention provides an output signal control system of an infrared remote control receiving chip; the device comprises a power supply, an analog-to-digital conversion chip, an FPGA chip, an erasable and editable memory and a signal receiver; wherein, signal control software is arranged in the erasable and editable memory; the system comprises the following signal output flow: when the power supply is started, the FPGA chip is initialized, and after the initialization, whether the signal receiver receives a signal or not is judged, and a request signal is sent to the infrared remote control receiving chip through the signal receiver; acquiring a response signal of the request signal, and controlling an infrared remote control receiving chip to receive an infrared acquisition signal by the FPGA chip; the infrared acquisition signals are subjected to zone bit regulation and control through an analog-to-digital conversion chip, and infrared waveform signals of a plurality of zone bits are generated; writing the infrared waveform signals into an erasable and editable memory, and converting the infrared waveform signals into a plurality of single-packet instructions; and controlling the upper computer to synchronously execute the corresponding instructions according to the single-packet instructions.
Description
Technical Field
The invention relates to the technical field of infrared remote control signal processing, in particular to an output signal control system of an infrared remote control receiving chip.
Background
At present, infrared remote control is a technology for performing remote control by taking infrared rays as signal carriers, and is an indispensable component of household appliances, toys and other products needing remote control. The infrared remote control receiving chip has the advantages of high reliability, low cost, low power consumption, strong anti-interference capability and the like, and can realize quick and reliable remote control.
However, the existing infrared control cannot send out a plurality of infrared signals at the same time, because different infrared remote control devices can decode signals in the same decoding mode to determine corresponding infrared instructions, and at the moment, the infrared signals may be the same;
therefore, when a plurality of infrared signals are simultaneously emitted, synchronous decoding can be performed, and different control instructions are generated, so that exploration is needed.
Disclosure of Invention
The invention provides an output signal control system of an infrared remote control receiving chip, which is used for solving the problems that how to send out a plurality of infrared signals simultaneously, and can synchronously decode to generate different control instructions and needs to be explored.
The invention provides an output signal control system of an infrared remote control receiving chip,
an output signal control system of an infrared remote control receiving chip comprises a power supply, an analog-to-digital conversion chip, an FPGA chip, an erasable and editable memory and a signal receiver; wherein, the liquid crystal display device comprises a liquid crystal display device,
signal control software is arranged in the erasable and editable memory;
the system comprises the following signal output flow:
when the power supply is started, the FPGA chip is initialized, and after the initialization, whether the signal receiver receives a signal or not is judged, and a request signal is sent to the infrared remote control receiving chip through the signal receiver;
acquiring a response signal of the request signal, and controlling an infrared remote control receiving chip to receive an infrared acquisition signal by the FPGA chip;
the infrared acquisition signals are subjected to zone bit regulation and control through an analog-to-digital conversion chip, and infrared waveform signals of a plurality of zone bits are generated;
writing the infrared waveform signals into an erasable and editable memory, and converting the infrared waveform signals into a plurality of single-packet instructions;
and controlling the upper computer to synchronously execute the corresponding instructions according to the single-packet instructions.
Further, the initializing the FPGA chip further includes:
setting a serial port, a timer and a local address of an infrared remote control receiving chip;
according to the serial port, setting an interrupt instruction and clearing a single-packet instruction in the erasable and editable memory;
setting infrared monitoring operation according to the timer, and monitoring infrared signals through the infrared monitoring operation;
and setting a response address monitored by an infrared signal according to the local address, and receiving an infrared remote control data packet according to the response address.
Further, the sending the request signal to the infrared remote control receiving chip through the signal receiver further includes:
generating a main handshake signal according to the request signal; wherein, the liquid crystal display device comprises a liquid crystal display device,
the master handshake signal includes a handshake request identifier;
sending the main handshake signal to an upper computer to obtain a handshake response message;
the handshake response message comprises a handshake response identifier, and the handshake response identifier is obtained according to the handshake request identifier;
the upper computer judges the handshake response identification, and when the handshake response identification is consistent with the preset handshake response identification, the upper computer establishes communication connection with the infrared remote control receiving chip.
Further, the initializing the FPGA chip further includes:
establishing a plurality of infrared signal paths according to the analog-to-digital conversion chip;
the pulse width of each infrared signal channel is set in sequence;
each infrared signal path is adjusted through a multipath analog switch;
through adjustment, receiving a test infrared signal of the FPGA chip and generating encoded data of the infrared test signal;
judging whether the coded data is distorted or not, and calculating distortion errors of the coded data and the test infrared signals when the coded data is distorted;
each infrared signal path is calibrated based on the distortion error.
Further, the flag regulation includes:
generating a regulating channel of a pulse signal through a remote control receiving chip;
according to the regulation channel and the analog-to-digital conversion chip, converting the infrared acquisition signal into a pulse sequence with a marker bit;
dividing a pulse sequence into a plurality of sequence segments according to a time axis of the infrared acquisition signal;
determining initial configuration parameters of each sequence segment according to the waveform of each sequence segment; wherein, the liquid crystal display device comprises a liquid crystal display device,
the initial configuration parameters include: pulse amplitude, pulse duration, pulse signal cycle number;
acquiring a zone bit to be regulated and controlled, and determining a parameter difference value to be changed of each sequence segment;
according to the parameter difference value, configuring the configuration parameters of each sequence segment by segment through a preset transformation formula;
after the configuration section by section, each sequence section is fused to generate a regulated target pulse sequence.
Further, the erasable programmable memory further comprises the following processing steps:
under the condition that the erasable and editable memory is electrified, a file acquisition request is sent to the FPGA chip, so that the FPGA chip acquires a configuration file for configuring the erasable and editable memory from the upper computer;
receiving a configuration file of an upper computer;
triggering the erasable and editable memory to initialize, and after the initialization of the erasable and editable memory is completed, sending a configuration file to the erasable and editable memory so that the erasable and editable memory configures itself based on the configuration file.
Further, the generating the infrared waveform signals of the plurality of flag bits includes:
setting a first delay time threshold of sampling delay time according to each flag bit;
setting a second delay time threshold of the output delay time according to each flag bit;
capturing the occurrence time of the rising edge and the falling edge of the infrared waveform signal in the same delay time period according to the zone bit;
determining the initial occurrence time and the cut-off occurrence time of the infrared waveform signal according to the rising edge and the falling edge, and generating a clock signal;
and determining different infrared waveform signals in the same delay period according to the clock signal, and synchronously outputting.
Further, the writing of the infrared waveform signal into the erasable programmable memory includes the steps of:
acquiring a pulse sequence to be written into an infrared waveform signal and the existing data in an erasable memory;
comparing the pulse sequence to be written into the infrared waveform signal with the existing data according to the corresponding zone bit;
determining a zone bit of an infrared waveform signal to be written according to the comparison result;
comparing the characteristic bit of the infrared waveform signal through the marker bit to obtain a comparison result;
writing the infrared waveform signal to be written into the erasable and editable memory, and performing writing verification through comparing the result with the flag bit.
Further, the converting into a plurality of single packet instructions includes:
acquiring an infrared waveform signal to be converted; wherein, the liquid crystal display device comprises a liquid crystal display device,
the infrared waveform signal comprises a plurality of different zone bits;
analyzing the infrared waveform signals, and determining target assembly instructions corresponding to the infrared waveform signals and the zone bits and target immediate values obtained after conversion based on the original immediate values;
combining a target assembly instruction and a target immediate based on preset rule information to obtain an assembly code corresponding to the infrared waveform signal; wherein, the liquid crystal display device comprises a liquid crystal display device,
the rule information comprises an assembly code logic form and an assembly format;
based on the assembly code, a single package instruction for each flag bit is determined.
Further, the sending the single packet instruction to the upper computer through the network chip further includes:
the upper computer cuts the infrared waveform signals according to an infrared signal compression rule, an infrared signal display rule and an infrared signal characteristic identification rule in a preset processing flow;
storing the result after each rule is executed as a text file and storing the text file;
after all rules are executed, storing an execution result, comparing the execution result with a historical infrared signal, and executing the next module after verification is passed;
and finally comparing the processed infrared signals with the signals processed by the historical infrared signals to determine the target infrared remote control signals.
The invention has the beneficial effects that:
according to the invention, synchronization of a plurality of infrared signals and different zone bits can be realized, and different infrared signals are converted, so that the synchronous identification function of the infrared signals is realized. Because a plurality of zone bits exist, the waveform conversion of the zone bits can be carried out on a single infrared signal, and then the synchronous verification is carried out on the single infrared signal. The invention can realize synchronous execution of a plurality of infrared signals, and can synchronously convert a plurality of infrared instructions into a plurality of single-packet instructions, thereby realizing synchronous execution of a plurality of infrared instructions.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention may be realized and attained by the structure particularly pointed out in the written description and drawings.
The technical scheme of the invention is further described in detail through the drawings and the embodiments.
Drawings
The accompanying drawings are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate the invention and together with the embodiments of the invention, serve to explain the invention. In the drawings:
FIG. 1 is a system diagram of an output signal control system of an infrared remote control receiving chip according to an embodiment of the present invention;
FIG. 2 is a flow chart of infrared signal processing in an embodiment of the invention;
FIG. 3 is a schematic diagram of an FPGA chip in an embodiment of the present invention;
fig. 4 is a handshake flow chart of the upper computer and the infrared receiving signals in the embodiment of the invention;
FIG. 5 is a flowchart of a process for determining distortion of an FPGA chip in an embodiment of the present invention;
fig. 6 is a signal processing flow chart of the upper computer in the embodiment of the invention.
Detailed Description
The preferred embodiments of the present invention will be described below with reference to the accompanying drawings, it being understood that the preferred embodiments described herein are for illustration and explanation of the present invention only, and are not intended to limit the present invention.
The invention provides an output signal control system of an infrared remote control receiving chip, which comprises a power supply, an analog-to-digital conversion chip, an FPGA chip, an erasable and editable memory and a signal receiver, wherein the power supply is connected with the analog-to-digital conversion chip; wherein, the liquid crystal display device comprises a liquid crystal display device,
signal control software is arranged in the erasable and editable memory;
the system comprises the following signal output flow:
when the power supply is started, the FPGA chip is initialized, and after the initialization, whether the signal receiver receives a signal or not is judged, and a request signal is sent to the infrared remote control receiving chip through the signal receiver;
acquiring a response signal of the request signal, and controlling an infrared remote control receiving chip to receive an infrared acquisition signal by the FPGA chip;
the infrared acquisition signals are subjected to zone bit regulation and control through an analog-to-digital conversion chip, and infrared waveform signals of a plurality of zone bits are generated;
writing the infrared waveform signals into an erasable and editable memory, and converting the infrared waveform signals into a plurality of single-packet instructions;
and controlling the upper computer to synchronously execute the corresponding instructions according to the single-packet instructions.
The working principle of the technical scheme is as follows:
as shown in fig. 1 and 2, after the system is powered on, the FPGA chip executes an initialization form, the request signal is a signal received by the signal receiver, then it is judged whether the infrared receiving signal and the upper computer are started and the failure request signal is generated, when the request signal exists, if a response signal exists, it indicates that the infrared remote control receiving chip is started, and the upper computer is started and ready to receive infrared signals. At the moment, the flag bit regulation and control is to generate waveforms of a plurality of infrared signals, if only one infrared signal is received, a plurality of waveforms of the same infrared signal of the plurality of flag bits are generated, and at the moment, single infrared signal verification can be performed to judge the accuracy of the received infrared instruction;
when receiving a plurality of infrared signals, each infrared signal corresponds to a zone bit, so that the synchronous reception of the plurality of infrared signals is realized, the different infrared signals are divided through the zone bit, then the infrared signals are written into an erasable and editable memory, upper computer software is arranged in the erasable and editable memory, the infrared signals can be converted into single Bao Gong external instructions, the single Bao Gong external instructions are sent to an upper computer through an infrared receiving chip, and specific infrared instructions are executed.
The beneficial effects of the technical scheme are as follows:
according to the invention, synchronization of a plurality of infrared signals and different zone bits can be realized, and different infrared signals are converted, so that the synchronous identification function of the infrared signals is realized. Because a plurality of zone bits exist, the waveform conversion of the zone bits can be carried out on a single infrared signal, and then the synchronous verification is carried out on the single infrared signal. The invention can realize synchronous execution of a plurality of infrared signals, and can synchronously convert a plurality of infrared instructions into a plurality of single-packet instructions, thereby realizing synchronous execution of a plurality of infrared instructions.
In one embodiment of the invention:
the initializing of the FPGA chip further comprises:
setting a serial port, a timer and a local address of an infrared remote control receiving chip;
according to the serial port, setting an interrupt instruction and clearing a single-packet instruction in the erasable and editable memory;
setting infrared monitoring operation according to the timer, and monitoring infrared signals through the infrared monitoring operation;
and setting a response address monitored by an infrared signal according to the local address, and receiving an infrared remote control data packet according to the response address.
The principle of the technical scheme is as follows:
as shown in fig. 3, in the invention, when initializing, a serial port, a timer and a local address for receiving an infrared signal are set, the infrared signal is monitored in real time in a real-time monitoring mode, and the infrared signal is received;
the interrupt instruction can interrupt any executing single-packet instruction, further clear the single-packet instruction in the erasable and editable memory, delete any single-packet instruction, and initialize only one instruction execution bit.
The timer can be connected with the monitoring device, and the timer is used for setting the monitoring device to monitor at regular time.
The local address and the response address are address communication methods based on a handshake communication principle, and can realize directional receiving of infrared remote control data.
The invention has the beneficial effects that:
as shown in fig. 3, in the process of initializing the FPGA signal, because the present invention solves the problem of executing multiple infrared instructions synchronously, an interrupt instruction can be set, initialization of a single instruction execution bit is performed, replacement of an infrared remote control signal is performed, and after one instruction has been executed or after all instructions have been executed, a new infrared instruction is executed again, resulting in delay of the instruction. And the timer can realize infrared monitoring, so as to judge whether to execute the single-packet instruction in a monitoring mode.
In one embodiment of the invention:
the transmitting the first request signal further includes:
generating a main handshake signal according to the first request signal; wherein, the liquid crystal display device comprises a liquid crystal display device,
the master handshake signal includes a handshake request identifier;
sending the main handshake signal to an upper computer to obtain a handshake response message;
the handshake response message comprises a handshake response identifier, and the handshake response identifier is obtained according to the handshake request identifier;
the upper computer judges the handshake response identification, and when the handshake response identification is consistent with the preset handshake response identification, the upper computer establishes communication connection with the infrared remote control receiving chip.
The principle of the technical scheme is as follows:
as shown in fig. 4, when the system is started up during the initialization of the infrared signal, signal handshake is needed, the specific identification of the infrared signal is determined through the signal handshake, and the communication connection between the upper computer and the infrared remote control receiving chip is realized through the specific identification of the infrared signal.
The method can judge whether the infrared remote control equipment and the remote control equipment are connected or not through the main handshake instruction, and can judge whether the infrared connection state is in connection or in interruption state through the handshake response message. The upper computer is an infrared device provided with an infrared remote control transmitting chip. And comparing and judging the handshake identification through the upper computer, and if the handshake identification accords with a preset protocol, establishing communication between the upper computer and the infrared remote control receiving chip.
The beneficial effects of the technical scheme are that:
according to the invention, through the handshake instruction, when a plurality of infrared instructions are synchronously executed, the connection state of the infrared remote control equipment and the infrared receiving equipment can be judged to be good. Moreover, the directional instruction transmission can be realized in a mode of consistent identification.
In one embodiment of the invention:
the initializing of the FPGA chip further comprises:
establishing a plurality of infrared signal paths according to the analog-to-digital conversion chip;
the pulse width of each infrared signal channel is set in sequence;
each infrared signal path is adjusted through a multipath analog switch;
through adjustment, receiving a test infrared signal of the FPGA chip and generating encoded data of the infrared test signal;
judging whether the coded data is distorted or not, and calculating distortion errors of the coded data and the test infrared signals when the coded data is distorted;
each infrared signal path is calibrated based on the distortion error.
The principle of the technical scheme is as follows:
as shown in figure 5, in the initialization process, the invention can calibrate the corresponding pulse width of different infrared signal paths, ensure that the distortion of the infrared signal can not occur when the infrared signal is received, and prevent the error of the infrared signal.
The infrared signal paths are at least two, and can receive at least two infrared instructions executed simultaneously. The pulse width is used for preventing distortion from occurring when the FPGA chip controls the transmission of infrared signals.
The beneficial effects of the technical scheme are that:
the invention can realize synchronous receiving and executing of a plurality of infrared instructions by a plurality of signal paths, and can prevent distortion of infrared signals by adjusting pulse width.
In one embodiment of the invention:
the flag regulation includes:
generating a regulating channel of a pulse signal through a remote control receiving chip;
according to the regulation channel and the analog-to-digital conversion chip, converting the infrared acquisition signal into a pulse sequence with a marker bit;
dividing a pulse sequence into a plurality of sequence segments according to a time axis of the infrared acquisition signal;
determining initial configuration parameters of each sequence segment according to the waveform of each sequence segment; wherein, the liquid crystal display device comprises a liquid crystal display device,
the initial configuration parameters include: pulse amplitude, pulse duration, pulse signal cycle number;
acquiring a zone bit to be regulated and controlled, and determining a parameter difference value to be changed of each sequence segment;
according to the parameter difference value, configuring the configuration parameters of each sequence segment by segment through a preset transformation formula;
after the configuration section by section, each sequence section is fused to generate a regulated target pulse sequence.
The principle of the technical scheme is as follows:
the flag bit is suitable for reflecting the state of the processor, some characteristics of ALU operation results and execution of control instructions, and storing some execution results of related instructions; provides basis for the processor to execute instructions and controls the working mode of the CPU. The purpose of the regulation and control of the zone bit is to change the zone bit through an assembly instruction,
when the marker bit of the instruction corresponding to the infrared signal is regulated and controlled, a regulating and controlling channel is arranged, and the regulating and controlling channel can convert the waveform of the pulse signal into a pulse sequence with marker bit data, namely, the pulse signal is digitized; after the digitization, the meaning of each flag bit can be determined, and the multi-section division of the pulse sequence is performed, wherein the multi-section division is based on a time axis, and the period of the pulse signal can be determined through the time axis, so that the multi-section sequence section is the periodic division of the pulse signal. The pulse signals of each sequence segment are the same, the initial configuration parameters of the pulse signals can be determined through the waveforms of the pulse signals, and the flag bits of different parameters of the pulse signals can be determined through the initial configuration parameters. Furthermore, according to the marker bit to be regulated, determining the difference value of the marker bit, namely the parameter difference value of each sequence segment, wherein the parameter difference value can be determined; through the parameter difference value, each zone bit can be reconfigured section by section through a preset conversion formula, namely assembly language, namely the regulation and control of zone bits are carried out section by section; and finally, generating a regulated target pulse sequence, and further expanding the function of the target pulse sequence.
The beneficial effects of the technical scheme are that:
in the process of regulating and controlling the signals of each zone bit, the invention can realize the digital conversion of infrared signals through the analog-digital conversion chip and the regulating and controlling channel to generate a pulse sequence, then regulate and control the zone bit through the configuration parameters of the pulse sequence, and then fuse each sequence segment under the condition that the zone bit is configured segment by segment to generate a target pulse sequence regulated and controlled by the zone bit. The parameters of the zone bits enable the transmission of the infrared pulse signals to be more accurate, and the synchronous receiving of infrared signals and the verification of multiple zone bits are realized.
In one embodiment of the invention:
the erasable programmable memory further comprises the following processing steps:
under the condition that the erasable and editable memory is electrified, a file acquisition request is sent to the FPGA chip, so that the FPGA chip acquires a configuration file for configuring the erasable and editable memory from the upper computer;
receiving a configuration file sent by an FPGA chip;
triggering the erasable and editable memory to initialize, and after the initialization of the erasable and editable memory is completed, sending a configuration file to the erasable and editable memory so that the erasable and editable memory configures itself based on the configuration file.
The principle of the technical scheme is as follows:
the FPGA chip can acquire a configuration file from the upper computer, and the configuration file configures internal signal control software of the editable erasable internal memory so as to further process a signal control flow.
The beneficial effects of the technical scheme are that: the waveform of the infrared signals of different zone bits can be converted into files through the configuration files configured in the erasable and editable memory, so that the different infrared signals are refined.
In one embodiment of the invention:
the generating the infrared waveform signals of the plurality of flag bits includes:
setting a first delay time threshold of sampling delay time according to each flag bit;
setting a second delay time threshold of the output delay time according to each flag bit;
capturing the occurrence time of the rising edge and the falling edge of the infrared waveform signal in the same delay time period according to the zone bit;
determining the initial occurrence time and the cut-off occurrence time of the infrared waveform signal according to the rising edge and the falling edge, and generating a clock signal;
and determining different infrared waveform signals in the same delay period according to the clock signal, and synchronously outputting.
The principle of the technical scheme is as follows:
the sampling delay time is the sampling analysis time of the infrared remote control receiving chip when receiving infrared signals, and the purpose of the delay is to ensure that different infrared instructions can be executed in sequence when receiving a plurality of infrared signals. The output delay time is also the execution time of each instruction, a plurality of infrared instructions which are synchronously output are determined, the trace bit exists in the trace bit, the rising and falling of the waveform of the infrared signal can be captured, the rising and falling time is further determined, the corresponding clock signal is generated, and the infrared signal in the same delay time period is controlled to be synchronously output through the clock signal.
The beneficial effects of the technical scheme are that:
because the invention has time delay, the invention can realize infrared synchronous infrared instruction execution when receiving a plurality of infrared waveform signals, namely a plurality of infrared remote control instructions. Execution of a single infrared instruction may also be implemented; through the zone bit, the waveform and the delay time, the infrared signal which can realize synchronous output can be judged, and further synchronous implementation of the infrared instruction is realized.
In one embodiment of the invention:
the writing of the infrared waveform signal into the erasable programmable memory comprises the following steps:
acquiring a pulse sequence to be written into an infrared waveform signal and the existing data in an erasable memory;
comparing the pulse sequence to be written into the infrared waveform signal with the existing data according to the corresponding zone bit;
determining a zone bit of an infrared waveform signal to be written according to the comparison result;
comparing the characteristic bit of the infrared waveform signal through the marker bit to obtain a comparison result;
writing the infrared waveform signal to be written into the erasable and editable memory, and performing writing verification through comparing the result with the flag bit.
The principle of the technical scheme is as follows:
the erasable editable memory stores the previous infrared remote control signal instruction, so that the new infrared remote control instruction can be written in, and the new infrared remote control instruction can not be interfered by the existing instruction, so that the marker bit comparison can be carried out, the infrared waveform signal, namely the characterization bit of the infrared remote control instruction, can be compared with the key byte and the key bit corresponding to the key information of the instruction information of the infrared remote control instruction through the comparison of the marker bit, and the error is judged to appear when the infrared remote control instruction is written in, so that the writing verification of the infrared instruction is realized.
The beneficial effects of the technical scheme are that:
the invention can realize the comparison of infrared signals through the minimum information measurement unit, thereby determining whether the infrared remote control signal is successfully written or not, and further implementing execution.
In one embodiment of the invention:
the converting into a plurality of single package instructions includes:
acquiring an infrared waveform signal to be converted; wherein, the liquid crystal display device comprises a liquid crystal display device,
the infrared waveform signal comprises a plurality of different zone bits;
analyzing the infrared waveform signals, and determining target assembly instructions corresponding to the infrared waveform signals and the zone bits and target immediate values obtained after conversion based on the original immediate values;
combining a target assembly instruction and a target immediate based on preset rule information to obtain an assembly code corresponding to the infrared waveform signal; wherein, the liquid crystal display device comprises a liquid crystal display device,
the rule information comprises an assembly code logic form and an assembly format;
based on the assembly code, a single package instruction for each flag bit is determined.
The principle of the technical scheme is as follows:
when receiving a plurality of infrared remote control instructions simultaneously, the invention can realize the isolated receiving and the isolated execution of different infrared remote control signals by converting the infrared remote control instructions into a plurality of single-packet instructions. Therefore, in the process, the invention determines the corresponding target assembly instruction, namely the target instruction, through the analysis of the infrared waveform signal, and integrates the target assembly instruction into the red remote control receiving chip, wherein the original immediate number represents the number given in the immediate addressing mode instruction; thus, corresponding assembly codes are determined, and specific instruction information of each single-packet instruction can be determined through the assembly codes.
The beneficial effects of the technical scheme are that:
when different infrared remote control instructions are isolated, each infrared waveform signal is analyzed, the corresponding assembly language and assembly format are determined, the assembly code is calculated, and then the corresponding single-package instruction is determined through the assembly code.
In one embodiment of the invention:
the sending the single packet instruction to the upper computer through the network chip further comprises:
the upper computer cuts the infrared waveform signals according to an infrared signal compression rule, an infrared signal display rule and an infrared signal characteristic identification rule in a preset processing flow;
storing the result after each rule is executed as a text file and storing the text file;
after all rules are executed, storing an execution result, comparing the execution result with a historical infrared signal, and executing the next module after verification is passed;
and finally comparing the processed infrared signals with the signals processed by the historical infrared signals to determine the target infrared remote control signals.
The working principle of the technical scheme is as follows:
in the processing process of the infrared signals, the infrared signals are processed through various rules such as an infrared signal compression rule, an infrared signal display rule, an infrared signal characteristic recognition rule and the like, so that the infrared signals generate text files for storage, the text files are specific control instructions, and the specific control instructions are compared with historical control instructions, so that the target infrared remote control signals are accurately determined.
The beneficial effects of the technical scheme are that:
the infrared signal compression rule is a compression form and compression proportion of the infrared signal, so that the infrared signal with the highest precision is determined, and the infrared signal display rule comprises a display mode of the infrared signal, such as waveform or code; the infrared signal characteristic recognition rules comprise identification of the zone bit of the infrared signal and characterization identification of the infrared signal, the infrared waveform signal is cut through the rules, specific information based on different rules is determined, corresponding text files are generated, then the corresponding text files are compared with the same infrared signal in the history through the execution results corresponding to the text files, and if the comparison is successful, the infrared waveform signal is used as a target infrared remote control signal.
It will be apparent to those skilled in the art that various modifications and variations can be made to the present invention without departing from the spirit or scope of the invention. Thus, it is intended that the present invention also include such modifications and alterations insofar as they come within the scope of the appended claims or the equivalents thereof.
Claims (7)
1. The output signal control system of the infrared remote control receiving chip is characterized by comprising a power supply, an analog-to-digital conversion chip, an FPGA chip, an erasable and editable memory and a signal receiver; wherein, the liquid crystal display device comprises a liquid crystal display device,
signal control software is arranged in the erasable and editable memory;
the system comprises the following signal output flow:
when the power supply is started, the FPGA chip is initialized, and after the initialization, whether the signal receiver receives a signal or not is judged, and a request signal is sent to the infrared remote control receiving chip through the signal receiver;
acquiring a response signal of the request signal, and controlling an infrared remote control receiving chip to receive an infrared acquisition signal by the FPGA chip;
the infrared acquisition signals are subjected to zone bit regulation and control through an analog-to-digital conversion chip, and infrared waveform signals of a plurality of zone bits are generated;
writing the infrared waveform signals into an erasable and editable memory, and converting the infrared waveform signals into a plurality of single-packet instructions;
according to the single-packet instruction, controlling the upper computer to synchronously execute the corresponding instruction;
the initializing of the FPGA chip further comprises:
establishing a plurality of infrared signal paths according to the analog-to-digital conversion chip;
the pulse width of each infrared signal channel is set in sequence;
each infrared signal path is adjusted through a multipath analog switch;
through adjustment, receiving a test infrared signal of the FPGA chip and generating encoded data of the infrared test signal;
judging whether the coded data is distorted or not, and calculating distortion errors of the coded data and the test infrared signals when the coded data is distorted;
according to the distortion error, each infrared signal path is adjusted;
the flag regulation includes:
generating a regulating channel of a pulse signal through an infrared remote control receiving chip;
according to the regulation channel and the analog-to-digital conversion chip, converting the infrared acquisition signal into a pulse sequence with a marker bit;
dividing a pulse sequence into a plurality of sequence segments according to a time axis of the infrared acquisition signal;
determining initial configuration parameters of each sequence segment according to the waveform of each sequence segment; wherein, the liquid crystal display device comprises a liquid crystal display device,
the initial configuration parameters include: pulse amplitude, pulse duration, pulse signal cycle number;
acquiring a zone bit to be regulated and controlled, and determining a parameter difference value to be changed of each sequence segment;
according to the parameter difference value, configuring the configuration parameters of each sequence segment by segment through a preset transformation formula;
after the configuration section by section, fusing each sequence section to generate a regulated target pulse sequence;
the generating the infrared waveform signals of the plurality of flag bits includes:
setting a first delay time threshold of sampling delay time according to each flag bit;
setting a second delay time threshold of the output delay time according to each flag bit;
capturing the occurrence time of the rising edge and the falling edge of the infrared waveform signal in the same delay time period according to the zone bit;
determining the initial occurrence time and the cut-off occurrence time of the infrared waveform signal according to the rising edge and the falling edge, and generating a clock signal;
and determining different infrared waveform signals in the same delay period according to the clock signal, and synchronously outputting.
2. The system for controlling output signals of an infrared remote control receiving chip as set forth in claim 1, wherein said initializing said FPGA chip further comprises:
setting a serial port, a timer and a local address of an infrared remote control receiving chip;
according to the serial port, setting an interrupt instruction and clearing a single-packet instruction in the erasable and editable memory;
setting infrared monitoring operation according to the timer, and monitoring infrared signals through the infrared monitoring operation;
and setting a response address monitored by an infrared signal according to the local address, and receiving an infrared remote control data packet according to the response address.
3. The system for controlling an output signal of an infrared remote control receiving chip as set forth in claim 1, wherein said transmitting a request signal to the infrared remote control receiving chip through the signal receiver further comprises:
generating a main handshake signal according to the request signal; wherein, the liquid crystal display device comprises a liquid crystal display device,
the master handshake signal includes a handshake request identifier;
sending the main handshake signal to an upper computer to obtain a handshake response message;
the handshake response message comprises a handshake response identifier, and the handshake response identifier is obtained according to the handshake request identifier;
the upper computer judges the handshake response identification, and when the handshake response identification is consistent with the preset handshake response identification, the upper computer establishes communication connection with the infrared remote control receiving chip.
4. The system for controlling output signals of an infrared remote control receiving chip as set forth in claim 1, wherein said erasable programmable memory further comprises the steps of:
under the condition that the erasable and editable memory is electrified, a file acquisition request is sent to the FPGA chip, so that the FPGA chip acquires a configuration file for configuring the erasable and editable memory from the upper computer;
receiving a configuration file of an upper computer;
triggering the erasable and editable memory to initialize, and after the initialization of the erasable and editable memory is completed, sending a configuration file to the erasable and editable memory so that the erasable and editable memory configures itself based on the configuration file.
5. The system for controlling output signals of an infrared remote control receiving chip according to claim 1, wherein said writing of the infrared waveform signal to the erasable programmable memory comprises the steps of:
acquiring a pulse sequence to be written into an infrared waveform signal and the existing data in an erasable memory;
comparing the pulse sequence to be written into the infrared waveform signal with the existing data according to the corresponding zone bit;
determining a zone bit of an infrared waveform signal to be written according to the comparison result;
comparing the characteristic bit of the infrared waveform signal through the marker bit to obtain a comparison result;
writing the infrared waveform signal to be written into the erasable and editable memory, and performing writing verification through comparing the result with the flag bit.
6. The system for controlling output signals of an infrared remote control receiving chip according to claim 1, wherein said converting into a plurality of single packet instructions comprises:
acquiring an infrared waveform signal to be converted; wherein, the liquid crystal display device comprises a liquid crystal display device,
the infrared waveform signal comprises a plurality of different zone bits;
analyzing the infrared waveform signals, and determining target assembly instructions corresponding to the infrared waveform signals and the zone bits and target immediate values obtained after conversion based on the original immediate values;
combining a target assembly instruction and a target immediate based on preset rule information to obtain an assembly code corresponding to the infrared waveform signal; wherein, the liquid crystal display device comprises a liquid crystal display device,
the rule information comprises an assembly code logic form and an assembly format;
based on the assembly code, a single package instruction for each flag bit is determined.
7. The system for controlling output signals of an infrared remote control receiving chip as set forth in claim 1, wherein said controlling the host computer to synchronously execute the corresponding instructions further comprises:
the upper computer cuts the infrared waveform signals according to an infrared signal compression rule, an infrared signal display rule and an infrared signal characteristic identification rule in a preset processing flow;
storing the result after each rule is executed as a text file and storing the text file;
after all rules are executed, storing an execution result, comparing the execution result with a historical infrared signal, and executing the next module after verification is passed;
and finally comparing the processed infrared signals with the signals processed by the historical infrared signals to determine the target infrared remote control signals.
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| CN206115683U (en) * | 2016-08-31 | 2017-04-19 | 合肥荣事达电子电器集团有限公司 | Intelligence house infrared remote control equipment |
| CN111402570B (en) * | 2020-02-11 | 2021-08-17 | 广州创知科技有限公司 | Infrared remote control signal receiving method, receiving system, receiving device and storage medium |
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Address after: 518000 East, floor 4, building 4, Shenzhen Software Park, No. 2, Gaoxin Zhonger Road, Maling community, Yuehai street, Nanshan District, Shenzhen, Guangdong Patentee after: Shenzhen Meisi Micro Semiconductor Co.,Ltd. Address before: 518000 East, floor 4, building 4, Shenzhen Software Park, No. 2, Gaoxin Zhonger Road, Maling community, Yuehai street, Nanshan District, Shenzhen, Guangdong Patentee before: SHENZHEN MEIXI MICRO SEMICONDUCTOR CO.,LTD. |
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