CN116224711A - Manufacturing method of photomask - Google Patents

Manufacturing method of photomask Download PDF

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Publication number
CN116224711A
CN116224711A CN202310024625.0A CN202310024625A CN116224711A CN 116224711 A CN116224711 A CN 116224711A CN 202310024625 A CN202310024625 A CN 202310024625A CN 116224711 A CN116224711 A CN 116224711A
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China
Prior art keywords
layer
shielding
patterns
forming
adjacent
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CN202310024625.0A
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Chinese (zh)
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祁耀亮
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Ruijing Semiconductor Ningbo Co ltd
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Ruijing Semiconductor Ningbo Co ltd
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Priority to CN202310024625.0A priority Critical patent/CN116224711A/en
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    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/68—Preparation processes not covered by groups G03F1/20 - G03F1/50
    • G03F1/72—Repair or correction of mask defects
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/26—Phase shift masks [PSM]; PSM blanks; Preparation thereof
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/54—Absorbers, e.g. of opaque materials

Abstract

A manufacturing method of a photomask comprises the following steps: providing a transparent substrate, wherein the transparent substrate comprises a first surface and a second surface opposite to the first surface; forming a plurality of discrete shielding patterns on a first surface of the transparent substrate; when the space between two adjacent shielding patterns formed in part is larger, a correction layer is selectively formed on the side wall surfaces of the two adjacent shielding patterns with larger space through a selective forming process, so that the space between the two adjacent shielding patterns with larger space is reduced. In other words, by the selective forming process, a correction layer can be selectively formed on the side wall surfaces of two adjacent shielding patterns with larger spacing, so that the spacing between the two adjacent shielding patterns with larger spacing is reduced, i.e. the spacing between the two adjacent shielding patterns with larger spacing is repaired.

Description

Manufacturing method of photomask
Technical Field
The application relates to the field of photomasks, in particular to a manufacturing method of a photomask capable of repairing abnormal sizes or abnormal intervals.
Background
Photolithography is an indispensable important technology in integrated circuit fabrication processes. The lithographic process generally includes the steps of: firstly, coating photosensitive materials such as photoresist on the surface of a wafer, after the photoresist materials are dried, exposing a mask pattern on a photomask plate on the photoresist photosensitive materials by a specific light source through an exposure machine, then developing the photoresist photosensitive materials by a developer, and forming a photoresist pattern on the surface of the wafer, wherein the photoresist pattern is used as the mask pattern in the subsequent ion implantation process or etching process.
Existing photomasks generally include: a transparent substrate; forming a plurality of discrete shielding patterns (or mask patterns) on the surface of the transparent substrate; an annular frame on the transparent substrate surface, the annular frame surrounding the shielding pattern; and the protective film is positioned on the top surface of the annular frame, and the protective film and the annular frame are used for sealing the photomask.
However, defects are easily introduced into the formed photomask during the process of manufacturing the photomask, and the defects cause errors in patterns in the photomask, such as errors in size defects (defects) and particularly the spacing between two adjacent shielding patterns is larger or smaller, so that the defects on the photomask need to be repaired, so that the pattern errors in the photomask are reduced, and the photomask meeting the design requirements is obtained.
Disclosure of Invention
Some embodiments of the present application provide a method for manufacturing a photomask, including:
providing a transparent substrate, wherein the transparent substrate comprises a first surface and a second surface opposite to the first surface;
forming a plurality of discrete shielding patterns on a first surface of the transparent substrate;
when the space between two adjacent shielding patterns formed in part is larger, a correction layer is selectively formed on the side wall surfaces of the two adjacent shielding patterns with larger space through a selective forming process, so that the space between the two adjacent shielding patterns with larger space is reduced.
In some embodiments, the material of the correction layer and the material of the shielding layer are both opaque materials.
In some embodiments, the material of the correction layer is a light-impermeable metal.
In some embodiments, the selective formation process includes: negatively charging adjacent two shielding patterns with larger spacing; positively charged metal ions are provided and adsorbed to the negatively charged masking pattern sidewall surfaces to form a correction layer.
In some embodiments, said negatively charging said two adjacent said masking patterns with said larger pitch comprises: and applying a negative voltage to the two adjacent shielding patterns with larger spacing so that the two adjacent shielding patterns with larger spacing are negatively charged.
In some embodiments, the process of negatively charging the adjacent two of the masking patterns with the larger pitch: and injecting negative ions into the two adjacent shielding patterns with larger spacing through an injection process, so that the two adjacent shielding patterns with larger spacing are negatively charged.
In some embodiments, the selective formation process includes: forming a conductive layer on a first surface of the transparent substrate before forming a shielding pattern; forming a plurality of discrete masking patterns on the surface of the conductive layer; forming a mask layer on the conductive layer, wherein the mask layer exposes opposite side wall surfaces of two adjacent shielding patterns with larger spacing; connecting the conductive layer with a negative electrode of a power supply, and forming a correction layer on the exposed side wall surface by an electroplating process; and removing the mask layer, reserving the phase shift layer, and removing the conductive layers at two sides of the shielding pattern, reserving the shielding pattern and the conductive layer at the bottom of the correction layer.
In some embodiments, the selective formation process includes: forming a first shielding layer on a first surface of the transparent substrate before forming the shielding pattern, wherein the first shielding layer is used for forming part of the shielding pattern and serves as a conductive layer; forming a second shielding layer on the surface of the first shielding layer; patterning the second masking layer to form a plurality of discrete upper masking patterns on the first masking layer, the upper masking patterns being part of the masking patterns; forming a mask layer on the first shielding layer, wherein the mask layer exposes opposite side wall surfaces of two adjacent upper shielding patterns with larger spacing; connecting the first shielding layer with a negative electrode of a power supply, and forming a correction layer on the exposed side wall surface by an electroplating process; and removing the mask layer, and removing the first shielding layers at two sides of the upper shielding pattern to reserve the first shielding layer at the bottom of the upper shielding pattern, wherein the first shielding layer reserved at the bottom of the upper shielding pattern is used as a lower shielding pattern, and the upper shielding pattern and the lower shielding pattern form a shielding pattern.
In some embodiments, the selective formation process includes: forming a phase shift layer on the first surface of the transparent substrate before forming the shielding pattern, wherein the phase shift layer is used as a conductive layer during electroplating; forming a plurality of discrete masking patterns on the phase shift layer surface; forming a mask layer on the phase shift layer, wherein the mask layer exposes opposite side wall surfaces of two adjacent shielding patterns with larger spacing; connecting the phase shift layer with a negative electrode of a power supply, and forming a correction layer on the exposed side wall surface by an electroplating process; and removing the mask layer and reserving the phase shift layer.
In some embodiments, the material of the phase shift layer is molybdenum silicide.
In some embodiments, the larger pitch includes a pitch between two adjacent shielding patterns being larger than a standard value, and the smaller pitch includes making a pitch between two adjacent shielding patterns having the larger pitch equal to the standard value.
Some embodiments of the present application further provide a method for manufacturing a photomask, including:
providing a transparent substrate, wherein the transparent substrate comprises a first surface and a second surface opposite to the first surface;
forming a plurality of discrete shielding patterns on a first surface of the transparent substrate;
when the space between two adjacent shielding patterns formed in part is smaller, removing part of the side walls of the two adjacent shielding patterns with smaller space by an etching process, so that the space between the two adjacent shielding patterns with smaller space is increased.
In some embodiments, before the etching process, a mask layer is formed on the surface of the transparent substrate, where the mask layer exposes sidewall surfaces of two adjacent shielding patterns with smaller spacing.
In some embodiments, the etching process employs etching solutions of hydrofluoric acid, sulfuric acid, hydrochloric acid, nitric acid, and the like, and mixtures thereof.
According to the manufacturing method of the photomask, a transparent substrate is provided, the transparent substrate comprises a first surface and a second surface opposite to the first surface, after a plurality of discrete shielding patterns are formed on the first surface of the transparent substrate, when the distance between two adjacent shielding patterns formed in part is larger, a correction layer is selectively formed on the side wall surfaces of the two adjacent shielding patterns with larger distance through a selective forming process, so that the distance between the two adjacent shielding patterns with larger distance is reduced. In other words, by the selective forming process, a correction layer can be selectively formed on the side wall surfaces of two adjacent shielding patterns with larger spacing, so that the spacing between the two adjacent shielding patterns with larger spacing is reduced, that is, the spacing between the two adjacent shielding patterns with larger spacing is repaired, and meanwhile, the spacing between the shielding patterns with other normal spacing is not influenced or is influenced very little.
Drawings
Fig. 1-17 are schematic structural diagrams illustrating a photomask manufacturing process according to some embodiments of the present application.
Detailed Description
The following detailed description of specific embodiments of the present application refers to the accompanying drawings. In describing embodiments of the present application in detail, the schematic drawings are not necessarily to scale and are merely illustrative and should not be taken as limiting the scope of the present application. In addition, the three-dimensional dimensions of length, width and depth should be included in actual fabrication.
Some embodiments of the present application first provide a method for manufacturing a photomask, and a detailed description is given below of a photomask manufacturing process with reference to the accompanying drawings.
Referring to fig. 1, a transparent substrate 201 is provided, the transparent substrate 201 comprising a first surface 11 and a second surface 12 opposite to the first surface 11.
The transparent substrate 201 is used as a carrier of the photomask, the transparent substrate 201 is made of a light-transmitting material, and the light transmittance of the transparent substrate 201 is greater than 90%. The material of the transparent substrate 201 may be quartz glass or soda glass in some embodiments. In other embodiments, the material of the transparent substrate 201 may be fused silica (fused silica), calcium fluoride, silicon nitride, titanium oxide alloy, or sapphire. The transparent substrate 201 includes two opposite first surfaces 11 and second surfaces 12, where a shielding pattern, an annular frame, etc. are formed on the first surfaces 11, and when the photomask of the present application is used for exposure, exposure light generated by an exposure light source is incident from one side of the second surfaces 12, and after being shielded by the shielding pattern, part of the exposure light is emitted from the first surfaces 11.
In some embodiments, the transparent substrate 201 may include a middle region and an edge region surrounding the middle region, the middle region may be square or circular or other suitable shape, and the edge region may be annular and surround the middle region. The intermediate region is subsequently used to form a masking pattern (or mask pattern), the intermediate region is subsequently also used to form a phase shift layer, and the edge region is subsequently used to form a ring frame.
Referring to fig. 2, a shielding pattern material layer 211 is formed on the first surface 21 of the transparent substrate 201.
The masking pattern material layer 211 is subsequently used to form a masking pattern.
The material of the shielding pattern material layer 211 is a light-tight material, and the shielding pattern material layer 211 may be a single-layer or multi-layer stacked structure (for example, a stacked structure of two or more layers), and the shielding pattern formed later is also a single-layer or multi-layer stacked structure (for example, a stacked structure of two or more layers). In some embodiments, the material of the shielding pattern material layer 211 may be one or more of chromium, nickel, aluminum, ruthenium, molybdenum, titanium, or tantalum. In other embodiments, the material of the shielding pattern material layer 211 may be one or more of chromium, nickel, aluminum, ruthenium, molybdenum, titanium, tantalum, chromium oxide, iron oxide, niobium oxide, chromium nitride, molybdenum trioxide, molybdenum nitride, chromium oxide, titanium nitride, zirconium nitride, titanium oxide, tantalum nitride, tantalum oxide, silicon dioxide, niobium nitride, silicon nitride, neutral aluminum oxide, and aluminum oxide.
In some embodiments, the shielding pattern material layer 211 is formed through a sputtering process, an electroplating process, or an evaporation process.
Referring to fig. 3, the shielding pattern material layer 211 (refer to fig. 2) is etched to form a plurality of discrete shielding patterns 202 on the first surface 11 of the transparent substrate 201.
The masking pattern material layer 211 may be etched using an anisotropic dry etching process or other suitable etching process.
The plurality of shielding patterns 202 are formed separately from each other, and the shielding patterns 202 may be rectangular, square, a composite pattern composed of a plurality of rectangles, a composite pattern composed of a plurality of squares, or a composite pattern composed of a plurality of rectangles and squares.
In the process of manufacturing the photomask, the manufacturing process is mostly normal, but sometimes there is an abnormal situation, so that the manufacturing process of the photomask needs to be monitored, and the distance between two adjacent shielding patterns 202 is measured in a relatively effective monitoring mode. The spacing between adjacent mask patterns is generally the linear distance between the opposite sides of adjacent mask patterns 202, such as the spacing between adjacent mask patterns 202a and 202b indicated by D1 in FIG. 3.
Since the manufacturing process is normal and abnormal, the formed space D1 between adjacent shielding patterns may be normal or abnormal, the space between adjacent shielding patterns is normal, the space between adjacent shielding patterns is equal to a standard value, the space between adjacent shielding patterns is abnormal, the space between adjacent shielding patterns is larger than (larger than) or smaller than (smaller than) the standard value, the standard value is a specific value a, such as a value of 100nm, and the standard value may be a range value a±b, such as a range value a±b% of 100nm±10%.
Specifically, in this embodiment, with continued reference to fig. 3, the space D1 between the adjacent shielding patterns 202a and 202b formed partially is larger (the space D1 is larger than the standard value), and the space between other shielding patterns is normal (in other embodiments, the space D1 between all adjacent shielding patterns is possibly larger), when such a photomask is used for exposure, when the exposure light 21 is incident from the second surface 12 of the transparent substrate 201, part of the exposure light passes through the transparent substrate 201 and is blocked by the shielding patterns, the other part of the exposure light 22 passes through the transparent substrate 201 and then exits from the first surface 11 of the transparent substrate 201 between the shielding patterns 202, the exposure light 22 emitted from the shielding patterns 202 needs to reach the photoresist layer on the wafer surface through the transmission of the optical system, and the photoresist layer is exposed, and since the space D1 between the adjacent shielding patterns 202a and 202b is larger, the exposure light passing through the first surface 11 of the transparent substrate 201 between the adjacent shielding patterns 202a and 202b is also larger, and thus the photoresist layer is also larger in size, and the photoresist layer is even scraped, and the photoresist layer is formed, and the photoresist layer is further larger in size is further, the photoresist layer is formed. Therefore, if the photomask having such an abnormality is used for manufacturing a semiconductor chip, the space between the photolithography patterns formed on the wafer is also abnormal, and the wafer is easily scrapped, so that when the space between the adjacent shielding patterns 202 is abnormal, rework or repair of the photomask is required, and repair is widely used because of its relatively low cost and small damage to the photomask.
In the application, when the space between two adjacent shielding patterns formed in part is larger, a correction layer is selectively formed on the side wall surfaces of the two adjacent shielding patterns with larger space through a selective forming process, so that the space between the two adjacent shielding patterns with larger space is reduced. In other words, by the selective forming process, a correction layer can be selectively formed on the side wall surfaces of two adjacent shielding patterns with larger spacing, so that the spacing between the two adjacent shielding patterns with larger spacing is reduced, that is, the spacing between the two adjacent shielding patterns with larger spacing is repaired, and meanwhile, the spacing between the shielding patterns with other normal spacing is not influenced or is influenced very little. The selective formation process of the present scheme is described in detail in a number of examples below.
In some embodiments, the selective formation process includes: referring to fig. 4, adjacent two of the shielding patterns (202 a and 202 b) having the larger pitch are negatively charged; referring to fig. 5, positively charged metal ions are provided, which are adsorbed to the surfaces of the negatively charged shadow pattern sidewalls (202 a and 202 b) to form a correction layer 205.
The material of the correction layer 205 is a light-tight material, and the material of the correction layer 205 is a light-tight metal. In some embodiments, the material of the correction layer 205 is one of chromium, nickel, aluminum, ruthenium, molybdenum, titanium, or tantalum. In some embodiments, the material of the correction layer 205 is the same as the material of the masking pattern 202.
In this application, after the two adjacent shielding patterns (202 a and 202 b) with larger spacing are negatively charged, the positively charged metal ions are negatively attracted by the shielding patterns (202 a and 202 b) and move to the side wall surfaces of the shielding patterns (202 a and 202 b), the positively charged metal ions and electrons undergo neutralization and reduction reaction to deposit on the side wall surfaces of the shielding patterns (202 a and 202 b) to form a correction layer 205, so that the correction layer can be selectively formed on the side wall surfaces of the two adjacent shielding patterns (202 a and 202 b) with larger spacing, and the other side wall surfaces of the shielding patterns (202 a and 202 b) without negative charging do not form a correction layer (or even if the correction layer is formed, the correction layer has small influence on the spacing between the adjacent shielding patterns), so that the spacing between the two adjacent shielding patterns (202 a and 202 b) with larger spacing is reduced or becomes normal, and the spacing reduction includes making the spacing between the two adjacent shielding patterns (202 a and 202 b) with larger spacing equal to the standard value or within the range of standard value.
In some embodiments, the positively charged metal ion may be one of a chromium ion, a nickel ion, an aluminum ion, a ruthenium ion, a molybdenum ion, a titanium ion, or a tantalum ion. The positively charged metal ions may be provided in a variety of ways, such as in a plasma deposition chamber, by ionizing a source gas to form positively charged metal ions, or in an electroless plating bath containing positively charged metal ions. The selective formation process may be performed in a plasma deposition chamber or an electroless plating bath.
In some embodiments, the negatively charging the adjacent two of the masking patterns (202 a and 202 b) with the larger pitch includes: negative voltages are applied to the two adjacent shielding patterns (202 a and 202 b) having the larger pitch such that the two adjacent shielding patterns (202 a and 202 b) having the larger pitch are negatively charged. The negative charge provides electrons that neutralize the reduction reaction. In some embodiments, a negative voltage may be applied to the respective masking patterns (202 a and 202 b) by an electrode or probe.
In some embodiments, the process of negatively charging two adjacent ones of the masking patterns (202 a and 202 b) that are larger in the pitch: negative ions are implanted into the two adjacent shielding patterns (202 a and 202 b) with larger spacing through an implantation process, so that the two adjacent shielding patterns (202 a and 202 b) with larger spacing are negatively charged. The negative ions provide electrons in the neutralization reduction reaction. In some embodiments, the negative ions are those that are less corrosive to the masking pattern with a reducing nature. In a specific embodiment, the negative ions include phosphorus ions or arsenic ions. Negative ions are implanted into the two adjacent shielding patterns (202 a and 202 b) with larger spacing through an ion implantation process, and other shielding patterns 202 which do not need to be implanted can be covered by a mask layer before ion implantation.
In other embodiments, the selective formation process includes: referring to fig. 6, before forming the shielding pattern, a conductive layer 207 is formed on the first surface 11 of the transparent substrate 201; forming a plurality of discrete masking patterns 202 on the surface of the conductive layer 207; referring to fig. 7 or 8, a mask layer 208 is formed on the conductive layer 207, the mask layer 208 exposing opposite sidewall surfaces of the adjacent two shielding patterns (202 a and 202 b) having the larger pitch; referring to fig. 9, the conductive layer 207 is connected to a negative electrode of a power source, and a correction layer 205 is formed on the exposed sidewall surface through an electroplating process; referring to fig. 10, the mask layer is removed, and the conductive layers on both sides of the shielding patterns 202 (202 a and 202 b) remain the conductive layer 207 on the bottoms of the shielding patterns 202 (202 a and 202 b) and the correction layer 205.
The conductive layer 207 is used for connecting a negative electrode of a power source (direct current power source) when electroplating is performed, so that two adjacent shielding patterns (202 a and 202 b) exposed by the mask layer 208 and with larger spacing are negatively charged to serve as a negative electrode when electroplating is performed. In the electroplating, it is necessary to connect the metal anode with the positive electrode of the power source (dc power source), the metal anode is made of the same material as the correction layer 205 to be formed, and the cathode and the metal anode are placed in the electroplating solution in the electroplating tank, the electroplating solution contains the same element as the correction layer 205, when a certain potential is applied between the cathode and the metal anode, positively charged metal ions in the electroplating solution obtain electrons from the adjacent two shielding patterns (202 a and 202 b) exposed by the mask layer 208 and are reduced to metal, so that the correction layer 205 is selectively formed on the side wall surfaces of the adjacent two shielding patterns (202 a and 202 b) exposed by the mask layer 208, and the surfaces of the other shielding patterns 202 are not formed due to being covered by the mask layer.
The material of the conductive layer 208 is different from the material of the shielding pattern 202 and the correction layer 205, and the material of the conductive layer 208 is a conductive metal, alloy or metal oxide. In some embodiments, the conductive layer 207 may be one or more of Al, cu, ag, au, pt, ni, ti, tiN, taN, ta, taC, taSiN, W, WN, WSi. The conductive layer 207 is formed by a sputtering or deposition process.
The material of the mask layer 208 may be photoresist or other mask materials, such as silicon oxide or silicon nitride. Opposing sidewall surfaces of adjacent two of the masking patterns (202 a and 202 b) having the larger pitch are exposed by patterning the mask layer 208. In some embodiments, referring to fig. 7, the surfaces of all the conductive layers 207 between the two adjacent shielding patterns (202 a and 202 b) with larger spacing are not covered by the mask layer 208, and after the correction layer is formed subsequently, when the conductive layers on two sides of the shielding patterns are removed by a maskless etching process, the material of the correction layer on the surfaces of the conductive layers 207 may be removed at the same time, and the material of the correction layer on the sidewall surfaces of the two adjacent shielding patterns (202 a and 202 b) with larger spacing may be remained as the correction layer. In some embodiments, referring to fig. 8, the surface of the conductive layer 207 in the middle portion between two adjacent shielding patterns (202 a and 202 b) with a larger pitch is further covered with a partial mask layer 208, so that the accuracy of the formation position and size of the correction layer can be more precisely defined.
After the correction layer 205 is formed, a maskless anisotropic etching process is used to remove the conductive layers on both sides of the shielding pattern 202 (and the correction layer 205), and the conductive layer 207 on the bottom of the shielding pattern 202 (and the correction layer 205) is remained.
In other embodiments, the selective formation process includes: forming a first shielding layer on the first surface of the transparent substrate, wherein the first shielding layer is used for forming part of the shielding pattern and is used as a conductive layer, and in some embodiments, the first shielding layer can be of a single-layer or multi-layer stacked structure, and the material of the first shielding layer can be one or more of molybdenum nitride, zirconium nitride, titanium nitride or tantalum nitride; forming a second shielding layer on the surface of the first shielding layer, wherein in some embodiments, the second shielding layer may be a single-layer or multi-layer stacked structure, and the material of the second shielding layer may be one or more of chromium, nickel, aluminum, ruthenium, molybdenum, titanium, tantalum, chromium oxide, iron oxide, niobium oxide, chromium nitride, molybdenum trioxide, molybdenum nitride, chromium oxide, titanium nitride, zirconium nitride, titanium oxide, tantalum nitride, tantalum oxide, silicon dioxide, niobium nitride, silicon nitride, neutral aluminum oxide, and aluminum oxide; patterning the second shielding layer, forming a plurality of discrete upper shielding patterns on the first shielding layer, wherein when patterning the second shielding layer, the first shielding layer is not patterned or only etched with partial thickness is not etched through, so that when the formed upper shielding patterns have an abnormal (larger) spacing (the upper shielding patterns are used as a part of the shielding patterns, the spacing between the upper shielding patterns can represent the spacing between the shielding patterns formed subsequently, thus the spacing measurement can be directly performed after the upper shielding patterns are formed, whether the spacing between the upper shielding patterns is abnormal or not is monitored, if the spacing between the upper shielding patterns is abnormal, the spacing between the upper shielding patterns also represents the abnormality), and the first shielding layer can be used as a conductive layer when the correction layer is formed by electroplating; forming a mask layer on the first shielding layer, wherein the mask layer exposes opposite side wall surfaces of two adjacent upper shielding patterns with larger spacing; connecting the first shielding layer with a negative electrode of a power supply, and forming a correction layer on the exposed side wall surface by an electroplating process; and removing the mask layer, and removing the first shielding layers at two sides of the upper shielding pattern (and the correction layer), wherein the first shielding layers at the bottoms of the upper shielding pattern (and the correction layer) are reserved, the first shielding layers reserved at the bottoms of the upper shielding pattern are used as lower shielding patterns, and the upper shielding pattern and the lower shielding pattern form shielding patterns. In this embodiment, when the space between the formed shielding patterns (upper shielding patterns) is abnormal (larger), the first shielding layer may be used as the conductive layer when the correction layer is formed, and after the correction layer is formed, the first shielding layer is etched to form the lower shielding pattern, so that the shielding patterns of the space may be repaired while the multi-layer stacked shielding patterns are formed. When the upper shielding pattern has no abnormal space, the first shielding layer is directly etched after space monitoring, so that the lower shielding pattern can be formed. It should be noted that, the specific process of forming the mask layer and the correction layer in this embodiment is not repeated herein, and please refer to the definition or description of the corresponding portion in the foregoing embodiment.
In still other embodiments, the selective formation process includes: referring to fig. 11, before forming the shielding pattern, a phase shift layer 209 is formed on the first surface of the transparent substrate 201, and the phase shift layer 209 is used as a conductive layer during electroplating, and the phase shift layer 209 is further used to change the phase of the exposure light incident into the transparent substrate 201 so as to improve the resolution during exposure, and in some embodiments, the material of the phase shift layer 209 is silicon molybdenum; with continued reference to fig. 11, a plurality of discrete masking patterns 202 are formed on the surface of the phase shift layer 209; referring to fig. 12, a mask layer 208 is formed on the phase shift layer 209, the mask layer 208 exposing opposite sidewall surfaces of the adjacent two shielding patterns (202 a and 202 b) having the larger pitch; referring to fig. 13, a negative electrode of the phase shift layer 209 connected to a power source is subjected to an electroplating process to form a correction layer 205 on the exposed sidewall surface; referring to fig. 14, the mask layer is removed, leaving the phase shift layer 209. In this embodiment, the formation process of the phase shift layer 209 is combined with the formation process of the correction layer 205, when there is an abnormality (a deviation) in the spacing between the formed shielding patterns (202 a and 202 b), the phase shift layer 209 may be used as a conductive layer when the correction layer is formed, without forming a conductive layer additionally, and after the correction layer is formed, the mask layer is removed, and the phase shift layer 209 is retained, so that in the formation process of the photomask, the phase shift layer may be formed, and the shielding pattern with an abnormal spacing may be repaired. It should be noted that, in this embodiment, specific processes of forming the shielding pattern, the mask layer and the correction layer are not repeated herein, and please refer to the definition or description of the corresponding parts in the foregoing embodiment.
In some embodiments, referring to fig. 15, 16, or 17, the fabrication method further comprises: forming an annular frame 204 surrounding the shielding pattern 202 on the surface of the edge region 22 of the transparent substrate 201; a protective film 206 closing the space inside the ring frame 204 is formed on the top surface of the ring frame 204.
The annular frame 204 is used for supporting a protective film formed subsequently, and the shielding pattern 202 on the photomask 201 and the surface of the middle area of the photomask 201 can be isolated from the external environment through the annular frame 204 and the protective film formed subsequently, so that the pollution of the external environment is prevented.
The annular frame 204 is hollow and annular, and the material of the annular frame 204 is a material with certain mechanical strength. In some embodiments, the material of the ring frame 204 is aluminum. In other embodiments, the material of the ring frame 204 may be aluminum alloy, ceramic, carbon steel, or other suitable metallic or non-metallic material.
In some embodiments, the ring frame 204 is adhered to an edge region of the transparent substrate by an adhesive layer 203.
The material of the adhesive layer 203 is an organic adhesive, which in some embodiments is a rubber adhesive, a polyurethane adhesive, an acrylic adhesive, a SEBS (styrene ethylene butylene styrene) adhesive, a SEPS (styrene ethylene propylene styrene) adhesive, or a silicone adhesive.
The material of the protective film 206 is a light-transmitting material.
Some embodiments of the present application further provide a method for manufacturing a photomask, including:
providing a transparent substrate, wherein the transparent substrate comprises a first surface and a second surface opposite to the first surface; forming a plurality of discrete shielding patterns on a first surface of the transparent substrate; when the space between two adjacent shielding patterns formed in part is smaller, removing part of the side walls of the two adjacent shielding patterns with smaller space by an etching process, so that the space between the two adjacent shielding patterns with smaller space is increased.
The method realizes the repair of the situation of smaller spacing. The smaller spacing means that the spacing between the two adjacent shielding patterns is smaller than a standard value. The increase of the distance means that after repair, the distance between the two shielding patterns is equal to or within the standard value.
In some embodiments, before the etching process, a mask layer is formed on the surface of the transparent substrate, where the mask layer exposes sidewall surfaces of two adjacent shielding patterns with smaller spacing.
In some embodiments, the etching process employs etching solutions of hydrofluoric acid, sulfuric acid, hydrochloric acid, nitric acid, and the like, and mixtures thereof.
Although the present invention has been described with respect to the preferred embodiments, it is not intended to limit the scope of the invention, and any person skilled in the art may make any possible variations and modifications to the technical solution of the present invention using the methods and technical matters disclosed above without departing from the spirit and scope of the present invention, so any simple modifications, equivalent variations and modifications to the above embodiments according to the technical matters of the present invention fall within the scope of the technical matters of the present invention.

Claims (14)

1. The manufacturing method of the photomask is characterized by comprising the following steps of:
providing a transparent substrate, wherein the transparent substrate comprises a first surface and a second surface opposite to the first surface;
forming a plurality of discrete shielding patterns on a first surface of the transparent substrate;
when the space between two adjacent shielding patterns formed in part is larger, a correction layer is selectively formed on the side wall surfaces of the two adjacent shielding patterns with larger space through a selective forming process, so that the space between the two adjacent shielding patterns with larger space is reduced.
2. The method of claim 1, wherein the material of the correction layer and the material of the shielding layer are opaque.
3. The method of claim 1 or 2, wherein the material of the correction layer is opaque metal.
4. The method of claim 3, wherein the selective forming process comprises: negatively charging adjacent two shielding patterns with larger spacing; positively charged metal ions are provided and adsorbed to the negatively charged masking pattern sidewall surfaces to form a correction layer.
5. The method of claim 4, wherein negatively charging the two adjacent masking patterns with larger pitch comprises: and applying a negative voltage to the two adjacent shielding patterns with larger spacing so that the two adjacent shielding patterns with larger spacing are negatively charged.
6. The method for manufacturing a photomask according to claim 4, wherein the process of negatively charging the two adjacent shielding patterns with larger spacing is characterized in that: and injecting negative ions into the two adjacent shielding patterns with larger spacing through an injection process, so that the two adjacent shielding patterns with larger spacing are negatively charged.
7. The method of claim 3, wherein the selective forming process comprises: forming a conductive layer on a first surface of the transparent substrate before forming a shielding pattern; forming a plurality of discrete masking patterns on the surface of the conductive layer; forming a mask layer on the conductive layer, wherein the mask layer exposes opposite side wall surfaces of two adjacent shielding patterns with larger spacing; connecting the conductive layer with a negative electrode of a power supply, and forming a correction layer on the exposed side wall surface by an electroplating process; and removing the mask layer, reserving the phase shift layer, and removing the conductive layers at two sides of the shielding pattern, reserving the shielding pattern and the conductive layer at the bottom of the correction layer.
8. The method of claim 3, wherein the selective forming process comprises: forming a first shielding layer on a first surface of the transparent substrate before forming the shielding pattern, wherein the first shielding layer is used for forming part of the shielding pattern and serves as a conductive layer; forming a second shielding layer on the surface of the first shielding layer; patterning the second masking layer to form a plurality of discrete upper masking patterns on the first masking layer, the upper masking patterns being part of the masking patterns; forming a mask layer on the first shielding layer, wherein the mask layer exposes opposite side wall surfaces of two adjacent upper shielding patterns with larger spacing; connecting the first shielding layer with a negative electrode of a power supply, and forming a correction layer on the exposed side wall surface by an electroplating process; and removing the mask layer, and removing the first shielding layers at two sides of the upper shielding pattern to reserve the first shielding layer at the bottom of the upper shielding pattern, wherein the first shielding layer reserved at the bottom of the upper shielding pattern is used as a lower shielding pattern, and the upper shielding pattern and the lower shielding pattern form a shielding pattern.
9. The method of claim 3, wherein the selective forming process comprises: forming a phase shift layer on the first surface of the transparent substrate before forming the shielding pattern, wherein the phase shift layer is used as a conductive layer during electroplating; forming a plurality of discrete masking patterns on the phase shift layer surface; forming a mask layer on the phase shift layer, wherein the mask layer exposes opposite side wall surfaces of two adjacent shielding patterns with larger spacing; connecting the phase shift layer with a negative electrode of a power supply, and forming a correction layer on the exposed side wall surface by an electroplating process; and removing the mask layer and reserving the phase shift layer.
10. The method of claim 9, wherein the phase shift layer is molybdenum silicide.
11. The method of claim 1, wherein the larger pitch includes a pitch between two adjacent shielding patterns being larger than a standard value, and the smaller pitch includes a pitch between two adjacent shielding patterns having the larger pitch being equal to the standard value.
12. The manufacturing method of the photomask is characterized by comprising the following steps of:
providing a transparent substrate, wherein the transparent substrate comprises a first surface and a second surface opposite to the first surface;
forming a plurality of discrete shielding patterns on a first surface of the transparent substrate;
when the space between two adjacent shielding patterns formed in part is smaller, removing part of the side walls of the two adjacent shielding patterns with smaller space by an etching process, so that the space between the two adjacent shielding patterns with smaller space is increased.
13. The method of claim 12, wherein a mask layer is formed on the surface of the transparent substrate before the etching process, and the mask layer exposes sidewall surfaces of two adjacent shielding patterns with smaller pitches.
14. The method of claim 12, wherein the etching solution used in the etching process is hydrofluoric acid, sulfuric acid, hydrochloric acid, nitric acid, or a mixture thereof.
CN202310024625.0A 2023-01-09 2023-01-09 Manufacturing method of photomask Pending CN116224711A (en)

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Application Number Priority Date Filing Date Title
CN202310024625.0A CN116224711A (en) 2023-01-09 2023-01-09 Manufacturing method of photomask

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Publication Number Publication Date
CN116224711A true CN116224711A (en) 2023-06-06

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