CN116192180A - Universal reconfigurable radio frequency receiving and transmitting microsystem - Google Patents

Universal reconfigurable radio frequency receiving and transmitting microsystem Download PDF

Info

Publication number
CN116192180A
CN116192180A CN202310455424.6A CN202310455424A CN116192180A CN 116192180 A CN116192180 A CN 116192180A CN 202310455424 A CN202310455424 A CN 202310455424A CN 116192180 A CN116192180 A CN 116192180A
Authority
CN
China
Prior art keywords
broadband
conversion
chip
silicon
radio frequency
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN202310455424.6A
Other languages
Chinese (zh)
Other versions
CN116192180B (en
Inventor
彭轶瑶
杨凝
李霄
张先乐
洪力
齐晓琳
戴扬
汪志强
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
CETC Information Science Research Institute
Original Assignee
CETC Information Science Research Institute
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by CETC Information Science Research Institute filed Critical CETC Information Science Research Institute
Priority to CN202310455424.6A priority Critical patent/CN116192180B/en
Publication of CN116192180A publication Critical patent/CN116192180A/en
Application granted granted Critical
Publication of CN116192180B publication Critical patent/CN116192180B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/38Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
    • H04B1/40Circuits
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/005Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission adapting radio receivers, transmitters andtransceivers for operation on two or more bands, i.e. frequency ranges
    • H04B1/0067Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission adapting radio receivers, transmitters andtransceivers for operation on two or more bands, i.e. frequency ranges with one or more circuit blocks in common for different bands
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00Reducing energy consumption in communication networks
    • Y02D30/70Reducing energy consumption in communication networks in wireless communication networks

Abstract

The embodiment of the disclosure relates to the technical field of radio frequency microsystems, and provides a universal reconfigurable radio frequency transceiver microsystem, wherein the microsystem comprises a plurality of transmitting channels sharing a silicon-based CMOS broadband multifunctional up-conversion chip and a plurality of receiving channels sharing a silicon-based CMOS broadband multifunctional down-conversion chip; the silicon-based CMOS broadband multifunctional up-conversion chip comprises a plurality of up-conversion links; the silicon-based CMOS broadband multifunctional down-conversion chip comprises a plurality of down-conversion links; the transmitting channel comprises an up-conversion link, a first broadband reconfigurable filter chip, a broadband driving amplifier chip and a broadband power amplifier chip which are electrically connected in sequence; the receiving channel comprises a broadband low-noise amplifier chip, a broadband attenuator chip, a second broadband reconfigurable filter chip and a down-conversion link which are electrically connected in sequence; the integrated circuit has the characteristics of high integration, light weight and universality, and can meet the application requirements of various signal transceiving.

Description

Universal reconfigurable radio frequency receiving and transmitting microsystem
Technical Field
The present disclosure relates to the technical field of radio frequency microsystems, and in particular, to a universal reconfigurable radio frequency transceiver microsystem.
Background
The radio frequency system is used as the core of the electronic equipment, and the operating frequency band range of the radio frequency system covers hundreds or even thousands of octaves. In order to meet various communication transmission requirements, maintain reliable communication capability, further support future development of electronic equipment, the radio frequency micro system is developing towards supporting various waveform systems, having ultra-wide working frequency bands, being capable of agile reconstruction, high integration and light weight.
Currently, radio systems often take the form of independent separations. All the existing distributed radio frequency systems use a large amount of special radio frequency front ends and channel processing units, have independent components such as a case, a power supply and a processor, and are poor in commonality, nonuniform in specification and low in integration level, so that the weight, the size and the power consumption of the system are large. Meanwhile, in the existing distributed radio frequency system, electronic devices are usually more, radio frequency systems working at similar frequencies can interfere with each other, electromagnetic interference is generated, and the like, so that additional problems are brought to antenna arrangement, and the situations that one device cannot work normally, resources are preempted among different devices and the like possibly exist, so that the development of the multifunctional integrated equipment is restricted. In addition, in the existing radio frequency system, modules such as transceiving, amplifying, frequency conversion, filtering and the like need to be repeatedly researched and developed so as to adapt to and match different application scenes and equipment.
Disclosure of Invention
The present disclosure is directed to at least one of the problems in the prior art, and provides a universal reconfigurable radio frequency transceiver micro system.
In one aspect of the present disclosure, a universal reconfigurable radio frequency transceiver micro system is provided, the radio frequency transceiver micro system comprising a plurality of transmit channels and a plurality of receive channels; the silicon-based CMOS broadband multifunctional up-conversion chip comprises a plurality of up-conversion links, and each up-conversion link corresponds to each emission channel one by one; the silicon-based CMOS broadband multifunctional down-conversion chip comprises a plurality of down-conversion links, and each down-conversion link corresponds to each receiving channel one by one; wherein, the liquid crystal display device comprises a liquid crystal display device,
the transmitting channel comprises an up-conversion link, a first broadband reconfigurable filter chip, a broadband driving amplifier chip and a broadband power amplifier chip which are electrically connected in sequence, and is used for converting a first intermediate frequency signal into a first broadband radio frequency signal based on a first local oscillator signal, filtering and amplifying the first broadband radio frequency signal and outputting the processed first broadband radio frequency signal;
The receiving channel comprises a broadband low-noise amplifier chip, a broadband attenuator chip, a second broadband reconfigurable filter chip and the down-conversion link which are electrically connected in sequence, and the receiving channel is used for amplifying and filtering a second broadband radio frequency signal, converting the processed second broadband radio frequency signal into a second intermediate frequency signal based on a second local oscillator signal and outputting the second intermediate frequency signal.
Optionally, the silicon-based CMOS broadband multifunctional up-conversion chip and the silicon-based CMOS broadband multifunctional down-conversion chip each include a zero intermediate frequency conversion architecture.
Optionally, the up-conversion link comprises a plurality of up-conversion sub-links; wherein for each of said up-conversion links, the number of said up-conversion sub-links included therein is determined in accordance with the frequency band of said first wideband radio frequency signal output by that up-conversion link.
Optionally, the up-conversion sub-link includes a first reconfigurable baseband filter, a first baseband amplifier, a first quadrature mixer, and a drive amplifier electrically connected in sequence, and configured to convert the first intermediate frequency signal into the first wideband radio frequency signal based on the first local oscillator signal.
Optionally, the down-conversion link comprises a plurality of down-conversion sub-links; wherein, for each down-conversion link, the number of the down-conversion sub-links included is determined according to the frequency band of the second broadband radio frequency signal input by the down-conversion link.
Optionally, the down-conversion sub-link includes a gain adjustable amplifier, a second quadrature mixer, a second reconfigurable baseband filter, and a second baseband amplifier electrically connected in sequence, and configured to convert the processed second wideband radio frequency signal into the second intermediate frequency signal based on the second local oscillator signal.
Optionally, the radio frequency transceiver micro system further includes:
a silicon-based substrate provided with a plurality of first emission grooves and a plurality of first receiving grooves along a first surface in a thickness direction thereof; wherein each first transmitting groove is used for accommodating the broadband driving amplifier chip and the broadband power amplifier chip in each transmitting channel, and each first receiving groove is used for accommodating the broadband low noise amplifier chip and the broadband attenuator chip in each receiving channel;
a TSV interposer covering the first surface of the silicon-based substrate, and provided with a plurality of second emission grooves and a plurality of second receiving grooves toward a surface of the silicon-based substrate; wherein each second transmitting groove corresponds to each first transmitting groove, and each second receiving groove corresponds to each first receiving groove; the TSV adapter plate is further provided with a plurality of TSV through holes;
A silicon cap covering the surface of the TSV adapter plate facing away from the silicon substrate, wherein a third transmitting groove and a third receiving groove are formed in the surface of the silicon cap facing towards the TSV adapter plate; the third transmitting groove is used for accommodating the silicon-based CMOS broadband multifunctional up-conversion chip and the first broadband reconfigurable filter chip in each transmitting channel; for each emission channel, the first wideband reconfigurable filter chip is electrically connected with one of the up-conversion links in the silicon-based CMOS wideband multifunctional up-conversion chip, and is electrically connected with the wideband driver amplifier chip through the TSV via; the third receiving groove is used for accommodating the silicon-based CMOS broadband multifunctional down-conversion chip and the second broadband reconfigurable filter chip in each receiving channel; for each receiving channel, the second wideband reconfigurable filter chip is electrically connected with one of the down-conversion links of the silicon-based CMOS wideband multifunctional down-conversion chip, and is electrically connected with the wideband attenuator chip through the TSV via.
Optionally, the plurality of first emission grooves are sequentially arranged along the first direction of the silicon-based substrate;
The plurality of first receiving grooves and the plurality of first emitting grooves are arranged in a one-to-one correspondence along the second direction of the silicon-based substrate;
the third transmitting grooves and the plurality of first receiving grooves are correspondingly arranged in the vertical direction;
the third receiving grooves and the plurality of first emitting grooves are correspondingly arranged in the vertical direction.
Optionally, the radio frequency transceiver micro system further comprises a cooling layer, and the cooling layer is arranged on the second surface of the silicon-based substrate along the thickness direction of the silicon-based substrate.
Optionally, the radio frequency transceiver micro system further includes an intermediate frequency port, a local oscillator port, a power port, a control port, a plurality of transmitting ports and a plurality of receiving ports; wherein, the liquid crystal display device comprises a liquid crystal display device,
the intermediate frequency port is electrically connected with the silicon-based CMOS broadband multifunctional up-conversion chip and is used for receiving the first intermediate frequency signal and transmitting the first intermediate frequency signal to the silicon-based CMOS broadband multifunctional up-conversion chip; the intermediate frequency port is also electrically connected with the silicon-based CMOS broadband multifunctional down-conversion chip and is used for outputting the second intermediate frequency signal;
the local oscillator port is electrically connected with the silicon-based CMOS broadband multifunctional up-conversion chip and is used for receiving the first local oscillator signal and transmitting the first local oscillator signal to the silicon-based CMOS broadband multifunctional up-conversion chip; the local oscillator port is also electrically connected with the silicon-based CMOS broadband multifunctional down-conversion chip and is used for receiving the second local oscillator signal and transmitting the second local oscillator signal to the silicon-based CMOS broadband multifunctional down-conversion chip;
The power port is respectively and electrically connected with each transmitting channel and each receiving channel and is used for supplying power to the transmitting channels and the receiving channels;
the control port is respectively and electrically connected with each transmitting channel and each receiving channel and is used for providing control signals for the transmitting channels and the receiving channels;
each emission port is respectively and electrically connected with the broadband power amplifier chip in each emission channel in a one-to-one correspondence manner and is used for outputting the processed first broadband radio frequency signals;
each receiving port is electrically connected with the broadband low noise amplifier chip in each receiving channel in a one-to-one correspondence manner, and is used for receiving the second broadband radio frequency signal and transmitting the second broadband radio frequency signal to the broadband low noise amplifier chip.
Compared with the prior art, the universal reconfigurable radio frequency receiving and transmitting microsystem has the advantages that a plurality of independent transmitting channels and receiving channels are arranged, the plurality of transmitting channels are arranged to share one silicon-based CMOS broadband multifunctional up-conversion chip, the plurality of receiving channels are arranged to share one silicon-based CMOS broadband multifunctional down-conversion chip, the integration of functions such as receiving and transmitting, frequency conversion and the like of radio frequency signals is effectively achieved, multiple waveform systems can be supported, the characteristics of ultra-wide working frequency band, reconfigurability, high integration and the like are achieved, the universal reconfigurable radio frequency receiving and transmitting microsystem is applicable to various task scenes such as detection, communication and the like of radio frequency signals, and mutual interference among radio frequency microsystems with different functions is effectively avoided. Meanwhile, the universal reconfigurable radio frequency receiving and transmitting micro system related to the embodiment of the disclosure has the characteristic of light weight, and can integrate all the transmitting channels and the receiving channels together through an integrated integration technology to form a novel miniaturized integrated radio frequency function terminal, so that the overall volume and weight of the radio frequency receiving and transmitting micro system are greatly reduced, the universal reconfigurable radio frequency receiving and transmitting micro system is more suitable for micro platforms such as small unmanned aerial vehicles, and further development of electronic equipment can be effectively supported.
Drawings
One or more embodiments are illustrated by way of example and not limitation in the figures of the accompanying drawings, in which like references indicate similar elements, and in which the figures do not depict a proportional limitation unless expressly stated otherwise.
Fig. 1 is a schematic circuit connection diagram of a universal reconfigurable radio frequency transceiver micro system according to an embodiment of the present disclosure;
fig. 2 is a schematic structural diagram of a universal reconfigurable radio frequency transceiver micro system according to another embodiment of the present disclosure;
fig. 3 is a schematic architecture diagram of a silicon-based CMOS wideband multifunctional up-conversion chip and a silicon-based CMOS wideband multifunctional down-conversion chip according to another embodiment of the present disclosure;
fig. 4 is a schematic three-dimensional structure of a universal reconfigurable radio frequency transceiver micro system according to another embodiment of the present disclosure.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present disclosure more apparent, the embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings. However, those of ordinary skill in the art will understand that in various embodiments of the present disclosure, numerous technical details have been set forth in order to provide a better understanding of the present disclosure. However, the technical solutions claimed in the present disclosure can be implemented without these technical details and with various changes and modifications based on the following embodiments. The following divisions of the various embodiments are for convenience of description, and should not be construed as limiting the specific implementations of the disclosure, and the various embodiments may be mutually combined and referred to without contradiction.
One embodiment of the present disclosure relates to a universal reconfigurable radio frequency transceiver micro system that includes a plurality of transmit channels and a plurality of receive channels. The transmitting channel is used for converting the intermediate frequency signal into a broadband radio frequency signal based on the local oscillation signal. The receiving channel is used for converting the broadband radio frequency signal into an intermediate frequency signal based on the local oscillation signal. For example, as shown in fig. 1, the universal reconfigurable rf transceiver micro-system according to the present embodiment may have 2 transmitting channels and 2 receiving channels, so as to form a universal reconfigurable rf transceiver micro-system having 2 transmitting and 2 receiving signal transmission channels. Of course, the specific number of the transmitting channels and the receiving channels is not limited in this embodiment, for example, the transmitting channels and the receiving channels may be provided with 3, 4, 5, etc. channels, and those skilled in the art may set the transmitting channels and the receiving channels according to actual needs.
It should be noted that, the multiple transmitting channels share a silicon-based complementary metal oxide semiconductor (Complementary Metal Oxide Semiconductor, CMOS) wideband multifunctional up-conversion chip, so as to integrate the multiple transmitting channels, reduce the number of chips, and further reduce the volume and weight of the radio frequency transceiver micro system. The silicon-based CMOS broadband multifunctional up-conversion chip comprises a plurality of up-conversion links, and each up-conversion link corresponds to each emission channel one by one. For example, as shown in fig. 1, when the universal reconfigurable radio frequency transceiver micro system includes 2 transmit channels, the 2 transmit channels share one silicon-based CMOS wideband multi-functional up-conversion chip 110, and at this time, the silicon-based CMOS wideband multi-functional up-conversion chip 110 may be provided with 2 up-conversion links (not shown in the drawing), so that each up-conversion link corresponds to one transmit channel respectively. The silicon-based CMOS broadband multifunctional down-conversion chip is shared by the plurality of receiving channels, so that the integration of the plurality of receiving channels is realized, the number of chips is reduced, and the volume and the weight of the radio frequency receiving and transmitting micro system are further reduced. The silicon-based CMOS broadband multifunctional down-conversion chip comprises a plurality of down-conversion links, and each down-conversion link corresponds to each receiving channel one by one. For example, as shown in fig. 1, when the universal reconfigurable radio frequency transceiver micro system includes 2 receiving channels, the 2 receiving channels share one silicon-based CMOS wideband multi-functional down-conversion chip 180, where the silicon-based CMOS wideband multi-functional down-conversion chip 180 may be provided with 2 down-conversion links (not shown in the figure), so that each down-conversion link corresponds to one receiving channel respectively.
The silicon-based CMOS broadband multifunctional up/down conversion chip can effectively widen the channel number and the band coverage of the radio frequency receiving and transmitting micro system through the integrated arrangement of a plurality of up/down conversion links, realize configurable functions such as amplification, filtering, frequency conversion and the like, realize reconfigurable link gain and bandwidth, improve the signal receiving and transmitting dynamic range of the radio frequency receiving and transmitting micro system, and meet the application requirements of signal receiving and transmitting of ultra-wideband various communication systems.
Fig. 2 shows only one transmit channel and one receive channel in a generic reconfigurable radio frequency transceiver micro-system, and is described in detail below in connection with fig. 1 and 2.
As shown in fig. 1 and 2, the transmitting channel includes an up-conversion link (not shown in the drawing), a first wideband reconfigurable filter chip 120, a wideband driving amplifier chip 130, and a wideband power amplifier chip 140 in the silicon-based CMOS wideband multifunctional up-conversion chip 110 electrically connected in sequence, and is configured to convert the first intermediate frequency signal into a first wideband radio frequency signal based on the first local oscillator signal, perform filtering and amplifying processing on the first wideband radio frequency signal, and output the processed first wideband radio frequency signal.
Specifically, the up-conversion link in the silicon-based CMOS wideband multi-functional up-conversion chip 110 may convert the input first intermediate frequency signal into the first wideband radio frequency signal in combination with the input first local oscillation signal, and output the first wideband radio frequency signal to the first wideband reconfigurable filter chip 120. The first wideband reconfigurable filter chip 120 performs a filtering process on the inputted first wideband radio frequency signal, and outputs the filtered first wideband radio frequency signal to the wideband driver amplifier chip 130. The broadband driving amplifier chip 130 performs signal amplification processing on the inputted filtered first broadband radio frequency signal, and outputs the amplified first broadband radio frequency signal to the broadband power amplifier chip 140. The broadband power amplifier chip 140 performs power amplification processing on the inputted first broadband radio frequency signal after driving amplification, and outputs the first broadband radio frequency signal after power amplification processing.
As shown in fig. 1 and 2, the receiving channel includes a wideband low noise amplifier chip 150, a wideband attenuator chip 160, a second wideband reconfigurable filter chip 170, and a down-conversion link (not shown) in a silicon-based CMOS wideband multi-functional down-conversion chip 180, which are electrically connected in this order, for amplifying and filtering the second wideband radio frequency signal, converting the processed second wideband radio frequency signal into a second intermediate frequency signal based on the second local oscillation signal, and outputting the second intermediate frequency signal.
Specifically, the broadband low noise amplifier chip 150 may amplify the input second broadband radio frequency signal and output the amplified second broadband radio frequency signal to the broadband attenuator chip 160. The broadband attenuator chip 160 attenuates the inputted amplified second broadband radio frequency signal and outputs the attenuated second broadband radio frequency signal to the second broadband reconfigurable filter chip 170. The second wideband reconfigurable filter chip 170 performs filtering processing on the inputted attenuated second wideband radio frequency signal, and outputs the filtered second wideband radio frequency signal to the down-conversion link in the silicon-based CMOS wideband multifunctional down-conversion chip 180. The down-conversion link in the silicon-based CMOS wideband multi-functional down-conversion chip 180 combines the input second local oscillation signal, converts the filtered second wideband radio frequency signal into a second intermediate frequency signal, and outputs the second intermediate frequency signal.
For example, the frequency bands of the first wideband radio frequency signal and the second wideband radio frequency signal may be 2GHz-18GHz, 2GHz-40GHz, 0.1GHz-40GHz, etc., which are not limited in this embodiment, and may be set by those skilled in the art according to actual needs.
It should be noted that the first intermediate frequency signal and the second intermediate frequency signal may be analog signals. The silicon-based CMOS wideband multi-functional up-conversion chip 110 may be electrically connected to a digital-to-analog converter (Digital to Analog Converter, DAC) to receive the first intermediate frequency signal in analog form of the DAC output via each up-conversion link. The silicon-based CMOS broadband multifunctional down-conversion chip 180 may also be electrically connected to an Analog-to-digital converter (Analog toDigitalConverter, ADC) to output the second intermediate frequency signal in Analog form to the ADC through each down-conversion link, thereby completing Analog-to-digital conversion of the second intermediate frequency signal through the ADC.
It should be further noted that, the wideband power amplifier chip 140 and the wideband low noise amplifier chip 150 may also be electrically connected to an antenna, respectively, so that the antenna is used to radiate and output the first wideband radio frequency signal output by the wideband power amplifier chip 140, and the antenna is used to receive the second wideband radio frequency signal and input the received second wideband radio frequency signal to the wideband low noise amplifier chip 150.
In this embodiment, the versatility of the rf transceiver subsystem can be realized by the silicon-based CMOS wideband multi-functional up-conversion chip 110, the first wideband reconfigurable filter chip 120, the second wideband reconfigurable filter chip 170, and the silicon-based CMOS wideband multi-functional down-conversion chip 180. The silicon-based CMOS wideband multifunctional up-conversion chip 110 and the silicon-based CMOS wideband multifunctional down-conversion chip 180 are used as core units, ultra-wideband coverage, flexible performance configuration and reconfigurable functions can be realized through the digital control capability of the silicon-based CMOS process, the generalization of the core radio frequency unit is realized to a greater extent, and the performance requirements of the radio frequency transceiver micro-system in various application scenarios are met. The first wideband reconfigurable filter chip 120 and the second wideband reconfigurable filter chip 170 may be cascaded with the tunable filter through a radio frequency switch in the chip, thereby implementing a reconfigurable filtering process for wideband radio frequency signals.
Compared with the prior art, the universal reconfigurable radio frequency receiving and transmitting microsystem has the advantages that a plurality of independent transmitting channels and receiving channels are arranged, the plurality of transmitting channels are arranged to share one silicon-based CMOS broadband multifunctional up-conversion chip, the plurality of receiving channels are arranged to share one silicon-based CMOS broadband multifunctional down-conversion chip, the integration of functions such as receiving and transmitting, frequency conversion and the like of radio frequency signals is effectively achieved, multiple waveform systems can be supported, the characteristics of ultra-wide working frequency band, reconfigurability, high integration and the like are achieved, the universal reconfigurable radio frequency receiving and transmitting microsystem is applicable to various task scenes such as detection, communication and the like of radio frequency signals, and mutual interference among radio frequency microsystems with different functions is effectively avoided. Meanwhile, the universal reconfigurable radio frequency receiving and transmitting micro system related to the embodiment of the disclosure has the characteristic of light weight, and can integrate all the transmitting channels and the receiving channels together through an integrated integration technology to form a novel miniaturized integrated radio frequency function terminal, so that the overall volume and weight of the radio frequency receiving and transmitting micro system are greatly reduced, the universal reconfigurable radio frequency receiving and transmitting micro system is more suitable for micro platforms such as a small unmanned aerial vehicle and the like, and further development of electronic equipment can be effectively supported.
Illustratively, the silicon-based CMOS wideband multifunctional up-conversion chip 110 and the silicon-based CMOS wideband multifunctional down-conversion chip 180 each include a zero intermediate frequency conversion architecture. By adopting the zero intermediate frequency conversion architecture, the whole volume and weight of the radio frequency receiving and transmitting micro system can be further reduced, and the power consumption is reduced.
Illustratively, each up-conversion link in the silicon-based CMOS broadband multifunctional up-conversion chip 110 may include a plurality of up-conversion sub-links. Wherein for each up-conversion link, the number of up-conversion sub-links included in the up-conversion link can be determined according to the frequency band of the first wideband radio frequency signal output by the up-conversion link.
For example, for a certain up-conversion link, when the frequency band of the first wideband radio frequency signal output by the up-conversion link is 2GHz-18GHz, the up-conversion link may include 2 up-conversion sub-links; when the frequency band of the first broadband radio frequency signal output by the device is 2GHz-40GHz, the device can comprise 3 up-conversion sub-links; the first wideband radio frequency signal output by it may include 4 up-conversion sub-links when its frequency band is 0.1GHz-40 GHz. Of course, the specific number of up-conversion sub-links included in each up-conversion link is not limited in this embodiment, and those skilled in the art may determine the frequency band of the first wideband radio frequency signal output by the up-conversion link based on actual needs.
In each up-conversion link, the radio frequency signal bands corresponding to the up-conversion sub-links may be the same or different, which is not limited in this embodiment.
Illustratively, in combination with fig. 3, in the silicon-based CMOS wideband multi-functional up-conversion chip 110, each up-conversion sub-link includes a first reconfigurable baseband filter 111, a first baseband amplifier 112, a first quadrature mixer 113, and a driver amplifier 114 electrically connected in sequence for converting the first intermediate frequency signal into a first wideband radio frequency signal based on the first local oscillator signal.
Specifically, in conjunction with fig. 1 to 3, when the up-conversion link in the silicon-based CMOS wideband multi-functional up-conversion chip 110 includes 2 up-conversion sub-links, which are up-conversion sub-link 1 and up-conversion sub-link 2, respectively, the up-conversion sub-link 1 and the up-conversion sub-link 2 each include a first reconfigurable baseband filter 111, a first baseband amplifier 112, a first quadrature mixer 113, and a driving amplifier 114, which are electrically connected in sequence. The first reconfigurable baseband filter 111 performs filtering processing on the input first intermediate frequency signal to ensure that the filtered first intermediate frequency signal has a higher clutter suppression degree, and outputs the filtered first intermediate frequency signal to the first baseband amplifier 112. The first baseband amplifier 112 amplifies the filtered first intermediate frequency signal and outputs the amplified first intermediate frequency signal to the first quadrature mixer 113. The first quadrature mixer 113 combines the amplified first intermediate frequency signal with the input first local oscillator signal to generate a quadrature signal, thereby converting the amplified first intermediate frequency signal into a first wideband radio frequency signal based on the first local oscillator signal. The driving amplifier 114 amplifies the first wideband rf signal output from the first quadrature mixer 113 to ensure that the first wideband rf signal has a larger transmit power, and outputs the amplified first wideband rf signal to the first wideband reconfigurable filter chip 120 for further processing.
The up-conversion sub-link in the embodiment can realize functions of orthogonal signal generation, orthogonal up-conversion, intermediate frequency filtering, power supply modulation, serial-parallel conversion, radio frequency switching, primary amplification and the like, ultra-wideband coverage of up-conversion is realized through a channelized design, image signal suppression is realized through an orthogonal frequency conversion architecture, and the requirement on a radio frequency filter is reduced.
Illustratively, each of the down-conversion links in the silicon-based CMOS broadband multifunctional down-conversion chip 180 may include a plurality of down-conversion sub-links. Wherein for each down-conversion link, the number of down-conversion sub-links included therein may be determined according to the frequency band of the second wideband radio frequency signal input by the down-conversion link.
For example, for a certain down-conversion link, when the frequency band of the second wideband radio frequency signal input by the down-conversion link is 2GHz-18GHz, the down-conversion link may comprise 2 down-conversion sub-links; when the frequency band of the second broadband radio frequency signal input by the second radio frequency signal is 2GHz-40GHz, the second radio frequency signal can comprise 3 down-conversion sub-links; the second wideband radio frequency signal may include 4 down-converted word links when it is input in a frequency band of 0.1GHz-40 GHz. Of course, the specific number of down-conversion sub-links included in each down-conversion link is not limited in this embodiment, and those skilled in the art may determine the frequency band of the second wideband radio frequency signal input by the down-conversion link based on actual needs.
In each down-conversion link, the radio frequency signal bands corresponding to the down-conversion sub-links may be the same or different, which is not limited in this embodiment.
Illustratively, in combination with fig. 3, each of the down-conversion sub-links in the silicon-based CMOS wideband multi-functional down-conversion chip 180 includes a gain-adjustable amplifier 181, a second quadrature mixer 182, a second reconfigurable baseband filter 183, and a second baseband amplifier 184 electrically connected in sequence for converting the processed second wideband radio frequency signal into a second intermediate frequency signal based on a second local oscillator signal. The gain adjustable amplifier 181 may be matched with an attenuator to complete gain adjustment of a receiving channel, the second quadrature mixer 182 may be combined with an input second local oscillation signal to implement adjustment of a working frequency, and the second reconfigurable baseband filter 183 may implement adjustment of a baseband bandwidth of the receiving channel.
Specifically, in conjunction with fig. 1 to 3, when the down-conversion link in the silicon-based CMOS wideband multi-functional down-conversion chip 180 includes 2 down-conversion sub-links, which are down-conversion sub-link 1 and down-conversion sub-link 2, respectively, the down-conversion sub-link 1 and the down-conversion sub-link 2 each include a gain adjustable amplifier 181, a second quadrature mixer 182, a second reconfigurable baseband filter 183, and a second baseband amplifier 184 that are electrically connected in sequence. The gain-adjustable amplifier 181 performs gain control, amplification, and other processing on the filtered second wideband radio frequency signal output by the second wideband reconfigurable filter chip 170, and outputs the processed second wideband radio frequency signal to the second quadrature mixer 182. The second quadrature mixer 182 converts the processed second wideband radio frequency signal to a second intermediate frequency signal based on a second local oscillator signal, generating a quadrature signal. The second reconfigurable baseband filter 183 performs filtering processing on the second intermediate frequency signal output by the second quadrature mixer 182 to ensure that the filtered second intermediate frequency signal has a higher clutter suppression level, and outputs the filtered second intermediate frequency signal to the second baseband amplifier 184. The second baseband amplifier 184 amplifies the filtered second intermediate frequency signal to ensure that the amplified second intermediate frequency signal has a stable power level, and outputs the amplified second intermediate frequency signal.
The down-conversion sub-link in the embodiment can realize the functions of gain control, quadrature signal generation, quadrature down-conversion, intermediate frequency filtering, power supply modulation, serial-parallel conversion, radio frequency switching and the like, ultra-wideband coverage of down-conversion is realized through a channelized design, image signal suppression is realized through a quadrature frequency conversion architecture, and the requirement on a radio frequency filter is further reduced.
The wideband reconfigurable filter chip in this embodiment includes the first reconfigurable baseband filter 111 and the second reconfigurable baseband filter 183 each including two levels of reconfigurable capability: firstly, realizing the frequency division and frequency division channelized design in the bandwidth range of a corresponding broadband radio frequency signal through a single-pole multi-throw switch; secondly, the center frequency and the cut-off frequency of the filter are controlled through a tunable device in each frequency band, and finally the frequency and the bandwidth of the filter in the ultra-wideband range can be reconstructed.
Illustratively, as shown in fig. 4, the universal reconfigurable radio frequency transceiver micro system further includes a silicon-based substrate 191, a TSV interposer 192, and a silicon cap 193.
The first surface 191a of the silicon-based substrate 191 in the thickness direction thereof is provided with a plurality of first emitting grooves 194 and a plurality of first receiving grooves 195 (only one first emitting groove 194 and one first receiving groove 195 are shown in fig. 4). Wherein each first transmitting groove 194 is used for accommodating the wideband driving amplifier chip 130 and the wideband power amplifier chip 140 in each transmitting channel, and each first receiving groove 195 is used for accommodating the wideband low noise amplifier chip 150 and the wideband attenuator chip 160 in each receiving channel.
Specifically, each first transmitting groove 194 corresponds to each transmitting channel one by one, so as to accommodate the broadband driving amplifier chip 130 and the broadband power amplifier chip 140 in the corresponding transmitting channels. Each first receiving groove 195 corresponds to each receiving channel one by one to accommodate the wideband low noise amplifier chip 150 and the wideband attenuator chip 160 in its corresponding receiving channel.
The silicon substrate 191 may be a silicon substrate, and the plurality of first emitting grooves 194 and the plurality of first receiving grooves 195 may be formed by etching a first surface of the silicon substrate along a thickness thereof.
The first transmitting grooves are used for accommodating the broadband driving amplifier chip and the broadband power amplifier chip in the transmitting channel, and the first receiving grooves are used for accommodating the broadband low-noise amplifier chip and the broadband attenuator chip in the receiving channel, so that the packaging thickness of the radio frequency receiving and transmitting micro system can be further reduced, and the signal transmission efficiency is improved.
The TSV adapter plate 192 covers the first surface 191a of the silicon substrate 191, and the surface of the TSV adapter plate 192 facing the silicon substrate 191 is provided with a plurality of second emission grooves 196 and a plurality of second receiving grooves 197 (only one first emission groove 196 and one second receiving groove 197 are shown in fig. 4). Wherein each second transmitting groove 196 corresponds to each first transmitting groove 194, and each second receiving groove 197 corresponds to each first receiving groove 195. The TSV adapter plate 192 is also provided with a plurality of TSV through holes (not labeled in the figure).
Specifically, each second transmitting groove 196 corresponds to each first transmitting groove 194 one by one to form a closed cavity, each second receiving groove 197 corresponds to each first receiving groove 195 one by one to form a closed cavity, so that the air tightness of the radio frequency receiving and transmitting micro system can be effectively improved, mutual interference between each chip in the silicon-based substrate 191 and an upper chip is further prevented, and signal transmission loss is reduced.
The silicon cap 193 serves as an airtight layer covering the surface of the TSV adapter plate 192 facing away from the silicon substrate 191, and the surface of the silicon cap 193 facing the TSV adapter plate 192 is provided with a third emission recess 198 and a third receiving recess 199. The third transmitting groove 198 is used for accommodating the silicon-based CMOS wideband multi-functional up-conversion chip 110 and the first wideband reconfigurable filter chip 120 in each transmitting channel, and the third receiving groove 199 is used for accommodating the silicon-based CMOS wideband multi-functional down-conversion chip 180 and the second wideband reconfigurable filter chip 170 in each receiving channel, so as to further reduce the packaging thickness of the radio frequency transceiver micro-system.
For each transmit channel, the first wideband reconfigurable filter chip 120 is electrically connected to one of the up-conversion links in the silicon-based CMOS wideband multi-functional up-conversion chip 110 and to the wideband driver amplifier chip 130 through TSV vias. For each receive channel, the second wideband reconfigurable filter chip 170 is electrically connected to one of the down-conversion links in the silicon-based CMOS wideband multi-functional down-conversion chip 180 and to the wideband attenuator chip 160 through TSV vias.
Specifically, as shown in fig. 4, the silicon-based CMOS wideband multi-functional up-conversion chip 110, the first wideband reconfigurable filter chip 120 in the transmitting channel, the second wideband reconfigurable filter chip 170 in the receiving channel, and the silicon-based CMOS wideband multi-functional down-conversion chip 180 are all disposed on the upper layer of the TSV interposer 192.
For example, the silicon-based CMOS wideband multifunctional up-conversion chip 110 and the silicon-based CMOS wideband multifunctional down-conversion chip 180 are used as core units, and can be three-dimensionally integrated with the first wideband reconfigurable filter chip 120, the second wideband reconfigurable filter chip 170, and the wideband driving amplifier chip 130, the wideband power amplifier chip 140, the wideband low noise amplifier chip 150, and the wideband attenuator chip 160 of the III-V compound material through a standardized silicon-based microsystem integration packaging process, thereby forming a highly integrated, lightweight, and generalized radio frequency transceiver microsystem. In other words, referring to fig. 1 and fig. 4 together, the general reconfigurable rf transceiver micro-system may adopt a three-dimensional stacked integration mode, and in the integrated architecture, the general reconfigurable rf transceiver micro-system is divided into an upper layer layout and a lower layer layout: the upper layer is a signal frequency conversion processing functional area formed by a silicon-based CMOS broadband multifunctional up-conversion chip 110, a silicon-based CMOS broadband multifunctional down-conversion chip 180, a first broadband reconfigurable filter chip 120 in each transmitting channel and a second broadband reconfigurable filter chip 170 in each receiving channel, and is used for realizing the frequency conversion processing function of radio frequency signals; the lower layer is a signal receiving and transmitting front end functional area formed by the broadband driving amplifier chip 130 and the broadband power amplifier chip 140 in each transmitting channel and the broadband low noise amplifier chip 150 and the broadband attenuator chip 160 in each receiving channel, and is used for realizing the receiving and transmitting functions of radio frequency signals, thereby realizing the dislocation distribution of the receiving and transmitting functions of the radio frequency signals and the frequency conversion processing function. Considering the minimum loss signal introduction of the receiving end, the minimum loss signal extraction of the transmitting end and the efficient heat dissipation of the power amplifier, the embodiment lays out a signal receiving and transmitting front end functional area comprising a receiving front end and a transmitting front end on the lower layer of the universal reconfigurable radio frequency receiving and transmitting micro system, thereby improving the heat dissipation efficiency. The silicon-based CMOS wideband multifunctional up-conversion chip 110 and the silicon-based CMOS wideband multifunctional down-conversion chip 180 have low power consumption, and are suitable for up-and-down interconnection, and the radio frequency signals, the intermediate frequency signals and the power control signals can be interconnected with the corresponding chips at the lower layer through the TSV through holes.
It should be further noted that, the pins of the universal reconfigurable rf transceiver micro-system may adopt a microstrip line parallel output mode, so as to further reduce the volume and weight of the rf transceiver micro-system and improve the applicable bandwidth.
By way of example, and with reference to fig. 1 and 4, the plurality of first transmitting grooves 194 are sequentially arranged along the first direction of the silicon substrate 191, the plurality of first receiving grooves 195 and the plurality of first transmitting grooves 194 are arranged in one-to-one correspondence along the second direction of the silicon substrate 191, the third transmitting grooves 198 and the plurality of first receiving grooves 195 are correspondingly arranged in the vertical direction, and the third receiving grooves 199 and the plurality of first transmitting grooves 194 are correspondingly arranged in the vertical direction, so that a broadband electromagnetic compatibility design is realized through a space isolation layout, and radio frequency signals, local oscillation signals and baseband signals are separated to different dimensions, so that mutual interference among different signals can be further effectively reduced, and application requirements of receiving and transmitting signals of a plurality of ultra-wideband communication systems are met.
Specifically, in conjunction with fig. 1, the first direction may refer to the width direction of the silicon-based substrate 191, i.e., the up-down direction in fig. 1, and the second direction may refer to the length direction of the silicon-based substrate 191, i.e., the left-right direction in fig. 1. Taking the general reconfigurable rf transceiver micro system as an example, as shown in fig. 1, the 2 first transmitting grooves 194 and 2 first receiving grooves 195 include 2 first transmitting grooves 194 and 2 first receiving grooves 195, the 2 first transmitting grooves 194 are sequentially arranged along a width direction of the silicon substrate 191, that is, an up-down direction in fig. 1, the 2 first receiving grooves 195 and the 2 first transmitting grooves 194 are arranged in a one-to-one correspondence along a length direction of the silicon substrate 191, that is, a left-right direction in fig. 1, that is, 2 columns of grooves are arranged along the length direction of the silicon substrate 191, that is, a left-right direction in fig. 1, one column of grooves is a plurality of first transmitting grooves 194 sequentially arranged along the width direction of the silicon substrate 191, that is, an up-down direction in fig. 1, one column of grooves is a plurality of first receiving grooves 195 sequentially arranged along the width direction of the silicon substrate 191, that is, an up-down direction in fig. 1, and each first transmitting groove 194 is respectively arranged in a one-to-one correspondence along the length direction of the silicon substrate 191, that is, a left-right direction in fig. 1, with each first receiving groove 195.
The vertical direction here refers to the thickness direction of the silicon-based substrate 191. As shown in fig. 4, the third transmitting groove 198 is arranged to correspond to the first receiving groove 195 in the vertical direction, and the third receiving groove 199 is arranged to correspond to the first transmitting groove 194 in the vertical direction.
The universal reconfigurable radio frequency transceiver micro system further comprises a cooling layer, wherein the cooling layer is arranged on the second surface of the silicon-based substrate along the thickness direction of the silicon-based substrate. Specifically, with reference to fig. 4, a cooling layer (not shown) may be disposed on the second surface 191b of the silicon substrate 191 along the thickness direction thereof, that is, the bottom layer of the silicon substrate 191, so as to further improve the heat dissipation efficiency of the rf transceiver micro-system.
Exemplary, and with reference to fig. 1, the universal reconfigurable radio frequency transceiver subsystem further includes an intermediate frequency port, a local oscillator port, a power port, a control port, a plurality of transmit ports, and a plurality of receive ports.
The intermediate frequency port is electrically connected to the silicon-based CMOS wideband multi-functional up-conversion chip 110, and is configured to receive the first intermediate frequency signal and transmit the first intermediate frequency signal to the silicon-based CMOS wideband multi-functional up-conversion chip 110. For example, the intermediate frequency ports may be electrically connected to respective up-conversion links in the silicon-based CMOS broadband multifunctional up-conversion chip 110 via inputs. The intermediate frequency port is also electrically connected to the silicon-based CMOS broadband multifunctional down-conversion chip 180 for outputting a second intermediate frequency signal. For example, the intermediate frequency ports may be electrically connected through the output terminals to respective down-conversion links in the silicon-based CMOS broadband multifunctional down-conversion chip 180.
The local oscillator port is electrically connected to the silicon-based CMOS wideband multi-functional up-conversion chip 110, and is configured to receive the first local oscillator signal and transmit the first local oscillator signal to the silicon-based CMOS wideband multi-functional up-conversion chip 110. The local oscillator port is further electrically connected to the silicon-based CMOS wideband multi-functional downconverter chip 180, and is configured to receive the second local oscillator signal and transmit the second local oscillator signal to the silicon-based CMOS wideband multi-functional downconverter chip 180.
The power port is electrically connected with each transmitting channel and each receiving channel respectively and is used for supplying power to the transmitting channels and the receiving channels. The control ports are respectively and electrically connected with the transmitting channels and the receiving channels and are used for providing control signals for the transmitting channels and the receiving channels.
Specifically, the power port and the control port may be electrically connected to each device in each channel through TSV vias or electrical connection lines in the silicon substrate 191, respectively, which is not limited in this embodiment, as long as the power port and the control port can be electrically connected to each transmitting channel and each receiving channel, respectively. The power port can be electrically connected with a power supply outside the radio frequency receiving and transmitting micro-system to supply power to the radio frequency receiving and transmitting micro-system through the external power supply. The control port can be electrically connected with control equipment outside the radio frequency receiving and transmitting micro system so as to control the functions realized by the radio frequency receiving and transmitting micro system through the external control equipment.
Each transmitting port is electrically connected with the broadband power amplifier chip 140 in each transmitting channel in a one-to-one correspondence manner, and is used for outputting the processed first broadband radio frequency signal. Each receiving port is electrically connected to the wideband low noise amplifier chip 150 in each receiving channel in a one-to-one correspondence manner, and is configured to receive the second wideband radio frequency signal and transmit the second wideband radio frequency signal to the wideband low noise amplifier chip 150.
For example, as shown in fig. 1, when the number of the transmission channels and the number of the reception channels are 2, the wideband power amplifier chips 140 in each transmission channel may be electrically connected to the transmission ports 1 and 2 in a one-to-one correspondence, and the wideband low noise amplifier chips 150 in each reception channel may be electrically connected to the reception ports 1 and 2 in a one-to-one correspondence.
By electrically connecting each transmitting port with the broadband power amplifier chip in each transmitting channel in a one-to-one correspondence manner and connecting each receiving port with the broadband low noise amplifier chip in each receiving channel in a one-to-one correspondence manner, each transmitting channel and each receiving channel can be made into independent channels, so that the mutual influence between different channels is avoided.
It will be understood by those of ordinary skill in the art that the foregoing embodiments are specific embodiments for carrying out the present disclosure, and that various changes in form and details may be made therein without departing from the spirit and scope of the present disclosure.

Claims (10)

1. The universal reconfigurable radio frequency transceiver micro system is characterized by comprising a plurality of transmitting channels and a plurality of receiving channels; the silicon-based CMOS broadband multifunctional up-conversion chip comprises a plurality of up-conversion links, and each up-conversion link corresponds to each emission channel one by one; the silicon-based CMOS broadband multifunctional down-conversion chip comprises a plurality of down-conversion links, and each down-conversion link corresponds to each receiving channel one by one; wherein, the liquid crystal display device comprises a liquid crystal display device,
the transmitting channel comprises an up-conversion link, a first broadband reconfigurable filter chip, a broadband driving amplifier chip and a broadband power amplifier chip which are electrically connected in sequence, and is used for converting a first intermediate frequency signal into a first broadband radio frequency signal based on a first local oscillator signal, filtering and amplifying the first broadband radio frequency signal and outputting the processed first broadband radio frequency signal;
The receiving channel comprises a broadband low-noise amplifier chip, a broadband attenuator chip, a second broadband reconfigurable filter chip and the down-conversion link which are electrically connected in sequence, and the receiving channel is used for amplifying and filtering a second broadband radio frequency signal, converting the processed second broadband radio frequency signal into a second intermediate frequency signal based on a second local oscillator signal and outputting the second intermediate frequency signal.
2. The radio frequency transceiver microsystem of claim 1, wherein the silicon-based CMOS wideband multifunctional up-conversion chip and the silicon-based CMOS wideband multifunctional down-conversion chip each comprise a zero intermediate frequency conversion architecture.
3. The radio frequency transceiver micro-system of claim 2, wherein the up-conversion link comprises a plurality of up-conversion sub-links; wherein for each of said up-conversion links, the number of said up-conversion sub-links included therein is determined in accordance with the frequency band of said first wideband radio frequency signal output by that up-conversion link.
4. The radio frequency transceiver subsystem of claim 3, wherein the up-conversion sub-link comprises a first reconfigurable baseband filter, a first baseband amplifier, a first quadrature mixer, a driver amplifier, electrically connected in sequence, for converting the first intermediate frequency signal to the first wideband radio frequency signal based on the first local oscillator signal.
5. The radio frequency transceiver micro-system of claim 2, wherein the down-conversion link comprises a plurality of down-conversion sub-links; wherein, for each down-conversion link, the number of the down-conversion sub-links included is determined according to the frequency band of the second broadband radio frequency signal input by the down-conversion link.
6. The radio frequency transceiver micro-system of claim 5, wherein the down-conversion sub-link comprises a gain adjustable amplifier, a second quadrature mixer, a second reconfigurable baseband filter, a second baseband amplifier, which are electrically connected in sequence, for converting the processed second wideband radio frequency signal into the second intermediate frequency signal based on the second local oscillator signal.
7. The radio frequency transceiver micro system of any one of claims 1 to 6, further comprising:
a silicon-based substrate provided with a plurality of first emission grooves and a plurality of first receiving grooves along a first surface in a thickness direction thereof; wherein each first transmitting groove is used for accommodating the broadband driving amplifier chip and the broadband power amplifier chip in each transmitting channel, and each first receiving groove is used for accommodating the broadband low noise amplifier chip and the broadband attenuator chip in each receiving channel;
A TSV interposer covering the first surface of the silicon-based substrate, and provided with a plurality of second emission grooves and a plurality of second receiving grooves toward a surface of the silicon-based substrate; wherein each second transmitting groove corresponds to each first transmitting groove, and each second receiving groove corresponds to each first receiving groove; the TSV adapter plate is further provided with a plurality of TSV through holes;
a silicon cap covering the surface of the TSV adapter plate facing away from the silicon substrate, wherein a third transmitting groove and a third receiving groove are formed in the surface of the silicon cap facing towards the TSV adapter plate; the third transmitting groove is used for accommodating the silicon-based CMOS broadband multifunctional up-conversion chip and the first broadband reconfigurable filter chip in each transmitting channel; for each emission channel, the first wideband reconfigurable filter chip is electrically connected with one of the up-conversion links in the silicon-based CMOS wideband multifunctional up-conversion chip, and is electrically connected with the wideband driver amplifier chip through the TSV via; the third receiving groove is used for accommodating the silicon-based CMOS broadband multifunctional down-conversion chip and the second broadband reconfigurable filter chip in each receiving channel; for each receiving channel, the second wideband reconfigurable filter chip is electrically connected with one of the down-conversion links of the silicon-based CMOS wideband multifunctional down-conversion chip, and is electrically connected with the wideband attenuator chip through the TSV via.
8. The radio frequency transceiver subsystem of claim 7, wherein,
the plurality of first emission grooves are sequentially arranged along the first direction of the silicon-based substrate;
the plurality of first receiving grooves and the plurality of first emitting grooves are arranged in a one-to-one correspondence along the second direction of the silicon-based substrate;
the third transmitting grooves and the plurality of first receiving grooves are correspondingly arranged in the vertical direction;
the third receiving grooves and the plurality of first emitting grooves are correspondingly arranged in the vertical direction.
9. The rf transceiver subsystem of claim 8, further comprising a cooling layer disposed on a second surface of the silicon-based substrate along a thickness direction thereof.
10. The radio frequency transceiver subsystem of claim 9, further comprising an intermediate frequency port, a local oscillator port, a power port, a control port, a plurality of transmit ports, and a plurality of receive ports; wherein, the liquid crystal display device comprises a liquid crystal display device,
the intermediate frequency port is electrically connected with the silicon-based CMOS broadband multifunctional up-conversion chip and is used for receiving the first intermediate frequency signal and transmitting the first intermediate frequency signal to the silicon-based CMOS broadband multifunctional up-conversion chip; the intermediate frequency port is also electrically connected with the silicon-based CMOS broadband multifunctional down-conversion chip and is used for outputting the second intermediate frequency signal;
The local oscillator port is electrically connected with the silicon-based CMOS broadband multifunctional up-conversion chip and is used for receiving the first local oscillator signal and transmitting the first local oscillator signal to the silicon-based CMOS broadband multifunctional up-conversion chip; the local oscillator port is also electrically connected with the silicon-based CMOS broadband multifunctional down-conversion chip and is used for receiving the second local oscillator signal and transmitting the second local oscillator signal to the silicon-based CMOS broadband multifunctional down-conversion chip;
the power port is respectively and electrically connected with each transmitting channel and each receiving channel and is used for supplying power to the transmitting channels and the receiving channels;
the control port is respectively and electrically connected with each transmitting channel and each receiving channel and is used for providing control signals for the transmitting channels and the receiving channels;
each emission port is respectively and electrically connected with the broadband power amplifier chip in each emission channel in a one-to-one correspondence manner and is used for outputting the processed first broadband radio frequency signals;
each receiving port is electrically connected with the broadband low noise amplifier chip in each receiving channel in a one-to-one correspondence manner, and is used for receiving the second broadband radio frequency signal and transmitting the second broadband radio frequency signal to the broadband low noise amplifier chip.
CN202310455424.6A 2023-04-25 2023-04-25 Universal reconfigurable radio frequency receiving and transmitting microsystem Active CN116192180B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202310455424.6A CN116192180B (en) 2023-04-25 2023-04-25 Universal reconfigurable radio frequency receiving and transmitting microsystem

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202310455424.6A CN116192180B (en) 2023-04-25 2023-04-25 Universal reconfigurable radio frequency receiving and transmitting microsystem

Publications (2)

Publication Number Publication Date
CN116192180A true CN116192180A (en) 2023-05-30
CN116192180B CN116192180B (en) 2023-07-07

Family

ID=86452524

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202310455424.6A Active CN116192180B (en) 2023-04-25 2023-04-25 Universal reconfigurable radio frequency receiving and transmitting microsystem

Country Status (1)

Country Link
CN (1) CN116192180B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117118394A (en) * 2023-10-23 2023-11-24 成都梓峡信息技术有限公司 Switch filter module chip and matching parameter correction method thereof

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5579341A (en) * 1994-12-29 1996-11-26 Motorola, Inc. Multi-channel digital transceiver and method
CN105743534A (en) * 2016-03-30 2016-07-06 成都瑞迪威科技有限公司 Multichannel transmitting-receiving component
US10274687B1 (en) * 2017-11-20 2019-04-30 Jiangsu Hengtong Optical Network Technology Co., Ltd. Highly integrated multi-channel optical transceiver module and active optical cable based on silicon photonic chip
CN110380747A (en) * 2019-06-28 2019-10-25 东南大学 Single-chip realizes the method and system of the anti-interference ultrahigh speed wireless communication of multichannel
CN112803898A (en) * 2021-03-17 2021-05-14 成都瑞迪威科技有限公司 High-integration-level frequency conversion channel assembly
WO2022156828A1 (en) * 2021-01-22 2022-07-28 华南理工大学 Grounded coplanar waveguide structure-based radio frequency broadband power amplifier and design method
CN115360499A (en) * 2022-07-21 2022-11-18 北京遥测技术研究所 W-frequency-band two-dimensional AIP (advanced Internet protocol) micro-system architecture
CN115882914A (en) * 2023-02-16 2023-03-31 中国电子科技集团公司第十研究所 Reconfigurable multi-beam measurement and control communication terminal phased array

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5579341A (en) * 1994-12-29 1996-11-26 Motorola, Inc. Multi-channel digital transceiver and method
CN105743534A (en) * 2016-03-30 2016-07-06 成都瑞迪威科技有限公司 Multichannel transmitting-receiving component
US10274687B1 (en) * 2017-11-20 2019-04-30 Jiangsu Hengtong Optical Network Technology Co., Ltd. Highly integrated multi-channel optical transceiver module and active optical cable based on silicon photonic chip
CN110380747A (en) * 2019-06-28 2019-10-25 东南大学 Single-chip realizes the method and system of the anti-interference ultrahigh speed wireless communication of multichannel
WO2022156828A1 (en) * 2021-01-22 2022-07-28 华南理工大学 Grounded coplanar waveguide structure-based radio frequency broadband power amplifier and design method
CN112803898A (en) * 2021-03-17 2021-05-14 成都瑞迪威科技有限公司 High-integration-level frequency conversion channel assembly
CN115360499A (en) * 2022-07-21 2022-11-18 北京遥测技术研究所 W-frequency-band two-dimensional AIP (advanced Internet protocol) micro-system architecture
CN115882914A (en) * 2023-02-16 2023-03-31 中国电子科技集团公司第十研究所 Reconfigurable multi-beam measurement and control communication terminal phased array

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117118394A (en) * 2023-10-23 2023-11-24 成都梓峡信息技术有限公司 Switch filter module chip and matching parameter correction method thereof
CN117118394B (en) * 2023-10-23 2024-01-12 成都梓峡信息技术有限公司 Switch filter module chip and matching parameter correction method thereof

Also Published As

Publication number Publication date
CN116192180B (en) 2023-07-07

Similar Documents

Publication Publication Date Title
EP3394928B1 (en) Microelectronic devices designed with high frequency communication modules having steerable beamforming capability
JP6639859B2 (en) Switchable transmit / receive phased array antenna
US11652524B2 (en) Antenna system for a multi-beam beamforming front-end wireless transceiver
JP3570359B2 (en) High frequency module
CN116192180B (en) Universal reconfigurable radio frequency receiving and transmitting microsystem
CN108141258B (en) Analog processing system for massive MIMO
CN114915266B (en) Radio frequency amplifying circuit and radio frequency front-end module
Rebeiz et al. Silicon RFICs for phased arrays
CN111524866A (en) Radio frequency front end structure and system based on TSV adapter plate
Tabarani et al. Power‐efficient full‐duplex K/Ka‐band phased array front‐end
CN112202463A (en) Multi-channel microwave assembly
Hancock et al. The DARPA millimeter wave digital arrays (MIDAS) program
Ng et al. Scalable mm-Wave 4-channel radar SoC with vector modulators and demodulators for MIMO and phased array applications
CN113391272A (en) W-band transmitting assembly
JP4271187B2 (en) Antenna module and antenna device
Rieß et al. An integrated 16-element phased-array transmitter front-end for wireless communication at 185 GHz
CN217427104U (en) Antenna assembly
Zhao et al. A 29-to-36 GHz 4TX/4RX Dual-stream Phased-array Joint Radar-Communication CMOS Transceiver Supporting Centimeter-level 2D Imaging and 64-QAM OTA Wireless Link
US10541742B1 (en) Down-converter assembly for simultaneous conversion of disjoint signals
US10797772B2 (en) Phase shifter, communication device, and phase shifting method
Vosoogh et al. An E-band compact frequency division duplex radio front-end based on gap waveguide technology
Park et al. V-band receiver for commercial space applications
CN212033012U (en) Miniaturized radio frequency front end structure and system
CN209767512U (en) Micro unmanned aerial vehicle receiving and dispatching subassembly based on three-dimensional equipment and MCM technique
Baltus et al. Systems and architectures for very high frequency radio links

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant