CN116192136B - Calibration method, device and system for disturbance input signal of ADC (analog to digital converter) - Google Patents

Abstract

The application provides a method, a device, a system and a storage medium for calibrating disturbance input signals of an ADC (analog to digital converter), wherein the method comprises the following steps: obtaining a plurality of analog disturbance input signals, and calculating an analog disturbance reference value according to the first analog disturbance input signals; inputting the analog disturbance reference value into an ADC to obtain a digital disturbance reference value; respectively inputting a plurality of analog disturbance input signals into an ADC (analog to digital converter), respectively obtaining a plurality of digital disturbance output signals, and respectively calculating a plurality of corresponding digital disturbance calibration values according to the plurality of digital disturbance output signals and a digital disturbance reference value; and when the ADC performs conversion, outputting a plurality of analog disturbance input signals and overlapping the corresponding analog input signals, inputting the analog disturbance input signals to the ADC, and outputting a plurality of digital disturbance calibration values to be overlapped with digital output signals corresponding to the analog disturbance input signals output by the ADC when the corresponding analog disturbance input signals are respectively generated, so as to calibrate the analog disturbance input signals.

Description

Calibration method, device and system for disturbance input signal of ADC (analog to digital converter)

Technical Field

The present application relates to analog-to-digital conversion technology, and in particular, to a method, apparatus, system, and computer readable storage medium for calibrating a disturbance input signal of an ADC.

Background

Analog-to-Digital Converter (ADC) is a type of device for converting a continuous signal in Analog form into digital form. Because of the process and material characteristics of the ADC fabrication, each ADC has different degrees of nonlinear distortion, so that the ADC can generate a digital output signal with a certain non-ideal error when in operation.

For a high-speed ADC, the dynamic characteristics of the ADC determine the analog-to-digital conversion characteristics of the high-speed ADC when operating. The spurious-free dynamic range (Spurious-FREE DYNAMIC RANGE, SFDR) of an ADC refers to the ratio of the root mean square value of the carrier frequency (maximum signal component) to the root mean square value of the sub-maximum noise component or harmonic distortion component.

For high speed ADCs, there are two basic limitations to maximizing SFDR: the first is distortion generated by the front-end amplifier and the sample-and-hold circuit; second is distortion caused by non-linearities in the actual transfer function of the ADC encoder section. Therefore, it is critical to increase SFDR to minimize both of these nonlinearities.

To significantly reduce the inherent distortion caused by the ADC front end, the external forces on the ADC are futile. However, differential nonlinearity of the ADC encoder transfer function can be reduced by properly utilizing disturbance injection (i.e., external noise, added to the analog input signal of the ADC).

Disclosure of Invention

Exemplary embodiments of the present application provide a calibration method for a disturbance input signal of an ADC, including: acquiring a plurality of analog disturbance input signals, and calculating an analog disturbance reference value according to a first analog disturbance input signal, wherein the first analog disturbance input signal is 0 value or one of the plurality of analog disturbance input signals; inputting the analog disturbance reference value into the ADC, and obtaining a digital disturbance reference value corresponding to the analog disturbance reference value after conversion by the ADC; respectively inputting the plurality of analog disturbance input signals into the ADC, respectively obtaining a plurality of corresponding digital disturbance output signals, and respectively calculating a plurality of corresponding digital disturbance calibration values according to the plurality of digital disturbance output signals and the digital disturbance reference value; and when the ADC performs conversion, outputting the plurality of analog disturbance input signals and the corresponding analog input signals to be input to the ADC after being overlapped, and outputting the plurality of digital disturbance calibration values to be overlapped with the digital output signals corresponding to the analog disturbance input signals output by the ADC when the corresponding analog disturbance input signals are respectively used for calibrating the analog disturbance input signals.

In an embodiment, when the first simulated disturbance input signal is one of the plurality of simulated disturbance input signals, the step of calculating the simulated disturbance reference value from the first simulated disturbance input signal includes: selecting intermediate values of the plurality of analog disturbance input signals as the analog disturbance reference values; and/or the step of calculating a corresponding plurality of digital disturbance calibration values according to the plurality of digital disturbance output signals and the digital disturbance reference value respectively, including: subtracting the digital disturbance reference value from the digital disturbance output signals respectively to obtain a corresponding digital disturbance calibration value.

In an embodiment, the step of inputting the analog disturbance reference value into the ADC and obtaining a digital disturbance reference value corresponding to the analog disturbance reference value after the ADC conversion further includes: inputting the analog disturbance reference value into the ADC for a plurality of times to obtain a plurality of single-time digital disturbance reference values; and calculating an average value of the plurality of single-order digital disturbance reference values as the digital disturbance reference value.

In an embodiment, the step of inputting the analog disturbance reference value into the ADC and obtaining a digital disturbance reference value corresponding to the analog disturbance reference value after the ADC conversion further includes: inputting the analog disturbance reference value into the ADC for a plurality of times to obtain a plurality of single-time digital disturbance reference values; and obtaining the digital disturbance reference value from the plurality of single digital disturbance reference values through a low-pass decimation filtering method.

In an embodiment, before the step of outputting the plurality of digital disturbance calibration values to be superimposed with the digital output signals corresponding to the analog disturbance input signals output by the ADC to calibrate the analog disturbance input signals, respectively, the method further comprises: and respectively delaying the digital disturbance calibration values, wherein the period of the delay is related to the conversion period of the ADC.

In an embodiment, the plurality of analog disturbance input signals are an arithmetic sequence.

In an embodiment, the plurality of analog disturbance input signals are configured into groups of two other than the intermediate value, and each group of analog disturbance input signals has the same value and opposite signs.

Exemplary embodiments of the present application provide a calibration apparatus for a disturbance input signal of an ADC, including: an analog disturbance signal acquisition module configured to acquire a plurality of analog disturbance input signals and calculate an analog disturbance reference value according to a first analog disturbance input signal, wherein the first analog disturbance input signal is a 0 value or one of the plurality of analog disturbance input signals; the analog-to-digital disturbance reference value conversion module is configured to input the analog disturbance reference value into the ADC and obtain a digital disturbance reference value corresponding to the analog disturbance reference value after the ADC is converted; a digital disturbance calibration value calculation module configured to input the plurality of analog disturbance input signals into the ADC, respectively, obtain a plurality of corresponding digital disturbance output signals, and calculate a plurality of corresponding digital disturbance calibration values according to the plurality of digital disturbance output signals and the digital disturbance reference value, respectively; and an analog disturbance input signal calibration module configured to output the plurality of analog disturbance input signals to the ADC after being superimposed with the corresponding analog input signals when the ADC performs conversion, and to output the plurality of digital disturbance calibration values to be superimposed with digital output signals corresponding to the analog disturbance input signals output by the ADC when the corresponding analog disturbance input signals are respectively superimposed to calibrate the analog disturbance input signals.

Exemplary embodiments of the present application provide a calibration system for a perturbed input signal of an ADC, the calibration system comprising at least one processor and a memory, the memory having stored thereon a program, the at least one processor, when executing the program on the memory, performing the steps of the method of the previous embodiments.

Exemplary embodiments of the present application provide a computer-readable storage medium having a program stored thereon, which when executed performs the steps of the method of the previous embodiments.

As described above, in the conventional art, the dynamic characteristics of the ADC are generally increased by superimposing an analog disturbance input signal and an analog input voltage signal. However, the inventors found that in the conventional art, only the signal calibration in the digital domain is performed for the analog input voltage signal to improve the conversion accuracy of the ADC, but the distortion error of the analog disturbance input signal is not calibrated, which may cause an influence on the original signal to deteriorate the performance of the disturbance signal.

According to the application, the calibration device for the disturbance input signals of the ADC is provided, and the method is realized according to the fact that the first analog disturbance input signal in n stages of analog disturbance input signals respectively input to the positive input end and the negative input end of the ADC is used as an analog disturbance reference value, and then the digital disturbance reference value is calculated, so that when the ADC works, the digital result of conversion is removed from the disturbance input digital conversion value in the digital domain, and meanwhile, the distortion error of the disturbance input signal is calibrated in real time.

Drawings

FIG. 1 is a flow chart of a method for calibrating a disturbance input signal of an ADC according to an embodiment of the present application.

Fig. 2 is a schematic circuit diagram of a method for calibrating a disturbance input signal of an ADC according to an embodiment of the application.

FIG. 3 is a graph of analog disturbance input signal versus digital disturbance output signal in a method for calibrating a disturbance input signal of an ADC according to another embodiment of the present application.

Fig. 4 is a flowchart of a method for calibrating a disturbance input signal for an ADC according to a further embodiment of the application.

Fig. 5 is a schematic structural diagram of a calibration module for a disturbance input signal of an ADC according to an embodiment of the application.

Fig. 6 is a schematic diagram illustrating an internal structure of a calibration system for a disturbance input signal of an ADC according to an embodiment of the application.

Detailed Description

The present application will be described in further detail with reference to the drawings and examples, in order to make the objects, technical solutions and advantages of the present application more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the application.

In this document, the term "connected" refers to an electrical connection unless the context clearly indicates otherwise. The terms "comprising," "including," and "containing" are intended to include other elements in addition to those listed thereafter.

Referring to fig. 1, a flowchart of a method for calibrating a disturbance input signal for an ADC according to an embodiment of the application is shown, which includes the following steps.

Step S100, a plurality of analog disturbance input signals are obtained, and an analog disturbance reference value is calculated according to a first analog disturbance input signal in the plurality of analog disturbance input signals, wherein the first analog disturbance input signal is 0 value or one of the plurality of analog disturbance input signals.

The plurality of analog disturbance input signals are used as disturbance signals (or noise signals) of the ADC input end and are input into the ADC together with the analog input signals so as to improve the dynamic characteristics of the ADC. Thus, the number of the plurality of analog disturbance input signals corresponds to the number of resolution bits of the ADC. Further, it should be noted that here, a plurality of analog disturbance input signals are not yet input to the ADC but are input only to the disturbance input signal calibration device, which will be described in the following embodiments.

An analog disturbance reference value characterizing a plurality of analog disturbance input signals is obtained from the first analog disturbance input signal. The first analog disturbance input signal may be any one of a plurality of analog disturbance input signals, for example, may be an intermediate value of a plurality of analog disturbance input signals (i.e., a value in a middle bit of a sequence among a plurality of different analog disturbance input signals), or may be an analog disturbance input signal having a 0-value input value. The analog disturbance reference value can be used for calculating a digital disturbance calibration value later, so that digital disturbance signal components of drinks to which the analog disturbance signals are applied are removed in a digital domain when the ADC works normally, and the influence of errors of the digital disturbance signal components is removed.

Step S200, inputting the analog disturbance reference value into the ADC, and obtaining a digital disturbance reference value corresponding to the analog disturbance reference value after conversion by the ADC.

After obtaining the analog disturbance reference value, the analog disturbance reference value is input to the ADC and is then converted into a digital output signal, i.e., a digital disturbance reference value, by the ADC. For example, when the analog disturbance reference value is a 0-value input value, the digital disturbance reference value is a corresponding digital output signal obtained by inputting the 0-value analog disturbance reference value into the ADC and then converting the analog disturbance reference value. It will be appreciated that the digital perturbation reference value contains distortion errors present in the perturbation signal conversion due to non-idealities of the ADC.

Step S300, respectively inputting the plurality of analog disturbance input signals into the ADC, respectively obtaining a plurality of corresponding digital disturbance output signals, and respectively calculating a plurality of corresponding digital disturbance calibration values according to the plurality of digital disturbance output signals and the digital disturbance reference value.

The plurality of analog disturbance input signals are sequentially input into the ADC to obtain a plurality of digital disturbance output signals corresponding to the plurality of analog disturbance input signals, respectively, that is, a plurality of digital disturbance output signals corresponding to the number of resolution bits of the ADC.

And then respectively calculating the digital disturbance output signals and the digital disturbance reference value according to the digital disturbance output signals so as to eliminate the influence of distortion errors in the disturbance signal conversion process.

It will be appreciated that the digital disturbance calibration values herein are used to calibrate the distortion error of the disturbance input signal in real time while the digital domain removes the disturbance input digital conversion values from the converted digital result during operation of the ADC.

Optionally, the plurality of analog disturbance input signals are in equal difference series with each other, i.e. the difference between two adjacent analog disturbance input signals is equal.

Alternatively or additionally, the plurality of analog disturbance input signals are arranged in groups of two, each group of analog disturbance input signals having the same value and opposite sign. In other words, the plurality of analog disturbance input signals are n-stage analog disturbance input signals respectively input to the positive and negative input terminals of the ADC, i.e., there are n groups of analog disturbance input signals. For example, the plurality of analog disturbance input signals may be analog disturbance input signal V _i-2、V_i-1、V_{i 1}、V_{i 2}, where the analog disturbance input signals V _i-2 and V _{i 2} are a set, the two input signals are the same value but opposite in sign, and so on. Thus, when the analog disturbance reference value is a 0-value input value and the ADC has no distortion error influence, the analog disturbance reference value is input into the ADC to obtain a digital disturbance output value which is supposed to be a 0 value; when the ADC is affected by a distortion error (which should be affected in practice), the digital output reference value characterizes the distortion error, thereby facilitating later calibration. It will be appreciated that in this embodiment, each set of analog disturbance input signals is input to the positive and negative inputs of the ADC, respectively.

Step S400, when the ADC performs conversion, outputting the plurality of analog disturbance input signals and superimposing the plurality of analog disturbance input signals with the corresponding analog input signals, and outputting the plurality of digital disturbance calibration values to superimpose the plurality of digital output signals corresponding to the analog disturbance input signals output by the ADC when the corresponding analog disturbance input signals are respectively superimposed, so as to calibrate the analog disturbance input signals.

After obtaining each digital disturbance calibration value corresponding to the resolution bit number of the ADC, when the ADC executes analog input signal conversion (namely, when the ADC works normally), digital disturbance output signals are calibrated respectively in the digital domain of the ADC, namely, when the ADC works, the digital domain removes disturbance input digital conversion values from the converted digital result, and meanwhile, the distortion error of the disturbance input signals is calibrated in real time.

Fig. 2 is a schematic circuit diagram of a method for calibrating a disturbance input signal of an ADC according to an embodiment of the application. In this embodiment, the device 100 for calibrating a disturbance input signal is used to perform the steps of the method for calibrating a disturbance input signal for an ADC of the above-described embodiment.

Specifically, the calibration device 100 for a disturbance input signal is configured to generate a plurality of analog disturbance input signals V _{d_i}, for example, the analog disturbance input signals V_{d_-n}、…V_{d_-i}、…V_{d_-3}、V_{d_-2}、V_{d_-1}、V_{d_1}、V_{d_2}、V_{d_3}、…、V_{d_i}、…、V_{d_n},, where N corresponds to the number of bits N of the resolution of the ADC, for example, when the resolution of the ADC is 8 bits, then the number of the plurality of analog disturbance input signals is 16. During the calibration phase of the disturbance input signal, there is no analog input signal V _in, so that the analog disturbance input signal V _{d_i} is directly input to the analog-to-digital converter 200 through and logic 400, where the function of the analog-to-digital converter 200 is f. The analog-to-digital converter 200 converts the analog disturbance input signal V _{d_i} to the desired corresponding digital disturbance output signal D _{o_i} and transmits the digital disturbance output signal D _{o_i} to the disturbance input signal calibration device 100.

Meanwhile, the calibration device 100 of the disturbance input signal calculates an analog disturbance reference value according to the first analog disturbance input signal, and inputs the analog disturbance reference value to the analog-to-digital converter 200 to obtain a digital disturbance reference value.

Thus, the disturbance input signal calibration apparatus 100 subtracts the digital disturbance reference value from each of the obtained plurality of digital disturbance output signals do_i, thereby obtaining a digital disturbance calibration value doc_i corresponding to the digital disturbance output signal do_i. I.e. the calibrated digital code D _{oc_i} is finally obtained, wherein

D_out＝f(V_in+V_{d_i}) (1)，

D_outc＝D_out-f*(V_{d_i})＝D_out-D_{oc_i} (2)。

In the normal operation phase of the ADC, the analog input signal V _in is input to the and logic 400, and the analog input signal V _in is superimposed with the analog disturbance input signal V _{d_i} transmitted by the disturbance input signal calibration device 100 and then input to the analog-to-digital converter 200, so that the analog-to-digital converter 200 converts the analog input signal V _in to generate a corresponding digital output signal D _out, and outputs the digital output signal D _out to the and logic 500. On the other hand, the calibration device 100 of the disturbance input signal outputs a digital disturbance calibration D _{oc_i} corresponding to the analog disturbance input signal V _{d_i} to the signal delay circuit 300 to perform a delay operation on the plurality of digital disturbance calibration D _{oc_i}, respectively, wherein a period of the delay is related to a conversion period of the ADC. The disturbance input signal calibration apparatus 100 then outputs the delayed digital disturbance calibration D _{oc_i} to the and logic 500, which performs a calculation with the digital output signal D _out such that the digital output signal D _out subtracts the digital disturbance calibration D _{oc_i} to form a calibrated digital output signal D _outc with the disturbance signal component removed and the distortion error of the disturbance signal removed.

It should be noted that the signal delay circuit 300 is configured to delay the number of cycles of the digital disturbance calibration D _{oc_i} according to the number of conversion cycles of the ADC function, so that the delayed digital disturbance calibration D _{oc_i} is synchronized with the digital output signal D _out output by the ADC.

It will be appreciated that the disturbance input signal calibration device 100 may be configured to include a processor, a memory, and a software program stored on the memory to perform the steps of the disturbance input signal calibration method of the above-described embodiments. Alternatively, the device 100 for calibrating a disturbance input signal may also be configured by hardware circuitry to perform the steps of the method for calibrating a disturbance input signal according to the above embodiment. Those skilled in the art should understand how to implement the above-mentioned method for calibrating the disturbance input signal by using a hardware circuit, and this will not be repeated herein.

It is further understood that those skilled in the art can know a common delay circuit to implement the signal delay circuit 300, and this will not be repeated herein.

FIG. 3 is a graph of analog disturbance input signal versus digital disturbance output signal in a method for calibrating a disturbance input signal of an ADC according to another embodiment of the present application.

In order to eliminate the adverse effect of analog disturbance on the original analog input quantization result, it is necessary to measure and compensate the analog disturbance input signal in the digital domain. Taking an example of analog injection with "positive and negative" directions, the positive and negative inputs of the ADC have n stages of analog disturbance input signals V _{d_1} -V _{d_n} and V _{d_-1} -V _{d_-n}, respectively, corresponding to the corresponding digital output signals D _{o_1} -D _{o_n} and D _{o_-1} -D _{o_-n}, respectively, as shown in fig. 3.

With continued reference to FIG. 3, the abscissa is the analog disturbance input voltage V _input and the ordinate is the digital disturbance output voltage V _output. Analog disturbance input signal V_{d_-n}、…V_{d_-i}、…V_{d_-3}、V_{d_-2}、V_{d_-1}、V_{d_1}、V_{d_2}、V_{d_3}、…、V_{d_i}、…、V_{d_n},, where N corresponds to the number of bits N of the ADC resolution, analog disturbance input signal V_{d_-n}、…V_{d_-i}、…V_{d_-3}、V_{d_-2}、V_{d_-1}、V_{d_1}、V_{d_2}、V_{d_3}、…、V_{d_i}、…、V_{d_n} corresponds to the digital disturbance output signal D_{o_-n}、…D_{o_-i}、…D_{o_-3}、D_{o_-2}、D_{o_-1}、D_{o_0}、D_{o_1}、D_{o_2}、D_{o_3}、…、D_{o_i}、…、D_{o_n}.

It will be appreciated that when the analog disturbance input signal is at a value of 0, then the 0-value analog disturbance input signal is at the analog disturbance reference value V _{d_0}. Wherein the digital signal output of the analog signal reference value V _{d_0} is D _{o_0} (i.e., the origin of coordinates). When the digital disturbance output signal D _{o_i} is subtracted from D _{o_0}, a digital disturbance calibration value D _{oc_i} is obtained, as shown, and so on, to obtain a digital disturbance calibration value D _{oc_i} corresponding to the analog disturbance output signal of all bits.

It will be appreciated that when the analog disturbance reference value is selected from one of the plurality of analog disturbance input signals V _{d_j}, the actual digital disturbance output signal D _{o_j} corresponding to the analog disturbance reference value V _{d_j} obtained in the digital domain is subtracted from the theoretical digital disturbance output signal corresponding to the analog disturbance reference value V _{d_j} (i.e., the digital disturbance reference value), thereby obtaining the digital disturbance calibration value.

Referring to fig. 4, fig. 4 shows a flow chart of a method of calibrating a disturbance input signal for an ADC according to a further embodiment. The method of this embodiment differs from the method of the embodiment shown in fig. 1 in that: the method of the embodiment of fig. 4 calculates the simulated disturbance reference value in particular from intermediate values of a plurality of simulated disturbance input signals.

Specifically, the step of calculating the simulated disturbance reference value from the first simulated disturbance input signal comprises the steps of:

step S110, selecting the intermediate values of the plurality of analog disturbance input signals as the analog disturbance reference values.

For example, when the plurality of analog disturbance input signals are grouped into two groups, and the absolute values of the two analog disturbance input signals of each group are equal and the signs are opposite, the intermediate value of the plurality of analog disturbance input signals is 0.

In addition, the step of calculating a corresponding plurality of digital disturbance calibration values according to the plurality of digital disturbance output signals and the digital disturbance reference value respectively further comprises the following steps:

Step S310, subtracting the digital disturbance reference values from the plurality of digital disturbance output signals respectively to obtain the corresponding plurality of digital disturbance calibration values respectively.

In another embodiment, the analog disturbance reference value may be input to the ADC a plurality of times to obtain a plurality of single digital disturbance reference values; and calculating an average value of the plurality of single-order digital disturbance reference values as the digital disturbance reference value. Through multiple tests and calculations, the digital disturbance reference value is more accurate.

It will be appreciated that in yet another embodiment, the analog disturbance reference value may be input to the ADC a plurality of times to obtain a plurality of single digital disturbance reference values; and obtaining the digital disturbance reference value from the plurality of single digital disturbance reference values through a low-pass decimation filtering method. Similarly, the plurality of single-order digital disturbance reference values are filtered through low-pass decimation filtering, so that the digital disturbance reference values are more accurate. Those skilled in the art will understand how to screen the digital disturbance reference value by the low-pass decimation filtering method, and will not be described in detail herein.

As shown in fig. 5, exemplary embodiments of the present application further provide a calibration apparatus for a disturbance input signal of an ADC, including:

An analog disturbance signal acquisition module 120 configured to acquire a plurality of analog disturbance input signals and calculate an analog disturbance reference value from a first analog disturbance input signal, wherein the first analog disturbance input signal is a 0 value or one of the plurality of analog disturbance input signals;

an analog-to-digital disturbance reference value conversion module 140 configured to input the analog disturbance reference value into the ADC, and obtain a digital disturbance reference value corresponding to the analog disturbance reference value after conversion by the ADC;

A digital disturbance calibration calculation module 160 configured to input the plurality of analog disturbance input signals into the ADC, respectively, obtain a corresponding plurality of digital disturbance output signals, and calculate a corresponding plurality of digital disturbance calibration values according to the plurality of digital disturbance output signals and the digital disturbance reference value, respectively; and

An analog disturbance input signal calibration module 180 configured to output the plurality of analog disturbance input signals to be input to the ADC after being superimposed with the corresponding analog input signals when the ADC performs conversion, and to output the plurality of digital disturbance calibration values to be superimposed with digital output signals corresponding to the analog disturbance input signals output by the ADC when the corresponding analog disturbance input signals are respectively superimposed to calibrate the analog disturbance input signals.

In one embodiment, a calibration system 600 for a disturbance input signal of an ADC is provided, the calibration system 600 for a disturbance input signal may be an SDN controller, and an internal structure diagram thereof may be as shown in fig. 6. The calibration system 600 for disturbance input signals includes a processor, memory, transmitter and receiver connected by a system bus, and may also include a display screen and/or an input device in some embodiments. Wherein the processor is configured to provide computing and control capabilities. The memory of the calibration system 600 for the disturbance input signal comprises a non-volatile storage medium, an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of the operating system and computer programs in the non-volatile storage media. The transmitter and receiver of the calibration system 600 of the disturbance input signal are used to communicate with external terminals via a network connection. The computer program is executed by a processor to implement the steps of the method of calibrating a disturbance input signal of the previous embodiment. The display screen of the disturbance input signal calibration system 600 may be a liquid crystal display screen or an electronic ink display screen, and the input device of the disturbance input signal calibration system 600 may be a touch layer covered on the display screen, or may be a key, a track ball or a touch pad arranged on the casing of the disturbance input signal calibration system 600, or may be an external keyboard, a touch pad or a mouse.

It will be appreciated by those skilled in the art that the configuration shown in FIG. 6 is a block diagram of only some of the configurations associated with the present inventive arrangements and is not limiting of the calibration system 600 of disturbance input signals to which the present inventive arrangements are applied, and that a particular disturbance input signal calibration system 600 may include more or fewer components than shown, or may incorporate certain components, or may have a different arrangement of components.

It should be understood that, although the steps in the flowcharts of fig. 1 and 4 are shown in order as indicated by the arrows, these steps are not necessarily performed in order as indicated by the arrows. The steps are not strictly limited to the order of execution unless explicitly recited herein, and the steps may be executed in other orders. Moreover, at least some of the steps in fig. 1 and 4 may include multiple sub-steps or phases that are not necessarily performed at the same time, but may be performed at different times, nor does the order in which the sub-steps or phases are performed necessarily occur sequentially, but may be performed alternately or alternately with at least a portion of the sub-steps or phases of other steps or other steps.

Exemplary embodiments of the present application also provide a computer-readable storage medium having a program stored thereon, which when executed performs the steps of the method of the previous embodiments.

Those skilled in the art will appreciate that implementing all or part of the above described methods may be accomplished by way of a computer program stored on a non-transitory computer readable storage medium, which when executed, may comprise the steps of the embodiments of the methods described above. Any reference to memory, storage, database, or other medium used in embodiments provided herein may include non-volatile and/or volatile memory. The nonvolatile memory can include Read Only Memory (ROM), programmable ROM (PROM), electrically Programmable ROM (EPROM), electrically Erasable Programmable ROM (EEPROM), or flash memory. Volatile memory can include Random Access Memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in a variety of forms such as Static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double Data Rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link (SYNCHLINK) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM), among others.

The technical features of the above embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.

The above examples illustrate only a few embodiments of the application, which are described in detail and are not to be construed as limiting the scope of the application. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the application, which are all within the scope of the application. Accordingly, the scope of protection of the present application is to be determined by the appended claims.

Claims (10)

1. A method for calibrating a perturbed input signal to an ADC, comprising:

Acquiring a plurality of analog disturbance input signals, and calculating an analog disturbance reference value according to a first analog disturbance input signal, wherein the first analog disturbance input signal is 0 value or one of the plurality of analog disturbance input signals;

Inputting the analog disturbance reference value into the ADC, and obtaining a digital disturbance reference value corresponding to the analog disturbance reference value after conversion by the ADC;

Respectively inputting the plurality of analog disturbance input signals into the ADC, respectively obtaining a plurality of corresponding digital disturbance output signals, and respectively calculating a plurality of corresponding digital disturbance calibration values according to the plurality of digital disturbance output signals and the digital disturbance reference value; and

And when the ADC executes conversion, the analog disturbance input signals are output to the ADC after being overlapped with the corresponding analog input signals, and the digital disturbance calibration values are output to be overlapped with the digital output signals corresponding to the analog disturbance input signals output by the ADC when the corresponding analog disturbance input signals are respectively used for calibrating the analog disturbance input signals.

2. The method of calibrating a disturbance input signal for an ADC according to claim 1, wherein when the first analog disturbance input signal is one of the plurality of analog disturbance input signals, the step of calculating the analog disturbance reference value from the first analog disturbance input signal includes:

Selecting intermediate values of the plurality of analog disturbance input signals as the analog disturbance reference values; and/or

The step of calculating a plurality of corresponding digital disturbance calibration values according to the plurality of digital disturbance output signals and the digital disturbance reference value respectively includes:

subtracting the digital disturbance reference value from the digital disturbance output signals respectively to obtain a corresponding digital disturbance calibration value.

3. The method according to claim 2, wherein the step of inputting the analog disturbance reference value to the ADC and obtaining the digital disturbance reference value corresponding to the analog disturbance reference value after conversion by the ADC further comprises:

Inputting the analog disturbance reference value into the ADC for a plurality of times to obtain a plurality of single-time digital disturbance reference values; and

And calculating an average value of the plurality of single-order digital disturbance reference values as the digital disturbance reference value.

4. The method according to claim 2, wherein the step of inputting the analog disturbance reference value to the ADC and obtaining the digital disturbance reference value corresponding to the analog disturbance reference value after conversion by the ADC further comprises:

Inputting the analog disturbance reference value into the ADC for a plurality of times to obtain a plurality of single-time digital disturbance reference values; and

And obtaining the digital disturbance reference value from the plurality of single digital disturbance reference values through a low-pass decimation filtering method.

5. The method of calibrating a disturbance input signal for an ADC according to claim 2, wherein said outputting said plurality of digital disturbance calibration values to be superimposed with digital output signals corresponding to said analog disturbance input signal output by said ADC when said corresponding analog disturbance input signal is performed, respectively, to calibrate said analog disturbance input signal, further comprising, before said step of:

And respectively delaying the digital disturbance calibration values, wherein the period of the delay is related to the conversion period of the ADC.

6. The method of calibrating a disturbance input signal for an ADC of claim 2, wherein the plurality of analog disturbance input signals are in an arithmetic sequence.

7. The method of calibrating a disturbance input signal for an ADC according to claim 5, wherein the plurality of analog disturbance input signals are arranged in groups of two, each group of analog disturbance input signals having the same value and opposite sign.

8. A calibration device for a perturbed input signal to an ADC, comprising:

An analog disturbance signal acquisition module configured to acquire a plurality of analog disturbance input signals and calculate an analog disturbance reference value from a first analog disturbance input signal, wherein the first analog disturbance input signal is a 0 value or one of the plurality of analog disturbance input signals;

The analog-to-digital disturbance reference value conversion module is configured to input the analog disturbance reference value into the ADC and obtain a digital disturbance reference value corresponding to the analog disturbance reference value after the ADC is converted;

A digital disturbance calibration value calculation module configured to input the plurality of analog disturbance input signals into the ADC, respectively, obtain a plurality of corresponding digital disturbance output signals, and calculate a plurality of corresponding digital disturbance calibration values according to the plurality of digital disturbance output signals and the digital disturbance reference value, respectively; and

And the analog disturbance input signal calibration module is configured to output the plurality of analog disturbance input signals to be overlapped with corresponding analog input signals and then input the analog disturbance input signals to the ADC when the ADC performs conversion, and output the plurality of digital disturbance calibration values to be overlapped with digital output signals corresponding to the analog disturbance input signals output by the ADC when the corresponding analog disturbance input signals are respectively used for calibrating the analog disturbance input signals.

9. A calibration system for a perturbed input signal of an ADC, characterized in that the calibration system comprises at least one processor and a memory, the memory having stored thereon a program, the at least one processor, when executing the program on the memory, performing the steps of the method according to any of the preceding claims 1 to 7.

10. A computer readable storage medium, characterized in that the computer readable storage medium has stored thereon a program which, when executed, performs the steps of the method of any of the preceding claims 1 to 7.