CN116192115A

CN116192115A - Large power switch design method based on thick film circuit substrate

Info

Publication number: CN116192115A
Application number: CN202211518850.1A
Authority: CN
Inventors: 商桂川; 丛楠; 孙浩然
Original assignee: Sichuan SIP Electronic Technology Co Ltd
Current assignee: Sichuan SIP Electronic Technology Co Ltd
Priority date: 2022-11-30
Filing date: 2022-11-30
Publication date: 2023-05-30

Abstract

A design method of a high-power switch based on a thick film circuit substrate comprises the following steps: providing a surface layer circuit layer, wherein a driver, a first radio frequency transmission line, a second radio frequency transmission line, a third radio frequency transmission line, a fourth radio frequency transmission line, a first PIN diode, a second PIN diode, a third PIN diode, a first capacitor, a second capacitor, a third capacitor and a fourth capacitor are arranged on the surface layer circuit layer; providing a sacrificial layer which is arranged on the lower side of the surface circuit layer; providing a plurality of metal layers, wherein the first metal layer is positioned at the lower side of the sacrificial layer, and the second metal layer is provided with a first inductor, a second inductor, a third inductor and a fourth inductor; the first resistor and the second resistor are arranged on the fourth metal layer; a driver control circuit is arranged on the fifth metal layer; a ceramic substrate is sandwiched between two adjacent metal layers. Components of the high-power switch are separately arranged on the surface layer of the thin film process and different metal layers in the thick film process, so that high integration is realized, and the overall size is reduced.

Description

Large power switch design method based on thick film circuit substrate

Technical Field

The invention relates to the technical field of electronic information, in particular to a design method of a high-power switch based on a thick film circuit substrate.

Background

High power switches are commonly used in radar front-ends for switching between transmit and receive or for switching between modes of operation. The high-power switch needs to meet high-power conditions and ensure indexes such as insertion loss and standing waves of the switch. The switch insertion loss can directly reduce the output power of the radar, the radar efficiency is reduced, and meanwhile, the heat loss caused by the insertion loss can increase the heat dissipation burden of the radar. The standing wave is a signal reflection index, the reflection of the standing wave is large corresponding to the reflection of the signal, under the condition of high power, the large reflection can burn out the equipment at the back end, and meanwhile, the output power can be reduced, and the efficiency is reduced.

At present, radars tend to be miniaturized, and the miniaturization design has higher requirements on processing precision, so how to realize miniaturization, high-precision processing and miniaturization of a high-power switch and improve the heat dissipation effect becomes a technical problem to be solved urgently.

Disclosure of Invention

The invention provides a design method of a high-power switch based on a thick film circuit substrate, which solves the defects of the prior art, and the method uses a thick film thin film mixing process to arrange electronic devices such as resistors, inductors and the like in thick film conductor layers, arrange components for controlling circuits and the like in different layers, and place a plurality of PIN diodes, drivers, a plurality of capacitors and a plurality of radio frequency transmission lines on the surface layer, wherein the layers are connected through metallized through holes, and the size of the whole system can be reduced through high integration, and the high-precision processing is convenient.

In order to achieve the object of the present invention, the following techniques are proposed:

a design method of a high-power switch based on a thick film circuit substrate comprises the following steps:

providing a surface layer circuit layer, wherein a driver, a first radio frequency transmission line, a second radio frequency transmission line, a third radio frequency transmission line, a fourth radio frequency transmission line, a first PIN diode, a second PIN diode, a third PIN diode, a first capacitor, a second capacitor, a third capacitor and a fourth capacitor are arranged on the surface layer circuit layer;

providing a plurality of metal layers, wherein the metal layers at least comprise a first metal layer, a second metal layer, a third metal layer, a fourth metal layer, a fifth metal layer and a sixth metal layer; the first inductor, the second inductor, the third inductor and the fourth inductor are arranged on the second metal layer;

the first resistor and the second resistor are arranged on the fourth metal layer;

a first driver control circuit and a second driver control circuit are arranged on the fifth metal layer;

a multilayer ceramic substrate is provided, and a ceramic substrate is arranged between two adjacent metal layers.

Further, a sacrificial layer is provided, wherein the sacrificial layer is arranged on the lower side of the surface layer circuit layer, and the sacrificial layer is arranged on the upper side of the first metal layer. The sacrificial layer comprises a thin film substrate, at least one thick film sacrificial layer is arranged on the lower side of the thin film substrate, the thin film substrate is arranged on the lower side of the surface layer circuit layer, the thick film sacrificial layer is arranged on the upper side of the first metal layer, and the thin film substrate is made of silicon nitride ceramics.

Further, a molybdenum copper layer is also provided on the lower side of the sixth metal layer. A plurality of radiating holes are arranged on the surface layer circuit layer, and penetrate through the molybdenum copper layer.

Further, the driver is connected to the first driver control circuit and the second driver control circuit through the first channel and the second channel respectively; the driver is also connected to the first metal layer through a third channel; the first driver control circuit and the second driver control circuit are respectively connected to the surface layer circuit layer through a fourth channel and a fifth channel.

Further, the first radio frequency transmission line is connected to the first inductor through a sixth channel; the second radio frequency transmission line is connected to the third inductor through a seventh channel; the third radio frequency transmission line is connected to the fourth inductor through an eighth channel; the fourth radio frequency transmission line is connected to the second inductor through a ninth channel.

Further, the first inductor is connected to the third metal layer through a tenth channel; the third inductor is connected to the third metal layer through an eleventh channel; the fourth inductor is connected to the third metal layer through a twelfth channel; the second inductor is connected to the third metal layer through a thirteenth channel.

Further, the second resistor is connected to the surface layer circuit layer through a fourteenth channel and a fifteenth channel; the first resistor is connected to the surface layer circuit layer through a sixteenth channel and a seventeenth channel.

The technical scheme has the advantages that:

1. due to the adoption of the thick film-based multilayer structure, the multilayer wiring substrate is provided, so that wiring of multiple lines is facilitated, meanwhile, the design wiring can be more flexible, and the problems of bridging, crossing and the like of connecting lines can be avoided.

2. Different electronic device modules are correspondingly provided with independent ground layers, and channels for connecting devices are connected with the corresponding ground layers through metallized through holes, so that the channels are in a state similar to cavity isolation, stray signals are shielded, and the electromagnetic compatibility of the whole system is better.

3. Each layer of ceramic substrate adopts silicon nitride ceramic as a preparation material, and the preparation material has the characteristics of high relative dielectric constant, good heat conduction performance and the like, thereby being convenient for meeting the requirements of system miniaturization and high-power heat dissipation.

4. The surface layer adopts a thin film substrate made of silicon nitride ceramics and a surface layer circuit layer in a thin film shape, at least two layers of thick film substrates are arranged below the thin film substrate as thick film sacrificial layers, and in order to make the surfaces of the thick film sacrificial layers flat, the thin film substrates need to be subjected to operations such as thinning, grinding, polishing and the like during processing. By improving the flatness of the surface of the thin film substrate, the bending problem caused by shrinkage or expansion and the like due to uneven heating in the thick film firing process can be eliminated, and meanwhile, the flattened thin film substrate can be well overlapped with the thick film sacrificial layer.

5. In order to improve the processing precision, the surface circuit layer adopts a photoetching technology to carry out fine processing, and the processing precision of the photoetching technology is higher, so that the requirements of miniaturized processing precision after high-density integration can be met, and meanwhile, as the surface circuit layer adopts a thin film technology, the technology can enable the surface circuit to form a smooth and flat metal layer, thereby solving the problems of low thick film processing precision and uneven surface. Meanwhile, the problems of heating, ignition between radio frequency wires, dielectric breakdown and the like caused by high-power signals due to large loss caused by radio frequency signal transmission are solved.

6. And a molybdenum copper layer is added at the bottommost layer and is connected to the metal shell, and the heat dissipation holes are formed, so that the system heat dissipation is facilitated. And each layer of circuit layer is made of tungsten alloy, and the shell is generally made of alloy which is convenient for heat dissipation, so that the thermal expansion coefficients of the shell and each layer of circuit layer are different, the shell and the circuit layer cannot be directly connected, the introduction of the molybdenum copper layer can play a role in heat dissipation, and can be well connected with the shell, and the connecting effect between the system and the shell is improved.

Drawings

In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention will be described in further detail with reference to the accompanying drawings.

Fig. 1 shows a perspective structural view of embodiment 2.

Fig. 2 shows a perspective view of embodiment 2 and a channel connection diagram.

Fig. 3 is a perspective view showing a schematic configuration of a surface layer circuit layer in embodiment 2.

Fig. 4 shows a perspective structural view of the second metal layer in embodiment 2.

Fig. 5 shows a perspective structural view of the fourth metal layer in example 2.

Fig. 6 is a perspective view showing the structure of the fifth metal layer in example 2.

Fig. 7 shows a circuit configuration diagram of the high-power switch in embodiment 1.

Reference numerals illustrate:

a surface layer circuit layer-1, a driver-10, a first radio frequency transmission line-11, a second radio frequency transmission line-12, a third radio frequency transmission line-13, a fourth radio frequency transmission line-14, a first PIN diode-15 a, a second PIN diode-15 b, a third PIN diode-15 c, a first capacitor-16 a, a second capacitor-16 b, a third capacitor-16 c, a fourth capacitor-16 d, a metal layer-3, a first metal layer-30, a second metal layer-31, a third metal layer-32, a fourth metal layer-33, a fifth metal layer-34, a sixth metal layer-35, a first inductor-310, a second inductor-311, a third inductor-312, a fourth inductor-313, a first resistor-330, a second resistor-331, a first driver control circuit-340, a second driver control circuit-341, a ceramic substrate-4, a sacrificial layer-2, a thin film substrate-20, a thick film sacrificial layer-21, a molybdenum copper layer-36, a heat dissipating hole-5, a first via-60, a second via-61, a third via-64, a fourth via-63, a fifth via-62, a sixth via-70, a seventh via-71, an eighth via-72, a ninth via-73, a tenth via-82, a twelfth via-80, a thirteenth via-81, a fourteenth via-90, a fifteenth via-92, a sixteenth via-91, a seventeenth via-93, a first ceramic substrate-40, a second ceramic substrate-41, a third ceramic substrate-42, fourth ceramic substrate-43, fifth ceramic substrate-44.

Detailed Description

Example 1

As shown in fig. 7, the circuit structure diagram of the high-power switch is that the high-power switch includes an input terminal P1, the other end of the input terminal P1 is connected with an inductor L1, and the other end of the inductor L1 is grounded.

The other end of input P1 still is connected with PIN diode D1, and PIN diode D1's negative pole end is connected with PIN diode D3, and PIN diode D3's positive pole end is connected with electric capacity C1, and electric capacity C1's the other end is connected in output P2.

The negative terminal of the PIN diode D1 is also connected with an inductor L2, the other end of the inductor L2 is connected with a resistor R1, and the other end of the resistor R1 is connected with a driver.

The other end of the inductor L2 is also connected with a capacitor C2, the other end of the capacitor C2 is grounded, and the capacitor C2 is positioned between the inductor L2 and the resistor R1.

The positive terminal of the PIN diode D3 is also connected with an inductor L3, the other end of the inductor L3 is grounded, and the inductor L3 is positioned between the PIN diode D3 and the capacitor C1.

The other end of the input end P1 is also connected with a PIN diode D2, the negative electrode end of the PIN diode D2 is connected with a capacitor C4, and the other end of the capacitor C4 is connected with an output end P3.

The negative terminal of the PIN diode D2 is also connected with an inductor L4, the other end of the inductor L4 is connected with a resistor R2, the resistor R2 is connected to the driver, and the inductor L4 is positioned between the capacitor C4 and the PIN diode D2.

The other end of the inductor L4 is also connected with a capacitor C3, the other end of the capacitor C3 is grounded, and the capacitor C3 is positioned between the resistor R2 and the inductor L4.

One end of the driver is grounded.

The high-power signal is input from the input end P1, and the driver is used for controlling the on-off working states of the PIN diode D1, the PIN diode D2 and the PIN diode D3.

For example, when the driver supplies a voltage of-5V, PIN diode D1 and PIN diode D3 are in a conductive state, and inductor L1, inductor L2 and inductor L3 block the high-frequency signal from passing therethrough, so that the signal can only be output from output terminal P2 after being filtered by capacitor C1.

When the driver provides 36V voltage, the PIN diode D2 is conducted, the inductor L1 and the inductor L4 block high-frequency signals from passing, and therefore signals can only be output after being filtered by the capacitor C4 from the lower output end P3.

The capacitor C2 and the resistor R1 are the matching circuits of the driver power supply on the upper side or the side where the output terminal P2 is located.

The capacitor C3 and the resistor R2 are the matching circuits of the driver power circuit on the lower side or the side where the output terminal P3 is located.

Example 2

As shown in fig. 1 to 2, a design method of a high-power switch based on a thick film circuit substrate includes the steps of:

as shown in fig. 3, a surface circuit layer 1 is provided, and a driver 10, a first rf transmission line 11, a second rf transmission line 12, a third rf transmission line 13, a fourth rf transmission line 14, a first PIN diode 15a, a second PIN diode 15b, a third PIN diode 15c, a first capacitor 16a, a second capacitor 16b, a third capacitor 16c, and a fourth capacitor 16d are disposed on the surface circuit layer 1.

A sacrificial layer 2 is provided, as shown in fig. 1, the sacrificial layer 2 is disposed on the lower side of the surface circuit layer 1, and the sacrificial layer 2 is disposed on the upper side of the first metal layer 30. The sacrificial layer 2 comprises a thin film substrate 20, at least one thick film sacrificial layer 21 is arranged on the lower side of the thin film substrate 20, the thin film substrate 20 is arranged on the lower side of the surface layer circuit layer 1, the thick film sacrificial layer 21 is arranged on the upper side of the first metal layer 30, and the thin film substrate 20 is made of silicon nitride ceramics.

As shown in fig. 1, the metal layer 3 is provided in a plurality of layers, and the metal layer 3 includes at least a first metal layer 30, a second metal layer 31, a third metal layer 32, a fourth metal layer 33, a fifth metal layer 34, and a sixth metal layer 35.

As shown in fig. 4, the second metal layer 31 is provided with a first inductor 310, a second inductor 311, a third inductor 312, and a fourth inductor 313.

As shown in fig. 5, the fourth metal layer 33 is provided with a first resistor 330 and a second resistor 331.

As shown in fig. 6, the fifth metal layer 34 is provided with a first driver control circuit 340 and a second driver control circuit 341.

A multilayer ceramic substrate 4 is provided, with one ceramic substrate 4 sandwiched between adjacent two of the metal layers 3. Specifically, as shown in fig. 1, the ceramic substrate 4 includes a first ceramic substrate 40 disposed between a first metal layer 30 and a second metal layer 31. A second ceramic substrate 41 is provided between the second metal layer 31 and the third metal layer 32. A third ceramic substrate 42 is disposed between the third metal layer 32 and the fourth metal layer 33. A fourth ceramic substrate 43 is provided between the fourth metal layer 33 and the fifth metal layer 34.

As shown in fig. 1, a molybdenum-copper layer 36 is provided under the sixth metal layer 35, and a plurality of heat dissipation holes 5 are provided in the surface layer circuit layer 1, and the heat dissipation holes 5 penetrate through the molybdenum-copper layer 36, so that the heat dissipation holes 5 are conducted through metal vias when passing through the ceramic substrates 4 of the respective layers. And when the heat dissipation holes 5 pass through each metal layer 3, the heat dissipation holes are conducted through the through holes. By attaching the molybdenum copper layer 36 to the metal housing and by providing the heat dissipation holes 5 with the aid of heat dissipation, system heat dissipation is facilitated. And, wherein each metal layer is made of tungsten alloy, and the shell is generally made of alloy which is convenient for heat dissipation, so that the thermal expansion coefficients between the shell and each circuit layer are different, and therefore, the shell and the circuit layers cannot be directly connected, and the introduction of the molybdenum copper layer 36 can not only play a role in heat dissipation, but also can be well connected with the shell, so that the connection effect between the system and the shell is improved.

Specifically, it may be implemented by a thin film thick film process, wherein the surface layer circuit layer 1 is formed on the sacrificial layer 2 by a thin film process, the first metal layer 30 is formed on the first ceramic substrate 40 by a thick film process, the second metal layer 31 is formed on the second ceramic substrate 41 by a thick film process, the third metal layer 32 is formed on the third ceramic substrate 42 by a thick film process, the fourth metal layer 33 is formed on the fourth ceramic substrate 43 by a thick film process, the fifth metal layer 34 is formed on the fifth ceramic substrate 44 by a thick film process, and the sixth metal layer 35 is formed on the bottom surface of the fifth ceramic substrate 44 by a thick film process. And then arranging corresponding components on the corresponding layers, overlapping the layers according to the sequence shown in figure 1, and firing to obtain the semiconductor chip.

Referring to fig. 1 to 6, specifically, the driver 10 is connected to the first driver control circuit 340 and the second driver control circuit 341 through the first channel 60 and the second channel 61, respectively. The driver 10 is also connected to the first metal layer 30 by a third via 64. The first driver control circuit 340 and the second driver control circuit 341 are connected to the surface layer circuit layer 1 through the fourth channel 63 and the fifth channel 62, respectively.

Specifically, the first rf transmission line 11 is connected to the first inductor 310 through the sixth channel 70. The second rf transmission line 12 is connected to the third inductor 312 through a seventh via 71. The third rf transmission line 13 is connected to the fourth inductor 313 through an eighth channel 72. The fourth rf transmission line 14 is connected to the second inductor 311 through a ninth channel 73.

Specifically, the first inductor 310 is connected to the third metal layer 32 through the tenth via 82. The third inductor 312 is connected to the third metal layer 32 through an eleventh via. The fourth inductor 313 is connected to the third metal layer 32 through the twelfth via 80. The second inductor 311 is connected to the third metal layer 32 through a thirteenth via 81.

Specifically, the second resistor 331 is connected to the surface layer circuit layer 1 through the fourteenth channel 90 and the fifteenth channel 92. The first resistor 330 is connected to the surface layer circuit layer 1 through the sixteenth channel 91 and the seventeenth channel 93.

The first, second, third, fourth, fifth, sixth, seventh, eighth, ninth, tenth, eleventh, twelfth, thirteenth, fourteenth, fifteenth, sixteenth, and

seventeenth channels

60, 61, 64, 63, 62, 70, 71, 72, 73, 82, 80, 81, 90, 92, 91, and 93 are conducted as vias when passing through the respective metal layers 3, and are conducted through the metal vias when passing through the respective ceramic substrates 4 and the sacrificial layers 2.

Wherein the driver 10 is the driver mentioned in embodiment 1.

The first PIN diode 15a is the PIN diode D1 mentioned in embodiment 1, the second PIN diode 15b is the PIN diode D2 mentioned in embodiment 1, and the third PIN diode 15c is the PIN diode D3 mentioned in embodiment 1.

The first capacitor 16a is the capacitor C1 mentioned in embodiment 1, the second capacitor 16b is the capacitor C2 mentioned in embodiment 1, the third capacitor 16C is the capacitor C3 mentioned in embodiment 1, and the fourth capacitor 16d is the capacitor C4 mentioned in embodiment 1.

The first inductor 310 is the inductor L1 mentioned in embodiment 1, the second inductor 311 is the inductor L2 mentioned in embodiment 1, the third inductor 312 is the inductor L3 mentioned in embodiment 1, and the fourth inductor 313 is the inductor L4 mentioned in embodiment 1.

The first resistor 330 is the resistor R1 mentioned in embodiment 1, and the second resistor 331 is the resistor R2 mentioned in embodiment 1.

Wherein the first metal layer 30 is a ground layer of the driver 10.

The third metal layer 32 is a ground layer of the first inductor 310, the second inductor 311, the third inductor 312 and the fourth inductor 313.

The above description is only of the preferred embodiments of the present invention and is not intended to limit the invention, and it will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit and scope of the invention. Thus, it is intended that the present invention also include such modifications and alterations insofar as they come within the scope of the appended claims or the equivalents thereof.

Claims

1. The design method of the high-power switch based on the thick film circuit substrate is characterized by comprising the following steps of:

providing a surface layer circuit layer (1) on which a driver (10), a first radio frequency transmission line (11), a second radio frequency transmission line (12), a third radio frequency transmission line (13), a fourth radio frequency transmission line (14), a first PIN diode (15 a), a second PIN diode (15 b), a third PIN diode (15 c), a first capacitor (16 a), a second capacitor (16 b), a third capacitor (16 c) and a fourth capacitor (16 d) are arranged;

providing a plurality of metal layers (3), wherein the metal layers (3) at least comprise a first metal layer (30), a second metal layer (31), a third metal layer (32), a fourth metal layer (33), a fifth metal layer (34) and a sixth metal layer (35); a first inductor (310), a second inductor (311), a third inductor (312) and a fourth inductor (313) are arranged on the second metal layer (31); a first resistor (330) and a second resistor (331) are arranged on the fourth metal layer (33);

providing a first driver control circuit (340) and a second driver control circuit (341) on the fifth metal layer (34);

a multilayer ceramic substrate (4) is provided, and one ceramic substrate (4) is sandwiched between two adjacent metal layers (3).

2. The method for designing a high-power switch based on a thick film circuit substrate according to claim 1, further comprising providing a sacrificial layer (2), wherein the sacrificial layer (2) is disposed on the lower side of the surface layer circuit layer (1), and the sacrificial layer (2) is disposed on the upper side of the first metal layer (30).

3. The high-power switch design method based on the thick film circuit substrate according to claim 2, wherein the sacrificial layer (2) comprises a thin film substrate (20), at least one thick film sacrificial layer (21) is arranged on the lower side of the thin film substrate (20), the thin film substrate (20) is arranged on the lower side of the surface layer circuit layer (1), the thick film sacrificial layer (21) is arranged on the upper side of the first metal layer (30), and the thin film substrate (20) is made of silicon nitride ceramics.

4. The method for designing a high-power switch based on a thick-film circuit board according to claim 1, wherein a molybdenum-copper layer (36) is further provided on the lower side of the sixth metal layer (35).

5. The method for designing a high-power switch based on a thick-film circuit board according to claim 4, wherein a plurality of heat dissipation holes (5) are provided in the surface layer circuit layer (1), and the heat dissipation holes (5) penetrate through the molybdenum-copper layer (36).

6. The high-power switch design method based on the thick-film circuit substrate according to claim 1, wherein the driver (10) is connected to the first driver control circuit (340) and the second driver control circuit (341) through the first channel (60) and the second channel (61), respectively;

the driver (10) is also connected to the first metal layer (30) by a third channel (64);

the first driver control circuit (340) and the second driver control circuit (341) are connected to the surface layer circuit layer (1) through a fourth channel (63) and a fifth channel (62), respectively.

7. The high-power switch design method based on the thick-film circuit substrate according to claim 1, wherein the first radio frequency transmission line (11) is connected to the first inductor (310) through the sixth channel (70);

the second radio frequency transmission line (12) is connected to the third inductor (312) through a seventh channel (71);

the third radio frequency transmission line (13) is connected to the fourth inductor (313) through an eighth channel (72);

the fourth radio frequency transmission line (14) is connected to the second inductor (311) through a ninth channel (73).

8. The thick film circuit substrate-based high power switch design method of claim 1, wherein the first inductor (310) is connected to the third metal layer (32) through a tenth via (82);

a third inductor (312) is connected to the third metal layer (32) through an eleventh via;

a fourth inductor (313) is connected to the third metal layer (32) through a twelfth via (80);

the second inductor (311) is connected to the third metal layer (32) through a thirteenth via (81).

9. The high-power switch design method based on the thick-film circuit substrate according to claim 1, wherein the second resistor (331) is connected to the surface layer circuit layer (1) through a fourteenth channel (90) and a fifteenth channel (92);

the first resistor (330) is connected to the surface layer circuit layer (1) through a sixteenth channel (91) and a seventeenth channel (93).

10. The thick-film circuit substrate-based high-power switch design method according to claim 1, wherein the ceramic substrate (4) comprises a first ceramic substrate (40) disposed between a first metal layer (30) and a second metal layer (31);

a second ceramic substrate (41) is arranged between the second metal layer (31) and the third metal layer (32);

a third ceramic substrate (42) is arranged between the third metal layer (32) and the fourth metal layer (33);

a fourth ceramic substrate (43) is arranged between the fourth metal layer (33) and the fifth metal layer (34);

a fifth ceramic substrate (44) is provided between the fifth metal layer (34) and the sixth metal layer (35).