CN116192061B - Transimpedance amplifier chip with temperature sectional compensation characteristic - Google Patents
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Abstract
The invention discloses a transimpedance amplifier chip with temperature subsection compensation characteristic, which relates to the technical field of integrated circuits and comprises a reference module, a TIA signal link module and a subsection compensation temperature coefficient current generation module, wherein the TIA signal link module comprises a transimpedance amplifier module, a single-to-double circuit module, an output buffer module and an automatic gain control module; the segmented compensation temperature coefficient current generation module comprises a segmented compensation current generation module circuit I, a segmented compensation current generation module circuit II and a segmented compensation current generation module circuit III. The two linear positive temperature coefficient currents and the two zero temperature coefficient currents generated by the reference module can be used as bias currents of the TIA signal link module through the segmented compensation temperature coefficient current generation module to obtain three segmented compensation temperature coefficient currents, so that the temperature segmented compensation of the TIA chip is realized, and the small signal alternating current characteristics of the TIA chip in the full temperature range have good performance.
Description
Technical Field
The invention relates to a technology for carrying out temperature segmentation compensation on characteristics such as small signal gain, small signal-3 dB bandwidth and the like of a trans-impedance amplifier (TIA) chip in a full temperature range at a speed of less than 10Gbps, and belongs to the field of integrated circuits.
Background
At the receiving end of the optical communication module, the photodiode (APD or PD) chip is utilized to convert the optical signal which changes at high speed in the optical fiber into the current signal which changes at high speed, and then the transimpedance amplifier (TIA) chip is utilized to amplify and convert the current signal into a voltage signal with a certain amplitude for further amplification by the post Limiting Amplifier (LA) chip. In the application scenarios of Fiber To The Home (FTTH), fiber To The Room (FTTR), data center and base station communication, the TIA chip is generally required to operate at a temperature range of-40 ℃ to 85 ℃. Because the temperature can obviously change the transconductance, cut-off frequency, noise, amplification factor, resistance, capacitance and the like of a transistor in a chip process, the temperature can obviously influence the gain of a small signal (the small signal refers to a signal corresponding to the vicinity of the sensitivity of the TIA, the sensitivity refers to the minimum input signal which can be amplified by a chip or a system), the bandwidth of the small signal-3 dB, noise and the like of the TIA, in the working temperature range, the gain of the TIA at high temperature is generally reduced, the bandwidth of the small signal is reduced, the noise is larger, and therefore the sensitivity of the TIA chip at high temperature is reduced, and the sensitivity of the TIA chip is the most core index of the chip.
TIA chips, typically at rates below 10Gbps, do not typically employ on-chip inductance to implement inductive peaking techniques to extend bandwidth in order to save chip area and cost. As shown in fig. 1 and 2, the reference module can generate a linear positive temperature coefficient current I PT (as in I of FIG. 1) PT01 、I PT11 、I PT12 、I PT13 、I PT21 ) Zero temperature coefficient current I ZT (as in I of FIG. 1) ZT01 、I ZT21 ）。I PT The current increases along with the temperature within the temperature range of-40 ℃ to 85 ℃, and the current value is according to a fixed slope k PT1 Linear increase; i ZT The current increases with the temperature within the temperature range of-40 ℃ to 85 ℃ and the current value is unchanged. In such TIA chip design, a reference module is typically used to generate a linear ptc current I PT The TIA signal link module is used as bias current of a TIA signal link module in a TIA chip, and realizes compensation of small signal alternating current indexes of the TIA chip, namely small signal gain, small signal-3 dB bandwidth and temperature characteristics of noise. If I PT Temperature coefficient (slope) of current) The small signal gain, the small signal-3 dB bandwidth and the noise characteristic of the TIA chip in a low temperature section are ensured to be proper, but the small signal gain, the small signal-3 dB bandwidth and the noise characteristic of the TIA chip in a high temperature section are not enough to compensate; if I PT When the temperature coefficient of the current is too large, the small signal gain, the small signal-3 dB bandwidth and the noise characteristic of the TIA chip at a high temperature section can be ensured to be proper, but the small signal gain, the small signal-3 dB bandwidth and the noise characteristic of the TIA chip at a low temperature section can be insufficient in compensation due to the fact that the current is too small. Thus the linear positive temperature coefficient current I PT The compensation effect of the TIA chip is difficult to simultaneously consider the characteristics of the high and low temperature sections of the TIA chip.
Disclosure of Invention
The present invention is directed to a transimpedance amplifier chip with temperature segment compensation that alleviates the above-described problems.
In order to alleviate the problems, the technical scheme adopted by the invention is as follows:
the invention provides a transimpedance amplifier chip with temperature segmentation compensation characteristics, which comprises a reference module, a TIA signal link module and a segmentation compensation temperature coefficient current generation module, wherein the TIA signal link module comprises a transimpedance amplifier module, a single-conversion double-circuit module, an output buffer module and an automatic gain control module;
the sectional compensation temperature coefficient current generation module comprises a sectional compensation current generation module circuit I, a sectional compensation current generation module circuit II and a sectional compensation current generation module circuit III;
zero temperature coefficient current I generated by reference module ZT01 And linear positive temperature coefficient current I PT01 Used as the input current of the first segment compensation current generation module circuit to enable the first segment compensation current generation module circuit to generate the current I PB02 Current I PB02 At-40 ℃ to T P01 ℃（-40℃＜T P01 The temperature section with the temperature less than 85 ℃ is provided, the current value is unchanged along with the temperature increase, and the temperature is equal to T P01 In a temperature section of between DEG C and 85 ℃, along with the temperature increase, the current value is according to a fixed slope k PB02 Linearly increase, T P01 The temperature is a certain temperature value in a temperature section of minus 40 ℃ to 85 ℃;
current I generated by first segment compensation current generation module circuit PB02 And a linear positive temperature coefficient current I generated by a reference module PT11 The second current is used as the input current of the second sectional compensation current generation module circuit to enable the second sectional compensation current generation module circuit to generate a current I PC11 Sectional compensation of temperature coefficient current I PC12 And segment compensating temperature coefficient current I PC13 The method comprises the steps of carrying out a first treatment on the surface of the Sectional compensation of temperature coefficient current I PC11 、I PC12 、I PC13 At-40 ℃ to T P11 ℃（-40℃＜T P11 The temperature section with the temperature lower than 85 ℃ is provided, and the current value is respectively according to a fixed slope k along with the temperature increase PC11_1 、k PC12_1 、k PC13_1 Linear increase; sectional compensation of temperature coefficient current I PC11 、I PC12 、I PC13 At T P11 In a temperature section of between DEG C and 85 ℃, along with the temperature increase, the current values are respectively according to a fixed slope k PC11_2 、k PC12_2 、k PC13_2 Linear increase; t (T) P11 The temperature is a certain temperature value in a temperature section of minus 40 ℃ to 85 ℃; k (k) PC11_2 ＞k PC11_1 ，k PC12_2 ＞k PC12_1 ，k PC13_2 ＞k PC13_1 ；
Current I generated by second sectional compensation current generation module circuit PC11 Zero temperature coefficient current I generated by a reference module ZT21 Used as the input current of the third segment compensation current generation module circuit to enable the third segment compensation current generation module circuit to generate the segment compensation temperature coefficient current I PE21 The method comprises the steps of carrying out a first treatment on the surface of the Sectional compensation of temperature coefficient current I PE21 At-40 ℃ to T P21 A temperature section at a temperature of T, wherein the current value is unchanged with the increase of the temperature P21 ℃~T P22 ℃（-40℃＜T P21 ℃＜T P22 A temperature section with the temperature lower than 85 ℃ and a current value according to a fixed slope k with the temperature increase PE21_1 Linearly increasing at T P22 In a temperature section of between DEG C and 85 ℃, along with the temperature increase, the current value is according to a fixed slope k PE21_2 Linear increase; t (T) P21 ℃，T P22 The temperature is a certain temperature value in a temperature section of minus 40 ℃ to 85 ℃; k (k) PE21_2 ＞k PE21_1 ；
Sectional compensation of temperature coefficient current I PE21 Bias current used as transimpedance amplifier stage module and temperature coefficient current I is compensated in a segmented manner PC12 Bias current used as single-turn double-circuit module and temperature coefficient current I is compensated in a segmented mode PC13 As a bias current for the output buffer module.
In a preferred embodiment of the present invention, the segment compensation current generation module circuit comprises a transistor M P01 、M P02 、M P03 、M P04 、M P05 、M P06 、M N01 、M N02 、M N03 、M N04 And M N05 Resistance R 01 、R 02 、R 03 And R is 04 ；
Resistor R 01 One end of (2) is used for obtaining zero temperature coefficient current I from a reference module ZT01 Another end connected with transistor M N01 And a transistor M N01 、M N02 And M N03 A gate electrode of (a);
resistor R 02 Is connected to the transistor M P01 Gate and drain of (a), and transistor M P02 And M P03 The other end is connected with the grid electrode of the transistor M N02 A drain electrode of (2);
resistor R 03 For obtaining linear positive temperature coefficient current I from a reference module PT01 Another end connected with transistor M N04 And M N05 Gate of (d), and transistor M N04 And M N03 A drain electrode of (2);
resistor R 04 Is connected to the transistor M P06 Gate and drain of (a), and transistor M P05 And M P04 The other end is connected with the grid electrode of the transistor M N05 A drain electrode of (2);
transistor M N01 、M N02 、M N03 、M N04 And M N05 The sources of the transistors are all grounded;
transistor M P01 、M P02 、M P03 、M P04 、M P05 And M P06 The sources of the two are connected with a power supply end VDD;
transistor M P02 Drain electrode of (a) is connected with transistor M P05 A drain electrode of (2);
transistor M P03 Drain of (d) and transistor M P04 As the common terminal of the drains of the current I PB02 Is provided.
In a preferred embodiment of the present invention, the second segment compensation current generation module circuit includes a transistor M P11 、M P12 、M P13 、M P14 、M P15 、M P16 、M P17 、M P18 、M N11 、M N12 、M N13 And M N14 Resistance R 11 、R 12 、R 13 And R is 14 ；
Resistor R 11 For obtaining linear positive temperature coefficient current I from a reference module PT11 Another end connected with transistor M N11 And a transistor M N11 And M N12 A gate electrode of (a);
resistor R 12 Is connected to the transistor M P11 Gate and drain of (a), and transistor M P12 、M P13 And M P17 The other end is connected with the grid electrode of the transistor M N12 A drain electrode of (2);
resistor R 13 One end of (1) is used for obtaining current I from the first subsection compensation current generation module circuit PB02 Another end connected with transistor M N14 And M N13 Gate of (d), and transistor M N13 A drain electrode of (2);
resistor R 14 Is connected to the transistor M P16 Gate and drain of (a), and transistor M P15 、M P14 And M P18 The other end is connected with the grid electrode of the transistor M N14 A drain electrode of (2);
transistor M N11 、M N12 、M N13 And M N14 The sources of the transistors are all grounded;
transistor M P11 、M P12 、M P13 、M P14 、M P15 、M P16 、M P17 And M P18 The sources of the two are connected with a power supply end VDD;
transistor M P12 Drain and crystal of (2)Body tube M P15 As the common terminal of the drains of the current I PC11 An output terminal of (a);
transistor M P13 Drain of (d) and transistor M P14 As the common terminal of the drains of the current I PC12 An output terminal of (a);
transistor M P17 Drain of (d) and transistor M P18 As the common terminal of the drains of the current I PC13 Is provided.
In a preferred embodiment of the present invention, the segment compensation current generation module circuit three includes a transistor M P21 、M P22 、M P23 、M P24 、M P25 、M P26 、M N21 、M N22 、M N23 、M N24 And M N25 Resistance R 21 、R 22 、R 23 And R is 24 ；
Resistor R 21 One end of (2) is used for obtaining zero temperature coefficient current I from a reference module ZT21 Another end connected with transistor M N21 And a transistor M N21 、M N22 And M N23 A gate electrode of (a);
resistor R 22 Is connected to the transistor M P21 Gate and drain of (a), and transistor M P22 And M P23 The other end is connected with the grid electrode of the transistor M N22 A drain electrode of (2);
resistor R 23 One end of the circuit is used for obtaining the current I from the second subsection compensation current generation module circuit PC11 Another end connected with transistor M N24 And M N23 And a transistor M N24 And M N25 A gate electrode of (a);
resistor R 24 Is connected to the transistor M P26 Gate and drain of (a), and transistor M P25 And M P24 The other end is connected with the grid electrode of the transistor M N25 A drain electrode of (2);
transistor M N21 、M N22 、M N23 、M N24 And M N25 The sources of the transistors are all grounded;
transistor M P21 、M P22 、M P23 、M P24 、M P25 And M P26 The sources of the two are connected with a power supply end VDD;
transistor M P23 Drain electrode of (a) is connected with transistor M P24 A drain electrode of (2);
transistor M P22 Drain of (d) and transistor M P25 As a common terminal of drains of the stage compensation temperature coefficient current I PE21 Is provided.
Compared with the prior art, the invention has the beneficial effects that:
linear positive temperature coefficient current I generated by reference module PT01 、I PT11 And zero temperature coefficient current I ZT01 、I ZT21 The sectional compensation temperature coefficient current I can be obtained through a sectional compensation temperature coefficient current generation module PE21 、I PC12 And I PC13 The bias current used as the TIA signal link module is specifically: IP (Internet protocol) E21 Bias current, IP, used as TIA chip transimpedance amplifier stage C12 Bias current, IP used as TIA chip single-to-double circuit C13 Acting as a buffer bias current for TIA chip output.
The above currents are adopted as bias currents of the TIA signal link module, and are described in detail below.
The gain of the TIA signal link module is mainly achieved by a transimpedance amplifier stage, the bias current IP in fig. 9 E21 At-40 ℃ to T P21 Zero temperature coefficient characteristic of the section at the temperature of minus 40 ℃ to T can be realized P21 The small signal gain, the small signal-3 dB bandwidth and the noise of the temperature section at the temperature of DEG C do not become too bad due to the fact that the bias current is too small; bias current IP in fig. 9 E21 At T P21 ℃~T P22 Positive temperature coefficient of C segment k PE21_1 At T P22 The positive temperature coefficient of the section at the temperature of between DEG C and 85 ℃ is k PE21_2 （k PE21_2 ＞k PE21_1 ) The temperature coefficients are different, so that the sectional compensation of the small signal alternating-current temperature characteristics such as small signal gain, small signal-3 dB bandwidth, noise and the like of the transimpedance amplifier stage can be realized; i.e. at T P22 A bias current IP at a temperature of 85 DEG C E21 Temperature coefficient k of (2) PE21_2 Larger, fromAnd in this temperature section, IP E21 The temperature compensation of the transimpedance amplifier stage is more severe, so that the small-signal alternating-current temperature characteristic of the transimpedance amplifier stage in the temperature section is better compensated, and the small-signal alternating-current temperature characteristic of the transimpedance amplifier stage in the whole temperature section reaches the optimal state.
Single-turn double-circuit and output buffer of TIA signal link module, its bias current is respectively represented by current IP in FIG. 6 C12 And IP C13 The composition is formed. IP (Internet protocol) C12 At-40 ℃ to T P11 Positive temperature coefficient of C segment k PC12_1 At T P11 Positive temperature coefficients of sections at the temperature of between DEG C and 85 ℃ are k respectively PC12_2 （k PC12_2 ＞k PC12_1 ) I.e. all have positive temperature coefficient characteristics and the temperature coefficients are different, i.e. at T P11 A temperature section of between DEG C and 85 ℃, and a bias current IP C12 Temperature coefficient k of (2) PC12_2 Larger, so that in this temperature range, IP C12 The temperature compensation of the single-turn double circuit is more severe, so that the small signal alternating current temperature characteristic of the single-turn double circuit in the temperature section is better compensated, and the small signal alternating current temperature characteristic of the single-turn double circuit in the whole temperature section is in an optimal state. IP (Internet protocol) C13 At-40 ℃ to T P11 Positive temperature coefficients of the DEG C sections are k respectively PC13_1 At T P11 Positive temperature coefficients of sections at the temperature of between DEG C and 85 ℃ are k respectively PC13_2 （k PC13_2 ＞k PC13_1 ) I.e. all have positive temperature coefficient characteristics and the temperature coefficients are different, i.e. at T P11 A temperature section of between DEG C and 85 ℃, and a bias current IP C13 Temperature coefficient k of (2) PC13_2 Larger, so that in this temperature range, IP C13 The temperature compensation of the output buffer is more severe, so that the small signal alternating current temperature characteristic of the output buffer in the temperature section is better compensated, and the small signal alternating current temperature characteristic of the output buffer in the whole temperature section reaches the optimal state.
Namely, each stage of circuit of the TIA signal link module flexibly adopts sectional compensation temperature coefficient current with different characteristics to form bias current according to design requirements, and small signal gain, small signal-3 dB bandwidth and noise of the TIA low-temperature section and the high-temperature section can be well considered, so that the variation of the small signal gain, the small signal-3 dB bandwidth and the noise of the TIA is little influenced by temperature, and the sensitivity characteristic difference of the TIA in the high-temperature section and the low-temperature section is small. Meanwhile, the difference of the high-low temperature gains of TIAs is very small, and the change of the Signal Detection (SD) threshold value of a rear-stage Limiting Amplifier (LA) chip along with the temperature is also very small.
In a word, by adopting the method, the small signal alternating current characteristics of the TIA chip, such as small signal gain, small signal-3 dB bandwidth, noise and the like, in the full temperature range are well compensated, so that the small signal alternating current characteristics of the TIA chip in the full temperature range have good performance, and the sensitivity of the TIA chip in the full temperature range is good and the change is small. In the system, the TIA is located at a front stage of the optical module receiving system, so the sensitivity of the TIA chip determines the receiving sensitivity of the system. Therefore, when the TIA chip is applied to a system, the receiving sensitivity of the system can be guaranteed to be better in the full temperature range, and the change is smaller, so that the system can reach the optimal state in the full temperature range. In order to make the above objects, features and advantages of the present invention more comprehensible, embodiments accompanied with figures are described in detail below.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings that are needed in the embodiments will be briefly described below, it being understood that the following drawings only illustrate some embodiments of the present invention and therefore should not be considered as limiting the scope, and other related drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of a prior art linear positive temperature coefficient current I PT Compensated TIA circuit diagram;
FIG. 2 is a linear positive temperature coefficient current I generated by a reference module of the prior art PT And zero temperature coefficient current I ZT Schematic diagram of temperature dependence, wherein I PT21 、I PT12 、I PT13 Three linear positive temperature coefficient currents for use in fig. 1;
FIG. 3 is a circuit diagram of a TIA with temperature segmentation compensation feature of the present invention;
FIG. 4 is a schematic diagram of a first segment compensation current generation module circuit of the present invention;
FIG. 5 is a graph showing a corresponding current versus temperature for a segmented compensation current generation module circuit of the present invention;
FIG. 6 is a schematic diagram of a second segmented compensation current generation module circuit of the present invention;
FIG. 7 is a graph showing the current of the second segment compensation current generation module circuit according to the present invention, wherein for comparison, two linear positive temperature coefficient currents I used in FIGS. 1 and 2 are also provided in FIG. 7 PT12 、I PT13 ；
FIG. 8 is a segmented compensation current generation module circuit III of the present invention;
FIG. 9 is a graph of the current versus temperature for a segment compensation current generation module circuit according to the present invention, for comparison purposes, a linear positive temperature coefficient current I used in FIGS. 1 and 2 is also provided in FIG. 9 PT21 ；
FIG. 10 is a graph showing the gain and bandwidth characteristics of the conventional TIA chip of FIG. 1 as a function of temperature;
fig. 11 is a graph showing the gain and bandwidth characteristics of the TIA chip of the present invention shown in fig. 3 as a function of temperature.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present invention more apparent, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is apparent that the described embodiments are some embodiments of the present invention, but not all embodiments of the present invention.
As shown in fig. 3, the invention discloses a transimpedance amplifier chip with temperature segmentation compensation characteristic, which comprises a reference module, a TIA signal link module and a segmentation compensation temperature coefficient current generation module, wherein the TIA signal link module comprises a transimpedance amplifier module, a single-turn double-circuit module, an output buffer module and an automatic gain control module; the sectional compensation temperature coefficient current generation module comprises a sectional compensation current generation module circuit I, a sectional compensation current generation module circuit II and a sectional compensation current generation moduleA third block circuit; zero temperature coefficient current I generated by reference module ZT01 And linear positive temperature coefficient current I PT01 Used as the input current of the first segment compensation current generation module circuit to enable the first segment compensation current generation module circuit to generate the current I PB02 The method comprises the steps of carrying out a first treatment on the surface of the Current I generated by first segment compensation current generation module circuit PB02 And a linear positive temperature coefficient current I generated by a reference module PT11 The second current is used as the input current of the second sectional compensation current generation module circuit to enable the second sectional compensation current generation module circuit to generate a current I PC11 Sectional compensation of temperature coefficient current I PC12 And segment compensating temperature coefficient current I PC13 The method comprises the steps of carrying out a first treatment on the surface of the Current I generated by second sectional compensation current generation module circuit PC11 Zero temperature coefficient current I generated by a reference module ZT21 Used as the input current of the third segment compensation current generation module circuit to enable the third segment compensation current generation module circuit to generate the segment compensation temperature coefficient current I PE21 The method comprises the steps of carrying out a first treatment on the surface of the Sectional compensation of temperature coefficient current I PE21 Bias current used as transimpedance amplifier stage module and temperature coefficient current I is compensated in a segmented manner PC12 Bias current used as single-turn double-circuit module and temperature coefficient current I is compensated in a segmented mode PC13 As a bias current for the output buffer module.
The temperature sectional compensation principle of the transimpedance amplifier chip according to the present invention will be described below, wherein T P01 、T P11 、T P21 、T P22 All represent a certain temperature value within the range of-40 ℃ to 85 ℃.
As shown in fig. 4, the segment compensation current generation module circuit one includes a transistor M P01 、M P02 、M P03 、M P04 、M P05 、M P06 、M N01 、M N02 、M N03 、M N04 And M N05 Resistance R 01 、R 02 、R 03 And R is 04 。
Fig. 5 is a temperature characteristic curve corresponding to different currents in the first segment compensation current generation module circuit. In fig. 4 and 5, the current I ZT01 And I PT01 Provided by a reference module and serving as segment compensationThe input current of the first current generation module circuit. I ZT01 Is a transistor M N01 Direct current operating current of I ZT02 Is a transistor M N02 、M P01 Direct current operating current of I ZT03 Is a transistor M P02 Direct current operating current of I ZT04 Is a transistor M P03 Direct current operating current of I PT01 Is a transistor M N03 And M N04 I is the sum of the direct current working currents of (1) PA01 Is a transistor M N04 Direct current operating current of I PA02 Is a transistor M N05 、M P06 Direct current operating current of I PA03 Is a transistor M P05 Direct current operating current of I PB01 Is I ZT03 And I PA03 Total current obtained by fusion and addition (output current as first segment compensation current generation module circuit), I PB02 Is I ZT04 And I PA04 The total current obtained by the fusion addition (as the output current of the first segment compensation current generation module circuit).
Current I PT01 In the temperature range of-40 ℃ to 85 ℃, along with the temperature increase, the current value is according to a fixed slope k PT1 Linear increase; current I ZT01 In the temperature range of-40 ℃ to 85 ℃, the current value is unchanged along with the temperature increase; current I PB02 At-40 ℃ to T P01 A temperature section at a temperature of T, wherein the current value is unchanged with the increase of the temperature P01 In a temperature section of between DEG C and 85 ℃, along with the temperature increase, the current value is according to a fixed slope k PB02 Linearly increasing.
Let M N01 And M is as follows N03 The ratio of the total width to the length (W/L) is 1: m is m 01 (m 01 >0, e.g. 0.4, 1, 1.5, 2.7, 5, 10, etc., the other current mirror ratios are the same, i.e. M N01 And M is as follows N03 The mirror ratio of the current is 1: m is m 01 ：
At-40 ℃ to T P01 DEG C temperature section (containing T P01 Point c), I PT01 ≤m 01 *I ZT01 Then I PA01 =0；
At T P01 A temperature range of from about 85deg.C (excluding T) P01 Point c) of the metal oxide film,I PT01 ＞m 01 *I ZT01 then I PA01 = I PT01 - m 01 *I ZT01 。
Let M N01 、M N02 、M P01 、M P02 The total mirror ratio of the currents is 1: a, a 01 ；M N04 、M N05 、M P06 、M P05 The total mirror ratio of the currents is 1: b 01 . Then I PB01 = I ZT03 + I PA03 =a 01 *I ZT01 + b 01 *I PA01 。
Similarly, assume M N01 、M N02 、M P01 、M P03 The total mirror ratio of the currents is 1: a, a 02 ；M N04 、M N05 、M P06 、M P04 The total mirror ratio of the currents is 1: b 02 . Then I PB02 = I ZT04 + I PA04 = a 02 *I ZT01 + b 02 *I PA01 。
As shown in fig. 5, the mirror scaling factor a is adjusted according to circuit design requirements 01 、b 01 、a 02 、b 02 Obtaining the product at the temperature of-40 to T P01 Different current values in the temperature range of DEG C and T P01 Different temperature coefficients (slopes) of the current in the temperature range of from DEG C to 85 ℃.
Adjusting I according to circuit design requirements PT01 And m is equal to 01 *I ZT01 The relative magnitude between them (e.g. adjusting the mirror-image scaling factor m 01 ) I.e. can adjust I PT01 And m is equal to 01 *I ZT01 Intersection position T P01 。
Resistor R in FIG. 4 01 ~R 04 Is an optional device. For example, if the resistor is not added (the resistor positions are connected by wires), the transistor M N01 ~M N05 、M P01 ~M P06 The operating voltage of (2) exceeds the allowable operating voltage range, then the resistor R 01 ~R 04 Must be added; otherwise resistance R 01 ~R 04 May not be added.
As shown in FIG. 6The second subsection compensation current generation module circuit comprises a transistor M P11 、M P12 、M P13 、M P14 、M P15 、M P16 、M P17 、M P18 、M N11 、M N12 、M N13 And M N14 Resistance R 11 、R 12 、R 13 And R is 14 。
Fig. 7 is a temperature characteristic curve corresponding to different currents in the second segmented compensation current generation module circuit. For comparison, two linear positive temperature coefficient currents I used in FIGS. 1 and 2 are also placed in FIG. 7 PT12 、I PT13 。
In fig. 6 and 7, the current I PT11 Provided by a reference module, I PB02 Provided by the circuit shown in FIG. 4, I PT11 And I PB02 As an input current to the second segment compensation current generation module circuit. I PT11 Is a transistor M N11 Direct current operating current of I PT12 Is a transistor M N12 、M P11 Direct current operating current of I PT13 Is a transistor M P12 Direct current operating current of I PT14 Is a transistor M P13 Direct current operating current of I PT15 Is a transistor M P17 Direct current operating current of I PB02 Is a transistor M N13 Direct current operating current of I PB11 Is a transistor M N14 、M P16 Direct current operating current of I PB13 Is a transistor M P15 Direct current operating current of I PB14 Is a transistor M P14 Direct current operating current of I PB15 Is a transistor M P18 Direct current operating current of I PC11 Is I PT13 And I PB13 Total current obtained by fusion and addition (as output current of second segment compensation current generation module circuit), I PC12 Is I PT14 And I PB14 Total current obtained by fusion and addition (as output current of second segment compensation current generation module circuit), I PC13 Is I PT15 And I PB15 The total current obtained by the fusion addition (as the output current of the second segment compensation current generation module circuit).
Current I PT11 In the temperature range of-40 ℃ to 85 ℃, along with the temperature increase, the current value is according to a fixed slope k PT1 Linear increase; current I PC11 、I PC12 、I PC13 At-40 ℃ to T P11 In the temperature section at the temperature, along with the temperature increase, the current values are respectively according to a fixed slope k PC11_1 、k PC12_1 、k PC13_1 Linearly increasing at T P11 In a temperature section of between DEG C and 85 ℃, along with the temperature increase, the current values are respectively according to a fixed slope k PC11_2 、k PC12_2 、k PC13_2 Linearly increasing.
Let M N11 、M N12 、M P11 、M P12 The total mirror ratio of the currents is 1: a, a 11 ；M N13 、M N14 、M P16 、M P15 The total mirror ratio of the currents is 1: b 11 . Then I PC11 = I PT13 + I PB13 =a 11 *I PT11 + b 11 *I PB02 。
Similarly, M N11 、M N12 、M P11 、M P13 The total mirror ratio of the currents is 1: a, a 12 ；M N13 、M N14 、M P16 、M P14 The total mirror ratio of the currents is 1: b 12 . Then I PC12 = I PT14 + I PB14 =a 12 *I PT11 + b 12 *I PB02 。
Similarly, M N11 、M N12 、M P11 、M P17 The total mirror ratio of the currents is 1: a, a 13 ；M N13 、M N14 、M P16 、M P18 The total mirror ratio of the currents is 1: b 13 . Then I PC13 = I PT15 + I PB15 =a 13 *I PT11 + b 13 *I PB02 。
As shown in fig. 7, the mirror scaling factor a is adjusted according to circuit design requirements 11 、b 11 、a 12 、b 12 、a 13 、b 13 Thus obtaining the product at-40 to T P11 Temperature section at a temperature of no currentThe same temperature coefficient (slope); t is as follows P11 Temperature range from deg.C to 85 deg.C, and different temperature coefficients (slopes) of the current.
Resistor R in FIG. 6 11 ~R 14 Is an optional device. For example, if the resistor is not added (the resistor positions are connected by wires), the transistor M N11 ~M N14 、M P11 ~M P18 The operating voltage of (2) exceeds the allowable operating voltage range, then the resistor R 11 ~R 14 Must be added; otherwise resistance R 11 ~R 14 May not be added.
As shown in fig. 8, the segment compensation current generation module circuit three includes a transistor M P21 、M P22 、M P23 、M P24 、M P25 、M P26 、M N21 、M N22 、M N23 、M N24 And M N25 Resistance R 21 、R 22 、R 23 And R is 24 。
Fig. 9 is a temperature characteristic curve corresponding to different currents in the third segmented compensation current generation module circuit. For comparison, a linear positive temperature coefficient current I used in FIGS. 1 and 2 is also provided in FIG. 9 PT21 。
In fig. 8 and 9, the current I ZT21 Provided by a reference module, I PC11 Provided by the circuit shown in FIG. 6, I ZT21 And I PC11 As the input current to the segment compensation current generation module circuit three. I ZT21 Is a transistor M N21 Direct current operating current of I ZT22 Is a transistor M N22 、M P21 Direct current operating current of I ZT23 Is a transistor M P22 Direct current operating current of I ZT24 Is a transistor M P23 Direct current operating current of I PC11 Is a transistor M N23 And M N24 I is the sum of the direct current working currents of (1) PD21 Is a transistor M N24 Direct current operating current of I PD22 Is a transistor M N25 、M P26 Direct current operating current of I PD23 Is a transistor M P25 Direct current operating current of I PD24 Is a transistor M P24 Is of (2)Flow of operating current, I PE21 Is I ZT23 And I PD23 Total current obtained by fusion and addition (as output current of a third segment compensation current generation module circuit), I PE22 Is I ZT24 And I PD24 The total current obtained by the fusion addition (as the output current of the segment compensation current generation module circuit three).
Current I ZT21 In the temperature range of-40 ℃ to 85 ℃, the current value is unchanged along with the temperature increase; current I PE21 At-40 ℃ to T P21 A temperature section at a temperature of T, wherein the current value is unchanged with the increase of the temperature P21 ℃~T P22 In the temperature section at the temperature, along with the temperature increase, the current values are respectively according to a fixed slope k PE21_1 Linearly increasing at T P22 In a temperature section of between DEG C and 85 ℃, along with the temperature increase, the current value is according to a fixed slope k PE21_2 Linearly increasing.
Let M N21 And M is as follows N23 The ratio of the total width to the length (W/L) is 1: m is m 21 (m 21 >0) I.e. M N21 And M is as follows N23 The mirror ratio of the current is 1: m is m 21 ：
At-40 ℃ to T P21 DEG C temperature section (containing T P21 Point c), I PC11 ≤m 21 *I ZT21 Then I PD21 =0；
At T P21 A temperature range of from about 85deg.C (excluding T) P21 Point c), I PC11 ＞m 21 *I ZT21 Then I PD21 = I PC11 - m 21 *I ZT21 。
Let M N21 、M N22 、M P21 、M P22 The total mirror ratio of the currents is 1: a, a 21 ；M N24 、M N25 、M P26 、M P25 The total mirror ratio of the currents is 1: b 21 . Then I PE21 = I ZT23 + I PD23 =a 21 *I ZT21 + b 21 *I PD21 。
Similarly, assume M N21 、M N22 、M P21 、M P23 Total mirror ratio of current betweenExample 1: a, a 22 ；M N24 、M N25 、M P26 、M P24 The total mirror ratio of the currents is 1: b 22 . Then I PE22 = I ZT24 + I PD24 = a 22 *I ZT21 + b 22 *I PD21 。
As shown in fig. 9, the mirror scaling factor a is adjusted according to circuit design requirements 21 、b 21 、a 22 、b 22 Obtaining the product at the temperature of-40 to T P01 Different current values in the temperature range of DEG C and T P21 ℃~ T P22 ℃、T P22 Different temperature coefficients (slopes) of the current in the temperature range of from DEG C to 85 ℃.
Adjusting I according to circuit design requirements PC11 And m is equal to 21 *I ZT21 The relative magnitude between them (e.g. adjusting the mirror-image scaling factor m 21 ) I.e. can adjust I PC11 And m is equal to 21 *I ZT21 Intersection position T P21 。
Resistor R in FIG. 8 21 ~R 24 Is an optional device. For example, if the resistor is not added (the resistor positions are connected by wires), the transistor M N21 ~M N25 、M P21 ~M P26 The operating voltage of (2) exceeds the allowable operating voltage range, then the resistor R 21 ~R 24 Must be added; otherwise resistance R 21 ~R 24 May not be added.
The TIA chip provided by the invention is a TIA chip with the speed lower than 10Gbps, and in order to save the chip area and the cost, the TIA chip with the speed lower than 10Gbps does not adopt an on-chip inductor to realize an inductance peaking technology to expand the bandwidth.
Fig. 10 and 11 are schematic diagrams of ac waveforms of TIA chips without using inductive peaking technique, which take into account the effect of package bonding line inductance when the chip is applied. According to the display habit of the conventional gain bandwidth curve, the horizontal axis is logarithmic coordinate, and the vertical axis is linear coordinate.
Fig. 10 is a graph showing gain and bandwidth characteristics over temperature for the TIA chip of fig. 1 over the full temperature range. The TIA signal link module of the TIA chip adoptsLinear positive temperature coefficient current I PT The compensation is carried out, and the small signal gain, the small signal-3 dB bandwidth and the noise of the low-temperature section and the high-temperature section are difficult to be simultaneously considered, so that the small signal gain, the small signal-3 dB bandwidth and the noise are greatly influenced by temperature, and the sensitivity characteristics of TIAs in the high-temperature section and the low-temperature section are obviously different. Meanwhile, the difference between high and low temperature gains is large, and the change of a Signal Detection (SD) threshold value of a rear-stage Limiting Amplifier (LA) chip along with temperature is large.
The TIA chip shown in fig. 3, wherein each stage of circuit of the TIA signal link module flexibly adopts different characteristic piecewise compensation temperature coefficient current to form the bias current according to design requirements. The method comprises the following steps: IP (Internet protocol) E21 Bias current, IP, used as TIA chip transimpedance amplifier stage C12 Bias current, IP used as TIA chip single-to-double circuit C13 Acting as a buffer bias current for TIA chip output.
The above currents are adopted as bias currents of the TIA signal link module, and are described in detail below. The gain of the TIA signal link module is mainly achieved by a transimpedance amplifier stage, current IP in fig. 9 E21 At-40 ℃ to T P21 Zero temperature coefficient characteristic of the section at the temperature of minus 40 ℃ to T can be realized P21 The small signal gain, the small signal-3 dB bandwidth and the noise of the temperature section at the temperature of DEG C do not become too bad due to the fact that the bias current is too small; current IP in fig. 9 E21 At T P21 ℃~T P22 ℃、T P22 The positive temperature coefficient characteristics of the sections at the temperature of between DEG C and 85 ℃ are different in temperature coefficient, and the sectional compensation of the small signal alternating current temperature characteristics of the transimpedance amplifier stage, such as small signal gain, small signal-3 dB bandwidth, noise and the like, to the optimal state can be realized. Single-turn double-circuit and output buffer of TIA signal link module, its bias current is respectively represented by current IP in FIG. 6 C12 And IP C13 The composition is formed. At-40 ℃ to T P11 ℃、T P11 The positive temperature coefficient characteristic of the section at the temperature of between DEG C and 85 ℃ and the temperature coefficient is different, so that the compensation of the small signal alternating current temperature characteristic of the single-turn double circuit and the output buffer can be realized to reach the optimal state.
Fig. 11 is a schematic diagram of a variation curve of gain and bandwidth characteristics with temperature in the full temperature range of the TIA chip shown in fig. 3, which can better give consideration to small signal gain, small signal-3 dB bandwidth and noise in the low temperature section and the high temperature section, so that the variation of the small signal gain, the small signal-3 dB bandwidth and the noise is little affected by temperature, and the sensitivity characteristics of the TIA in the high temperature section and the low temperature section are small. Meanwhile, the difference of the high-low temperature gain is very small, and the change of the Signal Detection (SD) threshold value of a rear-stage Limiting Amplifier (LA) chip along with the temperature is also very small.
The above description is only of the preferred embodiments of the present invention and is not intended to limit the present invention, but various modifications and variations can be made to the present invention by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (7)
1. The transimpedance amplifier chip with the temperature segmentation compensation characteristic comprises a reference module and a TIA signal link module, wherein the TIA signal link module comprises a transimpedance amplifier module, a single-conversion double-circuit module, an output buffer module and an automatic gain control module, and is characterized by further comprising a segmentation compensation temperature coefficient current generation module;
the sectional compensation temperature coefficient current generation module comprises a sectional compensation current generation module circuit I, a sectional compensation current generation module circuit II and a sectional compensation current generation module circuit III;
zero temperature coefficient current I generated by reference module ZT01 And linear positive temperature coefficient current I PT01 Used as the input current of the first segment compensation current generation module circuit to enable the first segment compensation current generation module circuit to generate the current I PB02 Current I PB02 At-40 ℃ to T P01 A temperature section at a temperature of T, wherein the current value is unchanged with the increase of the temperature P01 In a temperature section of between DEG C and 85 ℃, along with the temperature increase, the current value is according to a fixed slope k PB02 Linearly increase, T P01 The temperature is a certain temperature value in a temperature section of minus 40 ℃ to 85 ℃;
current I generated by first segment compensation current generation module circuit PB02 And a reference moduleLinear positive temperature coefficient current I PT11 The second current is used as the input current of the second sectional compensation current generation module circuit to enable the second sectional compensation current generation module circuit to generate a current I PC11 Sectional compensation of temperature coefficient current I PC12 And segment compensating temperature coefficient current I PC13 The method comprises the steps of carrying out a first treatment on the surface of the Sectional compensation of temperature coefficient current I PC11 、I PC12 、I PC13 At-40 ℃ to T P11 In the temperature section at the temperature, along with the temperature increase, the current values are respectively according to a fixed slope k PC11_1 、k PC12_1 、k PC13_1 Linear increase; sectional compensation of temperature coefficient current I PC11 、I PC12 、I PC13 At T P11 In a temperature section of between DEG C and 85 ℃, along with the temperature increase, the current values are respectively according to a fixed slope k PC11_2 、k PC12_2 、k PC13_2 Linear increase; t (T) P11 The temperature is a certain temperature value in a temperature section of minus 40 ℃ to 85 ℃; k (k) PC11_2 ＞k PC11_1 ，k PC12_2 ＞k PC12_1 ，k PC13_2 ＞k PC13_1 ；
Current I generated by second sectional compensation current generation module circuit PC11 Zero temperature coefficient current I generated by a reference module ZT21 Used as the input current of the third segment compensation current generation module circuit to enable the third segment compensation current generation module circuit to generate the segment compensation temperature coefficient current I PE21 The method comprises the steps of carrying out a first treatment on the surface of the Sectional compensation of temperature coefficient current I PE21 At-40 ℃ to T P21 A temperature section at a temperature of T, wherein the current value is unchanged with the increase of the temperature P21 ℃~T P22 In the temperature section at the temperature, the current value is according to a fixed slope k with the increase of the temperature PE21_1 Linearly increasing at T P22 In a temperature section of between DEG C and 85 ℃, along with the temperature increase, the current value is according to a fixed slope k PE21_2 Linear increase; t (T) P21 ℃，T P22 The temperature is a certain temperature value in a temperature section of minus 40 ℃ to 85 ℃; t (T) P21 ℃＜T P22 ℃，k PE21_2 ＞k PE21_1 ；
Sectional compensation of temperature coefficient current I PE21 Bias current used as transimpedance amplifier stage module and temperature coefficient current I is compensated in a segmented manner PC12 As a single turnBias current of dual circuit module, sectionally compensating temperature coefficient current I PC13 As a bias current for the output buffer module.
2. The transimpedance amplifier chip with temperature segment compensation according to claim 1, wherein the segment compensation current generation module circuit comprises a transistor M P01 、M P02 、M P03 、M P04 、M P05 、M P06 、M N01 、M N02 、M N03 、M N04 And M N05 Resistance R 01 、R 02 、R 03 And R is 04 ；
Resistor R 01 One end of (2) is used for obtaining zero temperature coefficient current I from a reference module ZT01 Another end connected with transistor M N01 And a transistor M N01 、M N02 And M N03 A gate electrode of (a);
resistor R 02 Is connected to the transistor M P01 Gate and drain of (a), and transistor M P02 And M P03 The other end is connected with the grid electrode of the transistor M N02 A drain electrode of (2);
resistor R 03 For obtaining linear positive temperature coefficient current I from a reference module PT01 Another end connected with transistor M N04 And M N05 Gate of (d), and transistor M N04 And M N03 A drain electrode of (2);
resistor R 04 Is connected to the transistor M P06 Gate and drain of (a), and transistor M P05 And M P04 The other end is connected with the grid electrode of the transistor M N05 A drain electrode of (2);
transistor M N01 、M N02 、M N03 、M N04 And M N05 The sources of the transistors are all grounded;
transistor M P01 、M P02 、M P03 、M P04 、M P05 And M P06 The sources of the two are connected with a power supply end VDD;
transistor M P02 Drain electrode of (a) is connected with transistor M P05 A drain electrode of (2);
transistor M P03 Drain of (d) and transistor M P04 As the common terminal of the drains of the current I PB02 Is provided.
3. The transimpedance amplifier chip with temperature piecewise compensation characteristic of claim 2, wherein if resistor R is removed 01 、R 02 、R 03 And R is 04 When the operating voltage of the transistor does not exceed the allowable operating voltage range, the resistor R is removed 01 、R 02 、R 03 And R is 04 Otherwise, the resistance R is reserved 01 、R 02 、R 03 And R is 04 。
4. The transimpedance amplifier chip with temperature segment compensation according to claim 1, wherein the segment compensation current generation module circuit II comprises a transistor M P11 、M P12 、M P13 、M P14 、M P15 、M P16 、M P17 、M P18 、M N11 、M N12 、M N13 And M N14 Resistance R 11 、R 12 、R 13 And R is 14 ；
Resistor R 11 For obtaining linear positive temperature coefficient current I from a reference module PT11 Another end connected with transistor M N11 And a transistor M N11 And M N12 A gate electrode of (a);
resistor R 12 Is connected to the transistor M P11 Gate and drain of (a), and transistor M P12 、M P13 And M P17 The other end is connected with the grid electrode of the transistor M N12 A drain electrode of (2);
resistor R 13 One end of (1) is used for obtaining current I from the first subsection compensation current generation module circuit PB02 Another end connected with transistor M N14 And M N13 Gate of (d), and transistor M N13 A drain electrode of (2);
resistor R 14 Is connected to the transistor M P16 Gate and drain of (a), and transistor M P15 、M P14 And M P18 The other end is connected with the grid electrode of the transistor M N14 A drain electrode of (2);
transistor M N11 、M N12 、M N13 And M N14 The sources of the transistors are all grounded;
transistor M P11 、M P12 、M P13 、M P14 、M P15 、M P16 、M P17 And M P18 The sources of the two are connected with a power supply end VDD;
transistor M P12 Drain of (d) and transistor M P15 As the common terminal of the drains of the current I PC11 An output terminal of (a);
transistor M P13 Drain of (d) and transistor M P14 As the common terminal of the drains of the current I PC12 An output terminal of (a);
transistor M P17 Drain of (d) and transistor M P18 As the common terminal of the drains of the current I PC13 Is provided.
5. The transimpedance amplifier chip with temperature piecewise compensation according to claim 4, wherein if resistor R is removed 11 、R 12 、R 13 And R is 14 When the operating voltage of the transistor does not exceed the allowable operating voltage range, the resistor R is removed 11 、R 12 、R 13 And R is 14 Otherwise, the resistance R is reserved 11 、R 12 、R 13 And R is 14 。
6. The transimpedance amplifier chip with temperature segment compensation according to claim 1, wherein the segment compensation current generation module circuit three comprises a transistor M P21 、M P22 、M P23 、M P24 、M P25 、M P26 、M N21 、M N22 、M N23 、M N24 And M N25 Resistance R 21 、R 22 、R 23 And R is 24 ；
Resistor R 21 Is used for acquiring zero temperature coefficient electricity from a reference moduleStream I ZT21 Another end connected with transistor M N21 And a transistor M N21 、M N22 And M N23 A gate electrode of (a);
resistor R 22 Is connected to the transistor M P21 Gate and drain of (a), and transistor M P22 And M P23 The other end is connected with the grid electrode of the transistor M N22 A drain electrode of (2);
resistor R 23 One end of the circuit is used for obtaining the current I from the second subsection compensation current generation module circuit PC11 Another end connected with transistor M N24 And M N23 And a transistor M N24 And M N25 A gate electrode of (a);
resistor R 24 Is connected to the transistor M P26 Gate and drain of (a), and transistor M P25 And M P24 The other end is connected with the grid electrode of the transistor M N25 A drain electrode of (2);
transistor M N21 、M N22 、M N23 、M N24 And M N25 The sources of the transistors are all grounded;
transistor M P21 、M P22 、M P23 、M P24 、M P25 And M P26 The sources of the two are connected with a power supply end VDD;
transistor M P23 Drain electrode of (a) is connected with transistor M P24 A drain electrode of (2);
transistor M P22 Drain of (d) and transistor M P25 As a common terminal of drains of the stage compensation temperature coefficient current I PE21 Is provided.
7. The transimpedance amplifier chip with temperature piecewise compensation according to claim 6, wherein if resistor R is removed 21 、R 22 、R 23 And R is 24 When the operating voltage of the transistor does not exceed the allowable operating voltage range, the resistor R is removed 21 、R 22 、R 23 And R is 24 Otherwise, the resistance R is reserved 21 、R 22 、R 23 And R is 24 。
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