CN116183208A - Valve opening and closing time testing method and device - Google Patents

Abstract

The invention discloses a valve opening and closing time testing method and a device, wherein the method comprises the following steps: detecting a start signal, the start signal being generated by an external control system; starting timing by a timing module when the starting signal is detected; detecting the valve core position signal, and controlling the timing module to stop timing when the valve core position signal is detected; and according to the time interval from starting to stopping of the timing module, taking the time interval as the opening time or the closing time of the valve. According to the invention, the timing is started when the starting signal is detected, so that the delay of the mechanical action of the valve or the timing error caused by the delay of the sensor can be eliminated, and the timing is more accurate; in addition, the invention can be adapted to a plurality of different forms of starting signals and has universality.

Description

Valve opening and closing time testing method and device

Technical Field

The invention relates to the technical field of valve testing, in particular to a valve opening and closing time testing method and device.

Background

The existing valve opening and closing time testing device is basically built aiming at a specific valve scene, the device can only receive signals of a certain fixed sensor to time, for example, the opening and closing time of a valve without a corresponding sensor can not be detected by switching value signals given by a photoelectric probe, a pressure sensor or an electromagnetic valve. The laser displacement sensor has universality for all straight-travel valves, but cannot be used for valves with rotary travel such as angle-travel valves, although the laser displacement sensor is out of signal limitation. There may be many valve configurations for a complex industrial site, and existing valve on-off time testing devices are not versatile.

Disclosure of Invention

In view of the above-mentioned drawbacks of the prior art, an object of the present invention is to provide a valve opening/closing time testing method and device for solving the problems of the prior art.

To achieve the above and other related objects, the present invention provides a valve opening and closing time testing method, comprising:

detecting a start signal, the start signal being generated by an external control system;

starting timing by a timing module when the starting signal is detected;

detecting the valve core position signal, and controlling the timing module to stop timing when the valve core position signal is detected;

and according to the time interval from starting to stopping of the timing module, taking the time interval as the opening time or the closing time of the valve.

In an embodiment of the present invention, the start signal includes one of a current signal, a voltage signal, and a switching value signal.

In an embodiment of the invention, the position detection module includes a limit switch.

To achieve the above and other related objects, the present invention provides a valve opening and closing time testing apparatus, comprising:

the first signal detection module is used for detecting a starting signal, and the starting signal is generated by an external control system;

the second signal detection module is used for detecting a valve core position signal, and the valve core position signal is detected by the position detection module;

the timing module is used for starting timing when the first signal detection module detects the starting signal, and stopping timing when the second signal detection module detects the valve core position signal;

and the calculating module is used for calculating the time interval from starting to stopping of the timing module and taking the time interval as the opening time or the closing time of the valve.

In an embodiment of the present invention, the start signal includes one of a current signal, a voltage signal, and a switching value signal.

In an embodiment of the invention, the position detection module includes a limit switch.

To achieve the above and other related objects, the present invention provides a valve opening and closing time testing apparatus, comprising:

a plurality of types of start signal access ports;

the starting signal acquisition module is electrically connected with the starting signal access ports of various types;

the selection module is used for selecting the type of the starting signal when testing the switching time of the valve;

the control module is used for executing the steps of the valve opening and closing time testing method.

In an embodiment of the present invention, the plurality of types of start signal access ports include a voltage signal access port, a current signal access port, and a switching value signal access port, and the start signal acquisition module includes a voltage signal acquisition module, a current signal acquisition module, and a switching value signal acquisition module.

In an embodiment of the invention, the testing device further includes: and the mounting box is internally provided with a valve to be tested when the opening and closing time of the valve is tested.

In an embodiment of the invention, the testing device further includes: and the display screen is used for displaying the opening time or closing time of the valve.

As described above, the method and the device for testing the valve opening and closing time provided by the invention have the following beneficial effects:

the invention discloses a valve switch time testing method, which comprises the following steps: detecting a start signal, the start signal being generated by an external control system; starting timing by a timing module when the starting signal is detected; detecting the valve core position signal, and controlling the timing module to stop timing when the valve core position signal is detected; and according to the time interval from starting to stopping of the timing module, taking the time interval as the opening time or the closing time of the valve. According to the invention, the timing is started when the starting signal is detected, so that the delay of the mechanical action of the valve or the timing error caused by the delay of the sensor can be eliminated, and the timing is more accurate; in addition, the invention can be adapted to a plurality of different forms of starting signals and has universality.

It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the application.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings that are needed in the description of the embodiments of the present invention will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present invention, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.

FIG. 1 is a schematic diagram of an exemplary valve switch time test method implementation environment according to the present application;

FIG. 2 is a block diagram of an exemplary test apparatus of the present application;

FIG. 3 is a block diagram of a testing device according to an exemplary embodiment of the present application;

FIG. 4 is a block diagram of a control portion of a test device according to an exemplary embodiment of the present application;

FIG. 5 is a single chip circuit according to an exemplary embodiment of the present application;

FIG. 6 is a power supply circuit shown in an exemplary embodiment of the present application;

FIG. 7 is a watchdog circuit shown in an exemplary embodiment of the present application;

FIG. 8 is a memory circuit shown in an exemplary embodiment of the present application;

FIG. 9 is a schematic diagram of a crystal oscillator circuit according to an exemplary embodiment of the present application;

FIG. 10 is a download interface circuit shown in an exemplary embodiment of the present application;

FIG. 11 is a power supply circuit shown in an exemplary embodiment of the present application;

FIG. 12 is a key and display circuit shown in an exemplary embodiment of the present application;

FIG. 13 is a current signal acquisition circuit shown in an exemplary embodiment of the present application;

FIG. 14 is a limit switch signal acquisition circuit shown in an exemplary embodiment of the present application;

FIG. 15 is a switching value signal acquisition circuit shown in an exemplary embodiment of the present application;

FIG. 16 is a voltage signal acquisition circuit shown in an exemplary embodiment of the present application;

FIG. 17 is a flow chart illustrating a method of testing valve opening and closing time according to an exemplary embodiment of the present application;

FIG. 18 is a block diagram of a valve switch time testing apparatus according to an exemplary embodiment of the present application;

FIG. 19 is a schematic diagram of a display screen according to an exemplary embodiment of the present application;

FIG. 20 is a menu option of a program shown in an exemplary embodiment of the present application;

FIG. 21 is a flowchart illustrating the steps of operation of a timing routine according to an exemplary embodiment of the present application;

fig. 22 shows a schematic diagram of a computer system suitable for use in implementing the electronic device of the embodiments of the present application.

Detailed Description

Further advantages and effects of the present invention will become readily apparent to those skilled in the art from the disclosure herein, by referring to the accompanying drawings and the preferred embodiments. The invention may be practiced or carried out in other embodiments that depart from the specific details, and the details of the present description may be modified or varied from the spirit and scope of the present invention. It should be understood that the preferred embodiments are presented by way of illustration only and not by way of limitation.

It should be noted that the illustrations provided in the following embodiments merely illustrate the basic concept of the present invention by way of illustration, and only the components related to the present invention are shown in the drawings and are not drawn according to the number, shape and size of the components in actual implementation, and the form, number and proportion of the components in actual implementation may be arbitrarily changed, and the layout of the components may be more complicated.

In the following description, numerous details are set forth in order to provide a more thorough explanation of embodiments of the present invention, it will be apparent, however, to one skilled in the art that embodiments of the present invention may be practiced without these specific details, in other embodiments, well-known structures and devices are shown in block diagram form, rather than in detail, in order to avoid obscuring the embodiments of the present invention.

FIG. 1 is a schematic diagram of an exemplary implementation environment for a valve switch time test method according to the present application. Referring to fig. 1, the implementation environment includes an external control system 110 and a test device 120 for data interaction between the control system and the test device.

As shown in fig. 2, the test apparatus includes: the power supply line 2, the mounting box 3, the display screen 4, the selection key 5, the starting signal line and the limit switch signal line; the starting signal line is connected with a starting signal, and the limit switch signal line is connected with a limit switch signal; the starting signals comprise a plurality of types and can comprise a switching value signal, a voltage signal and a current signal;

referring to fig. 3, fig. 3 is a block diagram of an exemplary testing device according to the present application. In fig. 3, the testing device includes various interfaces, specifically including: the first 220V voltage signal interface 13, the first limit switch interface 11, the first switching value signal interface 12, the first 12V voltage signal interface 14, the first 24V voltage signal interface 15, the first 48V voltage signal interface 16, the current signal interface 1, the power supply interface 2, the second 220V voltage signal interface 23, the second limit switch interface 21, the second switching value signal interface 22, the second 12V voltage signal interface 24, the second 24V voltage signal interface 25 and the second 48V voltage signal interface 26. When the switching time of the valve is tested, a corresponding starting signal is determined according to the type of the valve, and then the starting signal is connected into a starting signal line and connected into a control module of the testing device through a corresponding type of starting signal interface.

The starting signal is generated by an external control system and is mainly divided into three signals;

switching value signal: mainly by sensors, such as photoelectric sensors, pressure sensors, etc.;

current signal: the opening of some pneumatic valves in the field is controlled by a valve positioner, an external control system can give a signal of 4 mA-20 mA, wherein the signal is generally 4mA and represents full open, 20mA represents full close or 4mA represents full close, and 20mA represents full open;

voltage signal: there is typically a 220VAC signal or a 12VDC, 24VDC and 48VDC signal, and the voltage signal may directly drive the actuator to control the opening and closing of the valve, or indirectly drive the actuator to control the opening and closing of the valve by controlling the opening and closing of the solenoid valve to control the flow of air.

Referring to fig. 4, fig. 4 is a block diagram illustrating a control portion of a test apparatus according to an exemplary embodiment of the present application. In fig. 4, the control section includes: the control module, voltage stabilizing circuit, voltage conversion module, button circuit, display screen, current acquisition circuit, limit switch signal acquisition circuit, voltage conversion module can be through power supply line and power supply interface connection, then convert power supply's output voltage through voltage conversion module, and the power supply is supplied with the control module after the steady voltage processing is carried out to voltage stabilizing circuit again. In this embodiment, the control module may be a single-chip microcomputer.

The key circuit, the display screen, the current acquisition circuit, the limit switch signal acquisition circuit and the voltage signal acquisition circuit are respectively connected with the control module. When the valve is tested, the current acquisition circuit, the limit switch signal acquisition circuit and the voltage signal acquisition circuit are connected with corresponding signal interfaces.

As shown in fig. 4, the control section includes: the singlechip circuit and peripheral circuit, power supply circuit, button and display circuit and signal acquisition circuit thereof, peripheral circuit includes: watchdog circuit, memory circuit, crystal oscillator circuit and download interface circuit, and signal acquisition circuit includes: the device comprises a current signal acquisition circuit, a limit switch signal acquisition circuit and a voltage signal acquisition circuit.

Specifically, as shown in fig. 5, fig. 5 is a single chip microcomputer circuit, and mainly includes a basic chip circuit;

fig. 6 shows a dc voltage signal input circuit: providing interfaces X14, X15, X16, X24, X25 and X26, dividing the voltage signals of the two groups of 12V, 24V and 48V through resistors, converting the voltage signals into 3V voltage signals through a voltage converter G2 or G3, and transmitting the 3V voltage signals to the singlechip for reading.

FIG. 7 is a watchdog circuit responsible for the singlechip timing reset function; FIG. 8 is a memory circuit responsible for storing menu setting data or time records; FIG. 9 is a diagram of a crystal oscillator circuit providing external crystal oscillator frequency to a singlechip; fig. 10 is a download interface circuit providing a program download interface.

FIG. 11 shows a power supply circuit, in FIG. 11, 220V AC voltage is connected through a wiring terminal, then the voltage is converted into 3.3V by a voltage conversion module, and then the voltage is converted into (VCC) 3V voltage by a voltage stabilizing circuit to supply power to chips and other circuits;

fig. 12 shows a key and display circuit: the keys and the display screen are integrated, the X2 interface is responsible for transmitting the data of the singlechip, the X3 interface is responsible for supplying power, and the X4 interface is responsible for transmitting key signals into the singlechip;

FIG. 13 shows a current signal acquisition circuit, in FIG. 13, a current signal is firstly accessed through a 4 mA-20 mA signal interface X1, then signals S+ and S-are converted into a voltage signal LR from the current signal, the voltage signal LR is input into an AD conversion chip, an analog signal is converted into digital signals CS1, SDO1 and SCK1 and transmitted to a singlechip, and a reference voltage circuit provides a stable 1.2V reference voltage VREF for the AD conversion chip;

fig. 14 is a limit switch signal acquisition circuit, in fig. 14, two interfaces X11 and X21 are provided to transmit signals of two limit switches to a singlechip;

fig. 15 is a switching value signal acquisition circuit, in fig. 15, two interfaces X12 and X22 are provided to transmit two switching value signals to a single chip microcomputer;

fig. 16 is an ac voltage signal acquisition circuit, in fig. 16, two interfaces X13 and X23 are provided, two 220V ac voltage signals are transmitted to an electromagnetic relay G4 or G5, and then signals output by the relay are transmitted to a single chip microcomputer;

embodiments of the present application respectively propose a valve opening and closing time testing method, a valve opening and closing time testing device, an electronic device, and a computer readable storage medium, and these embodiments will be described in detail below.

Referring to fig. 17, fig. 17 is a flowchart illustrating a valve opening and closing time testing method according to an exemplary embodiment of the present application. The method can be applied to the implementation environment shown in fig. 1 and is specifically executed by the test device in the implementation environment. It should be understood that the method may be adapted to other exemplary implementation environments and be specifically executed by devices in other implementation environments, and the implementation environments to which the method is adapted are not limited by the present embodiment.

Referring to fig. 17, fig. 17 is a flowchart of an exemplary valve opening/closing time testing method according to the present application, where the valve opening/closing time testing method at least includes steps S1710 to S1740, and the following description is given in detail:

step S1710, detecting a start signal, wherein the start signal is generated by an external control system;

in this embodiment, the start signal is generated by an external control system, including: switching value signal, current signal, voltage signal. The specific type of activation signal is determined by the type of valve to be tested. Therefore, before testing the opening and closing time of the valve to be tested, the type of the valve needs to be determined, then the type of a starting signal which needs to be generated by an external control system is determined, and then the corresponding signal line interface is electrically connected with the starting signal.

Step S1720, starting timing by a timing module when the start signal is detected;

when the control module detects the starting signal, a timing module in the control module starts timing, and the timing starting time is defined as a first time point;

when the activation signal is detected, the valve may be considered to be at the instant of just opening, or at the instant of starting the transition from the open state to the closed state.

In this embodiment, it is defined that the valve is at the moment of just opening when the activation signal is detected.

In this embodiment, starting from the start signal (electrical signal) end, when the sensor signal is not used, the external control signal (start signal) can start timing once given, so that delay of mechanical action of the valve or timing error caused by sensor delay can be eliminated, and timing is more accurate.

Step S1730, detecting the valve element position signal, and controlling the timing module to stop timing when the valve element position signal is detected;

in one embodiment, the spool position signal may be detected by a limit switch, i.e., when the position of the spool reaches a set position, the limit switch generates a corresponding signal, i.e., a spool position signal. For a straight travel valve, the set position may be a first limit position of movement of the spool in a first direction or a second limit position of movement in a second direction. Wherein the first direction and the second direction are opposite directions. Of course, for an angular travel valve, the set position may be a third limit position where the spool rotates clockwise, or a fourth limit position where it rotates counter-clockwise. When the valve core is at the first limit position or the third limit position, the valve can be considered to be in an open state, and the opening degree is maximum; when the valve spool is in the second limit position or the fourth limit position, the valve can be considered to be in a closed state.

When the valve core position signal is detected, the opening of the valve is considered to be the largest, and the timing module stops timing at the moment and defines the timing stopping moment as a second time point;

step S1740, according to the time interval from starting to stopping of the timing module, the time interval is used as the opening time or the closing time of the valve.

In the invention, after the starting signal generated by an external control system is detected, timing is started, then the signal corresponding to the limit switch is detected, when the valve is operated to be in an open or closed state, the limit switch signal is switched, and the timing is stopped at the moment, so that the time consumed by the valve from open to closed or from closed to open is calculated.

The valve opening and closing time test is to test the time from closing to opening and the time from opening to closing of the valve. When an external control system gives a starting signal 1 and the valve starts to move in a going way, at the moment, the time of the display going way starts to be timed and started, when the target position is reached (namely, a valve core position signal is detected), the limit switch 1 switches signals, at the moment, the time of the display going way stops to be timed, and the display time is recorded as T1, namely, the starting time; the external control system gives a starting signal 2, the valve starts to move in a return stroke, at the moment, the return time of the display starts to start timing, when the initial target position is reached, the limit switch 2 switches signals, at the moment, the return time of the display stops, and the display time is recorded as T2, namely closing time.

It should be understood that the sequence number of each step in the foregoing embodiment does not mean that the execution sequence of each process should be determined by the function and the internal logic, and should not limit the implementation process of the embodiment of the present invention.

Fig. 18 is a block diagram of a valve on-off time testing apparatus according to an exemplary embodiment of the present application. The device can be applied to the implementation environment shown in fig. 1 and is particularly configured in an intelligent terminal. The apparatus may also be adapted to other exemplary implementation environments and may be specifically configured in other devices, and the present embodiment is not limited to the implementation environments to which the apparatus is adapted.

As shown in fig. 18, a valve opening and closing time testing apparatus, the testing apparatus comprising:

a first signal detection module 1810 for detecting a start signal, the start signal being generated by an external control system;

the second signal detection module 1820 is configured to detect a spool position signal, where the spool position signal is detected by the position detection module;

a timing module 1830 configured to start timing by the timing module when the first signal detection module detects the start signal, and stop timing when the second signal detection module detects the spool position signal;

the calculating module 1840 is configured to calculate a time interval from starting to stopping of the timing module, and take the time interval as an opening time or a closing time of the valve.

In an embodiment, the enable signal includes one of a current signal, a voltage signal, and a switching value signal.

In one embodiment, the position detection module includes a limit switch.

It should be noted that, the valve opening and closing time testing apparatus provided in the foregoing embodiments and the valve opening and closing time testing method provided in the foregoing embodiments belong to the same concept, and the specific manner in which each module and unit perform the operation has been described in detail in the method embodiment, which is not repeated herein. In practical application provided by the above embodiment, the above function allocation may be performed by different functional modules according to needs, that is, the internal structure of the device is divided into different functional modules to perform all or part of the functions described above, which is not limited herein.

In one embodiment, the present application provides a valve opening and closing time testing apparatus, the testing apparatus comprising:

a plurality of types of start signal access ports; the starting signal acquisition module is electrically connected with the starting signal access ports of various types; the selection module is used for selecting the type of the starting signal when testing the switching time of the valve; and the control module is used for executing the steps of the valve opening and closing time testing method.

In an embodiment, the multiple types of starting signal access ports include a voltage signal access port, a current signal access port and a switching value signal access port, and the starting signal acquisition module includes a voltage signal acquisition module, a current signal acquisition module and a switching value signal acquisition module.

In an embodiment, the test device further comprises: and the mounting box is internally provided with a valve to be tested when the opening and closing time of the valve is tested.

In an embodiment, the test device further comprises: and the display screen is used for displaying the opening time or closing time of the valve.

It should be noted that, referring to fig. 2 and 3, for different start signals, before starting timing, the cover needs to be opened, and the internal start signal 1 signal line and the start signal 2 signal line are respectively connected to corresponding interfaces according to actual electrical signals. If the starting signal of the valve is to control the electromagnetic valve to introduce the actuating mechanism gas by 24V voltage to open the valve, the starting signal of the valve to close is to open the exhaust interface, and when the pressure switch sensor detects the pressure drop to switch the state, the starting signal 1 signal line is connected to the X15 interface, and the starting signal 2 signal line is connected to the X22 interface. The signal line of the limit switch 1 and the signal line of the limit switch 2 are fixed at the interfaces X11 and X21.

Referring to fig. 19, fig. 19 is a schematic diagram of a display screen according to an exemplary embodiment of the present application. The chemical painting schematic diagram comprises a menu program function, which enables a user to select by a key to match the types and the effective level of the actual starting signal 1 and the starting signal 2. (if the enable signal 1 is an active signal when the 12V voltage is 0, then the line of the enable signal 1 needs to be connected to the X12 interface while the software is set to active low)

The selection module of the test device comprises three keys (MODE, UP, DOWN from left to right). In the following description, a long key press represents a key press that is released more than 4 seconds, and a short key press represents a key press that is released less than 4 seconds.

FIG. 20 is a menu option for a program, the main page being a timer interface, the MODE key being long pressed, the system entering a first level menu containing 3 options:

(1) "Start Signal 1" setting

(2) "Start Signal 2" setting

(3) Return to

Short presses of the UP and DOWN keys may switch 3 options. When the menu item (3) of the level returns to the interface, the MODE key is pressed for short time to return to the timing page, and when the menu item (1), "the start signal 1" is set "or (2)," the start signal 2 "is set" the interface, the menu item (3) of the level returns to the second level menu of the item, and 6 options are provided:

(1) current signal

(2) Switching value signal

(3) Ac voltage signal

(4) DC voltage signal

(5) Signal options

(6) Returning to the previous level menu

Short presses of the UP and DOWN keys may switch 6 options.

Under the option interface of the 'current signal' No. 1, the MODE key is pressed for short time, the selection MODE is entered, the effective forms of the signal are selected to be 4mA and 20mA respectively, the interface is flashing, the UP key and the DOWN key are pressed for short time for switching selection, after the signal is determined, the MODE key is pressed for short time, the selection MODE is exited, and the flashing is stopped.

(2) The number "switching value signal" is effective at high level or effective at low level, the number (3) of "alternating voltage signal" is effective at 220V level or effective at 0V level, the number (4) of "direct voltage signal" is effective at high level or effective at low level, the number (5) of "signal option" is effective signal for selecting who is actually used in (1) to (4), and the operation is the same as under the option interface of (1), and the short press of MODE key returns to the menu of one level under the option interface of (6) of "returning to the menu of the upper level". Pressing the MODE key long at any interface returns to the timing page.

Fig. 21 is a flowchart of the operation steps of the timer program.

(1) Firstly, program power-on reset, screen display initialization, start to scan keys, and simultaneously read the content of the last menu option in a memory;

(2) if the starting signal 1 and the starting signal 2 are not changed, menu setting can be omitted, if the starting signal 1 and the starting signal 2 are changed, corresponding signals and levels are set in the menu according to different types of access signals, and then the timing interface is returned;

(3) at this time, the program starts to scan and detect the signal of the 'start signal 1', when no signal is input, the timing is kept at zero, and the real-time scanning and detection is continued to detect whether the signal is input or not; when a signal is input, the signal is immediately captured by the program, and the next timing program is entered;

(4) the time T1 starts to be counted, and the first row of the screen displays the counting data in real time;

(5) while T1 times, the program scans and detects the signal of the limit switch 1 in real time at the moment, when no signal is input, the time counting is continued, and the real-time scanning and detecting is continued to detect whether the signal is input or not; when a signal is input, the signal is immediately captured by a program and enters the next step;

(6) t1, stopping timing, and keeping timing data on a screen for display to continue the next step;

(7) at this time, the program starts to scan and detect the signal of the starting signal 2 in real time, when no signal is input, the timing is kept at zero, and the real-time scanning and detection is continued to detect whether the signal is input or not; when a signal is input, the signal is immediately captured by the program, and the next timing program is entered;

(8) starting timing at the time T2, and displaying timing data in real time on a second row of the screen;

(9) while T2 times, the program scans and detects the signal of the limit switch 2 in real time at the moment, when no signal is input, the time counting is continued, and the real-time scanning and detecting is continued to detect whether the signal is input or not; when a signal is input, the signal is immediately captured by a program and enters the next step;

t2 stopping timing, keeping timing data on a screen for display, and ending timing;

after the timing is finished and the data is recorded, the UP key can be pressed for short time to clear the timing data of the display interface.

The valve switch time testing device in the embodiment comprises hardware and software, wherein 5 groups of wires are led out in total and are respectively a power supply wire, a starting signal 1 signal wire, a limit switch 1 signal wire, a starting signal 2 signal wire and a limit switch 2 signal wire, input interfaces of the starting signal 1 signal wire and the starting signal 2 signal wire are replaced according to different valve structural forms, and corresponding interface menu programs are set at the same time, so that the valve switch time testing device can adapt to testing requirements of most valve industrial sites; the device has the characteristics of simple structure, complete functions, multiple electrical interfaces, and capability of meeting different electrical conditions, and can be used for completing the on-off time detection requirements of most valve sites.

In addition, the testing device can adapt to the electrical signals of voltage, current and switching value according to different electrical signals, and can select the triggering effectiveness of high or low level to finish accurate valve switching time test. The test device starts timing by starting from the electric signal end and when the sensor signal is not used, the external control system signal can start timing once being given, so that delay of mechanical action of the valve or timing error caused by the delay of the sensor can be eliminated, and the timing is more accurate.

The embodiment of the application also provides electronic equipment, which comprises: one or more processors; and a storage device for storing one or more programs, which when executed by the one or more processors, cause the electronic device to implement the valve opening and closing time testing method provided in the above embodiments.

Fig. 22 shows a schematic diagram of a computer system suitable for use in implementing the electronic device of the embodiments of the present application. It should be noted that, the computer system 2200 of the electronic device shown in fig. 22 is only an example, and should not impose any limitation on the functions and the application scope of the embodiments of the present application.

As shown in fig. 22, the computer system 2200 includes a central processing unit (CentralProcessingUnit, CPU) 2201, which can perform various appropriate actions and processes according to a program stored in a Read-only memory (ROM) 2202 or a program loaded from a storage portion 2208 into a random access memory (RandomAccessMemory, RAM) 2203, for example, performing the methods described in the above embodiments. In the RAM2203, various programs and data required for system operation are also stored. The CPU2201, ROM2202, and RAM2203 are connected to each other through a bus 2204. An Input/Output (I/O) interface 2205 is also connected to bus 2204.

The following components are connected to I/O interface 2205: an input portion 2206 including a keyboard, a mouse, and the like; an output portion 2207 including a cathode ray tube (CathodeRayTube, CRT), a liquid crystal display (LiquidCrystalDisplay, LCD), and the like, a speaker, and the like; a storage portion 2208 including a hard disk or the like; and a communication section 2207 including a network interface card such as a LAN (local area network) card, a modem, or the like. The communication section 2207 performs communication processing via a network such as the internet. The drive 2210 is also connected to the I/O interface 2205 as needed. A removable medium 2211 such as a magnetic disk, an optical disk, a magneto-optical disk, a semiconductor memory, or the like is mounted on the drive 2210 as needed, so that a computer program read out therefrom is mounted into the storage section 2208 as needed.

In particular, according to embodiments of the present application, the processes described above with reference to flowcharts may be implemented as computer software programs. For example, embodiments of the present application include a computer program product comprising a computer program embodied on a computer readable medium, the computer program comprising a computer program for performing the valve switch time test method shown in flowchart 2. In such an embodiment, the computer program can be downloaded and installed from a network via the communication portion 2209, and/or installed from the removable medium 2211. When executed by a Central Processing Unit (CPU) 2201, performs the various functions defined in the system of the present application.

It should be noted that, the computer readable medium shown in the embodiments of the present application may be a computer readable signal medium or a computer readable storage medium, or any combination of the two. The computer readable storage medium may be, for example, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples of the computer-readable storage medium may include, but are not limited to: an electrical connection having one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a Read-only memory (ROM), an erasable programmable Read-only memory (ErasableProgrammableReadOnly Memory, EPROM), a flash memory, an optical fiber, a portable compact disc Read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing. In the present application, a computer-readable signal medium may include a data signal propagated in baseband or as part of a carrier wave, with a computer-readable computer program embodied therein. Such a propagated data signal may take any of a variety of forms, including, but not limited to, electro-magnetic, optical, or any suitable combination of the foregoing. A computer readable signal medium may also be any computer readable medium that is not a computer readable storage medium and that can communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device. A computer program embodied on a computer readable medium may be transmitted using any appropriate medium, including but not limited to: wireless, wired, etc., or any suitable combination of the foregoing.

The flowcharts and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments of the present application. Where each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams or flowchart illustration, and combinations of blocks in the block diagrams or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.

The units involved in the embodiments of the present application may be implemented by means of software, or may be implemented by means of hardware, and the described units may also be provided in a processor. Wherein the names of the units do not constitute a limitation of the units themselves in some cases.

Another aspect of the present application also provides a computer readable storage medium having stored thereon a computer program which, when executed by a processor of a computer, causes the computer to perform the valve opening and closing time test method as described above. The computer-readable storage medium may be included in the electronic device described in the above embodiment or may exist alone without being incorporated in the electronic device.

Another aspect of the present application also provides a computer program product or computer program comprising computer instructions stored in a computer readable storage medium. The processor of the computer device reads the computer instructions from the computer-readable storage medium, and the processor executes the computer instructions, so that the computer device performs the valve opening and closing time testing method provided in the above embodiments.

The above embodiments are merely illustrative of the principles of the present invention and its effectiveness, and are not intended to limit the invention. Modifications and variations may be made to the above-described embodiments by those skilled in the art without departing from the spirit and scope of the invention. It is therefore intended that all equivalent modifications and changes made by those skilled in the art without departing from the spirit and technical spirit of the present invention shall be covered by the appended claims.

Claims (10)

1. A method for testing valve opening and closing time, the method comprising:

detecting a start signal, the start signal being generated by an external control system;

starting timing by a timing module when the starting signal is detected;

detecting the valve core position signal, and controlling the timing module to stop timing when the valve core position signal is detected;

and according to the time interval from starting to stopping of the timing module, taking the time interval as the opening time or the closing time of the valve.

2. The method of claim 1, wherein the enable signal comprises one of a current signal, a voltage signal, and a switching value signal.

3. The valve switch time testing method of claim 1, wherein the position detection module comprises a limit switch.

4. A valve opening and closing time testing device, the testing device comprising:

the first signal detection module is used for detecting a starting signal, and the starting signal is generated by an external control system;

the second signal detection module is used for detecting a valve core position signal, and the valve core position signal is detected by the position detection module;

the timing module is used for starting timing when the first signal detection module detects the starting signal, and stopping timing when the second signal detection module detects the valve core position signal;

and the calculating module is used for calculating the time interval from starting to stopping of the timing module and taking the time interval as the opening time or the closing time of the valve.

5. The valve switch time test device of claim 4, wherein the enable signal comprises one of a current signal, a voltage signal, and a switching value signal.

6. The valve switch time testing apparatus of claim 4, wherein the position detection module comprises a limit switch.

7. A valve opening and closing time testing device, the testing device comprising:

a plurality of types of start signal access ports;

the starting signal acquisition module is electrically connected with the starting signal access ports of various types;

the selection module is used for selecting the type of the starting signal when testing the switching time of the valve;

a control module for performing the steps of the valve opening and closing time testing method of claim 1.

8. The valve switching time testing device according to claim 7, wherein the plurality of types of start signal access ports comprise a voltage signal access port, a current signal access port and a switching value signal access port, and the start signal acquisition module comprises a voltage signal acquisition module, a current signal acquisition module and a switching value signal acquisition module.

9. The valve switch time testing apparatus of claim 7, wherein said testing apparatus further comprises:

and the mounting box is internally provided with a valve to be tested when the opening and closing time of the valve is tested.

10. The valve switch time testing apparatus of claim 7, wherein said testing apparatus further comprises:

and the display screen is used for displaying the opening time or closing time of the valve.

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