CN116170017A - Analog-to-digital conversion correction method and device, storage medium and electronic equipment - Google Patents
Analog-to-digital conversion correction method and device, storage medium and electronic equipment Download PDFInfo
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
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- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/10—Calibration or testing
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- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
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Abstract
The invention provides an analog-to-digital conversion correction method, an analog-to-digital conversion correction device, a storage medium and electronic equipment, wherein the method comprises the following steps: obtaining a first digital voltage value D1 output by an analog-to-digital converter and a first correction interval [ DSJ ] to which the first digital voltage value D1 belongs X‑1 ，DSJ X ]Wherein DSJ X‑1 And DSJ X The actual correction digital values are respectively the left end point and the right end point of the first correction interval; obtaining theoretical correction digital value DJ of left end point of first correction interval X‑1 And DSJ X‑1 Is the difference P of (2) SD(X‑1) And a first correction interval difference D corresponding to the first correction interval LX And a first adjacent correction point deviation J PdX The method comprises the steps of carrying out a first treatment on the surface of the Calculate a corrected first output digital voltage value D1 Compared with The method comprises the following steps: D1D 1 Compared with ＝D1+P SD(X‑1) +(D1‑DSJ X‑1 )*J Pdx /D LX . The invention makes the corrected digital value more approximate to the analog actually receivedThe data deviation of the analog-to-digital converter caused by the design of the analog-to-digital converter is eliminated.
Description
Technical Field
The present invention relates to the field of electronic technologies, and in particular, to a method and apparatus for correcting analog-to-digital conversion, a storage medium, and an electronic device.
Background
With the widespread use of digital technology in the fields of signal processing, control, etc., the work implemented by analog circuits in the past is being increasingly handled by digital circuits, and accordingly, the technology by which ADC is used to implement conversion between analog circuit technology and digital circuit technology is being increasingly used.
However, in the analog-to-digital converter (ADC) design, due to factors such as design errors and layout matching, the data output by the ADC and the ideal value have a certain deviation, so that the digital value actually obtained is not the same as the digital value corresponding to the detected analog quantity.
Disclosure of Invention
One or more embodiments of the present invention describe an analog-to-digital conversion correction method, apparatus, storage medium, and electronic device, so as to solve the problem in the prior art that the digital value actually obtained is not the same as the digital value corresponding to the detected analog quantity.
In one aspect of the present invention, there is provided an analog-to-digital conversion correction method, the method comprising:
acquiring a first digital voltage value D1 output by an analog-to-digital converter;
acquiring a first correction interval [ DSJ ] to which the first digital voltage value D1 belongs X-1 ，DSJ X ]Wherein DSJ X-1 For the actual correction digital value of the left end point of the first correction interval, DSJ X For the actual correction digital value of the right end point of the first correction interval, x=1, 2,..n, N is the number of correction points;
obtaining theoretical correction digital value DJ of left end point of first correction interval X-1 And actually correcting the digital value DSJ X-1 Is the difference P of (2) SD(X-1) And with the first correction interval [ DSJ ] X-1 ，DSJ X ]Corresponding first correction interval difference D LX And a first adjacent correction point deviation J PdX ：
Calculating a first compensation value B1 of the first digital voltage value D1, wherein the specific formula is as follows:
B1＝(D1-DSJ X-1 )*J PdX /D LX (1)
calculating a corrected first output digital voltage value D1 corresponding to the first digital voltage value D1 Compared with The specific formula is as follows:
D1 compared with ＝D1+P SD(X-1) +B1 (2)。
Further, the sum of the first correction interval [ DSJ ] X-1 ，DSJ X ]Corresponding first correction interval difference D LX The specific formula is as follows:
D LX ＝DSJ X -DSL X-1 (3)。
further, the sum of the first correction interval [ DSJ ] X-1 ，DSJ X ]Corresponding first adjacent correction point deviation J PdX The specific formula is as follows:
J PdX ＝P SDX -P SD(X-1) (4)
wherein P is SDX Theoretical correction digital value DJ for right end point of first correction interval X And actual digital value DSJ X Is a difference in (c).
Further, before obtaining the first digital voltage value D1 output by the analog-to-digital converter, the method further comprises:
obtaining analog correction voltage values AJ corresponding to correction points of the analog-to-digital converter S Wherein s=0, 1,2, … … N, n+1;
calculating theoretical correction digital values DJ corresponding to the correction points according to the precision K of the analog-to-digital converter S Where s=0, 1,2,.. the precision K of the analog-to-digital converter is the number of bits of the analog-to-digital converter.
Further, calculating theoretical correction digital values DJ corresponding to the correction points according to the accuracy K of the analog-to-digital converter s Comprising the following steps:
determining the numerical range of the output of the analog-to-digital converter according to the precision K of the analog-to-digital converter, wherein the numerical range of the analog-to-digital converter is [0,16 ] K/4 -1]；
Acquisition stationMaximum voltage value V of measuring range of analog-digital converter max ；
The theoretical correction digital value DJ s The method comprises the following steps:
DJ s ＝(16 K/4 -1)*AJ s /V max (4)。
further, before obtaining the first digital voltage value D1 output by the analog-to-digital converter, the method further comprises:
acquiring actual correction digital values DSJ corresponding to the correction points through a wafer CP of the analog-to-digital converter s Where s=0, 1,2, … … N, n+1.
In another aspect of the present invention, an analog-to-digital conversion correction apparatus, the apparatus comprising:
the first acquisition module is used for acquiring a first digital voltage value D1 output by the analog-to-digital converter;
a second acquisition module for acquiring a first correction interval [ DSJ ] to which the first analog voltage value A1 belongs X-1 ，DSJ X ]Wherein DSJ X-1 For the actual correction digital value of the left end point of the first correction interval, DSJ X For the actual correction digital value of the right end point of the first correction interval, x=i, 2, …, N is the number of correction points;
a third obtaining module for obtaining a theoretical correction digital value DJ of the left end point of the first correction interval X-1 And actually correcting the digital value DSJ X-1 Is the difference P of (2) SD(X-1) And the first correction interval [ DSJ ] X-1 ，DSJ X ]Corresponding first correction interval difference D LX And a first adjacent correction point deviation J PdX ；
The calculating module is configured to calculate a first compensation value B1 of the first digital voltage value D1, and the specific formula is:
B1＝(D1-DSJ X-1 )*J PdX /D LX (1)
the calculation module is further used for calculating a corrected first output digital voltage value D1 corresponding to the first digital voltage value D1 Compared with The specific formula is as follows:
D1 compared with ＝D1+P SD(X-1) +B1 (2)。
In another aspect of the present invention, there is provided a computer-readable storage medium having stored thereon a computer program which, when executed by a processor, implements the steps of the analog-to-digital conversion correction method provided by the above embodiments.
In another aspect of the present invention, there is provided an electronic device including a memory, a processor and a computer program stored on the memory and running on the processor, the processor implementing the steps of the analog-to-digital conversion correction method provided in the above embodiments when executing the computer program.
The embodiment of the invention provides an analog-to-digital conversion correction method, an analog-to-digital conversion correction device, a storage medium and electronic equipment, wherein the method comprises the following steps: after obtaining a first digital voltage value D1 output by the analog-to-digital converter, obtaining a first correction interval [ DSJ ] to which the first digital voltage value D1 belongs X-1 ，DSJ X ]Wherein DSJ X-1 For the actual correction digital value of the left end point of the first correction interval, DSJ X For the actual correction digital value of the right end point of the first correction interval, x=1, 2, …, N is the number of correction points; obtaining theoretical correction digital value DJ of left end point of first correction interval X-1 And actually correcting the digital value DSJ X-1 Is the difference P of (2) SD(X-1) And the first correction interval [ DSJ ] X-1 ，DSJ X ]Corresponding first correction interval difference D LX And a first adjacent correction point deviation J PdX The method comprises the steps of carrying out a first treatment on the surface of the Finally, a corrected first output digital voltage value D1 is calculated Compared with The specific formula is as follows: D1D 1 Compared with ＝D1+P SD(X-1) +b1, where b1= (D1-DSJ) X-1 )*J PdX /D LX . The invention sets the corresponding correction method according to the deviation between the actual output digital value and the theoretical digital value of the analog-digital converter, so that the corrected digital value is closer to the actually received analog quantity, and the data deviation of the analog-digital converter caused by the design of the analog-digital converter is eliminated.
The foregoing description is only an overview of the present invention, and is intended to be implemented in accordance with the teachings of the present invention in order that the same may be more clearly understood and to make the same and other objects, features and advantages of the present invention more readily apparent.
Drawings
In order to more clearly illustrate the embodiments of the present description or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described, and it is obvious that the drawings in the following description are some embodiments of the present description, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a control flow chart of an analog-to-digital conversion correction method according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of an analog-to-digital conversion correction device according to an embodiment of the present invention.
Detailed Description
The following description of the embodiments of the present invention will be made apparent and fully in view of the accompanying drawings, in which some, but not all embodiments of the invention are shown. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
In the description of the present invention, it should be noted that the directions or positional relationships indicated by the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc. are based on the directions or positional relationships shown in the drawings, are merely for convenience of describing the present invention and simplifying the description, and do not indicate or imply that the devices or elements referred to must have a specific orientation, be configured and operated in a specific orientation, and thus should not be construed as limiting the present invention. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
In the description of the present invention, it should be noted that, unless explicitly specified and limited otherwise, the terms "mounted," "connected," and "connected" are to be construed broadly, and may be either fixedly connected, detachably connected, or integrally connected, for example; can be mechanically or electrically connected; can be directly connected or indirectly connected through an intermediate medium, and can be communication between two elements. The specific meaning of the above terms in the present invention will be understood in specific cases by those of ordinary skill in the art. In addition, the technical features of the different embodiments of the present invention described below may be combined with each other as long as they do not collide with each other.
Fig. 1 schematically shows a flow chart of an analog-to-digital conversion correction method according to an embodiment of the invention. As shown in fig. 1, an analog-to-digital conversion correction method provided by the embodiment of the invention specifically includes steps S10 to S50, as follows:
s10, acquiring a first digital voltage value D1 output by an analog-to-digital converter;
in an embodiment of the present invention, before acquiring the first digital voltage value D1 output by the analog-to-digital converter, the method further includes: obtaining analog correction voltage values AJ corresponding to correction points of the analog-to-digital converter S Where s=0, 1,2,..; calculating theoretical correction digital values DJ corresponding to the correction points according to the precision K of the analog-to-digital converter S Where s=0, 1,2,.. the precision K of the analog-to-digital converter is the number of bits of the analog-to-digital converter. Acquiring actual correction digital values DSJ corresponding to the correction points through a wafer CP of the analog-to-digital converter S Where s=0, 1,2,... It should be noted that when s=0 and s=n+1, the two end values of the analog-to-digital converter range, namely 0V and the maximum voltage V of the analog-to-digital converter measuring range max 。
Wherein N is the number of correction points, the value of N is related to the correction precision and the measuring range of the analog-to-digital converter, and the analog correction voltage value AJ is increased along with the increase of the value N S The number is correspondingly increased, and each analog correction voltage value AJ S The range of the analog-to-digital converter is divided into n+1 parts. The analog-digital converter is characterized by the characteristics and calculation requirements of the analog-digital converter, and the analog-digital converter is characterized by the analog-digital converterQuasi-correction voltage value AJ S It is not necessary to divide the analog-to-digital converter range equally into n+1 parts, but a small voltage difference may exist between the intervals. The precision K of the analog-to-digital converter is the number of bits of the analog-to-digital converter, for example, if the number of bits of the analog-to-digital converter is 12, the analog-to-digital converter can be divided into hexadecimal values of 3 bits.
Further, in the embodiment of the present invention, the theoretical correction digital value DJ corresponding to each correction point is calculated according to the precision K of the analog-to-digital converter S Including those not shown in the drawings:
s101, determining the numerical range of the output of the analog-to-digital converter according to the precision K of the analog-to-digital converter, wherein the numerical range of the analog-to-digital converter is [0,16 ] K/4 -1]；
Taking precision K as 12 as an example, the numerical range of the analog-to-digital converter is [0,4095].
S102, obtaining the maximum voltage value V of the measuring range of the analog-to-digital converter max ；
If the measuring range of the analog-to-digital converter is [0V-3V]Then the maximum voltage value V of the measuring range of the analog-to-digital converter max 3.
S103, the theoretical correction digital value DJ s The method comprises the following steps:
DJ s ＝(16 K/4 -1)*AJ S /V max (4)。
further in an embodiment of the present invention, before acquiring the first digital voltage value D1 output by the analog-to-digital converter, the method further includes: acquiring actual correction digital values DSJ corresponding to the correction points through a wafer CP of the analog-to-digital converter s Where s=0, 1,2,... The wafer CP of the analog-to-digital converter is specifically referred to as CP test. Each correction point corresponds to an actual correction digital value DSJ S I.e. the analog correction voltage value AJ of each correction point S The actual digital value output after being input into the analog-to-digital converter.
S20, acquiring a first correction interval [ DSJ ] to which the first digital voltage value D1 belongs X-1 ，DSJ X ]Wherein DSJ X-1 For the actual correction digital value of the left end point of the first correction interval, DSJ X For the actual correction digital value of the right end point of the first correction interval, x=1, 2, …, n+1, N is the number of correction points;
in the embodiment of the present invention, after determining the magnitude of the first digital voltage value D1, the correction interval, specifically DSJ, to which the magnitude of the first digital voltage value D1 belongs can be determined by the magnitude of the first digital voltage value D1 X-1 ≤D1<DSJ X 。
S30, acquiring a theoretical correction digital value DJ of the left end point of the first correction interval X-1 And actually correcting the digital value DSJ X-1 Is the difference P of (2) SD(X-1) And the first correction interval [ DSJ ] X-1 ，DSJ X ]Corresponding first correction interval difference D LX And a first adjacent correction point deviation J PdX ；
In an embodiment of the present invention, the first correction interval [ DSJ ] is the same as the first correction interval X-1 ，DSJ X ]Corresponding first correction interval difference D LX The specific formula is as follows:
D LX ＝DSJ X -DSL X-1 (3)。
i.e. the first correction interval [ DSJ ] X-1 ，DSJ X ]Corresponding first correction interval difference D LX The difference between the digital values is corrected for the two actually obtained actuality of the interval.
Further, the sum of the first correction interval [ DSJ ] X-1 ，DSJ X ]Corresponding first adjacent correction point deviation J PdX The specific formula is as follows:
J PdX ＝P SDX -P SD(X-1) (4)
wherein P is SD(X-1) Theoretical correction digital value DJ for left end point of first correction interval X-1 And actually correcting the digital value DSJ X-1 Is the difference of P SDx Theoretical correction digital value DJ for right end point of first correction interval X And actual digital value DSJ X Is a difference in (c).
S40, calculating a first compensation value B1 of the first digital voltage value D1, wherein the specific formula is as follows:
B1＝(D1-DSJ x-1 )*J PdX /D LX (1)
s50, calculating a corrected first output digital voltage value D1 corresponding to the first digital voltage value D1 Compared with The specific formula is as follows:
D1 compared with ＝D1+P SD(X-1) +B1 (2)。
The invention sets the corresponding correction method according to the deviation between the actual output digital value and the theoretical digital value of the analog-digital converter, so that the corrected digital value is closer to the actually received analog quantity, and the data deviation of the analog-digital converter caused by the design of the analog-digital converter is eliminated.
In addition, when the value output by the first digital voltage value D1 is exactly the actual correction value of the left and right end points of the analog-to-digital converter range, the correction calculation is not needed at this time, and the corresponding value can be directly output. For example, when D1 is DSJ 0 When the corrected first output digital voltage value is D LX ＝DSJ 0 . When D1 is DSJ N+1 When the corrected first output digital voltage value is D LX ＝DSJ N+1 。
Further, in order to more clearly describe the correction method according to the embodiment of the present invention, the following description will be made with the range of the analog-to-digital converter being 0V-1V and the accuracy being 6.
Taking 2 correction points and simulating correction voltage value AJ S AJ respectively 2 ＝0V，AJ 1 ＝0.3V、AJ 2 ＝0.7V、AJ 3 ＝1V。
Calculating a formula DJ according to the theoretical correction digital value of each correction point S ＝(16 K/4 -1)*AJ s /V max ，DJ 1 ＝(16 2 -1)*0.3/1＝255*0.3＝76.5＝77，DJ 2 =179. Wherein DJ 0 ＝0、DJ 3 ＝255
Further, the actual correction digital value DSJ corresponding to each correction point is obtained through the wafer CP of the analog-to-digital converter S Illustration DSJ 0 ＝2、DSJ 1 ＝74、DSJ 2 ＝183、DSJ 3 ＝250。
In practical application, according to step S10, a first digital voltage value d1=90 is obtained as input by the analog-to-digital converter,
according to step S20, a first correction interval [ DSJ ] to which the first digital voltage value D1 belongs is determined X-1 ，DSJ X ]At this time, X takes a value of 2, and the first correction interval to which the first digital voltage value D1 belongs is specifically [73, 183 ]]，
According to step S30, obtaining theoretical correction digital value DJ of left end point of first correction interval 1 =77 and actual corrected digital value DSJ 1 Difference P of=74 SD1 =3, and the first correction interval [73, 183]Corresponding first correction interval difference D LX =sum of first adjacent correction point deviations J PdX ；
Wherein according to the first correction interval difference D LX Is calculated by the formula D LX ＝DSJ X -DSL X-1 The method comprises the following steps: d (D) L2 =110, according to the first adjacent correction point deviation J PdX Is calculated by the formula J PdX ＝P SDX -P SD(X-1) The method comprises the following steps: j (J) Pd2 ＝-4，；
The first compensation value B1 of the first digital voltage value D1 is calculated according to step S40 as:
B1＝(90-74)*(-4)/110＝-0.5818
a corrected first output digital voltage value D1 corresponding to the first digital voltage value D1 according to step S50 Compared with The method comprises the following steps:
D1 compared with ＝90+3-0.58＝92.42＝92
The corrected digital quantity corresponding to the input analog quantity is 92.
For the purposes of simplicity of explanation, the methodologies are shown and described as a series of acts, it is to be understood and appreciated by one of ordinary skill in the art that the methodologies are not limited by the order of acts, as some acts may, in accordance with the methodologies, take place in other order or concurrently. Further, those skilled in the art will appreciate that the embodiments described in the specification are presently preferred embodiments, and that the acts are not necessarily required by the embodiments of the invention.
Fig. 2 schematically shows a schematic structure of an analog-to-digital conversion correction apparatus according to an embodiment of the present invention. Referring to fig. 2, the analog-to-digital conversion correction apparatus according to the embodiment of the present invention specifically includes a first acquisition module 101, a second acquisition module 102, a third acquisition module 103, and a calculation module 104, where:
a first obtaining module 101, configured to obtain a first digital voltage value D1 output by the analog-to-digital converter;
a second obtaining module 102 for obtaining a first correction interval [ DSJ ] to which the first analog voltage value A1 belongs X-1 ，DSJ X ]Wherein DSJ X-1 For the actual correction digital value of the left end point of the first correction interval, DSJ X For the actual correction digital value of the right end point of the first correction interval, x=1, 2, …, n+1, N is the number of correction points;
a third obtaining module 103 for obtaining a theoretical correction digital value DJ of the left end point of the first correction interval X-1 And actually correcting the digital value DSJ X-1 Is the difference P of (2) SD(X-1) And with the first correction interval [ DSJ ] X-1 ，DSJ X ]Corresponding first correction interval difference DLX and first adjacent correction point deviation J PdX ；
The calculating module 104 is configured to calculate a first compensation value B1 of the first digital voltage value D1, and the specific formula is:
B1＝(D1-DSJ X-1 )*J PdX /D LX (1)
the calculation module 104 is further configured to calculate a corrected first output digital voltage value D1 corresponding to the first digital voltage value D1 Compared with The specific formula is as follows:
D1 compared with ＝D1+P SD(X-1) +B1 (2)。
For the device embodiments, since they are substantially similar to the method embodiments, the description is relatively simple, and reference is made to the description of the method embodiments for relevant points.
The apparatus embodiments described above are merely illustrative, wherein the elements illustrated as separate elements may or may not be physically separate, and the elements shown as elements may or may not be physical elements, may be located in one place, or may be distributed over a plurality of network elements. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment. Those of ordinary skill in the art will understand and implement the present invention without undue burden.
The embodiment of the invention provides an analog-to-digital conversion correction method and device, wherein the method comprises the following steps: after obtaining a first digital voltage value D1 output by the analog-to-digital converter, obtaining a first correction interval [ DSJ ] to which the first digital voltage value D1 belongs X-1 ，DSJ X ]Wherein DSJ X-1 For the actual correction digital value of the left end point of the first correction interval, DSJ X For the actual correction digital value of the right end point of the first correction interval, x=1, 2, …, N is the number of correction points; obtaining theoretical correction digital value DJ of left end point of first correction interval X-1 And actually correcting the digital value DSJ X-1 Is the difference P of (2) SD(X-1) And the first correction interval [ DSJ ] X-1 ，DSJ X ]Corresponding first correction interval difference D LX And a first adjacent correction point deviation J PdX The method comprises the steps of carrying out a first treatment on the surface of the Finally, a corrected first output digital voltage value D1 is calculated Compared with The specific formula is as follows: D1D 1 Compared with ＝D1+P SD(X-1) +b1, where b1= (D1-DSJ) X-1 )*J PdX /D LX . The invention sets the corresponding correction method according to the deviation between the actual output digital value and the theoretical digital value of the analog-digital converter, so that the corrected digital value is closer to the actually received analog quantity, and the data deviation of the analog-digital converter caused by the design of the analog-digital converter is eliminated.
Furthermore, embodiments of the present invention provide a computer readable storage medium having stored thereon a computer program which, when executed by a processor, implements the steps of the method as described above.
In this embodiment, the module/unit integrated with the analog-to-digital conversion correction apparatus may be stored in a computer readable storage medium if implemented in the form of a software functional unit and sold or used as a separate product. Based on such understanding, the present invention may implement all or part of the flow of the method of the above embodiment, or may be implemented by a computer program to instruct related hardware, where the computer program may be stored in a computer readable storage medium, and when the computer program is executed by a processor, the computer program may implement the steps of each of the method embodiments described above. Wherein the computer program comprises computer program code which may be in source code form, object code form, executable file or some intermediate form etc. The computer readable medium may include: any entity or device capable of carrying the computer program code, a recording medium, a U disk, a removable hard disk, a magnetic disk, an optical disk, a computer Memory, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), an electrical carrier signal, a telecommunications signal, a software distribution medium, and so forth.
The electronic device provided by the embodiment of the invention comprises a memory, a processor and a computer program stored on the memory and capable of running on the processor, wherein the steps in the embodiments of the analog-to-digital conversion correction method are realized when the processor executes the computer program, for example, S10-S50 shown in fig. 1. Alternatively, the processor may implement the functions of the modules/units in the embodiments of the analog-to-digital conversion correction apparatus described above when executing the computer program, for example, the first acquisition module 101, the second acquisition module 102, the third acquisition module 103, and the calculation module 104 shown in fig. 2.
The computer program may be divided into one or more modules/units, which are stored in the memory and executed by the processor to accomplish the present invention, for example. The one or more modules/units may be a series of computer program instruction segments capable of performing the specified functions, which instruction segments are used for describing the execution of the computer program in the analog-to-digital conversion correction means.
The processor may be a central processing unit (Central Processing Unit, CPU), but may also be other general purpose processors, digital signal processors (Digital Signal Processor, DSP), application specific integrated circuits (Application Specific Integrated Circuit, ASIC), off-the-shelf programmable gate arrays (Field-Programmable Gate Array, FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, or the like. The general purpose processor may be a microprocessor or the processor may be any conventional processor or the like, which is a control center of the cooking appliance, connecting various parts of the entire cooking appliance using various interfaces and lines.
The memory may be used to store the computer program and/or module, and the processor may implement various functions of the cooking appliance by running or executing the computer program and/or module stored in the memory and invoking data stored in the memory. The memory may mainly include a storage program area and a storage data area, wherein the storage program area may store an operating system, an application program (such as a sound playing function, an image playing function, etc.) required for at least one function, and the like; the storage data area may store data (such as audio data, phonebook, etc.) created according to the use of the handset, etc. In addition, the memory may include high-speed random access memory, and may also include non-volatile memory, such as a hard disk, memory, plug-in hard disk, smart Media Card (SMC), secure Digital (SD) Card, flash Card (Flash Card), at least one disk storage device, flash memory device, or other volatile solid-state storage device.
Those skilled in the art will appreciate that while some embodiments herein include some features but not others included in other embodiments, combinations of features of different embodiments are meant to be within the scope of the invention and form different embodiments. For example, any of the embodiments claimed herein may be used in any combination.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present invention, and are not limiting; although the invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present invention.
Claims (9)
1. A method of analog-to-digital conversion correction, the method comprising:
acquiring a first digital voltage value D1 output by an analog-to-digital converter;
acquiring a first correction interval [ DSJ ] to which the first digital voltage value D1 belongs X-1 ，DSJ X ]Wherein DSJ X-1 For the actual correction digital value of the left end point of the first correction interval, DSJ X For the actual correction digital value of the right end point of the first correction interval, x=1, 2,..n+1, N is the number of correction points;
obtaining theoretical correction digital value DJ of left end point of first correction interval X-1 And actually correcting the digital value DSJ X-1 Is the difference P of (2) SD(X-1) And with the first correction interval [ DSJ ] X-1 ，DSJ X ]Corresponding first correction interval difference D LX And a first adjacent correction point deviation J PdX ；
Calculating a first compensation value B1 of the first digital voltage value D1, wherein the specific formula is as follows:
B1＝(D1-DSJ X-1 )*J PdX /D LX (1)
calculating a corrected first output digital voltage value D1 corresponding to the first digital voltage value D1 Compared with The specific formula is as follows:
D1 compared with ＝D1+P SD(X-1) +B1 (2)。
2. The method according to claim 1, characterized in that said and said first correction interval [ DSJ X-1 ，DSJ X ]Corresponding first correction interval difference D LX The calculation formula of (2) is as follows:
D LX ＝DSJ X -DSL X-1 (3)。
3. the method according to claim 1, characterized in that said and said first correction interval [ DSJ X-1 ，DSJ X ]Corresponding first adjacent correction point deviation J PdX The calculation formula of (2) is as follows:
J PDX ＝P SDX -P SD(X-1) (4)
wherein P is SDX Theoretical correction digital value DJ for right end point of first correction interval X And actual digital value DSJ X Is a difference in (c).
4. The method of claim 1, wherein prior to obtaining the first digital voltage value D1 of the analog-to-digital converter output, the method further comprises:
obtaining analog correction voltage values AJ corresponding to correction points of the analog-to-digital converter S Where s=0, 1,2,..;
calculating theoretical correction digital values DJ corresponding to the correction points according to the precision K of the analog-to-digital converter S Where s=0, 1,2,.. the precision K of the analog-to-digital converter is the number of bits of the analog-to-digital converter.
5. The method of claim 4, wherein the theoretical correction digital value DJ corresponding to each correction point is calculated based on the accuracy K of the analog-to-digital converter S Comprising the following steps:
determining the numerical range of the output of the analog-to-digital converter according to the precision K of the analog-to-digital converter, wherein the numerical range of the analog-to-digital converter is [0,16 ] K/4 -1]；
Obtaining the maximum voltage value V of the measuring range of the analog-digital converter max ；
The theoretical correction digital value DJ S The method comprises the following steps:
DJ S ＝(16 K/4 -1)*AJ S /V max (4)。
6. the method of claim 4, wherein prior to obtaining the first digital voltage value D1 of the analog-to-digital converter output, the method further comprises:
acquiring actual correction digital values DSJ corresponding to the correction points through a wafer CP of the analog-to-digital converter S Where s=0, 1,2,...
7. An analog-to-digital conversion correction device, the device comprising:
the first acquisition module is used for acquiring a first digital voltage value D1 output by the analog-to-digital converter;
a second acquisition module for acquiring a first correction interval [ DSJ ] to which the first analog voltage value A1 belongs X-1 ，DSJ X ]Wherein DSJ X-1 For the actual correction digital value of the left end point of the first correction interval, DSJ X For the actual correction digital value of the right end point of the first correction interval, x=1, 2,..n, N is the number of correction points;
a third obtaining module for obtaining a theoretical correction digital value DJ of the left end point of the first correction interval X-1 And actually correcting the digital value DSJ X-1 Is the difference P of (2) SD(X-1) And the first correction interval [ DSJ ] X-1 ，DSJ X ]Corresponding first correction interval difference D LX And a first adjacent correction point deviation J PdX ；
The calculating module is configured to calculate a first compensation value B1 of the first digital voltage value D1, and the specific formula is:
B1＝(D1-DSJ X-1 )*J PdX /D LX (1)
the calculation module is further used for calculating a corrected first output digital voltage value D1 corresponding to the first digital voltage value D1 Compared with The specific formula is as follows:
D1 compared with ＝D1+P SD(X-1) +B1 (2)。
8. A computer readable storage medium, on which a computer program is stored, characterized in that the computer program, when being executed by a processor, implements the steps of the method according to any of claims 1-6.
9. An electronic device comprising a memory, a processor and a computer program stored on the memory and running on the processor, the processor implementing the steps of the method according to any one of claims 1-6 when the computer program is executed.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310194018.9A CN116170017A (en) | 2023-02-24 | 2023-02-24 | Analog-to-digital conversion correction method and device, storage medium and electronic equipment |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202310194018.9A CN116170017A (en) | 2023-02-24 | 2023-02-24 | Analog-to-digital conversion correction method and device, storage medium and electronic equipment |
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| CN116170017A true CN116170017A (en) | 2023-05-26 |
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