CN116167313A - Training data generation method and system for integrated circuit design - Google Patents

Training data generation method and system for integrated circuit design Download PDF

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CN116167313A
CN116167313A CN202310184527.3A CN202310184527A CN116167313A CN 116167313 A CN116167313 A CN 116167313A CN 202310184527 A CN202310184527 A CN 202310184527A CN 116167313 A CN116167313 A CN 116167313A
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饶文烨
朱广慧
刘烈生
冯丽娟
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Shenzhen Moore Core Technology Co ltd
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Abstract

The invention provides a training data generation method and a training data generation system for integrated circuit design, wherein the method comprises the steps of selecting a product type, and grouping products according to a test result under the selected product type, wherein the grouping comprises a reference group and a fault defect group; sampling the reference group and the fault defect group respectively to obtain a sampling reference group and a sampling fault defect group; comparing the test parameters of the sampling reference group and the test parameters of the sampling fault defect group, and screening parameters to be trained; model training is carried out on parameters needing training to generate a model for predicting the types of faults and defects which are likely to occur in the future, and a system applied by the method comprises the following steps: the system comprises a grouping module, a sampling module, a parameter screening module and a training module, wherein the method and the system are used for predicting the failure probability of the reliability test; and the production process and/or process parameters are adjusted according to the prediction result, so that the reliability test failure probability is reduced, the cost is reduced, and the working efficiency is improved.

Description

Training data generation method and system for integrated circuit design
Technical Field
The present invention relates to the field of integrated circuit technologies, and in particular, to a training data generating method and system for integrated circuit design.
Background
The integrated circuit is a miniature electronic device or component capable of realizing certain circuit functions by interconnecting components and wires of a triode, a diode, a resistor, a capacitor, an inductor and the like required in one circuit together by adopting a certain process, manufacturing the components and wires on a small or a plurality of small ceramic, glass or semiconductor wafers and then packaging the components and the wafers together. Because of the numerous procedures and complex flow of the integrated circuit production line, a large number of production with complex correlations can be generated, the test types and the reliability test are also numerous, but the reliability test is an important ring for guaranteeing the quality, but the reliability test is sampling test, is relatively long in time consumption and can be destructive test, has relatively high cost, and is a difficult problem how to predict the result of the reliability test through the test of the front end.
Disclosure of Invention
The invention provides a training data generation method and a training data generation system for integrated circuit design, which are used for realizing the prediction of the failure probability of reliability test through extracting full test data and machine training; the reliability test method has the advantages that the failure probability is predicted, the production process and/or the process parameters are adjusted according to the prediction result, the reliability test failure probability is reduced in advance, the number of products for the reliability test can be reduced, the cost is reduced, and the working efficiency is improved.
The invention provides a training data generation method for integrated circuit design, which comprises the following steps:
s1, selecting a product type, and grouping products according to a test result under the selected product type, wherein the grouping comprises a reference group and a fault defect group;
s2, sampling the reference group and the fault defect group respectively to obtain a sampling reference group and a sampling fault defect group;
s3, comparing test parameters of the sampling reference group and the sampling fault defect group, and screening parameters to be trained;
and S4, carrying out model training on parameters to be trained to generate a model for predicting possible faults and defect types in the future.
Further, selecting a product type, and grouping products according to test results under the selected product type, wherein the grouping comprises a reference group and a fault defect group; comprising the following steps:
s11, classifying the products according to technical standards and management standards to obtain product types;
s12, obtaining a test result of the reliability test through the reliability test of the integrated circuit;
s13, grouping products according to the test result of the reliability test under the same type, wherein the grouping comprises a reference group and a fault defect group; the reference group includes products that pass the reliability test and products that do not pass the reliability test; the fault defect group is a product with failure in the reliability test of the integrated circuit;
S14, carrying out fault classification on fault defects under the same product type, and dividing the fault defects into different fault defect modes;
s15, making a Berla diagram of the fault defect; obtaining the duty ratio of different fault defect modes in the total fault defects and sequencing the fault defect modes from high to low according to the duty ratio, wherein the duty ratio of each fault defect mode in the total fault defects is f i
Further, the sampling the reference group and the fault defect group to obtain a sampled reference group and a sampled fault defect group respectively includes:
s21, sampling a reference group aiming at a product type, wherein a certain number of products are randomly extracted in the product type as a sampling reference group A; extracting each test parameter of the sampling reference group; dividing the sampling reference group into a training group A1 and a debugging group A2 at random; wherein the number of training groups is equal to the number of debugging groups;
s22, sampling the fault defect group, selecting a product corresponding to the fault defect mode which is arranged in the first three bits based on the reliability test result under the same product type of the reference group as a sampling fault defect group B, and extracting parameters of each test link of the sampling fault defect group; the sampling fault defect group is divided into a training group B1 and a debugging group B2 in a random equal amount;
S23, acquiring scene parameters of the sampling reference group and the sampling fault defect group, wherein the scene parameters comprise temperature, humidity, production line information and material information during testing;
s24, traversing parameters of the sampling reference group, making a parameter distribution diagram, removing abnormal points, and determining whether classification is correct according to the distribution diagram; if not, reclassifying and obtaining reclassifying subcategories according to which the same rules as in S21 are resampled; while the fault defect group is resampled according to the subcategory and according to the rules of S22.
Further, comparing the test parameters of the sampling reference group and the test parameters of the sampling fault defect group, and screening parameters to be trained; comprising the following steps:
s31, comparing each parameter of the sampling fault defect group with the scene parameter according to the fault defect modes and the parameters corresponding to the sampling reference group, and selecting the parameter which accords with the principle of larger difference under each fault defect mode as a target parameter;
s32, carrying out correlation analysis on the target parameters to a correlation coefficient r;
s33, if the correlation coefficient |r| is more than or equal to 0.35, orthogonalizing the corresponding target parameters, and obtaining the preprocessed target parameters without changing other parameters.
Further, the model training is performed on the parameters to be trained to generate a model for predicting the fault and defect types possibly occurring in the future, including:
s41, respectively inputting target parameters preprocessed by the training groups A1 and B1 as training data into a neural network model according to a fault defect mode;
s42, judging factors influencing fault defects through a neural network model, and verifying by utilizing target parameters of the debugging groups A2 and B2;
s43, selecting a final model according to the verification result, predicting the reliability according to the model and the production process, and adjusting the production process and/or process parameters according to the prediction result.
The invention relates to a training data generation system for integrated circuit design, which comprises:
and a grouping module: selecting a product type, and grouping products according to a test result under the selected product type, wherein the grouping comprises a reference group and a fault defect group;
and a sampling module: sampling the reference group and the fault defect group respectively to obtain a sampling reference group and a sampling fault defect group;
and a parameter screening module: comparing the test parameters of the sampling reference group and the test parameters of the sampling fault defect group, and screening parameters to be trained;
Training module: and carrying out model training on parameters needing training to generate a model for predicting the types of faults and defects which are likely to occur in the future.
Further, the training data generating system for integrated circuit design, the grouping module includes:
and a product classification module: classifying the products according to technical standards and management standards to obtain product types;
reliability test module: obtaining a test result of the reliability test through the reliability test of the integrated circuit;
and a product grouping module: grouping products according to the test result of the reliability test under the same type, wherein the grouping comprises a reference group and a fault defect group; the reference group includes products that pass the reliability test and products that do not pass the reliability test; the fault defect group is a product with failure in the reliability test of the integrated circuit;
fault defect classification module: and carrying out fault classification on fault defects under the same product type, and dividing the fault defects into different fault defect modes.
And a sequencing module: making a pareto chart of the fault defects; obtaining the duty ratio of different fault defect modes in the total fault defects and sequencing the fault defect modes from high to low according to the duty ratio Wherein each fault defect mode has a duty ratio f of total fault defects i
Further, a training data generation system for integrated circuit design, wherein the sampling module comprises:
a reference group sampling module: sampling a reference group for a product type, wherein a certain number of products are randomly extracted as a sampling reference group A in the product type; extracting each test parameter of the sampling reference group; dividing the sampling reference group into a training group A1 and a debugging group A2 at random; wherein the number of training groups is equal to the number of debugging groups;
and a fault defect group sampling module: sampling the fault defect group, selecting a product corresponding to the fault defect mode which is arranged in the first three bits based on the reliability test result under the same product type of the reference group as a sampling fault defect group B, and extracting parameters of each test link of the sampling fault defect group; the sampling fault defect group is divided into a training group B1 and a debugging group B2 in a random equal amount;
a scene parameter acquisition module: acquiring scene parameters of the sampling reference group and the sampling fault defect group, wherein the scene parameters comprise temperature, humidity, production line information and material information during testing;
Sample screening module: traversing parameters of the sampling reference group, making a parameter distribution diagram, removing abnormal points, and determining whether classification is correct according to the distribution diagram; if not, reclassifying and obtaining reclassifying subcategories according to which the same rules as in S21 are resampled; while the fault defect group is resampled according to the subcategory and according to the rules of S22.
Further, a training data generating system for integrated circuit design, wherein the parameter screening module comprises:
and the parameter comparison module is used for: comparing each parameter and scene parameter of the sampling fault defect group with the parameter corresponding to the sampling reference group according to the fault defect modes, and selecting the parameter which accords with the principle of larger difference in each fault defect mode as a target parameter;
correlation analysis module: performing correlation analysis on the target parameters to a correlation coefficient r;
and the parameter processing module is used for: if the correlation coefficient |r| is more than or equal to 0.35, orthogonalizing the corresponding target parameters, and obtaining the preprocessed target parameters without changing other parameters.
Further, a training data generation system for integrated circuit design, the training module comprising:
Model input module: respectively inputting target parameters preprocessed by the training groups A1 and B1 as training data into a neural network model according to the fault defect mode;
model verification module: judging factors influencing fault defects through a neural network model, and verifying target parameters of the debugging groups A2 and B2;
and a prediction adjustment module: and selecting a final model according to the verification result, predicting the reliability according to the model and the production process, and adjusting the production process and/or process parameters according to the prediction result.
The invention has the beneficial effects that: the product types are selected by classifying the products and grouped under the same type, so that the selected data are clear and accurate to a family, because one company possibly has a plurality of product types, the test standard and the failure standard of each type are different, the management is facilitated by classifying the products, the selected data are accurately characterized by the characteristics of a certain type, the comparison of parameters between the two groups is facilitated by classifying the products into a reference group and a fault group, and different parameters are selected for modeling, otherwise, because the parameters corresponding to each product are quite many, the modeling has no purpose and wastes resources, the modeling difficulty is increased, and the accuracy is reduced; through model training, the failure rate of reliability is predicted from the front-end production process, whether the production process and parameter setting are accurate can be checked, the production process and/or the process parameter can be adjusted according to the prediction result, the reliability test failure probability is reduced in advance, the number of products for reducing the reliability test can be reduced, the cost is reduced, and the working efficiency is improved.
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FIG. 1 is a schematic diagram of a training data generation method for integrated circuit design according to the present invention;
FIG. 2 is a schematic diagram of a training data generation system for integrated circuit design according to the present invention.
Detailed Description
The preferred embodiments of the present invention will be described below with reference to the accompanying drawings, it being understood that the preferred embodiments described herein are for illustration and explanation of the present invention only, and are not intended to limit the present invention.
The embodiment provides a training data generation method for integrated circuit design, which comprises the following steps:
s1, selecting a product type, and grouping products according to a test result under the selected product type, wherein the grouping comprises a reference group and a fault defect group;
s2, sampling the reference group and the fault defect group respectively to obtain a sampling reference group and a sampling fault defect group;
s3, comparing test parameters of the sampling reference group and the sampling fault defect group, and screening parameters to be trained;
and S4, carrying out model training on parameters to be trained to generate a model for predicting possible faults and defect types in the future.
The working principle of the technical scheme is as follows: selecting a product type, and grouping products according to a test result under the selected product type, wherein the grouping comprises a reference group and a fault defect group; sampling the reference group and the fault defect group respectively to obtain a sampling reference group and a sampling fault defect group; comparing the test parameters of the sampling reference group and the test parameters of the sampling fault defect group, and screening parameters to be trained; and carrying out model training on parameters needing training to generate a model for predicting the types of faults and defects which are likely to occur in the future.
The technical scheme has the effects that: the product types are selected by classifying the products and grouped under the same type, so that the selected data are clear and accurate to a family, because one company possibly has a plurality of product types, the test standard and the failure standard of each type are different, the management is facilitated by classifying the products, the selected data are accurately characterized by the characteristics of a certain type, the comparison of parameters between the two groups is facilitated by classifying the products into a reference group and a fault group, and different parameters are selected for modeling, otherwise, because the parameters corresponding to each product are quite many, the modeling has no purpose and wastes resources, the modeling difficulty is increased, and the accuracy is reduced; through model training, the failure rate of reliability is predicted from the front-end production process, whether the production process and parameter setting are accurate can be checked, the production process and/or the process parameter can be adjusted according to the prediction result, the reliability test failure probability is reduced in advance, the number of products for reducing the reliability test can be reduced, the cost is reduced, and the working efficiency is improved.
The embodiment of the training data generating method for integrated circuit design includes the steps that a product type is selected, products are grouped according to test results under the selected product type, and the grouping includes a reference group and a fault defect group; comprising the following steps:
S11, classifying the products according to technical standards and management standards to obtain product types; the technical standards may include digital integrated circuits, analog integrated circuits, etc. by functional classification; may also be classified by process, including semiconductor integrated circuits, thin film integrated circuits, and the like; the management standards of each company are different, and the classifications are also different, for example, a digital integrated circuit may also exist in different models in the same company, and the product types are specific to a product of a certain model inside the company;
s12, obtaining a test result of the reliability test through the reliability test of the integrated circuit; the reliability test of the integrated circuit is sampling detection, the sampling proportion is determined according to different products, and the integrated circuit is not limited herein;
s13, grouping products according to the test result of the reliability test under the same type, wherein the grouping comprises a reference group and a fault defect group; the reference group includes products that pass the reliability test and products that do not pass the reliability test; the fault defect group is a product with failure in the reliability test of the integrated circuit;
s14, carrying out fault classification on fault defects under the same product type, and dividing the fault defects into different fault defect modes;
S15, making a Berla diagram of the fault defect; obtaining the duty ratio of different fault defect modes in the total fault defects and sequencing the fault defect modes from high to low according to the duty ratio, wherein the duty ratio of each fault defect mode in the total fault defects is f i The method comprises the steps of carrying out a first treatment on the surface of the Wherein i=1, 2, 3 … m, the defect ratio of the first three bits is f 1 、f 2 And f 3 And f 1 ≥f 2 ≥f 3
The working principle of the technical scheme is as follows: classifying the products according to technical standards and management standards to obtain product types; the technical standards may include digital integrated circuits, analog integrated circuits, etc. by functional classification; may also be classified by process, including semiconductor integrated circuits, thin film integrated circuits, and the like; the management standards of each company are different, and the classifications are also different, for example, a digital integrated circuit may also exist in different models in the same company, and the product types are specific to a product of a certain model inside the company; obtaining a test result of the reliability test through the reliability test of the integrated circuit; grouping products according to the test result of the reliability test under the same type, wherein the grouping comprises a reference group and a fault defect group; the reference group includes products that pass the reliability test and products that do not pass the reliability test; the fault defect group is a product with failure in the reliability test of the integrated circuit; making a Berlin diagram of the fault defects to obtain the proportion of different fault defect modes in the total fault defects and sequencing the fault defect modes according to the proportion from high to low, wherein the proportion of each fault defect mode in the total fault defects is f i The method comprises the steps of carrying out a first treatment on the surface of the Wherein i=1, 2, 3 … m, the defect ratio of the first three bits is f 1 、f 2 And f 3 And f 1 ≥f 2 ≥f 3
The technical scheme has the effects that: by classifying the products according to technical standards and company management standards, the management is convenient, and meanwhile, the model is established to reflect a certain type of characteristics more accurately; obtaining a result of the reliability test through the reliability test, classifying the failed products into fault defect groups, and classifying the products passing the test and the products not passing the reliability test (because of sampling test during the reliability test) into reference groups; the comparison is convenient; meanwhile, fault defects can be of a plurality of types, and the corresponding failure modes and parameter characterization of each type can be different, so that the fault defects are classified for better and more accurate comparison, and the characteristics are grasped; and the categories with the first three of the failure modes are found through statistical sorting after classification, sampling modeling is conducted on the categories, most of energy can be spent on solving the main problems, and labor and time cost are saved while the problems are solved.
The method for generating training data for integrated circuit design according to this embodiment samples a reference group and a fault defect group to obtain a sampled reference group and a sampled fault defect group, respectively, includes:
S21, sampling a reference group aiming at a product type, wherein a certain number of products are randomly extracted in the product type as a sampling reference group A; extracting each test parameter of the sampling reference group; dividing the sampling reference group into a training group A1 and a debugging group A2 at random; wherein the number of training groups is equal to the number of debugging groups;
wherein, the certain number of minimum value calculation formulas are as follows:
Figure BDA0004103296330000061
wherein Z is α/2 For the reliability factor, the interval is set to 95%, then Z α/2 =1.96; p is the error rate, p=0.5 in order to obtain the maximum P x (1-P), E represents the desired allowable error, set to 3%; the sampling period is determined according to the statistical rule, and the period of the most recent period representing the average production level of the product is selected, for example, in the last month, two weeks of statistical data representing the average production level of the product and the other two weeks of statistical data representing the average production level are compared with each other, random sampling is carried out in two weeks representing the average production level, and if the test machine is different, eachThe machine stations are all selected, and if three machines are used for producing the same product, the random extraction number of each machine is N/3; the parameters include voltage, current and frequency; in principle, selecting a product type with high failure rate of the reliability test of the integrated circuit within a specific period as a research object; the specific period may be one month, two months;
S22, sampling the fault defect group, selecting a product corresponding to the fault defect mode which is arranged in the first three bits based on the reliability test result under the same product type of the reference group as a sampling fault defect group B, and extracting parameters of each test link of the sampling fault defect group; the sampling fault defect group is divided into a training group B1 and a debugging group B2 in a random equal amount;
setting the number of sampling fault defect groups to be n; then
Figure BDA0004103296330000071
The sampling fault group parameter selection period is suitably extended based on the period selected by the reference group parameter, depending on the fault group defect number, for example: the reference group selects data of nearly two weeks, and the fault defect amount of the same time period as the reference group does not reach the sampling number, and the fault defect amount can extend forward or backward for two weeks based on the time of the reference group; />
Figure BDA0004103296330000072
The sum of the duty ratios of the fault defect modes in the total fault defects for the top three ranks;
s23, acquiring scene parameters of the sampling reference group and the sampling fault defect group, wherein the scene parameters comprise temperature, humidity, production line information and material information during testing;
s24, traversing parameters of the sampling reference group, making a parameter distribution diagram, removing abnormal points, and determining whether classification is correct according to the distribution diagram; if not, reclassifying and obtaining reclassifying subcategories according to which the same rules as in S21 are resampled; at the same time, the fault defect group is resampled according to the subcategory and the rule of S22; if a certain parameter is originally normal distribution, the distribution diagram is found to be bimodal after sampling, which means that the product category may be incorrectly classified, or that a small subclass exists in each category, so that the double peaks appear, the abnormal points need to be reclassified and sampled according to the screening condition of the subclass, for example, the average value of a certain parameter is about 10, the value of 99% distribution is below 50, the value of a certain individual point is 100, 200 or even 1000, and the points do not have statistical significance and need to be removed.
The working principle of the technical scheme is as follows: sampling a reference group for a product type, wherein a certain number of products are randomly extracted as a sampling reference group A in the product type; extracting each test parameter of the sampling reference group; dividing the sampling reference group into a training group A1 and a debugging group A2 at random; wherein the number of training groups is equal to the number of debugging groups; the certain number of minimum calculation formulas are as follows:
Figure BDA0004103296330000073
wherein Z is α/2 For the reliability factor, the interval is set to 95%, then Z α/2 =1.96; p is the error rate, p=0.5 in order to obtain the maximum P x (1-P), E represents the desired allowable error, set to 3%; the sampling time period is determined according to a statistical rule, a time period which can most represent the average production level of the product in the latest time period is selected, for example, in the latest month, two weeks of statistical data represent the average production level of the product, and the other two weeks have larger difference, random sampling is carried out in two weeks representing the average production level, if the test machines are different, each machine needs to be selected, if three machines do the same product, and the random sampling number of each machine is N/3; the parameters include voltage, current and frequency; in principle, selecting a product type with high failure rate of the reliability test of the integrated circuit within a specific period as a research object; the specific period may be one month, two months; sampling the fault defect group, selecting a fault defect mode which is arranged in the first three positions based on a reliability test result under the same product type as the reference group and f i Products with the content of more than or equal to 12 percent are taken as a sampling fault defect group BTaking parameters of each test link of the sampling fault defect group; the sampling fault defect group is divided into a training group B1 and a debugging group B2 in a random equal amount; setting the number of sampling fault defect groups to be n; then->
Figure BDA0004103296330000081
The sampling fault group parameter selection time period is properly extended based on the time period selected by the reference group parameter, and depends on the defect number of the fault group; acquiring scene parameters of the sampling reference group and the sampling fault defect group, wherein the scene parameters comprise temperature, humidity, production line information and material information during testing; traversing parameters of the sampling reference group, making a parameter distribution diagram, removing abnormal points, and determining whether classification is correct according to the distribution diagram; if not, reclassifying and obtaining reclassifying subcategories according to which the same rules as in S21 are resampled; at the same time, the fault defect group is resampled according to the subcategory and the rule of S22; if a certain parameter is originally normal distribution, the distribution diagram is found to be bimodal after sampling, which means that the product category may be incorrectly classified, or that a small subclass exists in each category, so that the double peaks appear, the abnormal points need to be reclassified and sampled according to the screening condition of the subclass, for example, the average value of a certain parameter is about 10, the value of 99% distribution is below 50, the value of a certain individual point is 100, 200 or even 1000, and the points do not have statistical significance and need to be removed.
The technical scheme has the effects that: by sampling a reference group according to a product type, selecting a product type with high failure rate of the reliability test of the integrated circuit in a specific period recently selected as a research object in principle, and searching for reasons to solve the problem is more needed because of the high failure rate, and meanwhile, if the failure rate is high, the sample quantity of the failure group is enough, and a certain number of products are randomly extracted to be used as a sampling reference group A; extracting each test parameter of the sampling reference group; dividing the sampling reference group into a training group A1 and a debugging group A2 at random; the training groups and the debugging groups are equal in number, and the training groups are used for verification and fine adjustment by setting the training groups as training parameters, so that the accuracy of the model is improved; through limiting the sampling quantity, the method accords with a statistical rule, takes enough data, and models more accurately; the first three groups of data with the highest fault defect proportion are selected, the number of fault faults of each group reaches a certain standard, the number of fault failure groups is ensured, analysis is more accurate and reliable, the categories with the first three groups of fault modes are found through statistical sorting, sampling modeling is conducted on the categories, most of efforts can be spent on solving main problems, and labor and time cost are saved while the problems are solved; the scene parameters of the sampling reference group and the sampling fault defect group are added into comparison, so that the comparison information is more comprehensive; and determining whether the classification is correct or not through a distribution diagram of the parameters, if the classification is incorrect, timely adjusting, and meanwhile, eliminating points which do not have statistical significance, so that the modeling accuracy is ensured.
The embodiment provides a training data generating method for integrated circuit design, which is used for comparing test parameters of a sampling reference group and a sampling fault defect group and screening parameters to be trained; comprising the following steps:
s31, comparing each parameter of the sampling fault defect group with the scene parameter according to the fault defect modes and the parameters corresponding to the sampling reference group, and selecting the parameter which accords with the principle of larger difference under each fault defect mode as a target parameter; the larger judgment rule of the difference is as follows: the numerical parameter mean value is larger than a standard deviation, and whether the character type comparison is the same or not is different, such as test machine information, product production batch information, wafer mark symbol information, material information and the like, and the Boolean data is only true and false.
S32, carrying out correlation analysis on the target parameters to a correlation coefficient r;
s33, if the correlation coefficient |r| is more than or equal to 0.35, orthogonalizing the corresponding target parameters, and obtaining the preprocessed target parameters without changing other parameters; related parameters such as voltage and current.
The working principle of the technical scheme is as follows: comparing each parameter and scene parameter of the sampling fault defect group with the parameter corresponding to the sampling reference group according to the fault defect modes, and selecting the parameter which accords with the principle of larger difference in each fault defect mode as a target parameter; the larger judgment rule of the difference is as follows: the numerical parameter mean value is larger than a standard deviation, and whether the character type comparison is the same or not is different, such as test machine information, product production batch information, wafer mark symbol information, material information and the like, and the Boolean data is only true and false. Performing correlation analysis on the target parameters to a correlation coefficient r; if the correlation coefficient |r| is more than or equal to 0.35, orthogonalizing the corresponding target parameters, and obtaining the preprocessed target parameters without changing other parameters.
The technical scheme has the effects that: the parameters of the difference determined according to the rules are screened out as target parameters through parameter comparison and specified difference rules, so that the input of the parameters in the model can be reduced, the noise of the model is reduced, the modeling difficulty is reduced, the accuracy is improved, the related parameters are subjected to orthogonal processing through correlation analysis, and the interaction among the related parameters is reduced; the influence weights of other parameters are not reduced because the parameter correlations increase the specific gravity in the model.
The method for generating training data for integrated circuit design according to this embodiment is characterized in that the model training is performed on parameters to be trained to generate a model for predicting possible faults and defect types in the future, and the method includes:
s41, respectively inputting target parameters preprocessed by the training groups A1 and B1 as training data into a neural network model according to a fault defect mode;
s42, judging factors influencing fault defects through a neural network model, and verifying by utilizing target parameters of the debugging groups A2 and B2;
s43, selecting a final model according to the verification result, predicting the reliability according to the model and the production process, and adjusting the production process and/or process parameters according to the prediction result.
The working principle of the technical scheme is as follows: respectively inputting target parameters preprocessed by the training groups A1 and B1 as training data into a neural network model according to the fault defect mode; judging factors influencing fault defects through a neural network model, and verifying target parameters of the debugging groups A2 and B2; and selecting a final model according to the verification result, predicting the reliability according to the model and the production process, and adjusting the production process and/or process parameters according to the prediction result.
The technical scheme has the effects that; respectively inputting target parameters processed by the training set as training data into a neural network model according to the fault defect mode; judging factors influencing fault defects through a neural network model; verifying by utilizing the target parameters of the debugging group; selecting a final model according to the verification result, reducing modeling errors to the maximum extent, and obtaining an accurate model; and predicting the reliable performance result through the model, and adjusting the production process and/or the process parameters according to the prediction result.
A training data generation system for integrated circuit design according to this embodiment, the system comprising:
And a grouping module: selecting a product type, and grouping products according to a test result under the selected product type, wherein the grouping comprises a reference group and a fault defect group;
and a sampling module: sampling the reference group and the fault defect group respectively to obtain a sampling reference group and a sampling fault defect group;
and a parameter screening module: comparing the test parameters of the sampling reference group and the test parameters of the sampling fault defect group, and screening parameters to be trained;
training module: and carrying out model training on parameters needing training to generate a model for predicting the types of faults and defects which are likely to occur in the future.
The working principle of the technical scheme is as follows: selecting a product type through a grouping module, and grouping the products according to the test result under the selected product type, wherein the grouping comprises a reference group and a fault defect group; sampling the reference group and the fault defect group through a sampling module to obtain a sampling reference group and a sampling fault defect group; comparing the test parameters of the sampling reference group and the test parameters of the sampling fault defect group through a parameter screening module, and screening parameters to be trained; and carrying out model training on parameters to be trained through a training module, and generating a model for predicting the types of faults and defects which are likely to occur in the future.
The technical scheme has the effects that: by classifying the products according to technical standards and company management standards, the management is convenient, and meanwhile, the model is established to reflect a certain type of characteristics more accurately; obtaining a result of the reliability test through the reliability test, classifying the failed products into fault defect groups, and classifying the products passing the test and the products not passing the reliability test (because of sampling test during the reliability test) into reference groups; the comparison is convenient; meanwhile, fault defects can be of a plurality of types, and the corresponding failure modes and parameter characterization of each type can be different, so that the fault defects are classified for better and more accurate comparison, and the characteristics are grasped; and the categories with the first three of the failure modes are found through statistical sorting after classification, sampling modeling is conducted on the categories, most of energy can be spent on solving the main problems, and labor and time cost are saved while the problems are solved.
The training data generating system for integrated circuit design of this embodiment, the grouping module includes:
and a product classification module: classifying the products according to technical standards and management standards to obtain product types; the technical standards may include digital integrated circuits, analog integrated circuits, etc. by functional classification; the semiconductor integrated circuits, the thin film integrated circuits, and the like can be classified by processes, and the semiconductor integrated circuits, the thin film integrated circuits, and the like can also be used; the management standards of each company are different, and the classifications are also different, for example, a digital integrated circuit may also exist in different models in the same company, and the product types are specific to a product of a certain model inside the company;
Reliability test module: obtaining a test result of the reliability test through the reliability test of the integrated circuit;
and a product grouping module: grouping products according to the test result of the reliability test under the same type, wherein the grouping comprises a reference group and a fault defect group; the reference group includes products that pass the reliability test and products that do not pass the reliability test; the fault defect group is a product with failure in the reliability test of the integrated circuit;
fault defect classification module: and carrying out fault classification on fault defects under the same product type, and dividing the fault defects into different fault defect modes.
And a sequencing module: making a pareto chart of the fault defects; obtaining the duty ratio of different fault defect modes in the total fault defects and sequencing the fault defect modes from high to low according to the duty ratio, wherein the duty ratio of each fault defect mode in the total fault defects is f i Wherein i=1, 2, 3 … m, the defect ratio of the first three bits is f 1 、f 2 And f 3 And f 1 ≥f 2 ≥f 3
The working principle of the technical scheme is as follows: classifying the products according to technical standards and management standards by a product classification module to obtain product types; the technical standards may include digital integrated circuits, analog integrated circuits, etc. by functional classification; the semiconductor integrated circuits, the thin film integrated circuits, and the like can be classified by processes, and the semiconductor integrated circuits, the thin film integrated circuits, and the like can also be used; the management standards of each company are different, and the classifications are also different, for example, a digital integrated circuit may also exist in different models in the same company, and the product types are specific to a product of a certain model inside the company; the reliability test module is used for obtaining a test result of the reliability test through the reliability test of the integrated circuit; grouping products according to the test result of the reliability test under the same type by a product grouping module, wherein the grouping comprises a reference group and a fault defect group; the reference group includes products that pass the reliability test and products that do not pass the reliability test; the fault defect group is a product with failure in the reliability test of the integrated circuit; and carrying out fault classification on the fault defects under the same product type through a fault defect classification module, and classifying the fault defects into different fault defect modes. Through the sequencing module: making a pareto chart of the fault defects; obtaining different fault defect modes in general The duty ratio of the barrier defect and the fault defect modes are ordered from high to low according to the duty ratio, wherein the duty ratio of each fault defect mode in the total fault defect is f i Wherein i=1, 2, 3 … m, the defect ratio of the first three bits is f 1 、f 2 And f 3 And f 1 ≥f 2 ≥f 3
The technical scheme has the effects that: by sampling a reference group according to a product type, selecting a product type with high failure rate of the reliability test of the integrated circuit in a specific period recently selected as a research object in principle, and searching for reasons to solve the problem is more needed because of the high failure rate, and meanwhile, if the failure rate is high, the sample quantity of the failure group is enough, and a certain number of products are randomly extracted to be used as a sampling reference group A; extracting each test parameter of the sampling reference group; dividing the sampling reference group into a training group A1 and a debugging group A2 at random; the training groups and the debugging groups are equal in number, and the training groups are used for verification and fine adjustment by setting the training groups as training parameters, so that the accuracy of the model is improved; through limiting the sampling quantity, the method accords with a statistical rule, takes enough data, and models more accurately; the first three groups of data with the highest fault defect proportion are selected, the number of the third groups meeting a certain standard is limited, the number of fault failure groups is guaranteed, analysis is more accurate and reliable, the categories with the first three groups of failure modes are found through statistical sorting, sampling modeling is conducted on the categories, most of efforts can be spent on solving the main problems, and labor and time cost are saved while the problems are solved; the scene parameters of the sampling reference group and the sampling fault defect group are added into comparison, so that the comparison information is more comprehensive; and determining whether the classification is correct or not through a distribution diagram of the parameters, if the classification is incorrect, timely adjusting, and meanwhile, eliminating points which do not have statistical significance, so that the modeling accuracy is ensured.
A training data generation system for integrated circuit design according to this embodiment, the sampling module includes:
a reference group sampling module: sampling a reference group for a product type, wherein a certain number of products are randomly extracted as a sampling reference group A in the product type; extracting each test parameter of the sampling reference group; dividing the sampling reference group into a training group A1 and a debugging group A2 at random; wherein the number of training groups is equal to the number of debugging groups;
wherein; the certain number of minimum calculation formulas are as follows:
Figure BDA0004103296330000121
wherein Z is α/2 For the reliability factor, the interval is set to 95%, then Z α/2 =1.96; p is the error rate, p=0.5 in order to obtain the maximum P x (1-P), E represents the desired allowable error, set to 3%; the sampling time period is determined according to a statistical rule, a time period which can most represent the average production level of the product in the latest time period is selected, for example, in the latest month, two weeks of statistical data represent the average production level of the product, and the other two weeks have larger difference, random sampling is carried out in two weeks representing the average production level, if the test machines are different, each machine needs to be selected, if three machines do the same product, and the random sampling number of each machine is N/3; the parameters include voltage, current and frequency; in principle, selecting a product type with high failure rate of the reliability test of the integrated circuit within a specific period as a research object; the specific period may be one month, two months;
And a fault defect group sampling module: sampling the fault defect group, selecting a product corresponding to the fault defect mode which is arranged in the first three bits based on the reliability test result under the same product type of the reference group as a sampling fault defect group B, and extracting parameters of each test link of the sampling fault defect group; the sampling fault defect group is divided into a training group B1 and a debugging group B2 in a random equal amount;
setting the number of sampling fault defect groups to be n; then
Figure BDA0004103296330000122
The sampling fault group parameter selection period is selected based on the reference group parameterThe time period is properly extended, and depends on the defect number of the fault group; for example: the reference group selects data of nearly two weeks, and the fault defect amount of the same time period as the reference group does not reach the sampling number, and the fault defect amount can extend forward or backward for two weeks based on the time of the reference group; />
Figure BDA0004103296330000123
The sum of the duty ratios of the fault defect modes in the total fault defects for the top three ranks;
a scene parameter acquisition module: acquiring scene parameters of the sampling reference group and the sampling fault defect group, wherein the scene parameters comprise temperature, humidity, production line information and material information during testing;
sample screening module: traversing parameters of the sampling reference group, making a parameter distribution diagram, removing abnormal points, and determining whether classification is correct according to the distribution diagram; if not, reclassifying and obtaining reclassifying subcategories according to which the same rules as in S21 are resampled; while the fault defect group is resampled according to the subcategory and according to the rules of S22. If a certain parameter is originally normal distribution, the distribution diagram is found to be bimodal after sampling, which means that the product category may be incorrectly classified, or that a small subclass exists in each category, so that the double peaks appear, the abnormal points need to be reclassified and sampled according to the screening condition of the subclass, for example, the average value of a certain parameter is about 10, the value of 99% distribution is below 50, the value of a certain individual point is 100, 200 or even 1000, and the points do not have statistical significance and need to be removed.
The working principle of the technical scheme is as follows: sampling a reference group for a product type by a reference group sampling module, wherein a certain number of products are randomly extracted as a sampling reference group A in the product type; extracting each test parameter of the sampling reference group; dividing the sampling reference group into a training group A1 and a debugging group A2 at random; wherein the number of training groups is equal to the number of debugging groups; the certain number of minimum calculation formulas are as follows:
Figure BDA0004103296330000131
wherein Z is α/2 For the reliability factor, the interval is set to 95%, then Z α/2 =1.96; p is the error rate, p=0.5 in order to obtain the maximum P x (1-P), E represents the desired allowable error, set to 3%; the sampling time period is determined according to a statistical rule, a time period which can most represent the average production level of the product in the latest time period is selected, for example, in the latest month, two weeks of statistical data represent the average production level of the product, and the other two weeks have larger difference, random sampling is carried out in two weeks representing the average production level, if the test machines are different, each machine needs to be selected, if three machines do the same product, and the random sampling number of each machine is N/3; the parameters include voltage, current and frequency; in principle, selecting a product type with high failure rate of the reliability test of the integrated circuit within a specific period as a research object; the specific period may be one month, two months; sampling the fault defect group through a fault defect group sampling module, selecting a product corresponding to a fault defect mode which is arranged in the first three bits based on a reliability test result under the same product type of the reference group as a sampling fault defect group B, and extracting parameters of each test link of the sampling fault defect group; the sampling fault defect group is divided into a training group B1 and a debugging group B2 in a random equal amount; setting the number of sampling fault defect groups to be n; then- >
Figure BDA0004103296330000132
The sampling fault group parameter selection time period is properly extended based on the time period selected by the reference group parameter, and depends on the defect number of the fault group; acquiring scene parameters of the sampling reference group and the sampling fault defect group through a scene parameter acquisition module, wherein the scene parameters comprise temperature, humidity, production line information and material information during testing; traversing the parameters of the sampling reference group through the sample screening module, making a parameter distribution diagram, eliminating abnormal points, and determining whether classification is correct according to the distribution diagram; if not, reclassifying and obtaining reclassifying subcategories according to the subcategoriesClass, resampling according to the same rule as S21; while the fault defect group is resampled according to the subcategory and according to the rules of S22. If a certain parameter is originally normal distribution, the distribution diagram is found to be bimodal after sampling, which means that the product category may be incorrectly classified, or that a small subclass exists in each category, so that the double peaks appear, the abnormal points need to be reclassified and sampled according to the screening condition of the subclass, for example, the average value of a certain parameter is about 10, the value of 99% distribution is below 50, the value of a certain individual point is 100, 200 or even 1000, and the points do not have statistical significance and need to be removed.
The technical scheme has the effects that: by sampling a reference group according to a product type, selecting a product type with high failure rate of the reliability test of the integrated circuit in a specific period recently selected as a research object in principle, and searching for reasons to solve the problem is more needed because of the high failure rate, and meanwhile, if the failure rate is high, the sample quantity of the failure group is enough, and a certain number of products are randomly extracted to be used as a sampling reference group A; extracting each test parameter of the sampling reference group; dividing the sampling reference group into a training group A1 and a debugging group A2 at random; the training groups and the debugging groups are equal in number, and the training groups are used for verification and fine adjustment by setting the training groups as training parameters, so that the accuracy of the model is improved; through limiting the sampling quantity, the method accords with a statistical rule, takes enough data, and models more accurately; the first three groups of data with the highest fault defect proportion are selected, the number of fault faults of each group reaches a certain standard, the number of fault failure groups is ensured, analysis is more accurate and reliable, the categories with the first three groups of fault modes are found through statistical sorting, sampling modeling is conducted on the categories, most of efforts can be spent on solving main problems, and labor and time cost are saved while the problems are solved; the scene parameters of the sampling reference group and the sampling fault defect group are added into comparison, so that the comparison information is more comprehensive; and determining whether the classification is correct or not through a distribution diagram of the parameters, if the classification is incorrect, timely adjusting, and meanwhile, eliminating points which do not have statistical significance, so that the modeling accuracy is ensured.
The training data generating system for integrated circuit design of this embodiment, the parameter filtering module includes:
and the parameter comparison module is used for: comparing each parameter and scene parameter of the sampling fault defect group with the parameter corresponding to the sampling reference group according to the fault defect modes, and selecting the parameter which accords with the principle of larger difference in each fault defect mode as a target parameter; the larger judgment rule of the difference is as follows: the numerical parameter mean value is larger than a standard deviation, whether the character type comparison is the same or not, and the difference is the difference, such as test machine information, product production batch information, wafer mark symbol information, material information and the like, and the Boolean data is only true and false;
correlation analysis module: performing correlation analysis on the target parameters to a correlation coefficient r;
and the parameter processing module is used for: if the correlation coefficient |r| is more than or equal to 0.35, orthogonalizing the corresponding target parameters, and obtaining the preprocessed target parameters without changing other parameters; related parameters such as voltage and current.
The working principle of the technical scheme is as follows: comparing each parameter of the sampling fault defect group and the scene parameter with the parameter corresponding to the sampling reference group according to the fault defect modes respectively by a parameter comparison module, and selecting the parameter which accords with the principle of larger difference in each fault defect mode as a target parameter; the larger judgment rule of the difference is as follows: the numerical parameter mean value is larger than a standard deviation, whether the character type comparison is the same or not, and the difference is the difference, such as test machine information, product production batch information, wafer mark symbol information, material information and the like, and the Boolean data is only true and false; a correlation analysis module is used for carrying out correlation analysis on the target parameters to a correlation coefficient r; through a parameter processing module, if the correlation coefficient |r| is more than or equal to 0.35, orthogonalizing the corresponding target parameter, and obtaining the preprocessed target parameter without changing other parameters; related parameters such as voltage and current.
The technical scheme has the effects that: the parameters of the difference determined according to the rules are screened out as target parameters through parameter comparison and specified difference rules, so that the input of the parameters in the model can be reduced, the noise of the model is reduced, the modeling difficulty is reduced, the accuracy is improved, the related parameters are subjected to orthogonal processing through correlation analysis, and the interaction among the related parameters is reduced; the influence weights of other parameters are not reduced because the parameter correlations increase the specific gravity in the model.
The embodiment provides a training data generating system for integrated circuit design, the training module includes:
model input module: respectively inputting target parameters preprocessed by the training groups A1 and B1 as training data into a neural network model according to the fault defect mode;
model verification module: judging factors influencing fault defects through a neural network model, and verifying target parameters of the debugging groups A2 and B2;
and a prediction adjustment module: and selecting a final model according to the verification result, predicting the reliability according to the model and the production process, and adjusting the production process and/or process parameters according to the prediction result.
The working principle of the technical scheme is as follows: the target parameters preprocessed by the training groups A1 and B1 are used as training data to be respectively input into a neural network model according to the fault defect mode through a model input module; judging factors influencing fault defects through a neural network model by a model verification module, and verifying by utilizing target parameters of the debugging groups A2 and B2; and selecting a final model according to the verification result through a prediction adjustment module, predicting the reliability in the production process according to the model and the production process, and adjusting the production process and/or process parameters according to the prediction result.
The technical scheme has the effects that; respectively inputting target parameters processed by the training set as training data into a neural network model according to the fault defect mode; judging factors influencing fault defects through a neural network model; verifying by utilizing the target parameters of the debugging group; selecting a final model according to the verification result, reducing modeling errors to the maximum extent, and obtaining an accurate model; and predicting the reliable performance result through the model, and adjusting the production process and/or the process parameters according to the prediction result.
It will be apparent to those skilled in the art that various modifications and variations can be made to the present invention without departing from the spirit or scope of the invention. Thus, it is intended that the present invention also include such modifications and alterations insofar as they come within the scope of the appended claims or the equivalents thereof.

Claims (10)

1. A training data generation method for an integrated circuit design, the method comprising:
s1, selecting a product type, and grouping products according to a test result under the selected product type, wherein the grouping comprises a reference group and a fault defect group;
s2, sampling the reference group and the fault defect group respectively to obtain a sampling reference group and a sampling fault defect group;
s3, comparing test parameters of the sampling reference group and the sampling fault defect group, and screening parameters to be trained;
and S4, carrying out model training on parameters to be trained to generate a model for predicting possible faults and defect types in the future.
2. The method of claim 1, wherein the selecting a product type groups products according to test results under the selected product type, the grouping including a reference group and a fault defect group; comprising the following steps:
s11, classifying the products according to technical standards and management standards to obtain product types;
s12, obtaining a test result of the reliability test through the reliability test of the integrated circuit;
s13, grouping products according to the test result of the reliability test under the same type, wherein the grouping comprises a reference group and a fault defect group; the reference group includes products that pass the reliability test and products that do not pass the reliability test; the fault defect group is a product with failure in the reliability test of the integrated circuit;
S14, carrying out fault classification on fault defects under the same product type, and dividing the fault defects into different fault defect modes;
s15, making a Berla diagram of the fault defect; obtaining the duty ratio of different fault defect modes in the total fault defects and sequencing the fault defect modes from high to low according to the duty ratio, wherein the duty ratio of each fault defect mode in the total fault defects is f i
3. A training data generation method for an integrated circuit design as defined in claim 2, wherein said sampling the reference group and the fault defect group, respectively, to obtain a sampled reference group and a sampled fault defect group comprises:
s21, sampling a reference group aiming at a product type, wherein a certain number of products are randomly extracted in the product type as a sampling reference group A; extracting each test parameter of the sampling reference group; dividing the sampling reference group into a training group A1 and a debugging group A2 at random; wherein the number of training groups is equal to the number of debugging groups;
s22, sampling the fault defect group, selecting a product corresponding to the fault defect mode which is arranged in the first three bits based on the reliability test result under the same product type of the reference group as a sampling fault defect group B, and extracting parameters of each test link of the sampling fault defect group; the sampling fault defect group is divided into a training group B1 and a debugging group B2 in a random equal amount;
S23, acquiring scene parameters of the sampling reference group and the sampling fault defect group, wherein the scene parameters comprise temperature, humidity, production line information and material information during testing;
s24, traversing parameters of the sampling reference group, making a parameter distribution diagram, removing abnormal points, and determining whether classification is correct according to the distribution diagram; if not, reclassifying and obtaining reclassifying subcategories according to which the same rules as in S21 are resampled; while the fault defect group is resampled according to the subcategory and according to the rules of S22.
4. A training data generation method for integrated circuit design according to claim 3, wherein the comparing the test parameters of the sampling reference group and the test parameters of the sampling fault defect group, and screening the parameters to be trained; comprising the following steps:
s31, comparing each parameter of the sampling fault defect group with the scene parameter according to the fault defect modes and the parameters corresponding to the sampling reference group, and selecting the parameter which accords with the principle of larger difference under each fault defect mode as a target parameter;
s32, carrying out correlation analysis on the target parameters to a correlation coefficient r;
S33, if the correlation coefficient |r| is more than or equal to 0.35, orthogonalizing the corresponding target parameters, and obtaining the preprocessed target parameters without changing other parameters.
5. The method of claim 4, wherein model training the parameters to be trained to generate a model for predicting the types of faults and defects that may occur in the future comprises:
s41, respectively inputting target parameters preprocessed by the training groups A1 and B1 as training data into a neural network model according to a fault defect mode;
s42, judging factors influencing fault defects through a neural network model, and verifying by utilizing target parameters of the debugging groups A2 and B2;
s43, selecting a final model according to the verification result, predicting the reliability according to the model and the production process, and adjusting the production process and/or process parameters according to the prediction result.
6. A training data generation system for an integrated circuit design, the system comprising:
and a grouping module: selecting a product type, and grouping products according to a test result under the selected product type, wherein the grouping comprises a reference group and a fault defect group;
And a sampling module: sampling the reference group and the fault defect group respectively to obtain a sampling reference group and a sampling fault defect group;
and a parameter screening module: comparing the test parameters of the sampling reference group and the test parameters of the sampling fault defect group, and screening parameters to be trained;
training module: and carrying out model training on parameters needing training to generate a model for predicting the types of faults and defects which are likely to occur in the future.
7. A training data generation system for integrated circuit design as in claim 6 wherein said grouping module comprises:
and a product classification module: classifying the products according to technical standards and management standards to obtain product types;
reliability test module: obtaining a test result of the reliability test through the reliability test of the integrated circuit;
and a product grouping module: grouping products according to the test result of the reliability test under the same type, wherein the grouping comprises a reference group and a fault defect group; the reference group includes products that pass the reliability test and products that do not pass the reliability test; the fault defect group is a product with failure in the reliability test of the integrated circuit;
fault defect classification module: and carrying out fault classification on fault defects under the same product type, and dividing the fault defects into different fault defect modes.
And a sequencing module: making a pareto chart of the fault defects; obtaining the duty ratio of different fault defect modes in the total fault defects and sequencing the fault defect modes from high to low according to the duty ratio, wherein the duty ratio of each fault defect mode in the total fault defects is f i
8. A training data generation system for an integrated circuit design as in claim 6 wherein said sampling module comprises:
a reference group sampling module: sampling a reference group for a product type, wherein a certain number of products are randomly extracted as a sampling reference group A in the product type; extracting each test parameter of the sampling reference group; dividing the sampling reference group into a training group A1 and a debugging group A2 at random; wherein the number of training groups is equal to the number of debugging groups;
and a fault defect group sampling module: sampling the fault defect group, selecting a product corresponding to the fault defect mode which is arranged in the first three bits based on the reliability test result under the same product type of the reference group as a sampling fault defect group B, and extracting parameters of each test link of the sampling fault defect group; the sampling fault defect group is divided into a training group B1 and a debugging group B2 in a random equal amount;
A scene parameter acquisition module: acquiring scene parameters of the sampling reference group and the sampling fault defect group, wherein the scene parameters comprise temperature, humidity, production line information and material information during testing;
sample screening module: traversing parameters of the sampling reference group, making a parameter distribution diagram, removing abnormal points, and determining whether classification is correct according to the distribution diagram; if not, reclassifying and obtaining reclassifying subcategories according to which the same rules as in S21 are resampled; while the fault defect group is resampled according to the subcategory and according to the rules of S22.
9. The training data generation system for integrated circuit design of claim 6, wherein the parameter screening module comprises:
and the parameter comparison module is used for: comparing each parameter and scene parameter of the sampling fault defect group with the parameter corresponding to the sampling reference group according to the fault defect modes, and selecting the parameter which accords with the principle of larger difference in each fault defect mode as a target parameter;
correlation analysis module: performing correlation analysis on the target parameters to a correlation coefficient r;
and the parameter processing module is used for: if the correlation coefficient |r| is more than or equal to 0.35, orthogonalizing the corresponding target parameters, and obtaining the preprocessed target parameters without changing other parameters.
10. The training data generation system for integrated circuit design of claim 6, wherein the training module comprises:
model input module: respectively inputting target parameters preprocessed by the training groups A1 and B1 as training data into a neural network model according to the fault defect mode;
model verification module: judging factors influencing fault defects through a neural network model, and verifying target parameters of the debugging groups A2 and B2;
and a prediction adjustment module: and selecting a final model according to the verification result, predicting the reliability according to the model and the production process, and adjusting the production process and/or process parameters according to the prediction result.
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