CN116165522A - Performance verification method and system for row hammer protection circuit - Google Patents

Performance verification method and system for row hammer protection circuit Download PDF

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CN116165522A
CN116165522A CN202310460475.8A CN202310460475A CN116165522A CN 116165522 A CN116165522 A CN 116165522A CN 202310460475 A CN202310460475 A CN 202310460475A CN 116165522 A CN116165522 A CN 116165522A
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row
activated
protection circuit
protected
addresses
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赵北游
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Changxin Memory Technologies Inc
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Changxin Memory Technologies Inc
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    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/282Testing of electronic circuits specially adapted for particular applications not provided for elsewhere
    • G01R31/2827Testing of electronic protection circuits

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Abstract

The application provides a performance verification method and system of a row hammer protection circuit, and relates to the technical field of semiconductors, wherein the performance verification method of the row hammer protection circuit comprises the following steps: generating a plurality of activation commands, wherein the plurality of activation commands are used for activating a plurality of preset row addresses respectively for a plurality of times so that the number of times that the plurality of row addresses are activated accords with a preset probability distribution; acquiring the number of times each row address is activated and the number of times each row address is protected by a row hammer protection circuit; determining the performance condition of a row hammer protection circuit according to the number of times that each of a plurality of row addresses is activated and the number of times that each row address is protected; the method and the device can intuitively measure the performance of the row hammer protection circuit by carrying out statistical analysis on the activated times and the protected times of the row addresses.

Description

Performance verification method and system for row hammer protection circuit
Technical Field
The present disclosure relates to the field of semiconductor technologies, and in particular, to a performance verification method and system for a row hammer protection circuit.
Background
Under normal conditions, the frequency of each of the plurality of row addresses being activated is relatively uniform, and the activated row addresses can be refreshed within one refresh period, i.e. the probability that normal activation encounters a row hammer (row hammer) is very low. When a row address is continuously deactivated for a short period of time, it is not so fast to refresh the row address in the vicinity thereof, and a row hammer phenomenon occurs. In the related art, the row hammer protection circuit is arranged to avoid the generation of the row hammer phenomenon, and how to verify the performance of the row hammer protection circuit becomes a problem to be solved.
Disclosure of Invention
In view of the foregoing, it is a primary object of the present application to provide a performance verification method and system for a row hammer protection circuit.
In order to achieve the above purpose, the technical scheme of the application is realized as follows:
the embodiment of the application provides a performance verification method of a row hammer protection circuit, which comprises the following steps:
generating a plurality of activation commands, wherein the plurality of activation commands are used for activating a plurality of preset row addresses for a plurality of times respectively so as to enable the number of times of activating the plurality of row addresses to accord with a preset probability distribution;
acquiring the number of times each row address is activated and the number of times each row address is protected by the row hammer protection circuit;
and determining the performance condition of the row hammer protection circuit according to the activated times and the protected times of the row addresses.
In some embodiments, the predetermined probability distribution comprises at least one of a uniform probability distribution, an exponential probability distribution, a semi-normal probability distribution, a linear probability distribution.
In some embodiments, the determining the performance of the row hammer protection circuit according to the number of times the plurality of row addresses are activated and the number of times the plurality of row addresses are protected includes:
when the number of times that the row address is activated exceeds a preset value and the number of times that the row address is protected is 0, judging that the performance of the row hammer protection circuit does not pass;
And when the number of times the row address is activated exceeds a preset value and the number of times the row address is protected is greater than 0, judging that the performance of the row hammer protection circuit passes.
In some embodiments, when determining that the performance of the row hammer protection circuit passes, the method further comprises:
and determining the protection efficiency of the row hammer protection circuit according to the number of times the row addresses are activated and the number of times the row addresses are protected.
In some embodiments, the category of the preset probability distribution comprises one; the determining the protection efficiency of the row hammer protection circuit according to the number of times the row addresses are activated and the number of times the row addresses are protected respectively comprises the following steps:
determining the protection efficiency of the row hammer protection circuit corresponding to a preset probability distribution according to the number of times the row addresses corresponding to the preset probability distribution are activated and the number of times the row addresses are protected; and taking the protection efficiency of the row hammer protection circuit corresponding to a preset probability distribution as the protection efficiency of the row hammer protection circuit.
In some embodiments, the categories of the preset probability distribution include a plurality of categories; the determining the protection efficiency of the row hammer protection circuit according to the number of times the row addresses are activated and the number of times the row addresses are protected respectively comprises the following steps:
For each preset probability distribution in a plurality of preset probability distributions, determining the protection efficiency of the row hammer protection circuit corresponding to the corresponding preset probability distribution according to the number of times the row addresses corresponding to the corresponding preset probability distribution are respectively activated and the number of times the row addresses are protected; and taking the average value of the protection efficiency of the row hammer protection circuit corresponding to all preset probability distribution as the protection efficiency of the row hammer protection circuit.
In some embodiments, the determining the protection efficiency of the row hammer protection circuit according to the number of times the plurality of row addresses are activated and the number of times the plurality of row addresses are protected includes:
determining the probability of each row address being activated according to the number of times each row address is activated;
determining the probability of each row address being protected according to the number of times each row address is protected;
and determining the protection efficiency of the row hammer protection circuit according to the probability that each row address is activated and the probability that each row address is protected.
In some embodiments, the determining the probability of each of the row addresses being activated according to the number of times each of the row addresses is activated includes:
Accumulating the activated times of all the row addresses according to the activated times of each row address to obtain a first value;
sequentially calculating the probability of each row address being activated, wherein the probability of each row address being activated is equal to the ratio of the number of times the row address is activated to the first value;
the determining the probability of each row address being protected according to the number of times each row address is protected comprises the following steps:
accumulating all the times of the row address protection according to the times of the row address protection to obtain a second value;
and calculating the probability of each row address being protected in turn, wherein the probability of the row address being protected is equal to the ratio of the number of times the row address is protected to the second value.
In some embodiments, the determining the protection efficiency of the row hammer protection circuit according to the probability that each row address is activated and the probability that each row address is protected includes:
obtaining the ratio of the probability that each row address is protected to the probability that each row address is activated according to the probability that each row address is activated and the probability that each row address is protected;
Accumulating the ratio of the protected probability to the activated probability of all the row addresses to obtain a third value;
marking the total number of the plurality of row addresses as a fourth value;
and taking the ratio of the third value to the fourth value as the protection efficiency of the row hammer protection circuit.
The embodiment of the application also provides a performance verification system of the row hammer protection circuit, which comprises a row hammer attack generator, an acquisition device and an analysis device; the row hammer attack generator is used for generating a plurality of activation commands, and the plurality of activation commands are used for activating a plurality of preset row addresses for a plurality of times respectively so that the number of times of activating the plurality of row addresses accords with a preset probability distribution; the acquisition device is used for acquiring the number of times each row address is activated and the number of times each row address is protected by the row hammer protection circuit; the analysis device is used for determining the performance condition of the row hammer protection circuit according to the number of times the row addresses are activated and the number of times the row addresses are protected.
According to the performance verification method and system for the row hammer protection circuit, various conditions of row hammer attack are analyzed to obtain the activation times according to the preset probability distribution, and the activation times according to the preset probability distribution are adopted to activate a plurality of preset row addresses respectively for multiple times; a row hammer protection circuit is adopted to respectively protect a plurality of row addresses; and then, carrying out statistical analysis on the activated times and the protected times of the row addresses, thereby intuitively measuring the performance condition of the row hammer protection circuit.
Drawings
FIG. 1 is a schematic diagram of a related art normal operation of a memory;
FIG. 2 is a schematic diagram of a related art ram operation for a memory;
FIG. 3 is a schematic diagram of a related art memory row hammer protection;
fig. 4 is a flowchart of a performance verification method of a row hammer protection circuit according to an embodiment of the present application;
FIG. 5 is a logic block diagram of a performance verification method for a row hammer protection circuit provided in an embodiment of the present application;
FIG. 6 is a schematic diagram of a performance verification method of a row hammer protection circuit according to an embodiment of the present disclosure;
fig. 7 is a theoretical model diagram of a performance verification method of a row hammer protection circuit provided in an embodiment of the present application;
FIG. 8 is a first distribution diagram of the number of times 50 row addresses are activated according to an embodiment of the present application;
FIG. 9 is a distribution diagram of the number of times 50 row addresses are protected corresponding to FIG. 8;
FIG. 10 is a second distribution diagram of the number of times 50 row addresses are activated according to an embodiment of the present application;
FIG. 11 is a distribution diagram of the number of times 50 row addresses are protected corresponding to FIG. 10;
FIG. 12 is a third distribution diagram of the number of times 50 row addresses are activated according to an embodiment of the present application;
FIG. 13 is a distribution diagram of the number of times 50 row addresses are protected corresponding to FIG. 12;
FIG. 14 is a fourth distribution diagram of the number of times 50 row addresses are activated according to an embodiment of the present application;
FIG. 15 is a distribution diagram of the number of times the 50 row addresses corresponding to FIG. 14 are protected;
fig. 16 is a schematic diagram of a performance verification system of a row hammer protection circuit according to an embodiment of the present application.
Detailed Description
The technical scheme of the application is further elaborated below with reference to the drawings in the specification and the specific embodiments.
It will be appreciated that the memory cell of the memory may be a capacitor that stores charge, and that the capacitor must refresh its value immediately after reading, as it may leak and the reading process itself is destructive; alternatively, if not used for a long time, its value must be refreshed at a preset frequency.
It will be appreciated that the state of the memory cell is determined by the charge in the capacitor, which is susceptible to effects between refresh cycles. Specifically, the drifting electrons may migrate into the memory cell, thereby changing the charge in the memory cell. If too many transitions are made, sufficient charge may accumulate to change the perceived state of the stored value, which is a row hammer phenomenon. That is, if a given row address is read for a sufficient amount of time before a refresh occurs, repeated small bursts of these erroneous electrons will change the perceived state of the stored value of the adjacent row address. In fact, as the size shrinks, it is not just the adjacent row addresses that may change. As the distance between rows gets closer, even adjacent rows (two or more rows apart) may be affected.
In the related art, a scheme of increasing a refresh rate or additionally refreshing row addresses around an attacked row address is generally employed to avoid the occurrence of a row hammer phenomenon. Since increasing the refresh rate reduces the data bandwidth while also increasing the refresh power consumption of the memory, a practical and appropriate solution is to additionally refresh the row addresses around the attacked row address.
Specifically, fig. 1 is a schematic diagram of a normal operation of a memory in the related art; FIG. 2 is a schematic diagram of a related art ram operation for a memory; fig. 3 is a schematic diagram of a related art ram protection for a memory. Referring to fig. 1, in normal operation, the frequency of each of the plurality of row addresses being activated is relatively uniform, and the activated row addresses can be refreshed in one refresh period, i.e. the probability that normal operation encounters a row hammer is low. Referring to fig. 2, when a row address is activated a plurality of times in a short period of time, it is not time to refresh the adjacent row address, and a row hammer phenomenon occurs. Therefore, when a row address is continuously read and written in a short time, the nearby row address needs to be refreshed in time, so that the influence of row hammer attack is reduced. Referring to fig. 3, a row hammer protection circuit is generally used to randomly capture an activated row address in the memory, and then physically adjacent row addresses are immediately acquired
Figure SMS_1
Row address->
Figure SMS_2
And refreshing protection is carried out, so that the influence of row hammer attack is reduced, and data errors are prevented. In fig. 3, the first row indicates a command stream, the second row indicates an address stream, and when a row address is activated a plurality of times consecutively in a short time is monitored, the row hammer protection circuit obtains the activated row address by random grabbing, and then checks the row address->
Figure SMS_3
Row address->
Figure SMS_4
And refreshing is carried out, so that the phenomenon of row hammer can be avoided. At present, how to verify the performance of the row hammer protection circuit is a problem to be solved.
Fig. 4 is a flowchart of a performance verification method of a row hammer protection circuit according to an embodiment of the present application, as shown in fig. 4, where the method includes:
s1, generating a plurality of activation commands, wherein the plurality of activation commands are used for activating a plurality of preset row addresses for a plurality of times respectively so that the number of times of activating the row addresses accords with a preset probability distribution;
s2, acquiring the number of times each row address is activated and the number of times each row address is protected by the row hammer protection circuit;
s3, determining the performance condition of the row hammer protection circuit according to the number of times the row addresses are activated and the number of times the row addresses are protected.
It can be understood that, in the embodiment of the present application, by analyzing various conditions existing in the attack of the row hammer, the activation times according to the preset probability distribution are obtained, and the activation times according to the preset probability distribution are adopted to activate the predetermined plurality of row addresses respectively for multiple times; a row hammer protection circuit is adopted to respectively protect a plurality of row addresses; and then, carrying out statistical analysis on the activated times and the protected times of the row addresses, thereby intuitively measuring the performance condition of the row hammer protection circuit.
In some embodiments, the predetermined probability distribution comprises at least one of a uniform probability distribution, an exponential probability distribution, a semi-normal probability distribution, a linear probability distribution.
It may be understood that, in the embodiment of the present application, the predetermined plurality of row addresses may be activated multiple times by using activation times corresponding to one preset probability distribution, or the predetermined plurality of row addresses may be activated multiple times by sequentially using activation times corresponding to at least two preset probability distributions.
It should be noted that the uniform probability distribution refers to: the predetermined number of times the plurality of row addresses are respectively activated is uniformly distributed or substantially uniformly distributed in accordance with the number order of the row addresses. The exponential probability distribution refers to: the number of times the predetermined plurality of row addresses are respectively activated is exponentially distributed according to the number order of the row addresses. The semi-normal probability distribution refers to: the predetermined number of times the plurality of row addresses are activated, respectively, is semi-normal distribution (i.e., half of normal probability distribution) in the order of the numbers of the row addresses. The linear probability distribution refers to: the number of times the predetermined plurality of row addresses are activated, respectively, is linearly distributed according to the number order of the row addresses.
It should be noted that, the preset probability distribution provided in the present application may include not only a uniform probability distribution, an exponential probability distribution, a semi-normal probability distribution, and a linear probability distribution, but also probability distributions other than the uniform probability distribution, the exponential probability distribution, the semi-normal probability distribution, and the linear probability distribution, for example, a normal probability distribution.
In some embodiments, the determining the performance of the row hammer protection circuit according to the number of times the plurality of row addresses are activated and the number of times the plurality of row addresses are protected includes:
when the number of times that the row address is activated exceeds a preset value and the number of times that the row address is protected is 0, judging that the performance of the row hammer protection circuit does not pass;
and when the number of times the row address is activated exceeds a preset value and the number of times the row address is protected is greater than 0, judging that the performance of the row hammer protection circuit passes.
It will be appreciated that activating the same row address a number of times (exceeding a certain threshold) will cause a row hammer phenomenon, which is the true attack address. And for a real attack address, the row hammer protection circuit is protected at least once. Therefore, when the number of times the row address is activated exceeds the preset value and the number of times the row hammer protection circuit is protected is 0, it is determined that the performance of the row hammer protection circuit is not passed.
The preset value corresponds to a threshold value of the activation times of whether the line hammering phenomenon occurs, and the range of the threshold value is not limited because the threshold value corresponding to products of different types is different. In some embodiments, this threshold may be 10000. That is, for each row address activated more than 10000 times, the row hammer protection circuit is protected at least once, if the row hammer protection circuit leaks, the performance of the row hammer protection circuit does not pass, and the protection efficiency is 0.
In some embodiments, when determining that the performance of the row hammer protection circuit passes, the method further comprises:
and determining the protection efficiency of the row hammer protection circuit according to the number of times the row addresses are activated and the number of times the row addresses are protected.
It can be appreciated that when the real attack address is protected at least once by the row hammer protection circuit, the efficiency of the row hammer protection circuit can be further calculated, so that the performance of the row hammer protection circuit can be more intuitively measured.
In some embodiments, the category of the preset probability distribution comprises one; the determining the protection efficiency of the row hammer protection circuit according to the number of times the row addresses are activated and the number of times the row addresses are protected respectively comprises the following steps:
determining the protection efficiency of the row hammer protection circuit corresponding to a preset probability distribution according to the number of times the row addresses corresponding to the preset probability distribution are activated and the number of times the row addresses are protected; and taking the protection efficiency of the row hammer protection circuit corresponding to a preset probability distribution as the protection efficiency of the row hammer protection circuit.
It can be understood that, when the predetermined plurality of row addresses are activated for a plurality of times respectively using only the activation times corresponding to one preset probability distribution, the protection efficiency corresponding to the preset probability distribution is taken as the protection efficiency of the row hammer protection circuit. Specifically, for example, when a predetermined plurality of row addresses are activated a plurality of times respectively using only the activation times corresponding to the uniform probability distribution, the protection efficiency corresponding to the uniform probability distribution is taken as the protection efficiency of the row hammer protection circuit.
In some embodiments, the categories of the preset probability distribution include a plurality of categories; the determining the protection efficiency of the row hammer protection circuit according to the number of times the row addresses are activated and the number of times the row addresses are protected respectively comprises the following steps:
for each preset probability distribution in a plurality of preset probability distributions, determining the protection efficiency of the row hammer protection circuit corresponding to the corresponding preset probability distribution according to the number of times the row addresses corresponding to the corresponding preset probability distribution are respectively activated and the number of times the row addresses are protected; and taking the average value of the protection efficiency of the row hammer protection circuit corresponding to all preset probability distribution as the protection efficiency of the row hammer protection circuit.
It can be understood that when the predetermined plurality of row addresses are activated for multiple times by sequentially adopting the activation times corresponding to at least two preset probability distributions, the protection efficiencies corresponding to the at least two preset probability distributions are averaged, and the average value is used as the protection efficiency of the row hammer protection circuit. Since a preset probability distribution can only quantize a single case, the result is more accurate by averaging quantization in this embodiment. Specifically, for example, when a predetermined plurality of row addresses are activated for a plurality of times by sequentially adopting activation times corresponding to a uniform probability distribution and a linear probability distribution, respectively, protection efficiencies corresponding to the uniform probability distribution and the linear probability distribution are averaged, and the average value is taken as the protection efficiency of the row hammer protection circuit.
Referring next to fig. 5, a logic block diagram of a performance verification method of a row hammer protection circuit according to an embodiment of the present application is provided, where a test workbench 100 includes a row hammer attack generator 10, a row hammer protection circuit schematic diagram netlist 20, a row hammer protection circuit seed report 40, and a library file 50, and a perl script processing and analysis 60 performs statistical analysis on activated row addresses and protected row addresses to obtain a row hammer protection circuit performance analysis and report 30.
It should be noted that, the test workbench 100 is a simulation model provided in the present application, and generates a plurality of activation commands through the row hammer attack generator 10, where the plurality of activation commands are used to activate a predetermined plurality of row addresses for a plurality of times, so that the number of times that the plurality of row addresses are activated accords with a preset probability distribution; inputting a plurality of row addresses into a row hammer protection circuit schematic diagram net list 20, wherein the row hammer protection circuit schematic diagram net list 20 represents a row hammer protection circuit in the simulation process, the connection relation of the row hammer protection circuit is defined by a logic unit Verilog through a library file 50, and row addresses randomly grabbed in the row hammer protection circuit schematic diagram net list 20 in the plurality of row addresses are the protected row addresses; the protected row addresses are output to a row hammer protection circuit seed report 40. The row hammer protection circuit seed report 40 is used to count which activated row addresses are protected by the row hammer protection circuit and which activated row addresses are left unprotected.
With continued reference to fig. 4, in some embodiments, the obtaining the number of times each of the row addresses is protected by the row hammer protection circuit includes:
grabbing the plurality of row addresses by using the row hammer protection circuit;
counting the number of times each row address is grabbed;
and taking the number of times each row address is grabbed as the number of times each row address is protected.
In the memory, a random sampling circuit and a trigger function circuit are generally used to sample and capture a plurality of row addresses. And the number of times that the row address is activated is monitored before grabbing, and when a certain row address is continuously activated for a plurality of times in a short time, the row hammer protection circuit is triggered to randomly grab to obtain the protected row address.
With continued reference to fig. 4, in some embodiments, the method further comprises:
and adding and reducing one or more rows on the basis of each grabbed row address in sequence to obtain a row hammer refreshing protection row.
It should be noted that in a memory, an address scrambler is generally used to obtain the row address of the row hammer refresh protection row based on the row address being grabbed, i.e. to increase and decrease one or more rows based on the row address being grabbed, e.g.
Figure SMS_5
Row (s)/(s)>
Figure SMS_6
And (3) row.
With continued reference to fig. 4, in some embodiments, the determining the protection efficiency of the row hammer protection circuit according to the number of times the plurality of row addresses are each activated and the number of times the row hammer protection circuit is protected includes:
determining the probability of each row address being activated according to the number of times each row address is activated;
determining the probability of each row address being protected according to the number of times each row address is protected;
and determining the protection efficiency of the row hammer protection circuit according to the probability that each row address is activated and the probability that each row address is protected.
Specifically, referring to fig. 6 and fig. 7, a schematic diagram and a theoretical model diagram of a performance verification method of a row hammer protection circuit provided in an embodiment of the present application are respectively provided, where the method needs to perform three steps, the first step is that a row hammer attack generator generates an activation command 200, where the activation command includes an activated row address; the second is that the row hammer protection circuit randomly grabs the activated row address 300, and the grabbed row address is used as the protected row address; the third is to automatically count and analyze the performance 400 of the row hammer protection circuit. The three steps are modeled, namely three models are needed, the first is a row hammer generator, the second is a row hammer protection circuit, and the third is an output result of the row hammer protection circuit.
The three models obtained from fig. 6 correspond to the theoretical model diagram of fig. 7, i.e., f (x) represents the row hammer attack generator, h (x) represents the row hammer protection circuit, and z (x) represents the output result of the row hammer protection circuit. According to the basic theory of the circuit system,
Figure SMS_7
,/>
Figure SMS_8
representing a convolution operation. The probability of the output result of the row hammer protection circuit is related to the probability of the input signal generation, which is available according to the characteristics of the convolution operation. />
In detail, let a probability that a certain row address is activated be a, and b be a probability that b is grasped by the row hammer protection circuit, then b is a probability that it appears in case of a
Figure SMS_9
,/>
Figure SMS_10
Can be used to measure the performance of the row hammer protection circuit. Therefore, the protection efficiency of the row hammer protection circuit can be determined by determining the probability that each row address is activated and the probability that each row address is protected, so that the performance of the row hammer protection circuit can be intuitively measured.
Note that, the present application focuses on the kind of the activation command and the method for automatically performing statistical analysis of the performance of the hammer protection circuit, and therefore the present application does not describe the structure of the hammer protection circuit in an unfolding manner.
In some embodiments, the determining the probability of each of the row addresses being activated according to the number of times each of the row addresses is activated includes:
Accumulating the activated times of all the row addresses according to the activated times of each row address to obtain a first value;
sequentially calculating the probability of each row address being activated, wherein the probability of each row address being activated is equal to the ratio of the number of times the row address is activated to the first value;
the determining the probability of each row address being protected according to the number of times each row address is protected comprises the following steps:
accumulating all the times of the row address protection according to the times of the row address protection to obtain a second value;
and calculating the probability of each row address being protected in turn, wherein the probability of the row address being protected is equal to the ratio of the number of times the row address is protected to the second value.
Specifically, for example, the first value obtained by accumulating the number of times that all the row addresses are activated is 100 times, and the number of times that a certain row address is activated is 5 times, then the probability that this row address is activated is equal to
Figure SMS_11
The method comprises the steps of carrying out a first treatment on the surface of the For example, if the second value obtained by accumulating the number of times that all the row addresses are protected is 50 times and the number of times that a certain row address is protected is 1 time, the row address is protectedProbability of guard equals- >
Figure SMS_12
In some embodiments, the determining the protection efficiency of the row hammer protection circuit according to the probability that each row address is activated and the probability that each row address is protected includes:
obtaining the ratio of the probability that each row address is protected to the probability that each row address is activated according to the probability that each row address is activated and the probability that each row address is protected;
accumulating the ratio of the protected probability to the activated probability of all the row addresses to obtain a third value;
marking the total number of the plurality of row addresses as a fourth value;
and taking the ratio of the third value to the fourth value as the protection efficiency of the row hammer protection circuit.
Specifically, the number of the predetermined plurality of row addresses is (n+1) as an example, n is an integer greater than 1, the probabilities of (n+1) row addresses being activated are a0, a1, a2, & an, the probabilities of (n+1) row addresses being protected are b0 b1, b2, ·····bn, the ratio of the probability that each row address is protected to the probability that it is activated is
Figure SMS_13
. A third value obtained by accumulating the ratio of the probability that all row addresses are protected to the probability that they are activated is +. >
Figure SMS_14
The fourth value is (n+1), i.e. the calculation formula of the protection efficiency of the hammer protection circuit is +.>
Figure SMS_15
It should be noted that, in this embodiment, the calculation formula of the protection efficiency of the hammer protection circuit is derived according to the characteristics of convolution operation summation existing in the basic theory of the circuit system. By adopting the calculation formula of the protection efficiency of the row hammer protection circuit, the performance of the row hammer protection circuit can be measured more intuitively.
It should be noted that, the row hammer phenomenon is affected by the process, that is, the row address is activated for a certain threshold, and the threshold corresponding to different process is different. As process dimensions shrink, the threshold is correspondingly reduced and the hammering phenomenon is more likely to occur. It is inferred from the threshold value of each process how many row addresses can be attacked at most simultaneously. For example, it is inferred from the 10G3 process (third generation 10nm process) that a maximum of 50 row addresses can be attacked. The number of predetermined plurality of row addresses is exemplified as 50.
As shown in fig. 8 and 9, a first distribution diagram of the number of times the 50 row addresses are activated and a distribution diagram of the number of times the 50 row addresses corresponding to fig. 8 are protected, provided in this embodiment, respectively, it can be seen from fig. 8 that the number of times the first distribution diagram of this embodiment corresponds to a plurality of row addresses being activated substantially in accordance with a uniform probability distribution (i.e. the difference between the maximum value and the minimum value of the number of times the row addresses are activated is smaller than a predetermined allowable difference, for example, smaller than 6% of the minimum value), wherein the abscissa represents a total of 50 row addresses from 0 to 49, and the ordinate represents the number of times the 50 row addresses are activated respectively. The abscissa of fig. 9 corresponds to the abscissa of fig. 8 one by one, and the ordinate of fig. 9 indicates the number of times the 50 row addresses are respectively grasped by the row hammer protection circuit, that is, the number of times the 50 row addresses are respectively protected by the row hammer protection circuit.
The performance verification method of the row hammer protection circuit firstly judges: when the number of times the row address is activated exceeds a preset value, whether the number of times the row address is protected is greater than 0. In this embodiment, a preset value equal to 10000 is taken as an example to describe that, for each row address activated more than 10000 times, the row hammer protection circuit is to be protected at least once, if there is a missing, the performance of the row hammer protection circuit is not passed, and the protection efficiency is 0. As can be seen from fig. 8 and 9, in this embodiment, each row address activated more than 10000 times is protected by the row hammer protection circuit at least once, so that the performance of the row hammer protection circuit passes, and the protection efficiency is further calculated.
Specifically, taking a0 to a49 respectively indicates the probabilities of the row addresses No. 0 to 49 being activated respectively, and taking b0 to b49 respectively indicates the probabilities of the row addresses No. 0 to 49 being protected respectively. Wherein, a0 is equal to the sum of the number of times the 0 row address is activated divided by the number of times the 50 row addresses are activated, b0 is equal to the sum of the number of times the 0 row address is protected divided by the number of times the 50 row addresses are protected, the calculation modes of a1 to a49 are similar to a0, the calculation modes of b1 to b49 are similar to b0, and the details are not repeated here. As can be taken from fig. 8 and 9, the protection efficiency of the hammer protection circuit
Figure SMS_16
. That is, when the plurality of row addresses are activated a plurality of times by only the number of activations which substantially matches the uniform probability distribution, the protection efficiency of the row hammer protection circuit is 88%.
As shown in fig. 10 and 11, the second distribution diagram of the number of times the 50 row addresses are activated and the distribution diagram of the number of times the 50 row addresses corresponding to fig. 10 are protected provided in the embodiment of the present application respectively, and as can be seen from fig. 10, the second distribution diagram of the present embodiment corresponds to the number of times the plurality of row addresses are activated according to an exponential probability distribution, wherein the abscissa indicates 50 row addresses from 0 to 49, and the ordinate indicates the number of times the 50 row addresses are activated respectively. The abscissa of fig. 11 corresponds to the abscissa of fig. 10 one by one, and the ordinate of fig. 11 indicates the number of times the 50 row addresses are respectively grasped by the row hammer protection circuit, that is, the number of times the 50 row addresses are respectively protected by the row hammer protection circuit.
The performance verification method of the row hammer protection circuit firstly judges: when the number of times the row address is activated exceeds a preset value, whether the number of times the row address is protected is greater than 0. In this embodiment, a preset value equal to 10000 is taken as an example to describe that, for each row address activated more than 10000 times, the row hammer protection circuit is to be protected at least once, if there is a missing, the performance of the row hammer protection circuit is not passed, and the protection efficiency is 0. As can be seen from fig. 10 and 11, in this embodiment, each row address activated more than 10000 times is protected by the row hammer protection circuit at least once, so that the performance of the row hammer protection circuit passes, and the protection efficiency is further calculated.
Specifically, taking a0 to a49 respectively indicates the probabilities of the row addresses No. 0 to 49 being activated respectively, and taking b0 to b49 respectively indicates the probabilities of the row addresses No. 0 to 49 being protected respectively. Wherein, a0 is equal to the sum of the number of times the 0 row address is activated divided by the number of times the 50 row addresses are activated, b0 is equal to the sum of the number of times the 0 row address is protected divided by the number of times the 50 row addresses are protected, the calculation modes of a1 to a49 are similar to a0, the calculation modes of b1 to b49 are similar to b0, and the details are not repeated here. As can be taken from fig. 10 and 11, the protection efficiency of the hammer protection circuit
Figure SMS_17
. That is, when a plurality of row addresses are activated for a plurality of times by using only the activation times of the exponential probability distribution, the protection efficiency of the row hammer protection circuit is 50%.
As shown in fig. 12 and 13, a third distribution diagram of the number of times the 50 row addresses are activated and a distribution diagram of the number of times the 50 row addresses corresponding to fig. 12 are protected, which are provided in the embodiment of the present application, respectively, it can be seen from fig. 12 that the number of times the third distribution diagram of the present embodiment corresponds to a plurality of row addresses to be activated conforms to a semi-normal probability distribution, wherein the abscissa indicates 50 row addresses from 0 to 49, and the ordinate indicates the number of times the 50 row addresses are activated respectively. The abscissa of fig. 13 corresponds to the abscissa of fig. 12 one by one, and the ordinate of fig. 13 indicates the number of times the 50 row addresses are respectively grasped by the row hammer protection circuit, that is, the number of times the 50 row addresses are respectively protected by the row hammer protection circuit.
The performance verification method of the row hammer protection circuit firstly judges: when the number of times the row address is activated exceeds a preset value, whether the number of times the row address is protected is greater than 0. In this embodiment, a preset value equal to 10000 is taken as an example to describe that, for each row address activated more than 10000 times, the row hammer protection circuit is to be protected at least once, if there is a missing, the performance of the row hammer protection circuit is not passed, and the protection efficiency is 0. As can be seen from fig. 12 and 13, in this embodiment, each row address activated more than 10000 times is protected by the row hammer protection circuit at least once, so that the performance of the row hammer protection circuit passes, and the protection efficiency is further calculated.
Specifically, taking a0 to a49 respectively indicates the probabilities of the row addresses No. 0 to 49 being activated respectively, and taking b0 to b49 respectively indicates the probabilities of the row addresses No. 0 to 49 being protected respectively. Wherein, a0 is equal to the sum of the number of times the 0 row address is activated divided by the number of times the 50 row addresses are activated, b0 is equal to the sum of the number of times the 0 row address is protected divided by the number of times the 50 row addresses are protected, the calculation modes of a1 to a49 are similar to a0, the calculation modes of b1 to b49 are similar to b0, and the details are not repeated here. As can be taken from fig. 12 and 13, the protection efficiency of the hammer protection circuit
Figure SMS_18
. Namely, when the plurality of row addresses are activated for a plurality of times by only using the activation times of the semi-normal probability distribution, the protection efficiency of the row hammer protection circuit is 79.5%.
As shown in fig. 14 and 15, the fourth distribution diagram of the number of times the 50 row addresses are activated and the distribution diagram of the number of times the 50 row addresses corresponding to fig. 14 are protected provided in the embodiment of the present application respectively, and as can be seen from fig. 14, the fourth distribution diagram of the present embodiment corresponds to a linear probability distribution of the number of times the plurality of row addresses are activated, wherein the abscissa indicates 50 row addresses in total from 0 to 49, and the ordinate indicates the number of times the 50 row addresses are activated respectively. The abscissa of fig. 15 corresponds to the abscissa of fig. 14 one by one, and the ordinate of fig. 15 indicates the number of times the 50 row addresses are respectively grasped by the row hammer protection circuit, that is, the number of times the 50 row addresses are respectively protected by the row hammer protection circuit.
The performance verification method of the row hammer protection circuit firstly judges: when the number of times the row address is activated exceeds a preset value, whether the number of times the row address is protected is greater than 0. In this embodiment, a preset value equal to 10000 is taken as an example to describe that, for each row address activated more than 10000 times, the row hammer protection circuit is to be protected at least once, if there is a missing, the performance of the row hammer protection circuit is not passed, and the protection efficiency is 0. As can be seen from fig. 14 and 15, in this embodiment, each row address activated more than 10000 times is protected by the row hammer protection circuit at least once, so that the performance of the row hammer protection circuit passes, and the protection efficiency is further calculated.
Specifically, taking a0 to a49 respectively indicates the probabilities of the row addresses No. 0 to 49 being activated respectively, and taking b0 to b49 respectively indicates the probabilities of the row addresses No. 0 to 49 being protected respectively. Wherein, a0 is equal to the sum of the number of times the 0 row address is activated divided by the number of times the 50 row addresses are activated, b0 is equal to the sum of the number of times the 0 row address is protected divided by the number of times the 50 row addresses are protected, the calculation modes of a1 to a49 are similar to a0, the calculation modes of b1 to b49 are similar to b0, and the details are not repeated here. As can be taken from fig. 14 and 15, the protection efficiency of the hammer protection circuit
Figure SMS_19
. Namely, when a plurality of row addresses are activated for a plurality of times by using only the activation times of the linear probability distribution, the protection efficiency of the row hammer protection circuit is 67%.
It should be noted that, the four preset probability distributions are mathematical models for extracting and inducing row address activation times distribution according to the current common row hammer attack means and modes, and simulation experiments are performed by adopting the four mathematical models, so that whether the row hammer protection circuit can work and whether the row hammer protection effect can be achieved can be verified, and meanwhile, the performance of the row hammer protection circuit can be intuitively measured. In particular, performance may be reflected and quantified by protection efficiency. The protection efficiency corresponding to the four preset probability distributions is summed and the average quantized result is more accurate under the condition that each preset probability distribution only quantizes a single value. Therefore, the performance result of the row hammer protection circuit is comprehensively evaluated
Figure SMS_20
In fig. 8, 10, 12, and 14, 50 row addresses are activated for a plurality of times within a preset period, and the interval of the preset period is not limited in this application.
Next, referring to fig. 16, a schematic diagram of a performance verification system of a row hammer protection circuit provided in an embodiment of the present application, where the performance verification system includes a row hammer attack generator 10, an obtaining device 11, and an analyzing device 12; the row hammer attack generator 10 is configured to generate a plurality of activation commands, where the plurality of activation commands are configured to activate a predetermined plurality of row addresses for a plurality of times, so that the number of times the plurality of row addresses are activated conforms to a preset probability distribution; the acquiring means 11 is configured to acquire the number of times each of the row addresses is activated and the number of times the row hammer protection circuit protects the row address; the analysis means 12 are arranged to determine the performance of the row hammer protection circuit based on the number of times the plurality of row addresses are each activated and the number of times they are protected.
It can be understood that, in the embodiment of the present application, by analyzing various conditions existing in the row hammer attack, the activation times according to the preset probability distribution are obtained, and the activation times according to the preset probability distribution are generated by adopting the row hammer attack generator 10, so as to activate the predetermined plurality of row addresses for multiple times respectively; and the acquisition device 11 is adopted to acquire the number of times each row address is activated and the number of times each row address is protected by a row hammer protection circuit; the analysis device 12 is then used to perform statistical analysis on the number of times each of the plurality of row addresses is activated and the number of times each of the plurality of row addresses is protected, so that the performance of the row hammer protection circuit can be intuitively measured.
In summary, the performance verification method for a row hammer protection circuit provided in the embodiment of the application includes: generating a plurality of activation commands, wherein the plurality of activation commands are used for activating a plurality of preset row addresses respectively for a plurality of times so that the number of times that the plurality of row addresses are activated accords with a preset probability distribution; acquiring the number of times each row address is activated and the number of times each row address is protected by a row hammer protection circuit; determining the performance condition of a row hammer protection circuit according to the number of times that each of a plurality of row addresses is activated and the number of times that each row address is protected; according to the method, the activation times according to the preset probability distribution are obtained by analyzing various conditions of the row hammer attack, and the preset row addresses are activated for multiple times respectively according to the activation times according to the preset probability distribution; a row hammer protection circuit is adopted to respectively protect a plurality of row addresses; and then, the number of times that each of the plurality of row addresses is activated and the number of times that each of the plurality of row addresses is protected are subjected to statistical analysis, so that the performance condition of the row hammer protection circuit can be intuitively measured, and the technical problem of how to verify the performance of the row hammer protection circuit is solved.
The foregoing description is only of the preferred embodiments of the present application and is not intended to limit the scope of the present application.

Claims (10)

1. A performance verification method of a row hammer protection circuit, comprising:
generating a plurality of activation commands, wherein the plurality of activation commands are used for activating a plurality of preset row addresses for a plurality of times respectively so as to enable the number of times of activating the plurality of row addresses to accord with a preset probability distribution;
acquiring the number of times each row address is activated and the number of times each row address is protected by the row hammer protection circuit;
and determining the performance condition of the row hammer protection circuit according to the activated times and the protected times of the row addresses.
2. The method of claim 1, wherein the predetermined probability distribution comprises at least one of a uniform probability distribution, an exponential probability distribution, a semi-normal probability distribution, and a linear probability distribution.
3. The method according to claim 1, wherein determining the performance of the row hammer protection circuit according to the number of times the plurality of row addresses are activated and the number of times the row addresses are protected, comprises:
when the number of times that the row address is activated exceeds a preset value and the number of times that the row address is protected is 0, judging that the performance of the row hammer protection circuit does not pass;
And when the number of times the row address is activated exceeds a preset value and the number of times the row address is protected is greater than 0, judging that the performance of the row hammer protection circuit passes.
4. The performance verification method of a row hammer protection circuit according to claim 3, wherein when judging that the performance of the row hammer protection circuit passes, the method further comprises:
and determining the protection efficiency of the row hammer protection circuit according to the number of times the row addresses are activated and the number of times the row addresses are protected.
5. The method for verifying the performance of a row hammer protection circuit of claim 4, wherein the category of the predetermined probability distribution comprises one of; the determining the protection efficiency of the row hammer protection circuit according to the number of times the row addresses are activated and the number of times the row addresses are protected respectively comprises the following steps:
determining the protection efficiency of the row hammer protection circuit corresponding to a preset probability distribution according to the number of times the row addresses corresponding to the preset probability distribution are activated and the number of times the row addresses are protected; and taking the protection efficiency of the row hammer protection circuit corresponding to a preset probability distribution as the protection efficiency of the row hammer protection circuit.
6. The performance verification method of a row hammer protection circuit according to claim 4, wherein the kinds of the preset probability distribution include a plurality of kinds; the determining the protection efficiency of the row hammer protection circuit according to the number of times the row addresses are activated and the number of times the row addresses are protected respectively comprises the following steps:
for each preset probability distribution in a plurality of preset probability distributions, determining the protection efficiency of the row hammer protection circuit corresponding to the corresponding preset probability distribution according to the number of times the row addresses corresponding to the corresponding preset probability distribution are respectively activated and the number of times the row addresses are protected; and taking the average value of the protection efficiency of the row hammer protection circuit corresponding to all preset probability distribution as the protection efficiency of the row hammer protection circuit.
7. The method according to claim 4, wherein determining the protection efficiency of the row hammer protection circuit based on the number of times each of the plurality of row addresses is activated and the number of times it is protected, comprises:
determining the probability of each row address being activated according to the number of times each row address is activated;
determining the probability of each row address being protected according to the number of times each row address is protected;
And determining the protection efficiency of the row hammer protection circuit according to the probability that each row address is activated and the probability that each row address is protected.
8. The method of claim 7, wherein determining the probability of each of the row addresses being activated based on the number of times each of the row addresses is activated comprises:
accumulating the activated times of all the row addresses according to the activated times of each row address to obtain a first value;
sequentially calculating the probability of each row address being activated, wherein the probability of each row address being activated is equal to the ratio of the number of times the row address is activated to the first value;
the determining the probability of each row address being protected according to the number of times each row address is protected comprises the following steps:
accumulating all the times of the row address protection according to the times of the row address protection to obtain a second value;
and calculating the probability of each row address being protected in turn, wherein the probability of the row address being protected is equal to the ratio of the number of times the row address is protected to the second value.
9. The method of claim 8, wherein determining the protection efficiency of the row hammer protection circuit based on the probability that each of the row addresses is activated and the probability that each of the row addresses is protected comprises:
obtaining the ratio of the probability that each row address is protected to the probability that each row address is activated according to the probability that each row address is activated and the probability that each row address is protected;
accumulating the ratio of the protected probability to the activated probability of all the row addresses to obtain a third value;
marking the total number of the plurality of row addresses as a fourth value;
and taking the ratio of the third value to the fourth value as the protection efficiency of the row hammer protection circuit.
10. A performance verification system for a hammer protection circuit, comprising:
the row hammer attack generator is used for generating a plurality of activation commands, wherein the plurality of activation commands are used for activating a plurality of preset row addresses respectively for a plurality of times so that the number of times of activating the plurality of row addresses accords with a preset probability distribution;
acquisition means for acquiring the number of times each of the row addresses is activated and the number of times it is protected by the row hammer protection circuit;
And the analysis device is used for determining the performance condition of the row hammer protection circuit according to the number of times the row addresses are activated and the number of times the row addresses are protected.
CN202310460475.8A 2023-04-26 2023-04-26 Performance verification method and system for row hammer protection circuit Pending CN116165522A (en)

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