CN116154774A - Grid-connected harmonic current suppression method and related device based on voltage fundamental wave extraction - Google Patents

Grid-connected harmonic current suppression method and related device based on voltage fundamental wave extraction Download PDF

Info

Publication number
CN116154774A
CN116154774A CN202310322173.4A CN202310322173A CN116154774A CN 116154774 A CN116154774 A CN 116154774A CN 202310322173 A CN202310322173 A CN 202310322173A CN 116154774 A CN116154774 A CN 116154774A
Authority
CN
China
Prior art keywords
voltage
current
grid
fundamental wave
inverter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202310322173.4A
Other languages
Chinese (zh)
Inventor
杨帆
易淑智
钟红
贾恒杰
敖伟
洪焕森
翁财宏
田小东
江贵贵
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Guangdong Power Grid Co Ltd
Shaoguan Power Supply Bureau Guangdong Power Grid Co Ltd
Original Assignee
Guangdong Power Grid Co Ltd
Shaoguan Power Supply Bureau Guangdong Power Grid Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Guangdong Power Grid Co Ltd, Shaoguan Power Supply Bureau Guangdong Power Grid Co Ltd filed Critical Guangdong Power Grid Co Ltd
Priority to CN202310322173.4A priority Critical patent/CN116154774A/en
Publication of CN116154774A publication Critical patent/CN116154774A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02JCIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J3/00Circuit arrangements for ac mains or ac distribution networks
    • H02J3/01Arrangements for reducing harmonics or ripples
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02JCIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J3/00Circuit arrangements for ac mains or ac distribution networks
    • H02J3/12Circuit arrangements for ac mains or ac distribution networks for adjusting voltage in ac networks by changing a characteristic of the network load
    • H02J3/16Circuit arrangements for ac mains or ac distribution networks for adjusting voltage in ac networks by changing a characteristic of the network load by adjustment of reactive power
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02JCIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J3/00Circuit arrangements for ac mains or ac distribution networks
    • H02J3/38Arrangements for parallely feeding a single network by two or more generators, converters or transformers
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02JCIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J3/00Circuit arrangements for ac mains or ac distribution networks
    • H02J3/38Arrangements for parallely feeding a single network by two or more generators, converters or transformers
    • H02J3/40Synchronising a generator for connection to a network or to another generator
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E40/00Technologies for an efficient electrical power generation, transmission or distribution
    • Y02E40/40Arrangements for reducing harmonics

Abstract

The invention discloses a grid-connected harmonic current suppression method and a related device based on voltage fundamental wave extraction, wherein the method comprises the following steps: collecting the side current of an inverter, the side current of a network and the capacitance voltage of a filter capacitor; inputting the capacitor voltage into a fundamental decoupling module to extract fundamental voltage; determining a reference current according to the fundamental voltage, the capacitor voltage and the grid-side current; determining a target control amount based on the reference current and the inverter-side current; a switching signal for driving the inverter is generated to drive the inverter according to the target control amount. According to the embodiment, the capacitor voltage is input into the fundamental wave decoupling module to extract the fundamental wave voltage, so that harmonic components when the capacitor voltage is used as feedback voltage can be removed, and the harmonic components in voltage feedback are restrained, so that the harmonic components introduced into reference current can be reduced, the sine of the reference current is ensured, the equivalent output impedance of the virtual synchronous machine is equivalently improved, the performance of restraining grid-connected harmonic current is improved, and the quality of grid-connected current is ensured.

Description

Grid-connected harmonic current suppression method and related device based on voltage fundamental wave extraction
Technical Field
The invention relates to the technical field of grid-connected power generation, in particular to a grid-connected harmonic current suppression method based on voltage fundamental wave extraction and a related device.
Background
The grid-connected inverter is equivalent to a voltage source in a power system, and is controlled by a common virtual synchronous machine (VSG, virtual Synchronous Generator), and FIG. 1 is a schematic diagram of grid-connected harmonic current suppression in the prior art, as shown in FIG. 1, V dc Is the direct-current side voltage, i 1 、i 2 The inverter-side current and the grid-side current, u c 、u pcc 、u g Respectively capacitor voltage, PCC point voltage and grid voltage, L 1 、C f Respectively an inverter side inductance and a filter capacitance, L g For the impedance of the electric network, Z line Representing the impedance between the virtual synchronous machine and the PCC point.
By collecting PCC point voltage, feedforward and voltage reference command u ref By doing so, the virtual synchronous machine can effectively track the harmonic voltage at the PCC point, thereby eliminating the influence caused by the harmonic voltage at the network side, however, the capacitor voltageu c Contains harmonic component in the feedback of (a) and the capacitance voltage u is calculated c Feedback to voltage loop controller G u Will introduce harmonic components, resulting in a reference current i ref Contains harmonic components, and cannot guarantee the reference current i ref The sine of the virtual synchronous machine is caused, so that the equivalent output impedance of the virtual synchronous machine is too small to inhibit harmonic current, and the quality of grid-connected current is difficult to ensure.
Disclosure of Invention
The invention provides a grid-connected harmonic current suppression method and a related device based on voltage fundamental wave extraction, which are used for solving the problems that harmonic components are introduced into a voltage loop controller when capacitor voltage is fed back in the prior art, the sine of reference current cannot be ensured, the equivalent output impedance of a virtual synchronous machine is too small to suppress harmonic current, and the quality of grid-connected current is difficult to ensure.
In a first aspect, the present invention provides a grid-connected harmonic current suppression method based on voltage fundamental wave extraction, which is applied to a grid-connected harmonic current suppression system provided with a fundamental wave decoupling module, a virtual synchronous machine controller and a filter capacitor, and includes:
collecting inverter side current, grid side current and capacitance voltage of the filter capacitor, wherein the grid side current is current output to a power grid by the inverter;
inputting the capacitor voltage into the fundamental decoupling module to extract fundamental voltage;
inputting the capacitor voltage, the network side current, the preset active power and the preset reactive power into a virtual synchronous machine controller to obtain a reference voltage;
determining a reference current from the fundamental voltage and the reference voltage;
determining a target control amount from the reference current and the inverter-side current;
and generating a switching signal for driving the inverter according to the target control quantity so as to drive the inverter.
Optionally, the transfer function of the fundamental decoupling module is as follows:
Figure BDA0004152171600000021
in the above formula, ω 0 Is the fundamental angular frequency omega of the grid voltage c The cut-off angle frequency of the digital filter, j represents the imaginary part and s is the laplace operator.
Optionally, the grid-connected harmonic current suppression system further includes a voltage ring controller, and the determining the reference current according to the fundamental voltage and the reference voltage includes:
calculating a difference between the reference voltage and the fundamental voltage as a voltage error value;
and inputting the voltage error value into a voltage ring controller to obtain a reference current.
Optionally, the voltage loop controller is a proportional resonant controller.
Optionally, the grid-connected harmonic current suppression system further includes a current loop controller, and the determining a target control amount according to the reference current and the inverter-side current includes:
calculating the difference value between the reference current and the inverter side current to obtain a current error value;
and inputting the current error value into the current loop controller to obtain a target control quantity.
Optionally, the current loop controller is a proportional controller.
In a second aspect, the present invention provides a grid-connected harmonic current suppression device based on voltage fundamental wave extraction, which is applied to a grid-connected harmonic current suppression system provided with a fundamental wave decoupling module, a virtual synchronous machine controller and a filter capacitor, and includes:
the grid-connected data acquisition module is used for acquiring inverter side current, grid side current and capacitance voltage of the filter capacitor, wherein the grid side current is the current output to a power grid by the inverter;
the fundamental wave decoupling module is used for inputting the capacitor voltage into the fundamental wave decoupling module so as to extract fundamental wave voltage;
the reference voltage determining module is used for inputting the capacitor voltage, the network side current, the preset active power and the preset reactive power into the virtual synchronous machine controller to obtain a reference voltage;
a reference current determining module for determining a reference current from the fundamental voltage and the reference voltage;
a target control amount determining module configured to determine a target control amount based on the reference current and the inverter-side current;
and the inverter control module is used for generating a switching signal for driving the inverter according to the target control quantity so as to drive the inverter.
In a third aspect, the present invention provides an electronic device, including:
at least one processor; and
a memory communicatively coupled to the at least one processor; wherein, the liquid crystal display device comprises a liquid crystal display device,
the memory stores a computer program executable by the at least one processor to enable the at least one processor to perform the grid-tie harmonic current suppression method based on voltage fundamental wave extraction of the first aspect of the invention.
In a fourth aspect, the present invention provides a computer readable storage medium, where computer instructions are stored, where the computer instructions are configured to cause a processor to implement the grid-connected harmonic current suppression method based on voltage fundamental wave extraction according to the first aspect of the present invention when executed.
The grid-connected harmonic current suppression system is provided with the fundamental wave decoupling module and the filter capacitor, after collecting inverter side current, grid side current and capacitor voltage of the filter capacitor, the grid side current is the current output by the inverter to the power grid, the capacitor voltage is input into the fundamental wave decoupling module to extract the fundamental wave voltage, the capacitor voltage, the grid side current, preset active power and preset reactive power are input into the virtual synchronous machine controller to obtain the reference voltage, the reference current is determined according to the fundamental wave voltage and the reference voltage, the target control quantity is determined according to the reference current and the inverter side current, the switching signal for driving the inverter is generated according to the target control quantity to drive the inverter, and harmonic components in voltage feedback by taking the capacitor voltage as feedback voltage can be removed by inputting the capacitor voltage into the fundamental wave decoupling module, so that harmonic components in the voltage feedback can be reduced, the sine of the reference current is ensured, the equivalent output impedance of the virtual synchronous machine is improved, the performance for suppressing the harmonic current is improved, and the grid-connected current quality is ensured.
It should be understood that the description in this section is not intended to identify key or critical features of the embodiments of the invention or to delineate the scope of the invention. Other features of the present invention will become apparent from the description that follows.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for the description of the embodiments will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of prior art grid-tie harmonic current suppression;
FIG. 2 is a schematic diagram of grid-tie harmonic current suppression based on voltage fundamental extraction in an embodiment of the invention;
FIG. 3 is a flowchart of a grid-connected harmonic current suppression method based on voltage fundamental wave extraction according to an embodiment of the present invention;
fig. 4A is a flowchart of a grid-connected harmonic current suppression method based on voltage fundamental wave extraction according to a second embodiment of the present invention;
FIG. 4B is one of the schematic block diagrams of the fundamental decoupling module of an embodiment of the present invention;
FIG. 4C is a second schematic block diagram of a fundamental decoupling module of an embodiment of the present invention;
FIG. 4D is a third schematic block diagram of a fundamental decoupling module of an embodiment of the present invention;
FIG. 4E is a bode plot of the equivalent output impedance of a prior art virtual machine;
FIG. 4F is a schematic diagram of equivalent output impedance before and after modification in an embodiment of the invention;
FIG. 4G is a schematic diagram of the harmonic currents before and after modification;
fig. 5 is a schematic structural diagram of a grid-connected harmonic current suppression device based on voltage fundamental wave extraction according to a third embodiment of the present invention;
fig. 6 is a schematic structural diagram of an electronic device according to a fourth embodiment of the present invention.
Detailed Description
In order that those skilled in the art will better understand the present invention, a technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in which it is apparent that the described embodiments are only some embodiments of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the present invention without making any inventive effort, shall fall within the scope of the present invention.
Example 1
Fig. 3 is a flowchart of a grid-connected harmonic current suppression method based on voltage fundamental wave extraction, which is applicable to the situation of suppressing harmonic current generated by grid connection when a distributed power supply is connected through an inverter, and the method may be performed by a grid-connected harmonic current suppression device based on voltage fundamental wave extraction, and the grid-connected harmonic current suppression device based on voltage fundamental wave extraction may be implemented in a hardware and/or software form, and the grid-connected harmonic current suppression device based on voltage fundamental wave extraction may be configured in an electronic device, as shown in fig. 3, and the grid-connected harmonic current suppression method based on voltage fundamental wave extraction includes:
s301, collecting inverter side current, grid side current and capacitance voltage of a filter capacitor, wherein the grid side current is current output to a power grid by an inverter.
Fig. 2 shows a schematic diagram of grid-connected harmonic current suppression based on digital frequency multiplication gain according to the present embodiment, and fig. 2 shows that the grid-connected harmonic current suppression system according to the present embodiment includes a virtual synchronous machine (VSG) and a voltage loop controller G u Current loop controller G i The pulse signal modulator PWM and fundamental wave decoupling module H, wherein the virtual synchronous machine is used for outputting reference voltage u ref To voltage loop controller G u The fundamental wave decoupling module H is used for decoupling capacitance voltage u c Extracting fundamental wave to obtain fundamental wave voltage input voltage ring controller G u Voltage loop controller G u For outputting a reference current i ref To current loop controller G i Current loop controller G i At the input of reference current i ref And inverter side current i 1 And then outputs the target control amount to the pulse signal modulator PWM to control the inverter.
As shown in FIG. 2, V dc Is the direct-current side voltage, i 1 、i 2 The inverter-side current and the grid-side current, u c 、u g Capacitance voltage and grid voltage, L 1 、C f L is the inductor and the filter capacitor at the inverter side g For the impedance of the electric network, Z line Representing the impedance between the virtual synchronous machine and the PCC point.
The current collection device can collect the inverter side current i 1 And net side current i 2 And collecting the capacitance voltage u by a voltage collecting device c After the current and voltage are collected by the current collection device and the voltage collection device, the current and the voltage are transmitted to the grid-connected harmonic current suppression system of the embodiment through a wired or wireless device.
S302, inputting the capacitor voltage into a fundamental wave decoupling module to extract fundamental wave voltage.
In this embodiment, the fundamental wave decoupling module H may be a fundamental wave decoupling circuit, or may be a fundamental wave decoupling algorithm, where the capacitance voltage u is calculated by c After the fundamental wave decoupling module H is input, the fundamental wave decoupling module H can remove harmonic voltage components and output fundamental wave voltage u c1
The transfer function of the fundamental decoupling module is as follows:
Figure BDA0004152171600000061
in the above formula, ω 0 Is the fundamental angular frequency omega of the grid voltage c The cut-off angle frequency of the digital filter, j represents the imaginary part, s is the Laplacian, and the fundamental voltage can be obtained by multiplying the acquired capacitance voltage by the transfer function.
S303, inputting the capacitor voltage, the network side current, the preset active power and the preset reactive power into a virtual synchronous machine controller to obtain the reference voltage.
As shown in fig. 2, in one embodiment, the grid-connected harmonic current suppression system of the present embodiment further includes a virtual synchronous machine VSG that simulates the rotor of the generator by an input amount, that is, the virtual synchronous machine VSG is at the input capacitance voltage u c Net side current i 2 Preset active power P 0 Preset reactive power Q 0 Post output reference voltage u ref Specifically, the virtual synchronous machine can pass through the capacitor voltage u c Net side current i 2 Calculating the output active power and reactive power, and then presetting the active power P for the active power, the reactive power and the reactive power through a power loop controller 0 The preset reactive power Q0 is calculated to obtain a reference voltage u ref The algorithms of the active power, reactive power and power loop controller are referred to in the prior art, and will not be described in detail herein.
S304, determining a reference current according to the fundamental voltage and the reference voltage.
As shown in fig. 2, the grid-connected harmonic current suppression system of the present embodiment further includes a voltage ring controller G u Will reference voltage u ref And fundamental wave voltage u c1 The voltage error is obtained after the difference value is calculated and is input into the voltage loop controller G u The reference current i can be obtained ref Wherein, virtual synchronous machine VSG and voltage loop controller G u The algorithm of (2) can refer to the presentThe technology of this embodiment is not described in detail herein.
S305, a target control amount is determined from the reference current and the inverter-side current.
As shown in FIG. 2, in one embodiment, a reference current i may be calculated ref And inverter side current i 1 Making a difference to obtain a current error, which is input to the current loop controller G i In order to pass through the current loop controller G i Outputting a target control amount which is a reference value i for the current ref Parameters for the duty cycle of the controller inverter when no dead-head tracking is implemented.
S306, generating a switching signal for driving the inverter according to the target control amount to drive the inverter.
Specifically, the target control amount may be input to a pulse regulator PWM that outputs a pulse signal according to the target control amount, the duty ratios of the pulse signals corresponding to the different target control amounts are different, and the on or off of the inverter is controlled by the pulse signals of the different duty ratios so that the inverter-side current i 1 Equal to the reference current i ref
The grid-connected harmonic current suppression system is provided with the fundamental wave decoupling module and the filter capacitor, after collecting inverter side current, grid side current and capacitor voltage of the filter capacitor, the grid side current is the current output by the inverter to the power grid, the capacitor voltage is input into the fundamental wave decoupling module to extract the fundamental wave voltage, the capacitor voltage, the grid side current, preset active power and preset reactive power are input into the virtual synchronous machine controller to obtain the reference voltage, the reference current is determined according to the fundamental wave voltage and the reference voltage, the target control quantity is determined according to the reference current and the inverter side current, the switching signal for driving the inverter is generated according to the target control quantity to drive the inverter, and harmonic components in voltage feedback by taking the capacitor voltage as feedback voltage can be removed by inputting the capacitor voltage into the fundamental wave decoupling module, so that harmonic components in the voltage feedback can be reduced, the sine of the reference current is ensured, the equivalent output impedance of the virtual synchronous machine is improved, the performance for suppressing the harmonic current is improved, and the grid-connected current quality is ensured.
Example two
Fig. 4A is a flowchart of a grid-connected harmonic current suppression method based on voltage fundamental wave extraction according to a second embodiment of the present invention, where optimization is performed based on the first embodiment of the present invention, and as shown in fig. 4A, the grid-connected harmonic current suppression method based on voltage fundamental wave extraction includes:
s401, collecting inverter side current, grid side current and capacitance voltage of a filter capacitor, wherein the grid side current is current output to a power grid by an inverter.
Specifically, as shown in fig. 2, the inverter-side current i may be collected by a current transformer 1 And net side current i 2 And collecting the capacitance voltage u through a voltage transformer c The current transformer and the voltage transformer can transmit the acquired current and voltage to the grid-connected harmonic current suppression system of the embodiment in a wired or wireless communication mode. Of course, the current and the voltage may be collected by other collection devices, such as an ammeter and a voltmeter, and the manner of collecting the current and the voltage is not limited in this embodiment.
S402, inputting the capacitor voltage into a fundamental wave decoupling module to extract fundamental wave voltage.
In this embodiment, the fundamental wave decoupling module may be a fundamental wave decoupling circuit, and a transfer function of the fundamental wave decoupling circuit is as follows:
Figure BDA0004152171600000081
in the above formula, ω 0 Is the fundamental angular frequency omega of the grid voltage c The cut-off angle frequency of the digital filter, j represents the imaginary part and s is the laplace operator.
The capacitor voltage is input into the fundamental decoupling module to extract the fundamental voltage, i.e. the capacitor voltage is multiplied by the transfer function of the formula, specifically, as shown in fig. 4B, the capacitor voltage u c Through a fundamental wave decoupling circuitAnd then in the stationary coordinate system can be expressed as:
u cαβ =u ++ju
the capacitance voltage is expressed as complex vector on the alpha axis and the beta axis, and the capacitance voltage u c After passing through the substrate decoupling module shown in fig. 4B, the output fundamental voltage can be obtained by multiplying the error with the forward transfer function, that is:
Figure BDA0004152171600000091
Figure BDA0004152171600000092
wherein e ca 、e For errors, the block diagram in fig. 4B can be converted into the block diagram in fig. 4C, which can be achieved by further simplification, since the scalar form of the cross terms in the fundamental decoupling module is difficult to implement in a digital system:
Figure BDA0004152171600000093
and (3) developing an equation to make the real part and the imaginary part equal to each other, so as to obtain:
Figure BDA0004152171600000094
the implementation of the fundamental decoupling module in a digital system can thus be reduced to the block diagram shown in fig. 4D, i.e. the fundamental decoupling module H in fig. 2.
The fundamental wave decoupling module H of the embodiment of the invention can be used for decoupling the capacitor voltage u c Extracting fundamental wave voltage u c1
S403, inputting the capacitor voltage, the network side current, the preset active power and the preset reactive power into a virtual synchronous machine controller to obtain the reference voltage.
As shown in fig. 2, the virtual synchronous machine VSG of the present embodiment may include a power calculation module, a power loop, and a voltage command calculation module, where the power calculation module calculates the voltage u through a capacitor c And net side current i 2 The active power P output by the inverter can be calculated out And reactive power Q out The power loop is used for controlling the power according to the active power P out Reactive power Q out Preset active power P 0 Preset reactive power Q 0 Calculating the amplitude V of the reference voltage 0 And phase θ, further synthesizing a reference voltage u by a voltage command calculation module ref
Wherein the active power P out And reactive power Q out The calculation mode of the power loop can refer to the existing method for calculating active power and reactive power of the virtual synchronous machine, and the power loop can calculate the amplitude V of the reference voltage through the following active equation and reactive equation 0 And phase θ:
P 0 -P out -(D p +k p )(ω m0 )=Jω 0 s
Q 0 -Q out =k q (V m -V 0 )
in the above formula, ω 0 For nominal angular frequency, ω m For reference angular frequency, V m For reference amplitude, k p D and J are damping coefficient and inertia coefficient, k respectively, for the sag coefficient of the governor q And s is a Laplacian operator and is a reactive droop coefficient.
S404, calculating the difference between the reference voltage and the fundamental voltage as a voltage error value.
Specifically, as shown in FIG. 2, the reference voltage u is calculated ref Then, calculate the reference voltage u ref And fundamental wave voltage u c1 To obtain a voltage error value, wherein the reference voltage u is calculated ref And fundamental wave voltage u c1 The difference of the amplitude values may include calculating the difference of the amplitude values to obtain an amplitude value difference, calculating the difference of the phase values to obtain a phase value difference, and synthesizing the amplitude value difference and the phase value difference to obtain a voltage error value.
S405, inputting the voltage error value into a voltage ring controller to obtain a reference current.
Specifically, as shown in fig. 2, the voltage loop controller G of the present embodiment u As a proportional resonance controller (PR controller), a voltage error value can be input to the voltage loop controller G u In (1) obtaining a reference current i ref That is, the voltage error value is compared with the voltage loop controller G u Is multiplied by the transfer function of (c) to obtain the reference current. Wherein, the voltage loop controller G u Reference is made to prior art PR controllers and will not be described in detail here.
S406, calculating a difference value between the reference current and the inverter side current to obtain a current error value.
Specifically, as shown in fig. 2, in the voltage loop controller G u Output reference current i ref After that, the reference current i can be calculated ref And inverter side current i 1 To obtain a current error value for input to the current loop controller G i Is a kind of medium.
S407, inputting the current error value into the current loop controller to obtain the target control quantity.
Current loop controller G of the present embodiment i For proportional controller (P controller), the current error value is input into the current loop controller G i The target control quantity can be obtained, namely, the current error value and the current loop controller G i Is multiplied by the transfer function of (c) to obtain a first control quantity. Wherein, the current loop controller G i Reference is made to the P controller of the prior art and will not be described in detail here.
S408, a switching signal for driving the inverter is generated according to the target control amount to drive the inverter.
Specifically, the target control amount may be input to a pulse regulator PWM that outputs a pulse signal according to the target control amount, the duty ratios of the pulse signals corresponding to the different target control amounts are different, and the on or off of the inverter is controlled by the pulse signals of the different duty ratios so that the inverter-side current i 1 Equal to the reference current i ref
The following derives and verifies that the output impedance of the virtual synchronous machine is equivalently improved according to the embodiment with reference to the accompanying drawings, and the method specifically comprises the following steps:
in virtual synchronous machine control, a current loop controller G i Controlling inverter-side current i 1 To achieve the reference current i ref Is a dead-beat-free tracking of the inverter-side current i 1 The calculation can be made by the following formula:
Figure BDA0004152171600000111
in the above formula (1), T i For reference current i ref To the inverter side current i 1 Transfer function, Z L1 For the side inductance of the inverter, z -1 Is the time delay unit of the digital frequency multiplication gain.
In addition, by voltage loop controller G u The reference current i can be obtained ref The calculation equation of (2) is as follows:
Figure BDA0004152171600000121
as shown in fig. 2, the reference current i ref To the inverter side current i 1 The transfer function of (2) is as follows:
Figure BDA0004152171600000122
and as can be seen from fig. 2, the grid-side current i output by the inverter to the grid 2 Equal to the inverter side current i 1 And capacitive current i c Is the difference between (a):
i 2 =i 1 -i c (4)
inverter side current i 1 Substituting the calculation formula (1) into the formula (4) to obtain:
Figure BDA0004152171600000123
in the formula (5) of the present invention,
i ref ′=T i i ref
u c =i 2 ·Z Lg +u g
wherein Z is Lg U is the inductance of the power grid side g Is the net side voltage.
The u is as described above c The expression of (2) is substituted into the formula (5), resulting in:
Figure BDA0004152171600000124
namely:
Figure BDA0004152171600000125
wherein Z is c Z is the impedance of the filter capacitor out_g Is the equivalent output impedance of the virtual synchronous machine.
Due to the reference voltage u output by the virtual synchronous machine ref Contains only fundamental voltage amplitude and phase information ensuring system power transmission, i.e. u ref_h =0, the output current harmonic of the virtual synchronous machine can be expressed as:
Figure BDA0004152171600000131
wherein h is the harmonic frequency.
When the virtual synchronous machine is connected into a distorted power grid, the magnitude of harmonic current mainly depends on the output impedance Z out Impedance Z of power grid g Grid voltage u g The background harmonic magnitude in (2) is plotted by the above equation (6) as Z out As shown in FIG. 4E, Z is in the full band out The amplitude of the voltage is smaller, the harmonic current is difficult to be inhibited, and the current quality is not ensured.
After the fundamental wave decoupling module H of the embodiment of the invention is introduced, the reference current in the current loop is obtained after the fundamental wave component fed back by the voltage loop is extracted:
i′ ref =T i (u ref -u c H)G u
=T i (u ref -u c1 )G u
in this case, i for harmonic currents ref The harmonic component in (c) may be omitted, and thus the relation between the output harmonic current and the network side harmonic voltage may be expressed as:
Figure BDA0004152171600000132
in the above formula, Z total-i In order to increase the equivalent output impedance of the virtual synchronous machine after the fundamental decoupling module, namely:
Figure BDA0004152171600000133
as shown in fig. 4F, curve a is a bode plot of the equivalent output impedance of the virtual synchronous machine before improvement and the equivalent output impedance after improvement, and curve B is a bode plot of the equivalent output impedance of the virtual synchronous machine before improvement, as shown in fig. 4F, the virtual equivalent output impedance after improvement is significantly greater than the equivalent output impedance before improvement.
As shown in fig. 4G, the waveform of the grid-connected current before and after the improvement is shown by comparing fig. 4G, the current waveform of the three-phase current after the improvement is closer to the sinusoidal waveform, i.e. the quality of the grid-connected current is improved after the fundamental decoupling module is added in the invention.
In the embodiment, after collecting the inverter side current, the grid side current and the capacitor voltage of the filter capacitor, the grid side current is the current output by the inverter to the power grid, the capacitor voltage is input into the fundamental decoupling module to extract the fundamental voltage, the capacitor voltage, the grid side current, the preset active power and the preset reactive power are input into the virtual synchronous machine controller to obtain the reference voltage, the difference value between the reference voltage and the fundamental voltage is calculated to be used as a voltage error value, the voltage error value is input into the voltage ring controller to obtain the reference current, the difference value between the reference current and the inverter side current is calculated to obtain the current error value, the current error value is input into the current ring controller to obtain the target control quantity, the switch signal for driving the inverter is generated according to the target control quantity to drive the inverter, and the harmonic component when the capacitor voltage is used as the feedback voltage can be removed by inputting the fundamental decoupling module to extract the fundamental voltage, so that the harmonic component in the voltage feedback can be suppressed, the harmonic component in the reference current can be reduced, the sine of the reference current is ensured, the equivalent output impedance of the virtual synchronous machine is improved, and the grid-connected current quality is ensured.
Example III
Fig. 5 is a schematic structural diagram of a grid-connected harmonic current suppression device based on voltage fundamental wave extraction according to a third embodiment of the present invention. As shown in fig. 5, the grid-connected harmonic current suppression device based on voltage fundamental wave extraction is applied to a grid-connected harmonic current suppression system provided with a fundamental wave decoupling module, a virtual synchronous machine controller and a filter capacitor, and includes:
the grid-connected data acquisition module 501 is configured to acquire an inverter side current, a grid side current and a capacitance voltage of the filter capacitor, where the grid side current is a current output to a power grid by the inverter;
a fundamental decoupling module 502, configured to input the capacitance voltage into the fundamental decoupling module to extract a fundamental voltage;
the reference voltage determining module 503 is configured to input the capacitor voltage, the network side current, the preset active power and the preset reactive power into a virtual synchronous machine controller to obtain a reference voltage;
a reference current determination module 504 for determining a reference current from the fundamental voltage and the reference voltage;
a target control amount determining module 505 for determining a target control amount from the reference current and the inverter-side current;
an inverter control module 506 for generating a switching signal for driving the inverter according to the target control amount to drive the inverter.
Optionally, the transfer function of the fundamental decoupling module is as follows:
Figure BDA0004152171600000151
in the above formula, ω 0 Is the fundamental angular frequency omega of the grid voltage c The cut-off angle frequency of the digital filter, j represents the imaginary part and s is the laplace operator.
Optionally, the grid-connected harmonic current suppression system further includes a virtual synchronous machine controller and a voltage loop controller, and the reference current determination module 504 includes:
a voltage error value calculation unit for calculating a difference value between the reference voltage and the fundamental voltage as a voltage error value;
and the voltage ring controller input unit is used for inputting the voltage error value into the voltage ring controller to obtain the reference current.
Optionally, the voltage loop controller is a proportional resonant controller.
Optionally, the grid-connected harmonic current suppression system further includes a current loop controller, and the target control amount determining module 505 includes:
a current error value calculation unit, configured to calculate a difference value between the reference current and the inverter side current, to obtain a current error value;
and the current loop controller input unit is used for inputting the current error value into the current loop controller to obtain a target control quantity.
Optionally, the current loop controller is a proportional controller.
The grid-connected harmonic current suppression device based on the voltage fundamental wave extraction provided by the embodiment of the invention can execute the grid-connected harmonic current suppression method based on the voltage fundamental wave extraction provided by any embodiment of the invention, and has the corresponding functional modules and beneficial effects of the execution method.
Example IV
Fig. 6 shows a schematic diagram of an electronic device 60 that may be used to implement an embodiment of the invention. Electronic devices are intended to represent various forms of digital computers, such as laptops, desktops, workstations, personal digital assistants, servers, blade servers, mainframes, and other appropriate computers. Electronic equipment may also represent various forms of mobile devices, such as personal digital processing, cellular telephones, smartphones, wearable devices (e.g., helmets, glasses, watches, etc.), and other similar computing devices. The components shown herein, their connections and relationships, and their functions, are meant to be exemplary only, and are not meant to limit implementations of the inventions described and/or claimed herein.
As shown in fig. 6, the electronic device 60 includes at least one processor 61, and a memory, such as a Read Only Memory (ROM) 62, a Random Access Memory (RAM) 63, etc., communicatively connected to the at least one processor 61, in which the memory stores a computer program executable by the at least one processor, and the processor 61 may perform various appropriate actions and processes according to the computer program stored in the Read Only Memory (ROM) 62 or the computer program loaded from the storage unit 68 into the Random Access Memory (RAM) 63. In the RAM 63, various programs and data required for the operation of the electronic device 60 may also be stored. The processor 61, the ROM 62 and the RAM 63 are connected to each other via a bus 64. An input/output (I/O) interface 65 is also connected to bus 64.
Various components in the electronic device 60 are connected to the I/O interface 65, including: an input unit 66 such as a keyboard, a mouse, etc.; an output unit 67 such as various types of displays, speakers, and the like; a storage unit 68 such as a magnetic disk, an optical disk, or the like; and a communication unit 69 such as a network card, modem, wireless communication transceiver, etc. The communication unit 69 allows the electronic device 60 to exchange information/data with other devices via a computer network, such as the internet, and/or various telecommunication networks.
Processor 61 can be a variety of general-purpose and/or special-purpose processing components having processing and computing capabilities. Some examples of processor 61 include, but are not limited to, a Central Processing Unit (CPU), a Graphics Processing Unit (GPU), various specialized Artificial Intelligence (AI) computing chips, various processors running machine learning model algorithms, digital Signal Processors (DSPs), and any suitable processor, controller, microcontroller, etc. The processor 61 performs the various methods and processes described above, such as the grid-tie harmonic current suppression method based on voltage fundamental wave extraction.
In some embodiments, the grid-tie harmonic current suppression method based on voltage fundamental extraction may be implemented as a computer program tangibly embodied on a computer-readable storage medium, such as storage unit 68. In some embodiments, part or all of the computer program may be loaded and/or installed onto the electronic device 60 via the ROM 62 and/or the communication unit 69. When a computer program is loaded into RAM 63 and executed by processor 61, one or more steps of the grid-tie harmonic current suppression method based on voltage fundamental wave extraction described above may be performed. Alternatively, in other embodiments, the processor 61 may be configured to perform the grid-tie harmonic current rejection method based on the voltage fundamental extraction in any other suitable manner (e.g., by means of firmware).
Various implementations of the systems and techniques described here above can be implemented in digital electronic circuitry, integrated circuit systems, field Programmable Gate Arrays (FPGAs), application Specific Integrated Circuits (ASICs), application Specific Standard Products (ASSPs), systems On Chip (SOCs), complex Programmable Logic Devices (CPLDs), computer hardware, firmware, software, and/or combinations thereof. These various embodiments may include: implemented in one or more computer programs, the one or more computer programs may be executed and/or interpreted on a programmable system including at least one programmable processor, which may be a special purpose or general-purpose programmable processor, that may receive data and instructions from, and transmit data and instructions to, a storage system, at least one input device, and at least one output device.
A computer program for carrying out methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus, such that the computer programs, when executed by the processor, cause the functions/acts specified in the flowchart and/or block diagram block or blocks to be implemented. The computer program may execute entirely on the machine, partly on the machine, as a stand-alone software package, partly on the machine and partly on a remote machine or entirely on the remote machine or server.
In the context of the present invention, a computer-readable storage medium may be a tangible medium that can contain, or store a computer program for use by or in connection with an instruction execution system, apparatus, or device. The computer readable storage medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. Alternatively, the computer readable storage medium may be a machine readable signal medium. More specific examples of a machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
To provide for interaction with a user, the systems and techniques described here can be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to a user; and a keyboard and a pointing device (e.g., a mouse or a trackball) through which a user can provide input to the electronic device. Other kinds of devices may also be used to provide for interaction with a user; for example, feedback provided to the user may be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form, including acoustic input, speech input, or tactile input.
The systems and techniques described here can be implemented in a computing system that includes a background component (e.g., as a data server), or that includes a middleware component (e.g., an application server), or that includes a front-end component (e.g., a user computer having a graphical user interface or a web browser through which a user can interact with an implementation of the systems and techniques described here), or any combination of such background, middleware, or front-end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: local Area Networks (LANs), wide Area Networks (WANs), blockchain networks, and the internet.
The computing system may include clients and servers. The client and server are typically remote from each other and typically interact through a communication network. The relationship of client and server arises by virtue of computer programs running on the respective computers and having a client-server relationship to each other. The server can be a cloud server, also called a cloud computing server or a cloud host, and is a host product in a cloud computing service system, so that the defects of high management difficulty and weak service expansibility in the traditional physical hosts and VPS service are overcome.
It should be appreciated that various forms of the flows shown above may be used to reorder, add, or delete steps. For example, the steps described in the present invention may be performed in parallel, sequentially, or in a different order, so long as the desired results of the technical solution of the present invention are achieved, and the present invention is not limited herein.
The above embodiments do not limit the scope of the present invention. It will be apparent to those skilled in the art that various modifications, combinations, sub-combinations and alternatives are possible, depending on design requirements and other factors. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the scope of the present invention.

Claims (10)

1. The grid-connected harmonic current suppression method based on voltage fundamental wave extraction is characterized by being applied to a grid-connected harmonic current suppression system provided with a fundamental wave decoupling module, a virtual synchronous machine controller and a filter capacitor, and comprising the following steps of:
collecting inverter side current, grid side current and capacitance voltage of the filter capacitor, wherein the grid side current is current output to a power grid by the inverter;
inputting the capacitor voltage into the fundamental decoupling module to extract fundamental voltage;
inputting the capacitor voltage, the network side current, the preset active power and the preset reactive power into a virtual synchronous machine controller to obtain a reference voltage;
determining a reference current from the fundamental voltage and the reference voltage;
determining a target control amount from the reference current and the inverter-side current;
and generating a switching signal for driving the inverter according to the target control quantity so as to drive the inverter.
2. The grid-connected harmonic current suppression method based on voltage fundamental wave extraction as claimed in claim 1, wherein the transfer function of the fundamental wave decoupling module is as follows:
Figure FDA0004152171590000011
in the above formula, ω 0 Is the fundamental angular frequency omega of the grid voltage c The cut-off angle frequency of the digital filter, j represents the imaginary part and s is the laplace operator.
3. The grid-tie harmonic current suppression method based on voltage fundamental wave extraction as claimed in claim 1, wherein the grid-tie harmonic current suppression system further comprises a voltage loop controller, the determining a reference current from the fundamental wave voltage and the reference voltage comprises:
calculating a difference between the reference voltage and the fundamental voltage as a voltage error value;
and inputting the voltage error value into a voltage ring controller to obtain a reference current.
4. The grid-connected harmonic current suppression method based on voltage fundamental wave extraction as claimed in claim 3, wherein the voltage loop controller is a proportional resonance controller.
5. The grid-tie harmonic current suppression method based on voltage fundamental wave extraction according to any one of claims 1 to 4, wherein the grid-tie harmonic current suppression system further comprises a current loop controller that determines a target control amount from the reference current and the inverter-side current, comprising:
calculating the difference value between the reference current and the inverter side current to obtain a current error value;
and inputting the current error value into the current loop controller to obtain a target control quantity.
6. The grid-connected harmonic current suppression method based on voltage fundamental wave extraction as claimed in claim 5, wherein the current loop controller is a proportional controller.
7. The utility model provides a grid-connected harmonic current suppression device based on voltage fundamental wave draws which characterized in that is applied to and is provided with fundamental wave decoupling module, virtual synchronous machine controller and filter capacitor's grid-connected harmonic current suppression system, includes:
the grid-connected data acquisition module is used for acquiring inverter side current, grid side current and capacitance voltage of the filter capacitor, wherein the grid side current is the current output to a power grid by the inverter;
the fundamental wave decoupling module is used for inputting the capacitor voltage into the fundamental wave decoupling module so as to extract fundamental wave voltage;
the reference voltage determining module is used for inputting the capacitor voltage, the network side current, the preset active power and the preset reactive power into the virtual synchronous machine controller to obtain a reference voltage;
a reference current determining module for determining a reference current from the fundamental voltage and the reference voltage;
a target control amount determining module configured to determine a target control amount based on the reference current and the inverter-side current;
and the inverter control module is used for generating a switching signal for driving the inverter according to the target control quantity so as to drive the inverter.
8. The grid-connected harmonic current suppression device based on voltage fundamental wave extraction as claimed in claim 7, wherein the transfer function of the fundamental wave decoupling module is as follows:
Figure FDA0004152171590000021
in the above formula, ω 0 Is the fundamental angular frequency omega of the grid voltage c The cut-off angle frequency of the digital filter, j represents the imaginary part and s is the laplace operator.
9. An electronic device, the electronic device comprising:
at least one processor; and
a memory communicatively coupled to the at least one processor; wherein, the liquid crystal display device comprises a liquid crystal display device,
the memory stores a computer program executable by the at least one processor to enable the at least one processor to perform the grid-tie harmonic current suppression method based on voltage fundamental extraction of any one of claims 1-7.
10. A computer readable storage medium storing computer instructions for causing a processor to implement the grid-tie harmonic current suppression method based on voltage fundamental wave extraction of any one of claims 1-7 when executed.
CN202310322173.4A 2023-03-29 2023-03-29 Grid-connected harmonic current suppression method and related device based on voltage fundamental wave extraction Pending CN116154774A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202310322173.4A CN116154774A (en) 2023-03-29 2023-03-29 Grid-connected harmonic current suppression method and related device based on voltage fundamental wave extraction

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202310322173.4A CN116154774A (en) 2023-03-29 2023-03-29 Grid-connected harmonic current suppression method and related device based on voltage fundamental wave extraction

Publications (1)

Publication Number Publication Date
CN116154774A true CN116154774A (en) 2023-05-23

Family

ID=86360267

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202310322173.4A Pending CN116154774A (en) 2023-03-29 2023-03-29 Grid-connected harmonic current suppression method and related device based on voltage fundamental wave extraction

Country Status (1)

Country Link
CN (1) CN116154774A (en)

Similar Documents

Publication Publication Date Title
CN106771786A (en) The verification method and experimental provision of electric network impedance identification
CN104300812B (en) Direct power active disturbance rejection control method for three-phase voltage source PWM rectifier
WO2022217812A1 (en) Electromechanical transient modeling method and system, and device and storage medium
CN114024309B (en) Island micro-grid system and method and system for restraining interaction oscillation thereof
CN108448638B (en) Control method, device and equipment of photovoltaic grid-connected inverter
CN103472282A (en) Improved FBD harmonic current detection method based on adaptive principle
Peng et al. Modeling techniques and stability analysis tools for grid-connected converters
CN111146807A (en) Method for judging small interference stability of converter grid-connected system under polar coordinate
CN110807168B (en) Method and device for estimating sub-synchronous oscillation mode of grid-connected converter
CN116154774A (en) Grid-connected harmonic current suppression method and related device based on voltage fundamental wave extraction
CN115954923A (en) Fault ride-through method and device for offshore wind power flexible direct current transmission system
CN115000983A (en) Method, device and equipment for evaluating inertia and primary frequency modulation capability of power supply node
CN109301826A (en) A method of based on ARM or dsp chip and FPGA cooperative achievement PR control algolithm
CN116365522A (en) Grid-connected harmonic current suppression method and related device based on current feedforward compensation
CN116191428A (en) Grid-connected harmonic current suppression method and related device based on digital frequency multiplication gain
CN115473226B (en) Closed-loop equation-based VSC high-frequency impedance matrix modeling method and system
CN116865266A (en) Harmonic suppression method based on distributed power flow controller
CN109067223A (en) Converter station current fluctuation suppressing method based on high-accuracy general controller
CN115632412A (en) PCC point unbalanced voltage suppression method, device, equipment and storage medium
CN110190627B (en) Grid-connected inverter power grid adaptability control algorithm based on auxiliary link
CN117155156B (en) Parallel power module control method, electronic equipment and storage medium
CN117010173A (en) Direct-driven fan oscillation risk assessment method and device based on dominant pole model
CN117060498A (en) Virtual node voltage feedback control method and system of inverter
CN117118264A (en) Current loop compensation method, system and storage medium of grid-connected converter
Huang et al. Disturbance Rejection Control of Grid-Forming Inverter for Line Impedance Parameter Perturbation in Weak Power Grid

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination