CN116151161A

CN116151161A - Automatic generation method of pin multiplexing circuit based on script language

Info

Publication number: CN116151161A
Application number: CN202310089557.6A
Authority: CN
Inventors: 肖梁山
Original assignee: Zhuhai Shengsheng Microelectronic Co ltd
Current assignee: Zhuhai Shengsheng Microelectronic Co ltd
Priority date: 2023-02-08
Filing date: 2023-02-08
Publication date: 2023-05-23

Abstract

The invention provides a script language-based automatic generation method of a pin multiplexing circuit, which comprises the steps of establishing an I/O multiplexing table for the pin multiplexing circuit; reading data of the I/O multiplexing table to finish table reading; acquiring a header and a pin row, and respectively storing row and column coordinates of functions corresponding to each pin and direction coordinates of the corresponding row and column into a coordinate variable to enable each pin to be in contact with the corresponding functions and directions; traversing the coordinate variables to complete pin output logic instantiation; traversing the coordinate variables to finish the generation of the function input multiplexing logic; outputting a multiplexing circuit RTL file; and outputting the multiplexing circuit test file. The invention solves the problems of time and labor consumption, high error rate, low efficiency, high labor and time cost and the like of manpower in the prior art, automatically realizes the automatic generation of the pin multiplexing circuit by setting the IO multiplexing table, improves the efficiency of pin multiplexing, and avoids the problems of easy error and high labor cost when the IO pin multiplexing is realized in the prior art.

Description

Automatic generation method of pin multiplexing circuit based on script language

Technical Field

The invention relates to the technical field of integrated circuit design, in particular to a script language-based automatic generation method of a pin multiplexing circuit.

Background

With the development of integrated circuits, the process of chips is more advanced, the functions and complexity of the system are gradually increased, and the area of the chips is gradually reduced. With the cost and area considerations, pin multiplexing circuits are emerging. The pin multiplexing circuit can enable different functions of the system to share the same input/output (I/O) pins, so that all functions can be used under the condition of limited pin number, and therefore, the packaging of the chip is reduced, and the cost is saved. And meanwhile, the application requirements of the same function for input and output from different I/O pins under different packages can be met.

In the prior art, the pin multiplexing circuit is usually implemented by a one-out-of-many selector circuit according to the input/output direction, and the multiplexing function circuit and the connection relation of each pin are manually written according to the pin arrangement and the pin function multiplexing relation of the chip. Typically, a chip has tens of pins, and a large-scale chip has hundreds of pins, and each pin has a plurality of multiplexing relations, so that circuit codes are quite lengthy. The manual writing and wiring are time-consuming and labor-consuming and are prone to error. And as the chip scale increases, the number of pins and the multiplexing of functions also increase, and the manual connection becomes more difficult.

In addition, after the connection is completed, the designer needs to check and write test items for verifying the correctness of the circuit connection one by one, and writing the test items is time-consuming and labor-consuming. And with the need for new applications, the circuit is re-designed and re-verified once the functional updates and pin arrangements change, which is very costly in terms of labor and time.

Disclosure of Invention

In order to overcome the defects of the prior art, the invention aims to provide the automatic generation method of the pin multiplexing circuit based on the script language, which can solve the problems of time and labor consumption, high error rate, low efficiency, high manpower and time cost and the like of the manual work in the prior art, automatically realize the automatic generation of the pin multiplexing circuit by setting the IO multiplexing table, improve the efficiency of pin multiplexing and avoid the problems of easy error and high manpower cost when IO pin multiplexing is realized in the prior art.

In order to solve the problems, the technical scheme adopted by the invention is as follows:

a script language-based automatic generation method of a pin multiplexing circuit comprises the steps of establishing an I/O multiplexing table for the pin multiplexing circuit; reading data of the I/O multiplexing table to finish table reading; acquiring a header and a pin row, and respectively storing row and column coordinates of functions corresponding to each pin and direction coordinates of the corresponding row and column into a coordinate variable to enable each pin to be in contact with the corresponding functions and directions; traversing the coordinate variables to complete pin output logic instantiation; traversing the coordinate variables to finish the generation of the function input multiplexing logic; outputting a multiplexing circuit RTL file; and outputting the multiplexing circuit test file.

According to the method for automatically generating the pin multiplexing circuit based on the script language, the method for reading the data of the I/O multiplexing table comprises the following steps: reading an I/O multiplexing table through a script language to finish table reading, wherein Pin columns in the I/O multiplexing table are names P1-Pn of n I/O pins, functions are m different Function columns, the contents are specifically different Function names, D columns represent directions corresponding to m different functions, and the contents are specifically input, output or bidirectional.

According to the method for automatically generating the pin multiplexing circuit based on the script language, the method for acquiring the header and the pin array comprises the following steps: acquiring a title and a Pin row through a script, and respectively storing row and column coordinates of m functions corresponding to n pins Pin and coordinates of a direction corresponding to a D column into coordinate variables so that each Pin is connected with the corresponding Function and direction;

according to the method for automatically generating the Pin multiplexing circuit based on the script language, corresponding multiplexing function selection signals SEL 1-SELn are generated for all pins P1-Pn and are used for representing the functions corresponding to pins Pin.

According to the method for automatically generating the pin multiplexing circuit based on the script language, the logic instantiation of the pin output is completed, and the method comprises the following steps: the pins are tri-state pins, and the control of the output of the tri-state pins generally comprises an output signal OUT and an output enabling signal OE; if the pin does not have Function x, then fix the OUTx and OEx of the module to 0; if the direction of Function x is output, instantiating the OUTx of the module to output the corresponding Function, and fixing OEx to be 1; if the direction of Function x is bi-directional, the OUTx and OEx of the module are instantiated with corresponding Function outputs and Function enables, respectively.

According to the automatic generation method of the pin multiplexing circuit based on the script language, provided by the invention, the selection ports of the multiplexer are controlled by the SEL selection signals, OUTx and OEx with different functions are output to OUT and OE of corresponding pins, and therefore, the instantiation mapping of the pin output logic is completed.

According to the method for automatically generating the pin multiplexing circuit based on the script language, the generation of the input multiplexing logic of the completion function comprises the following steps: the pins are tri-state pins, each having an input py_in (y=1 to n).

According to the automatic generation method of the Pin multiplexing circuit based on the script language, if the input end of a certain Function can be input by a plurality of Pin pins, namely, different Pin inputs Px_IN can be connected to the input Pin FUN_IN of the Function through the SEL selection signal.

According to the method for automatically generating the pin multiplexing circuit based on the script language, the output multiplexing circuit RTL file comprises the following steps: the method comprises the steps of formatting an output file through a script, opening an RTL file, printing and outputting Pin names, function names and Pin selection ends SEL obtained by analyzing an I/O multiplexing table as ports of a Pin multiplexing circuit module into the RTL file, determining the direction of the ports according to the function directions in the I/O multiplexing table and printing, and printing and outputting the output multiplexing modules of all pins and the function input logic of each function generated in the previous step to the RTL file.

According to the method for automatically generating the pin multiplexing circuit based on the script language, the output multiplexing circuit test file comprises the following steps: and outputting the connection relation between the Pin Pin and the corresponding function to the multiplexing circuit test file while outputting the RTL file, so as to realize automatic generation of the multiplexing circuit and generation of the test file.

It can be seen that the invention has the following beneficial effects:

1. the invention discloses a method for realizing automatic generation of a pin multiplexing circuit based on a script language, which uses a script to call and instantiate a multiplexing circuit module according to a demand table, and simultaneously completes connection of the circuit module and an I/O pin according to a multiplexing relation so as to solve the problems of complicated work, long time consumption, easy error and the like of manually realizing circuit connection.

2. The invention uses script language to combine with table file to complete RTL circuit file generation, which has strong versatility, can be realized by any script language, and can be used in all fields of integrated circuit, such as ASIC (Application Specific Integrated Circuit ) and FPGA (Field Programmable Gate Array, field programmable gate array).

3. The invention uses the script language to combine the form file to complete the generation of RTL circuit file, the reusability is strong, only the input form file is changed, the pin multiplexing circuit with different connection relations can be generated for different projects, and the updating in the project process and the transplanting of different projects are facilitated.

4. The invention can also automatically generate test items with multiplexing functions according to the pin multiplexing condition and the connection relation, and provide the test items for test personnel. So as to reduce the workload of testers and improve the testing accuracy.

The invention is described in further detail below with reference to the drawings and the detailed description.

Drawings

FIG. 1 is a flow chart of an embodiment of a method for automatically generating pin multiplexing circuits based on a scripting language implementation of the present invention.

Fig. 2 is a schematic circuit diagram of a pin-out multiplexing logic module in an embodiment of a method for automatically generating a pin-out multiplexing circuit based on a scripting language according to the present invention.

Fig. 3 is a schematic circuit diagram of a functional input multiplexing logic structure in an embodiment of a method for automatically generating a pin multiplexing circuit based on a scripting language according to the present invention.

Fig. 4 is a circuit configuration diagram of tri-state pins in an embodiment of a method for automatically generating a pin multiplexing circuit based on a scripting language according to the present invention.

Detailed Description

For the purpose of making the objects, technical solutions and advantages of the present invention more apparent, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings, and it is apparent that the described embodiments are some embodiments of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.

Referring to fig. 1 to 4, the invention provides a script language based automatic generation method of a pin multiplexing circuit, which comprises the following steps:

step S1, an I/O multiplexing table for a pin multiplexing circuit is established;

s2, reading data of the I/O multiplexing table to finish table reading;

step S3, acquiring a header and a pin row, and respectively storing row and column coordinates of functions corresponding to each pin and direction coordinates of the corresponding row and column into coordinate variables so that each pin is connected with the corresponding function and direction;

step S4, traversing the coordinate variables to complete pin output logic instantiation;

step S5, traversing the coordinate variables to finish the generation of the function input multiplexing logic;

step S6, outputting a multiplexing circuit RTL file; and outputting the multiplexing circuit test file.

In the step S2, the reading the data of the I/O multiplexing table includes:

reading an I/O multiplexing table through a script language to finish table reading, wherein Pin columns in the I/O multiplexing table are names P1-Pn of n I/O pins, functions are m different Function columns, the contents are specifically different Function names, D columns represent directions corresponding to m different functions, and the contents are specifically input, output or bidirectional.

In the step S3, the header and pin array is obtained, including:

acquiring a title and a Pin row through a script, and respectively storing row and column coordinates of m functions corresponding to n pins Pin and coordinates of a direction corresponding to a D column into coordinate variables so that each Pin is connected with the corresponding Function and direction;

corresponding multiplexing function selection signals SEL 1-SELn are generated for all pins P1-Pn to represent the corresponding functions of Pin pins.

In the step S4, when the traversing coordinate variable is executed, the row and column coordinates of the first pin are read, the row is kept unchanged, and the corresponding function and direction can be obtained by changing the row coordinates; reading row and column coordinates of a second pin, keeping the row unchanged, and changing the row coordinates can obtain corresponding functions and directions; and so on, traversing all the pin row and column coordinates and corresponding functions. After the functions of outputting and bi-directional directions are screened out, output logic instantiation is completed.

In the step S4, the pin-out logic instantiation is completed, including:

the pins are tri-state pins, and the control of the output of the tri-state pins generally comprises an output signal OUT and an output enabling signal OE;

if the pin does not have Function x, then fix the OUTx and OEx of the module to 0; if the direction of Function x is output, instantiating the OUTx of the module to output the corresponding Function, and fixing OEx to be 1; if the direction of Function x is bi-directional, the OUTx and OEx of the module are instantiated with corresponding Function outputs and Function enables, respectively.

The selection port of the multiplexer is controlled by the SEL selection signal to output the OUTx and OEx with different functions to the OUT and OE of the corresponding pins, thereby completing the instantiation mapping of the pin output logic.

In the step S5, when the traversing coordinate variables are executed, the method is the same as the traversing method in the step S4, and after the filtering direction is the input and bidirectional function, the input multiplexing logic generation is completed.

In the step S5, the generation of the functional input multiplexing logic is completed, including:

the pins are tri-state pins, each having an input py_in (y=1 to n).

If the input terminal of a certain Function can be input by a plurality of Pin pins, namely different Pin input px_in can be connected to the input Pin fun_in of the Function through the SEL selection signal.

In the step S6, the output multiplexing circuit RTL file includes:

the method comprises the steps of formatting an output file through a script, opening an RTL file, printing and outputting Pin names, function names and Pin selection ends SEL obtained by analyzing an I/O multiplexing table as ports of a Pin multiplexing circuit module into the RTL file, determining the direction of the ports according to the function directions in the I/O multiplexing table and printing, and printing and outputting the output multiplexing modules of all pins and the function input logic of each function generated in the previous step to the RTL file.

In the step S6, the output multiplexing circuit test file includes:

and outputting the connection relation between the Pin Pin and the corresponding function to the multiplexing circuit test file while outputting the RTL file, so as to realize automatic generation of the multiplexing circuit and generation of the test file.

Wherein, in step S1, when the I/O multiplexing table for the pin multiplexing circuit is established, the pin multiplexing circuit corresponds to a plurality of ports, each port corresponds to at least one IO pin, and each IO pin multiplexes a plurality of functions.

Specifically, determining the total number of pins of the integrated peripheral of the pin multiplexing circuit and the number of pins included in each port, thereby determining the number of ports and corresponding port names;

determining all optional values of the register according to the application function of the pin multiplexing circuit peripheral equipment, and forming a preliminary IO multiplexing table according to the port names and the optional values of the register; in practical applications, the names of other ports may be listed in the same column; more specifically, the ports are according to project requirements, and further according to the number of peripheral devices integrated in the pin multiplexing circuit, wherein the number of peripheral modules determines the total number of input pins and output pins of the pin multiplexing circuit, and then each port has a fixed number of pins, so that the number of ports to be selected can be obtained. The preliminary IO multiplexing table may be a table such as an outer form, among others.

And then, according to the set content naming rule and the application function of the pin multiplexing circuit integrated peripheral, filling corresponding content into the preliminary IO multiplexing table to form a final IO multiplexing table.

Therefore, the invention provides a method for realizing reading of the form file based on the script language (Perl, tcl, python, shell, etc.), and completing the automatic generation of the pin multiplexing circuit, wherein the generated circuit can be a circuit file described by VHDL or Verilog HDL language.

Specifically, the embodiment adopts a Perl script language to realize a pin multiplexing circuit, reads an I/O multiplexing table, and generates an RTL (Register Transfer Level ) circuit description file with a pin multiplexing function based on a Verilog HDL language.

First, the script reads the I/O multiplexing table shown in Table 1, and completes the table reading. Wherein Pin columns in the table are names P1-Pn of n I/O pins; the Function columns are m different Function columns, namely functions 1 to Function m, and the content is specifically different Function names; the D column indicates the direction corresponding to m different functions, and the content is specifically input, output or bidirectional.

Function1

D1

Function2

D2

Function3

D3

…

Functionm

Dm

P1

…

P2

…

P3

…

P4

…

Pn

…

TABLE 1I/O multiplexing Table

Then, the script acquires the header and the Pin rows and columns, and respectively stores row and column coordinates of m functions corresponding to n pins and coordinates of the direction corresponding to the D column into coordinate variables, so that each Pin is connected with the corresponding Function and direction. Meanwhile, corresponding multiplexing function selection signals SEL 1-SELn are generated for all pins P1-Pn and are used for representing the functions corresponding to Pin pins. For example, when SEL1 is 2, it indicates that Pin1 selects the function of function 2, and if D2 is output at this time, it indicates that Pin1 selects the function corresponding to function 2 as output.

Then, the script traverses the coordinate variables to complete the instantiation of the pin-out logic. Specifically, for each Pin output multiplexing logic module, the circuit structure is two one-to-one multiplexers, as shown in fig. 2. Since the pins are tri-state pins, controlling their outputs typically includes an output signal OUT and an output enable signal OE. If no Function x exists for the pin (x=1-m), then fix the module's OUTx and OEx to 0; if the direction of Function x is output, instantiating the OUTx of the module as the corresponding Function output, and fixing OEx to be 1; if the direction of Function x is bi-directional, the OUTx and OEx of the module are instantiated with the corresponding Function output and Function enable, respectively. The SEL select signal controls the select ports of the multiplexer, so that the OUTx and OEx with different functions can be output to the OUT and OE of the corresponding pins, thereby completing the instantiation mapping of the pin output logic. As shown in fig. 2, fig. 2 is an output multiplexing logic module structure of a Pin.

Then, the script traverses the coordinate variables to complete the generation of the function input multiplexing logic. Specifically, for the input logic of a certain function, the circuit structure is composed of a plurality of multiplexers selected by two, as shown in fig. 3. Since the pins are tri-state pins, each pin has one input py_in (y=1 to n). If the input of this Function can be input by multiple Pin pins, then different Pin inputs px_in can be connected to the input Pin fun_in of the Function by the SEL select signal, as shown IN fig. 3, fig. 3 is an input multiplexing logic structure for a Function from pins P1, P2 and P3.

Finally, the script outputs the RTL file and the test file. Specifically, the script formats the output file, opens the RTL file, prints out the Pin name, the function name and the Pin selection end SEL obtained by analyzing the table as ports of the Pin multiplexing circuit module into the RTL file, determines the direction of the ports according to the function direction in the table and prints out, prints out the output multiplexing modules of all the pins generated in the front and the function input logic of each function into the RTL file, and simultaneously outputs the connection relation between the Pin and the corresponding function to the multiplexing circuit test file, thereby realizing the automatic generation of the multiplexing circuit and the generation of the test file.

In addition, the general function control unit, the special function control unit and other functional modules are arranged in the pin multiplexing circuit, so that the multiplexing pins can be used as normal functions at any time; when special functions, such as an online debugging function, are needed, after the hardware debugger is connected, the hardware debugger can be switched to the debugging function, and the running codes cannot influence the debugging signals and the functions; after the debugging is completed, the hardware debugger is removed, and then the normal function can be restored. The beneficial effects are as follows: multiplexing of chip pins is achieved, pin resources are saved, and normal function use is not affected.

Therefore, the invention discloses a method for automatically generating a pin multiplexing circuit based on a script language, which uses a script to call and instantiate a multiplexing circuit module according to a demand table, and simultaneously completes the connection of the circuit module and an I/O pin according to a multiplexing relation so as to solve the problems of complicated work, long time consumption, easy error and the like of manually realizing the circuit connection; the invention uses the script language to combine with the table file to finish the generation of the RTL circuit file, has strong universality, can be realized by using any script language, and can be used in all fields of integrated circuits, such as ASIC (Application Specific Integrated Circuit ) and FPGA (Field Programmable Gate Array, field programmable gate array) and the like; the invention uses the script language to combine the form file to finish RTL circuit file generation, the reusability is strong, only need to change the form file input, can be to different project produce the pin multiplexing circuit of different connection relations, facilitate the updating and different project transplantation in the project process; the invention can also automatically generate test items with multiplexing functions according to the pin multiplexing condition and the connection relation, and provide the test items for test personnel. So as to reduce the workload of testers and improve the testing accuracy.

The technical features of the above embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.

The above embodiments are only preferred embodiments of the present invention, and the scope of the present invention is not limited thereto, but any insubstantial changes and substitutions made by those skilled in the art on the basis of the present invention are intended to be within the scope of the present invention as claimed.

Claims

1. The automatic generation method of the pin multiplexing circuit based on the script language is characterized by comprising the following steps:

establishing an I/O multiplexing table for the pin multiplexing circuit;

reading data of the I/O multiplexing table to finish table reading;

acquiring a header and a pin row, and respectively storing row and column coordinates of functions corresponding to each pin and direction coordinates of the corresponding row and column into a coordinate variable to enable each pin to be in contact with the corresponding functions and directions;

traversing the coordinate variables to complete pin output logic instantiation;

traversing the coordinate variables to finish the generation of the function input multiplexing logic;

outputting a multiplexing circuit RTL file;

and outputting the multiplexing circuit test file.

2. The method of claim 1, wherein the reading the data of the I/O multiplexing table comprises:

3. The method of claim 2, wherein the acquiring header and pin array comprises:

and acquiring a header and a Pin row through a script, and respectively storing row and column coordinates of m functions corresponding to n pins Pin and coordinates of a direction corresponding to a D column into coordinate variables so that each Pin is connected with the corresponding Function and direction.

4. A method according to claim 3, characterized in that:

5. The method of claim 4, wherein the completing pin-out logic instantiating comprises:

6. The method according to claim 5, wherein:

the select ports of the multiplexers are controlled by the SEL select signals to output the OUTx and OEx of the different functions to the OUT and OE of the corresponding pins, thereby completing the instantiation mapping of the pin OUT logic.

7. The method of claim 4, wherein the generating of the completion function input multiplexing logic comprises:

the pins are tri-state pins, each having an input py_in (y=1 to n).

8. The method according to claim 7, wherein:

9. The method according to any one of claims 1 to 8, wherein the outputting a multiplexing circuit RTL file comprises:

10. The method of claim 9, wherein outputting the multiplexed circuit test file comprises: