CN116137271A - Backside illuminated image sensor and manufacturing method thereof - Google Patents

Backside illuminated image sensor and manufacturing method thereof Download PDF

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Publication number
CN116137271A
CN116137271A CN202111354150.9A CN202111354150A CN116137271A CN 116137271 A CN116137271 A CN 116137271A CN 202111354150 A CN202111354150 A CN 202111354150A CN 116137271 A CN116137271 A CN 116137271A
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region
pinning
image sensor
carbon
ions
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陈林
孙玉鑫
傅璟
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Galaxycore Shanghai Ltd Corp
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Galaxycore Shanghai Ltd Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/1464—Back illuminated imager structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/14603—Special geometry or disposition of pixel-elements, address-lines or gate-electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/14609—Pixel-elements with integrated switching, control, storage or amplification elements
    • H01L27/14612—Pixel-elements with integrated switching, control, storage or amplification elements involving a transistor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Abstract

The invention provides a backside illuminated image sensor and a forming method thereof, comprising the following steps: a substrate having opposite front and back surfaces; the light sensing units and the pinning areas are arranged in the substrate in an array manner, and the light sensing units are arranged in the substrate; the pinning area is adjacent to the front face, is arranged on the photosensitive unit at intervals, and is doped with boron ions and carbon ions. The invention adopts the carbon doping process to dope carbon ions, does not need to increase an extra photomask or increase thermal budget to eliminate the damage of the pinning layer to the substrate, and further improves the performance of the CIS pixel unit on the basis of reasonably controlling the cost.

Description

Backside illuminated image sensor and manufacturing method thereof
Technical Field
The invention relates to the technical field of semiconductors, in particular to a back-illuminated image sensor and a manufacturing method thereof.
Background
White Pixel (WP) performance directly affects the imaging quality of the CIS, as one of the important indicators for evaluating the performance of CMOS image sensors (CMOS image sensor, CIS). It has been demonstrated that WP is caused by an abnormally increased dark current, and appears that the pixel cell still outputs a highlight signal under a light shielding condition.
The increase of dark current is mainly due to defects (such as lattice damage, segregation defects and the like) and metal pollution (such as Mo, ni and the like) generated in the process of the photosensitive unit, and the factors introduce deep energy levels in Si forbidden bands and become centers for carrier generation and recombination. Surface defects are passivated by performing a shallow P-type pinning layer (PIN) on the surface of the photosensitive unit on the premise of ensuring the purity of the ion source.
However, after PIN formation, implant ion diffusion behavior occurs during annealing and becomes biased to the wafer surface and precipitates, resulting in the re-occurrence of WP.
Disclosure of Invention
The invention aims to provide a back-illuminated image sensor and a forming method thereof, which prevent injected ions of a pinning layer from diffusing, and prevent electrons from entering a photosensitive unit to form dark current signals, so that the dark current of the back-illuminated image sensor is effectively reduced, the noise problem is solved, and the imaging quality is further improved.
Based on the above, one aspect of the present invention provides a back-illuminated image sensor, comprising: a substrate having opposite front and back surfaces; the light sensing units and the pinning areas are arranged in the substrate in an array manner, and the light sensing units are arranged in the substrate; the pinning area is adjacent to the front face, is arranged on the photosensitive unit at intervals, and is doped with boron ions and carbon ions.
Preferably, the pinning region includes a first region and a second region disposed from top to bottom relative to the front surface, the doping depth of the first region is shallower than the doping depth of the second region, the first region is doped with carbon ions, and the second region is doped with boron ions.
Preferably, the pinning region further includes a third region having a doping depth deeper than that of the second region and doped with carbon ions.
Preferably, the lateral dimensions of the first region and the third region are equal and are both greater than or equal to the lateral dimension of the second region.
Preferably, the pinning region further includes a plurality of transition regions, each of the transition regions is disposed between the first region and the third region, and is doped with carbon ions.
Preferably, the doping depth of each transition region increases from the first region to the third region.
Preferably, the lateral dimensions of the transition regions are equal to each other and are equal to the lateral dimensions of the first region.
Preferably, the lateral dimensions of each of the transition region, the first region and the third region are equal.
Preferably, the method further comprises: the first transistors are correspondingly coupled with the photosensitive units and are provided with first grid structures, one sides of the first grid structures corresponding to the pinning areas are arranged on the front face and comprise first grids and first grid side walls, the first grid side walls cover the side walls of the first grids, and the side walls are aligned with the pinning areas on the corresponding sides.
Preferably, the method further comprises: the pre-pinning region penetrates through the pinning region and transversely extends to the position below the first grid side wall at the corresponding side, and the side wall is aligned to the side wall of the first grid at the corresponding side; wherein the pre-pinning region is doped with boron ions and the dopant amount is less than the dopant amount of the boron ions of the pinning region.
Preferably, the doping depth of the pre-pinning region is equal to the doping depth of the second region.
Preferably, the pre-pinned region has a dopant amount at least 1 order of magnitude less than the dopant amount of the second region.
Preferably, the boron ions are obtained by doping with a boron ion source.
Preferably, the method further comprises: the second transistors are correspondingly coupled with the first transistors and are provided with second grid structures, second source regions and second drain regions, the other side of one side of each second grid structure, which is separated by the corresponding pinning region, is arranged on the front surface, and the second source regions and the second drain regions are arranged in the substrate; the pinning region, the second gate structure, the second source region and the second drain region are all arranged at intervals.
Another aspect of the present invention provides a method for forming a backside illuminated image sensor, including: providing a substrate, wherein the substrate is provided with a front surface and a back surface which are opposite; a plurality of photosensitive units which are arranged in an array form in the substrate; forming a first patterning layer on the front surface by adopting a first photoetching process, wherein the first patterning layer is provided with a first opening, and the bottom of the first opening exposes part of the substrate; sequentially doping boron ions and carbon ions to the bottom of the first opening by adopting a first boron doping process and a carbon doping process by taking the first patterned layer as a mask, and forming a pinning region in the substrate; and removing the first patterning layer.
Preferably, the carbon doping process includes a first carbon implantation process, using the first patterned layer as a mask, sequentially doping boron ions by using a first boron doping process and doping carbon ions by using a carbon doping process to the bottom of the first opening, and forming a pinning region in the substrate includes: using the first patterned layer as a mask, and doping boron ions by adopting a first boron doping process to form a second region; processing the first opening by adopting an ashing process to form a second opening; and forming a first region by using the first patterned layer as a mask and adopting the first carbon implantation process.
Preferably, the lateral dimension of the second opening is greater than the lateral dimension of the first opening.
Preferably, the carbon doping process further includes a third carbon implantation process and/or a plurality of interval carbon implantation processes, and after the first patterned layer is used as a mask and the first carbon implantation process is used to form the first region, the method further includes: and forming a third region by using the first patterned layer as a mask and adopting the third carbon implantation process, and/or forming a plurality of corresponding transition regions by using the plurality of interval carbon implantation processes by using the first patterned layer as a mask.
Preferably, the doping amount of the carbon ions comprises 1E12 atoms/cm 2 ~1E14atom/cm 2 And the doping depth of the carbon ions gradually increases from the first region to the third region.
Preferably, the ashing process includes a dry etching process.
The boron ions are obtained through doping of the boron ion source, so that Mo pollution can be effectively avoided, meanwhile, the pinning area is formed through doping of the boron ions and the carbon ions, the carbon ions effectively inhibit the diffusion of the boron ions, the diffusion of the boron ions to the surface (front) of the substrate and even the segregation of the boron ions are avoided, and therefore the WP defect is avoided; in addition, the carbon ions can also effectively inhibit boron ions from diffusing to the periphery, so that isolation between the photosensitive unit and the NMOS tube is prevented from being poor, and further the risk of FWC leakage is reduced.
Furthermore, the invention adopts the carbon doping process to dope carbon ions, does not need to add an extra photomask or increase thermal budget (thermal budget) to eliminate the damage of the pinning layer to the substrate, and further improves the performance of the CIS pixel unit on the basis of reasonably controlling the cost.
Drawings
Other features, objects and advantages of the present invention will become more apparent from the detailed description of non-limiting embodiments which follows, which is read in connection with the accompanying drawings.
Fig. 1 shows a cross-sectional view of a back-illuminated image sensor according to a first embodiment of the present invention;
FIG. 2 shows a cross-sectional view of a backside illuminated image sensor according to a second embodiment of the present invention;
FIG. 3 shows a cross-sectional view of a backside illuminated image sensor according to a third embodiment of the present invention;
fig. 4 to 7 are process diagrams of a method for forming an image sensor chip according to a third embodiment of the present invention.
In the drawings, the same or similar reference numerals denote the same or similar devices (modules) or steps throughout the different drawings.
Detailed Description
In order to make the contents of the present invention more clear and understandable, the contents of the present invention will be further described with reference to the accompanying drawings. Of course, the invention is not limited to this particular embodiment, and common alternatives known to those skilled in the art are also encompassed within the scope of the invention.
In the following detailed description of the embodiments of the present invention, the structures of the present invention are not drawn to a general scale, and the structures in the drawings are partially enlarged, deformed, and simplified, so that the present invention should not be construed as being limited thereto.
Currently, ion sources available for PIN selection include boron (B) ion sources and boron difluoride (BF 2 ) An ion source. Wherein BF 2 The diffusion coefficient is small, the surface precipitation is hardly caused by segregation in the subsequent annealing process, and the isolation performance between the photosensitive unit and the peripheral transistor is not affected. However, the metal member of the processing equipment contains molybdenum (Mo) element, and after ionization during the processing, mo ions, BF are generated 2 The charge-to-mass ratio of the ion groups is close to that of Mo ions, boron difluoride (BF 2 ) When the ion source is implanted, the deflection magnetic field cannot effectively filter Mo ions, so that Mo ions are implanted, a deep energy level is introduced into a Si forbidden band, dark current is increased, and WP defects are generated.
The boron (B) ion source is adopted for implantation, so that Mo pollution can be effectively avoided, however, the diffusion rate of boron ions in Si is high, boron ions tend to be biased to the surface of a silicon wafer in the subsequent annealing process, precipitation defects are formed, WP (silicon nitride) is secondarily deteriorated, an isolation region between a photodiode and a peripheral transistor is narrowed, and the risk of FWC leakage reduction exists.
Aiming at the high requirements of high-performance CIS pixel units on WP performance, the process conditions of PIN IMP are required to be continuously improved. Wherein metal contamination must be avoided, B is considered as the ion source for Post-pin IMP.
The technical idea of the invention is to introduce carbon (C) ions near the pinning layer (PIN), thereby effectively inhibiting the diffusion of boron (B) ions, avoiding the diffusion of boron ions to the surface of the silicon wafer and eliminating the adverse effect caused by boron ion segregation.
Fig. 1 shows a cross-sectional view of a backside illuminated image sensor according to a first embodiment of the present invention, in this embodiment, the backside illuminated image sensor includes a substrate 100, a photosensitive unit 101, a first transistor, a second transistor, and a pinning region. In the following example, 1 photosensitive cell and 1 pinning region are shown, however, it will be understood by those skilled in the art that the number of photosensitive cells and pinning regions may be set as desired, and embodiments of the present disclosure are not limited thereto.
The substrate 100 has a front surface (an upper surface as shown in fig. 1) and a back surface (a lower surface as shown in fig. 1) opposite to each other, and incident light is incident on each of the photosensitive cells 101 from the back surface. The plurality of photosensitive units 101 and the pinning area are arranged in the substrate 100 in an array manner, and the pinning areas are correspondingly arranged on the photosensitive units at intervals.
In this embodiment, the substrate 100 is a silicon substrate, and in other embodiments, the material of the substrate 100 may be germanium, silicon carbide, gallium arsenide, or indium gallium arsenide. The substrate 100 may also incorporate different types of impurity ions depending on the type of photosensitive cells of the backside illuminated image sensor.
When the type of the photosensitive unit 101 is N type, the substrate 100 is doped with P type impurity ions, where the P type impurity ions are one or more of boron ions, gallium ions, and indium ions, or when the type of the photosensitive unit 101 is P type, the substrate 100 is doped with N type impurity ions, where the N type impurity ions are phosphorus ions. Deep well doping (Deep Well Implant) is achieved by ion implantation into the substrate 100. As a non-limiting example, the substrate 100 may have a doping concentration of 1E15 atoms/cm 3 To 2.5E15 atoms/cm 3 。
The photosensitive units 101 are arranged in the substrate 100 at a side-by-side interval, and each photosensitive unit 101 senses the incident light and generates a corresponding photo-generated carrier. The structure and manufacturing process of the photosensitive unit 101 may refer to the prior art, and the positions thereof are only schematically indicated in fig. 1.
The photosensitive units 101 are further provided with photodiode isolation structures (not shown) in a surrounding manner to isolate each photosensitive unit 101, so as to avoid signal crosstalk.
The front surface is provided with a plurality of first transistors and a plurality of second transistors.
The first transistor is correspondingly coupled to the photosensitive unit 101 and is disposed on one side (right side as shown in fig. 1) of the pinning region, and includes a first gate structure 121 and a first gate sidewall 122, the first gate 121 is disposed on the front surface, the first gate sidewall 122 covers a sidewall of the first gate structure 121, and the sidewall is aligned to the pinning region on the corresponding side.
The second transistor corresponds to the photosensitive unit and is coupled to the first transistor, and includes a second gate structure 131, a second gate sidewall 132, a second source region 133, and a second drain region (not shown), where the first gate sidewall 132 covers a sidewall of the first gate structure 131, is disposed on the front surface with the second gate structure 131, and is spaced apart from the other side of the pinning region, and the second source region 133 and the second drain region are disposed in the substrate 100, as shown in fig. 1, and the pinning region and the second gate structure 131, the second source region 133, and the second drain region (not shown) are all spaced apart from each other.
The first gate structure 121 and the second gate structure 131 are disposed on the front surface, and include a gate dielectric layer (not shown) and a gate (not shown) disposed on the gate dielectric layer. As will be appreciated by those skilled in the art, the first gate structure 121 and the second gate structure 131 are formed by, for example, sequentially depositing a gate dielectric layer material and a gate material on the front surface of the substrate 100, and then removing portions of the gate material and the gate dielectric layer material by photolithography and etching processes to form the first gate structure 121 and the second gate structure 131. The gate dielectric layer is made of silicon oxide or a composite material layer comprising a silicon oxide layer.
The first gate sidewall 122 and the second gate sidewall 132 may be silicon oxide, or may be a composite structure including silicon oxide. The above process steps are known to those skilled in the art and are not described in detail herein.
The pinning region is disposed within the substrate adjacent the front surface and is doped with boron ions and carbon ions. In this embodiment, the pinning region includes a first region 141, a second region 142 and a third region 143 disposed from top to bottom relative to the front surface, the doping depth of the first region 141 is shallower than the doping depth of the second region 142, the first region is doped with carbon ions, and the second region is doped with boron ions 142. The third region 143 has a doping depth deeper than that of the second region 142 and is doped with carbon ions.
When the back-illuminated image sensor works, the pinning area is connected with negative voltage or grounded, holes are attracted to the front surface corresponding to the second area to form a hole accumulation layer, and the hole accumulation layer is used as a surface charge capturing (trap) layer of the photosensitive unit, so that electrons generated at an interface are rapidly compounded, the electrons cannot block the operation of photoelectrons, and electrons formed at the interface are prevented from entering the photosensitive unit to form dark current signals, so that the dark current of the back-illuminated image sensor is effectively reduced, and the imaging quality is improved.
The first region 141 is formed on the second region 142 with respect to the front surface, and the first region 141 is doped with carbon ions, which interact with boron ions to pin the boron ions, thereby avoiding diffusion of the boron ions. The pinning regions arranged up and down effectively inhibit the diffusion of boron (B) ions, avoid the diffusion of boron ions to the front, and eliminate the adverse effect caused by boron ion offset. In another embodiment, the pinning region only includes a first region 141 and a second region 142 disposed from top to bottom relative to the front surface, and the disposition of the third region 143 depends on the specific device size and is not limited herein.
In this embodiment, the lateral dimensions of the first region 141 and the third region 143 are greater than or equal to the lateral dimension of the second region 142, so that the lateral diffusion of boron ions can be prevented, and the leakage between the second transistor and the photosensitive cell 101 can be avoided.
Fig. 2 shows a cross-sectional view of a backside illuminated image sensor according to a second embodiment of the present invention, which is different from the solution provided in the first embodiment in that the pinning region further includes a plurality of transition regions 145, and each transition region 145 is disposed between the first region and the third region and is doped with carbon ions.
As shown in fig. 2, for example, the transition zone 145 includes 3 transition zones, the specific number is defined by the longitudinal width of the second zone 142, which is not limited herein.
The doping depth of each transition region 145 sequentially increases from the first region 141 to the third region 143, and the lateral dimensions of each transition region are equal to each other and are greater than or equal to the lateral dimensions of the second region.
As shown in fig. 2, the lateral dimensions of the transition regions are equal and greater than the lateral dimensions of the second region, thereby forming a full cladding from the lateral (left as shown) side of the second region, preventing lateral diffusion of boron to better achieve electrical isolation from the second transistor.
In this embodiment, the lateral dimensions of each of the transition region 145, the first region 141, and the third region 143 are equal.
Fig. 3 is a cross-sectional view of a backside illuminated image sensor according to a third embodiment of the present invention, which is different from the solution provided in the first embodiment in that the pinning region further includes a pre-pinning region 144, the pre-pinning region 144 is disposed through the pinning region and extends laterally to the first gate under-side wall 121 on the corresponding side, and the side wall is aligned with the side wall of the first gate on the corresponding side; wherein the pre-pinning region 144 is doped with boron ions and the dopant amount is less than the dopant amount of the boron ions of the pinning region.
As shown in fig. 3, the pre-pinning region 144 has a doping depth equal to the doping depth of the second region 142. In this implementation, the pre-pinning region 144 has a dopant amount that is at least 1 order of magnitude less than the dopant amount of the second region. One side of the pre-pinning region 144 is aligned with the sidewall of the first gate on the corresponding side with respect to the pinning region, and the dopant amount is smaller than that of the boron ions of the pinning region, which is more advantageous to form a gradient-varying boron ion concentration in the lateral direction.
In this embodiment, the dopant amount of boron ions in the pre-pinning region 144 includes 5E11 atoms/cm 2 ~5E12atom/cm 2 The doping amount of boron ions in the pinning region comprises 5E12 atoms/cm 2 ~5E13atom/cm 2 。
The boron ions are obtained through doping of the boron ion source, so that Mo pollution can be effectively avoided, meanwhile, the pinning area is formed through doping of the boron ions and the carbon ions, the carbon ions effectively inhibit the diffusion of the boron ions, the diffusion of the boron ions to the surface (front) of the substrate and even the segregation of the boron ions are avoided, and therefore the WP defect is avoided; in addition, the carbon ions can also effectively inhibit boron ions from diffusing to the periphery, so that isolation between the photosensitive unit and the adjacent transistor is prevented from being poor, and further the risk of FWC leakage is reduced.
Fig. 4 to 7 are process diagrams of a method for forming an image sensor according to a third embodiment of the present invention.
Step S01: a substrate 100 is provided, the substrate 100 having opposite front and back sides.
Step S02: a plurality of photosensitive cells 101 are formed in an array arrangement in a substrate 100.
Step S03: and forming a first patterning layer on the front surface by adopting a first photoetching process.
As shown in fig. 1 and 2, the pinning region of the first embodiment and the second embodiment of the present invention does not include a pre-pinning region, and after the photosensitive unit is formed, a first patterning layer is formed on the front surface by using a first photolithography process.
In this embodiment, the pinning region includes a pre-pinning region, so that the first gate 121 and the second gate 131 are formed before the first patterned layer is formed on the front surface by using a first photolithography process, and then a pre-processed patterned layer 151 is formed by using photolithography and development processes, where the pre-processed patterned layer 151 has a pre-opening 152, and a sidewall on one side (left side shown in fig. 4) of the pre-opening 152 is aligned with a sidewall on one side of the first gate 121 (left side shown in fig. 4); and then, taking the pretreatment patterned layer 151 as a mask, doping boron ions by adopting a pretreatment boron doping process, forming a pre-pinning region 145 in the substrate 100, and removing the pretreatment patterned layer 151.
In this embodiment, after forming the pre-pinning region 145, the first gate sidewall 122 and the second gate sidewall 132 are formed respectively, as shown in fig. 5, and then a first patterning layer 153 is formed on the front surface by using a first photolithography process.
The first patterned layer 153 is formed by photolithography and developing processes, the first patterned layer 153 has a first opening 154, a sidewall on one side (left side shown in fig. 5) of the first opening 154 is aligned with a sidewall on one side (left side shown in fig. 5) of the first gate sidewall 122, and the first opening 154 defines a position and a size of a first region and/or a transition region to be formed later.
The first patterned layer 153 is used as a mask, and a first boron doping process is sequentially used to dope boron ions to form the second region 142, and a carbon doping process is used to dope carbon ions to form the first region 141, so as to form a pinning region in the substrate.
The first patterned layer 153 is used as a mask, and boron ions are doped into the second region 142 by a first boron doping process, wherein the doping amount of the first boron doping process can be 5E12 atoms/cm 2 ~5E13atom/cm 2 The second region 142 corresponds to the photosensitive unit 101 and has good conductivity, and the doping depth of the boron ions of the second region 142 is equal to the doping depth of the boron ions of the pre-pinning region 154, that is, the second region 142 is distant from the first gate 121 with respect to the pre-pinning region 154, and since the doping dose of the boron ions of the second region 142 is greater than the doping dose of the boron ions of the pre-pinning region 154, a gradient change in the doping dose of the boron ions is formed in the lateral direction.
In one embodiment, after the second region 142 is formed, the first patterned layer is used as a mask, and carbon ions are doped into the first region 141 by using a carbon doping process, wherein the doping depth of the first region 141 is shallower than that of the second region, so as to form the first region 141 and the second region 142 disposed from top to bottom relative to the front surface. The first region 141 is doped with carbon ions, the doping amount of which includes 1E12 atoms/cm 2 ~1E14atom/cm 2 。
Since the first patterned layer is used as a mask, i.e. the corresponding first opening size is unchanged, the lateral dimension of the first region 141 is equal to the lateral dimension of the second region 142,
as shown in fig. 6, in this embodiment, after the second region 142 is formed, the first patterned layer 153 is processed by an ashing process (Descum), where the ashing process includes a dry etching process, and the opening of the first patterned layer formed by exposure may be enlarged by the Descum process, and the first opening 154 is formed into a second opening 154 'by the Descum process, and a lateral dimension of the second opening 154' is greater than a lateral dimension of the first opening 154.
Descum processing is typically a process in semiconductor lithography that cleans the photoresist after exposure and development, typically to obtain vertical photoresist profiles and clean surfaces. The Descum treatment can remove a part of photoresist uniformly in a smaller range, and increase the area of a developing part. The invention reshapes the size of the photoresist by using Descum treatment, can enlarge the implantation area of the carbon doping process, and improves the alignment precision between the regions of the pinning region.
The carbon doping process includes a first carbon implantation process for forming a first region 141; a third carbon implantation process may also be included to form third region 143. The third region 143 is formed under the second region 142 and doped with carbon ions, and the third region 143 is disposed on the photosensitive unit 101 at intervals and is used for spacing the second region 142 and the photosensitive unit 101. As previously described, the lateral dimensions of both the first region 141 and the third region 143 may be greater than the lateral dimensions of the second region 142. It will be appreciated by those skilled in the art that the lateral dimensions of the first region 141 and the third region 143 may also be equal to the lateral dimensions of the second region 142.
In the second embodiment, the carbon doping process further includes a plurality of interval carbon implantation processes, and before the third region 143 is formed, the plurality of interval carbon implantation processes form a plurality of corresponding transition regions, wherein the doping depth of the interval carbon implantation process is greater than that of the first region 141 and less than that of the third region 143, and the doping depth of the first region 141 increases sequentially toward the third region 143, so that the second region 142 may be partially or completely covered by each transition region 145. The lateral dimensions of each of the transition regions 145 may be equal to or greater than or equal to the lateral dimensions of the second region 142, as previously described in relation to 2. The lateral dimensions of each of the transition regions 145, the first region 141, and the third region 143 may be equal to or different from one another. Preferably, each of the transition region, the first region and the third region uses the first patterned layer 153 as a mask, and the lateral dimensions of each of the transition region 145, the first region 141 and the third region 143 are equal and larger than the lateral dimensions of the second region 142. The doping amount of the carbon ions comprises 1E12 atoms/cm 2 ~1E14atom/cm 2 And the doping depth of the carbon ions is gradually increased from the first region 141 to the third region 143.
In the third embodiment, the sidewall of the first opening 154 is aligned with the sidewall of the gate sidewall 122 on the corresponding side, and the sidewall of the second opening 154' on the corresponding side (right side in fig. 6) is aligned with the sidewall of the first opening 154 on the corresponding side (right side in fig. 5) and the sidewall of the gate sidewall 122 on the corresponding side (right side in fig. 6) due to the blocking of the gate sidewall 122, so that the sidewalls of the first region 141, the second region 142 and the transition region 145 on the corresponding side are aligned with the sidewall of the gate sidewall 122 on the corresponding side (right side in fig. 6), that is, the sidewall of the first gate sidewall is aligned with the pinning region on the corresponding side (right side in fig. 6); the side walls of the other side of the second opening (left side shown in fig. 6) are flared with respect to the side walls of the other side of the first opening (left side shown in fig. 5), the side walls of the first region and the third region (left side shown in fig. 6) of the corresponding sides are flared with respect to the side walls of the second region (left side shown in fig. 6) of the corresponding sides, and the lateral dimensions of the first region 141 and the third region 143 are larger than the lateral dimensions of the second region, so as to cover the side walls of the second region 142 (left side shown in fig. 6) of the corresponding sides, thereby avoiding the lateral diffusion of boron ions. In addition, as the side wall of the second region at the other side is not coated, boron ions diffuse to the grid side wall and the grid structure, and the concentration of the boron ions gradually decreases from the pinning region to the grid structure, electrons on the front side are prevented from entering the photodiode to form dark current signals, and the situation that a substrate between the pinning region and a channel region below the grid structure is pinched off and photoelectrons cannot be transmitted is avoided.
In one embodiment, the Descum process is not used, and the first region 141 and the third region 143 are formed with the first patterned layer 153 as a mask, and have a lateral dimension equal to that of the second region 142. In this embodiment, the lateral dimensions of the first region 141 and the third region 143 are larger than the lateral dimensions of the second region 142.
The first region 141 is located on the second region 142 and may cover an upper surface of the second region 142. In another embodiment, the first region 141 may also extend into the second region 142, thereby forming a boron carbon fusion region. Similarly, the third region 143 may cover the lower surface of the second region 142, or the third region 143 may extend into the second region 142 to form a boron carbon fusion region.
Step S05: and removing the first patterning layer.
The invention adopts the carbon doping process to dope carbon ions, does not need to increase an extra photomask or increase thermal budget (thermal budget) to eliminate the damage of a pinning layer to a substrate, and further improves the performance of the CIS pixel unit on the basis of reasonably controlling the cost.
It will be evident to those skilled in the art that the invention is not limited to the details of the foregoing illustrative embodiments, and that the present invention may be embodied in other specific forms without departing from the spirit or essential characteristics thereof. Thus, the embodiments should be considered in all respects as illustrative and not restrictive. Furthermore, it is evident that the word "comprising" does not exclude other elements or steps, and that the word "a" or "an" does not exclude a plurality. The elements recited in the apparatus claims may also be embodied by one element. The terms first, second, etc. are used to denote a name, but not any particular order.

Claims (19)

1. A backside illuminated image sensor, comprising:
a substrate having opposite front and back surfaces;
the photosensitive units and the pinning areas are arranged in the substrate in an array manner; wherein, the liquid crystal display device comprises a liquid crystal display device,
the pinning area is adjacent to the front face, is arranged on the photosensitive unit at intervals, and is doped with boron ions and carbon ions.
2. The backside illuminated image sensor of claim 1 wherein the pinning region comprises a first region and a second region disposed from top to bottom relative to the front side, the first region having a doping depth shallower than a doping depth of the second region, the first region being doped with carbon ions, the second region being doped with boron ions.
3. The backside illuminated image sensor of claim 2, wherein the pinning region further comprises a third region that is doped deeper than the second region and is doped with carbon ions.
4. The backside illuminated image sensor of claim 3, wherein the first region and the third region are equal in lateral dimension and are each greater than or equal to the lateral dimension of the second region.
5. The backside illuminated image sensor of claim 4, wherein the pinning region further comprises a plurality of transition regions, each of the transition regions being disposed between the first region and the third region and being doped with carbon ions.
6. The backside illuminated image sensor of claim 5, wherein a doping depth of each of the transition regions sequentially increases from the first region toward the third region.
7. The backside illuminated image sensor of claim 5, wherein a lateral dimension between each of the transition regions is equal and is equal to a lateral dimension of the first region.
8. The back-illuminated image sensor of claim 2, further comprising: the first transistors are correspondingly coupled with the photosensitive units and are provided with first grid structures, one sides of the first grid structures corresponding to the pinning areas are arranged on the front face and comprise first grids and first grid side walls, the first grid side walls cover the side walls of the first grids, and the side walls are aligned with the pinning areas on the corresponding sides.
9. The back-illuminated image sensor of claim 8, further comprising: the pre-pinning region penetrates through the pinning region and transversely extends to the position below the first grid side wall at the corresponding side, and the side wall is aligned to the side wall of the first grid at the corresponding side; wherein the pre-pinning region is doped with boron ions and the dopant amount is less than the dopant amount of the boron ions of the pinning region.
10. The backside illuminated image sensor of claim 9, wherein a doping depth of the pre-pinned region is equal to a doping depth of the second region.
11. The backside illuminated image sensor of claim 10, wherein a dopant amount of the pre-pinned region is at least 1 order of magnitude less than a dopant amount of the second region.
12. The backside illuminated image sensor of claim 9, wherein the boron ions are obtained via boron ion source doping.
13. The back-illuminated image sensor of claim 8, further comprising: the second transistors are correspondingly coupled with the first transistors and are provided with second grid structures, second source regions and second drain regions, the other side of one side of each second grid structure, which is separated by the corresponding pinning region, is arranged on the front surface, and the second source regions and the second drain regions are arranged in the substrate; wherein, the liquid crystal display device comprises a liquid crystal display device,
the pinning region, the second gate structure, the second source region and the second drain region are all arranged at intervals.
14. A method for forming a backside illuminated image sensor, comprising:
providing a substrate, wherein the substrate is provided with a front surface and a back surface which are opposite;
a plurality of photosensitive units which are arranged in an array form in the substrate;
forming a first patterning layer on the front surface by adopting a first photoetching process, wherein the first patterning layer is provided with a first opening, and the bottom of the first opening exposes part of the substrate;
sequentially doping boron ions and carbon ions to the bottom of the first opening by adopting a first boron doping process and a carbon doping process by taking the first patterned layer as a mask, and forming a pinning region in the substrate;
and removing the first patterning layer.
15. The method of claim 14, wherein the carbon doping process comprises a first carbon implantation process, wherein using the first patterned layer as a mask, sequentially doping boron ions into the first patterned layer and carbon ions into the bottom of the first opening using the first boron doping process, and wherein forming a pinning region in the substrate comprises: using the first patterned layer as a mask, and doping boron ions by adopting a first boron doping process to form a second region; processing the first opening by adopting an ashing process to form a second opening; and forming a first region by using the first patterned layer as a mask and adopting the first carbon implantation process.
16. The method of forming a backside illuminated image sensor of claim 15, wherein a lateral dimension of the second opening is greater than a lateral dimension of the first opening.
17. The method of claim 16, wherein the carbon doping process further comprises a third carbon implantation process and/or a plurality of inter-zone carbon implantation processes, and wherein after forming the first region by using the first carbon implantation process with the first patterned layer as a mask, further comprises: and forming a third region by using the first patterned layer as a mask and adopting the third carbon implantation process, and/or forming a plurality of corresponding transition regions by using the plurality of interval carbon implantation processes by using the first patterned layer as a mask.
18. The method of claim 17, wherein the dopant amount of carbon ions comprises 1E12 atoms/cm 2 ~1E14atom/cm 2 And the doping depth of the carbon ions gradually increases from the first region to the third region.
19. The method of forming a backside illuminated image sensor according to claim 18, wherein the ashing process comprises a dry etching process.
CN202111354150.9A 2021-11-16 2021-11-16 Backside illuminated image sensor and manufacturing method thereof Pending CN116137271A (en)

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