CN116132827A - Pixel circuit, CMOS image sensor and method for improving dynamic range of CMOS image sensor - Google Patents
Pixel circuit, CMOS image sensor and method for improving dynamic range of CMOS image sensor Download PDFInfo
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Abstract
The invention provides a pixel circuit, a CMOS image sensor and a method for improving dynamic range thereof, wherein the pixel circuit comprises: the photoelectric conversion device comprises a photoelectric conversion element, a transmission transistor, a storage capacitor and an exposure control module; the output end of the photoelectric conversion element is connected with the first connecting end of the transmission transistor, and the other end of the photoelectric conversion element is connected with a first reference potential; the second connecting end of the transmission transistor is connected with the first end of the storage capacitor, and the gate electrode is connected with an exposure control signal; the second end of the storage capacitor is connected with a second reference potential; the exposure control module is used for generating the exposure control signal according to the predicted illumination level and controlling the actual exposure time of the photoelectric conversion element by controlling the on and off of the transmission transistor. The pixel circuit, the CMOS image sensor and the method for improving the dynamic range thereof solve the problem of low dynamic range of the traditional CMOS image sensor.
Description
Technical Field
The present invention relates to the field of CMOS image sensors, and more particularly, to a pixel circuit, a CMOS image sensor, and a method for improving dynamic range thereof.
Background
The dynamic range (dynamic range) is one of the most important parameters of the CMOS image sensor, and determines the range of light intensity distribution from the darkest shadow portion to the brightest highlight portion that the CMOS image sensor can accept, that is, the details, levels, and features of the captured image.
The CMOS image sensor is limited by the full well capacity, the exposure time and the noise, and the dynamic range thereof is generally 60dB-70dB, but the dynamic range of the human eye is more than 100dB, so that it is difficult to accurately restore the scene observed by the human eye from what is photographed by the CMOS image sensor.
In view of this, how to achieve a high dynamic range of a CMOS image sensor is a technical problem that those skilled in the art are urgent to solve.
Disclosure of Invention
In view of the above-mentioned drawbacks of the prior art, an object of the present invention is to provide a pixel circuit, a CMOS image sensor and a method for improving dynamic range thereof, which are used for solving the problem of low dynamic range of the existing CMOS image sensor.
To achieve the above and other related objects, the present invention provides a pixel circuit including: photoelectric conversion element, transmission transistor, storage capacitor and exposure control module, wherein,
the output end of the photoelectric conversion element is connected with the first connection end of the transmission transistor, and the other end of the photoelectric conversion element is connected with a first reference potential; the second connecting end of the transmission transistor is connected with the first end of the storage capacitor, and the gate electrode is connected with an exposure control signal; the second end of the storage capacitor is connected with a second reference potential;
the exposure control module is used for generating the exposure control signal according to the predicted illumination level and controlling the actual exposure time of the photoelectric conversion element by controlling the on and off of the transmission transistor.
Optionally, the exposure control module includes: and the gate end of the control transistor is connected with a gate control signal, the first connecting end is connected with an original exposure signal related to the predicted illumination level, and the second connecting end generates the exposure control signal.
Optionally, the exposure control module further includes: the gate end of the selection transistor is connected with a row selection signal, the first connection end is connected with a column selection signal, and the second connection end is connected with the gate end of the auxiliary control transistor; the first connecting end of the auxiliary control transistor is connected with an auxiliary control signal, and the second connecting end of the auxiliary control transistor is connected with the gate end of the control transistor.
Optionally, the exposure control module further includes: the first end of the first auxiliary control capacitor is connected with the second connecting end of the selection transistor, and the second end of the first auxiliary control capacitor is connected with a third reference potential; the first end of the second auxiliary control capacitor is connected with the second connecting end of the auxiliary control transistor, and the second end of the second auxiliary control capacitor is connected with the fourth reference potential.
Optionally, the exposure control module includes: a first control transistor and a second control transistor,
the gate end of the first control transistor is connected with a first gate control signal, the first connecting end is connected with an original short exposure signal related to predictive high illumination, and the second connecting end generates the exposure control signal;
and the gate end of the second control transistor is connected with a second gate control signal, the first connecting end is connected with an original long exposure signal related to the low light prediction, and the second connecting end generates the exposure control signal.
Optionally, the exposure control module further includes: a first select transistor and a second select transistor,
the gate end of the first selection transistor is connected with a row selection signal, the first connection end is connected with a first column selection signal, and the second connection end is connected with the gate end of the first control transistor;
the gate end of the second selection transistor is connected with the row selection signal, the first connection end is connected with the second column selection signal, and the second connection end is connected with the gate end of the second control transistor.
Optionally, the exposure control module further includes: a first energy storage capacitor and a second energy storage capacitor,
the first end of the first energy storage capacitor is connected with the second connecting end of the first selection transistor, and the second end of the first energy storage capacitor is connected with a fifth reference potential;
the first end of the second energy storage capacitor is connected with the second connection end of the second selection transistor, and the second end of the second energy storage capacitor is connected with a sixth reference potential.
Optionally, the pixel circuit further includes: and the pixel reading module is connected with the first end of the storage capacitor and used for reading out the charges stored in the storage capacitor and generating pixel signals.
Optionally, the pixel readout module includes: a reset transistor, a first source follower transistor, a first storage transistor, a pixel capacitance, a second storage transistor, a reset capacitance, and a second source follower transistor,
the gate end of the reset transistor is connected with a reset control signal, the first connecting end is connected with a first working voltage, and the second connecting end is connected with the first end of the storage capacitor;
the gate end of the first source following transistor is connected with the first end of the storage capacitor, the first connecting end is connected with variable voltage, and the second connecting end is connected with the first connecting end of the first storage transistor;
the gate end of the first storage transistor is connected with a first storage control signal, the second connection end of the first storage transistor is connected with the first connection end of the second storage transistor, and the second connection end of the first storage transistor is connected with a seventh reference potential through the pixel capacitor;
the gate end of the second storage transistor is connected with a second storage control signal, and the second connection end is connected with the gate end of the second source follower transistor and is connected with an eighth reference potential through the reset capacitor;
the first connecting end of the second source following transistor is connected with a second working voltage, the second connecting end is connected with the first connecting end of the row selecting transistor, the gate end of the row selecting transistor is connected with a row selecting control signal, and the second connecting end generates the pixel signal; alternatively, the second connection terminal of the second source follower transistor generates the pixel signal.
The present invention also provides a CMOS image sensor including: at least one pixel circuit as claimed in any one of the preceding claims.
Optionally, the CMOS image sensor includes stacking a first substrate and a second substrate, the pass transistor and the exposure control module being prepared in the same substrate.
Optionally, the photoelectric conversion element is prepared in the first substrate; the transfer transistor, the storage capacitor, the exposure control module, the readout circuit, and the logic circuit are prepared in the second substrate; alternatively, the photoelectric conversion element, the transfer transistor, the storage capacitor, the exposure control module, the readout circuit are prepared in the first substrate, and the logic circuit is prepared in the second substrate; alternatively, the photoelectric conversion element is prepared in the first substrate, the transfer transistor, the storage capacitor, the exposure control module, and the readout circuit are prepared in the second substrate, the CMOS image sensor includes a third substrate, and the logic circuit is prepared in the third substrate.
The invention also provides a method for improving the dynamic range of a CMOS image sensor based on the pixel circuit, which comprises the following steps:
predicting the illumination level corresponding to the pixel signal of the next frame based on the illumination level corresponding to the historical pixel signal;
if the illumination corresponding to the pixel signal of the next frame is predicted to be the first illumination, the photoelectric conversion element performs photoelectric conversion within a short exposure time to generate exposure charges;
if the illumination corresponding to the pixel signal of the next frame is predicted to be the second illumination, the photoelectric conversion element performs photoelectric conversion in a long exposure time to generate exposure charges;
wherein the first illumination is higher than a preset illumination threshold and the second illumination is lower than the preset illumination threshold.
Optionally, the method for implementing photoelectric conversion of the photoelectric conversion element in different exposure time to generate exposure charge includes: and controlling the actual reset time of the transmission transistor before the next exposure is started according to the predicted illumination level, and controlling the actual exposure time of the photoelectric conversion element according to the actual reset time, so that the photoelectric conversion of the photoelectric conversion element in different exposure times is realized.
As described above, according to the pixel circuit, the CMOS image sensor and the method for improving dynamic range thereof of the present invention, the CMOS image sensor performs short exposure at high illumination and long exposure at low illumination by designing the exposure control module, so as to adjust the actual exposure time of the photoelectric conversion element according to the illumination level, thereby realizing high dynamic range.
Drawings
Fig. 1 shows a circuit implementation of the pixel circuit of the invention.
Fig. 2 is a timing diagram of related signals of the pixel circuit shown in fig. 1 in a short exposure.
Fig. 3 is a timing chart showing signals related to the pixel circuit shown in fig. 1 in a long exposure.
Fig. 4 shows another circuit implementation of the pixel circuit of the invention.
Fig. 5 is a timing diagram showing signals associated with the pixel circuit of fig. 4 in a short exposure.
Fig. 6 is a timing chart showing signals related to the pixel circuit shown in fig. 4 in a long exposure.
Description of element reference numerals
100. Transmission transistor
200. Exposure control module
201. Control transistor
202. Selection transistor
203. Auxiliary control transistor
201a first control transistor
201b second control transistor
202a first select transistor
202b second select transistor
300. Pixel readout module
301. Reset transistor
302. First source follower transistor
303. First memory transistor
304. Second memory transistor
305. Second source follower transistor
306. Row selection transistor
Detailed Description
Other advantages and effects of the present invention will become apparent to those skilled in the art from the following disclosure, which describes the embodiments of the present invention with reference to specific examples. The invention may be practiced or carried out in other embodiments that depart from the specific details, and the details of the present description may be modified or varied from the spirit and scope of the present invention.
Please refer to fig. 1 to 6. It should be noted that, the illustrations provided in the present embodiment are merely schematic illustrations of the basic concepts of the present invention, and only the components related to the present invention are shown in the illustrations, rather than being drawn according to the number, shape and size of the components in actual implementation, and the form, number and proportion of each component in actual implementation may be arbitrarily changed, and the layout of the components may be more complex.
As shown in fig. 1 and 4, the present embodiment provides a pixel circuit including: a photoelectric conversion element, a transfer transistor 100, a storage capacitor Cfd, and an exposure control module 200.
The output end of the photoelectric conversion element is connected to the first connection end of the transmission transistor 100, and the other end of the photoelectric conversion element is connected to a first reference potential for generating exposure charges according to the photoelectric effect. As an example, the photoelectric conversion element is a photodiode PD, where the anode of the photodiode PD is connected to the first reference potential and the cathode is connected to the first connection terminal of the pass transistor 100. Optionally, the first reference potential is ground potential.
The first connection terminal of the transfer transistor 100 is connected to the output terminal of the photoelectric conversion element, the second connection terminal is connected to the first terminal of the storage capacitor Cfd, and the gate terminal is connected to the exposure control signal tx, so as to transfer and output the exposure charge generated by the photoelectric conversion element according to the exposure control signal tx.
The first end of the storage capacitor Cfd is connected to the second connection end of the transmission transistor 100, and the second end is connected to the second reference potential, so as to store the exposure charge transferred and output by the transmission transistor 100. Optionally, the second reference potential is ground potential. In practical applications, the storage capacitor Cfd may be a parasitic capacitor of the second connection end of the pass transistor 100 to ground, or may be an external capacitor device, which has no influence on the embodiment.
The exposure control module 200 is configured to generate the exposure control signal tx according to the predicted illumination level, and control the actual exposure time of the photoelectric conversion element by controlling the on and off of the pass transistor 100.
As an example, as shown in fig. 4, the exposure control module 200 includes: a first control transistor 201a and a second control transistor 201b; wherein, the gate terminal of the first control transistor 201a is connected to a first gate control signal, the first connection terminal is connected to an original short exposure signal txs related to predictive high illumination, and the second connection terminal is connected to the gate terminal of the pass transistor 100 and generates the exposure control signal tx; the gate terminal of the second control transistor 201b is connected to a second gate control signal, the first connection terminal is connected to the original long exposure signal txl related to the predicted low light, and the second connection terminal is connected to the gate terminal of the pass transistor 100 and generates the exposure control signal tx.
The first control transistor 201a is controlled by the first gate control signal, and when the first control transistor 201a is turned on, an original short exposure signal txs related to predictive high illumination is applied to the gate terminal of the transmission transistor 100; the second control transistor 201b is controlled by the second gate control signal, and when the second control transistor 201b is turned on, an original long exposure signal txl associated with predicting low light is applied to the gate terminal of the pass transistor 100.
Further, the exposure control module 200 further includes: a first selection transistor 202a and a second selection transistor 202b; wherein, the gate terminal of the first selection transistor 202a is connected to the row selection signal row0, the first connection terminal is connected to the first column selection signal col0, and the second connection terminal is connected to the gate terminal of the first control transistor 201 a; the gate terminal of the second selection transistor 202b is connected to the row selection signal row0, the first connection terminal is connected to the second column selection signal col0_b, and the second connection terminal is connected to the gate terminal of the second control transistor 201 b. It should be noted that, when the exposure control module 200 further includes the first selection transistor 202a and the second selection transistor 202b, the gate terminal of the first control transistor 201a is not connected to the first gate control signal, but is only connected to the second connection terminal of the first selection transistor 201b, and the gate terminal of the second control transistor 201b is not connected to the second gate control signal, but is only connected to the second connection terminal of the second selection transistor 202 b.
The first selection transistor 202a is controlled by the row selection signal row0, and when the first selection transistor 202a is turned on, the first column signal col0 is applied to the gate terminal of the first control transistor 201a to control the on or off of the first control transistor 201 a; the second selection transistor 202b is controlled by the row selection signal row0, and when the second selection transistor 202b is turned on, the second column signal col0_b is applied to the gate terminal of the second control transistor 201b to control the second control transistor 201b to be turned on or off; wherein the first column signal col0 and the second column signal col0_b are not at high level at the same time. In practical applications, the timing design of the row selection signal row0, the first column selection signal col0, and the second column signal col0_b (as shown in fig. 5 and 6) can be implemented:
when the illumination corresponding to the pixel signal of the next frame is predicted to be high illumination, the first control transistor 201a is controlled to be turned on, and the original short exposure signal txs is applied to the gate end of the transmission transistor 100, so that the photoelectric conversion element is controlled to perform short exposure; when the light corresponding to the pixel signal of the next frame is predicted to be low light, the second control transistor 201b is controlled to be turned on, and the original long exposure signal txl is applied to the gate terminal of the transfer transistor 100, so as to control the photoelectric conversion element to perform long exposure.
In this example, by the design of the first selection transistor 202a and the second selection transistor 202b, the first control transistor 201a and the second control transistor 201b can be controlled by the existing row selection signal row0, column selection signal col0 and relevant signals col0_b thereof, without requiring new control signals.
Still further, the exposure control module 200 further includes: the first energy storage capacitor C1 and the second energy storage capacitor C2; wherein, a first end of the first energy storage capacitor C1 is connected to a second connection end of the first selection transistor 202a, and a second end is a fifth reference potential; the first end of the second energy storage capacitor C2 is connected to the second connection end of the second selection transistor 202b, and the second end is connected to the sixth reference potential. In this example, by the design of the first energy storage capacitor C1 and the second energy storage capacitor C2, stable control of the two selection transistors on the two control transistors is facilitated, and storage of signals based on storage is facilitated. Optionally, the fifth reference potential and the sixth reference potential are both ground potentials.
Specifically, as shown in fig. 3 and 4, the pixel circuit further includes: the pixel readout module 300 is connected to the first end of the storage capacitor Cfd, and is used for reading out the exposure charge stored in the storage capacitor Cfd and generating a pixel signal.
As an example, the pixel readout module 102 includes: a reset transistor 301, a first source follower transistor 302, a first storage transistor 302, a pixel capacitor Csig, a second storage transistor 304, a reset capacitor Crst and a second source follower transistor 305, wherein a gate terminal of the reset transistor 301 is connected to a reset control signal rst, a first connection terminal is connected to a first working voltage, and a second connection terminal is connected to a first terminal of the storage capacitor Cfd; the gate terminal of the first source follower transistor 302 is connected to the first terminal of the storage capacitor Cfd, the first connection terminal is connected to the variable voltage VRSF, and the second connection terminal is connected to the first connection terminal of the first storage transistor 303; the gate terminal of the first storage transistor 303 is connected to the first storage control signal gs_sig, the second connection terminal is connected to the first connection terminal of the second storage transistor 304, and is connected to the seventh reference potential through the pixel capacitor Csig; the gate terminal of the second storage transistor 304 is connected to a second storage control signal gs_rst, and the second connection terminal is connected to the gate terminal of the second source follower transistor 305 and is connected to an eighth reference potential through the reset capacitor Crst; the first connection terminal of the second source follower transistor 305 is connected to a second working voltage, the second connection terminal is connected to the first connection terminal of the row selection transistor 306, the gate terminal of the row selection transistor 306 is connected to a row selection control signal gs_sel, and the second connection terminal generates the pixel signal pixout; alternatively, the second connection terminal of the second source follower transistor 305 generates the pixel signal pixout. Wherein the first operating voltage and the second operating voltage may be the same or different, in one embodiment, when the pixel readout module 300 generates the pixel signal pixout through the second source follower transistor 305, the first operating voltage and the second operating voltage are different, and the first operating voltage is a variable voltage; when the pixel readout module 300 generates the pixel pixout through the row selection transistor 306, the first operating voltage and the second operating voltage are the same, and are both the operating voltages PIXVDD of the pixel circuit. Optionally, the seventh reference potential and the eighth reference potential are both ground potentials.
Next, referring to fig. 4, referring to fig. 5 and 6, the exposure control of the pixel circuit according to the present embodiment will be described; in this case, the pixel <0,0> is taken as an example.
1. The reset transistor 301 and the transfer transistor 100 are turned on to clear the charge in the photodiode PD and perform global reset (pre-chg);
2. the transfer transistor 100 is turned off, and global exposure (global exposure) is performed;
3. the reset transistor 301 is turned on, the variable voltage VRSF is low, the first storage transistor 303 and the second storage transistor 304 are turned on, the pixel capacitor Csig and the reset capacitor Crst are pulled to low level, and the reset signal precharge (pre-chg rst) is performed;
4. the reset transistor 301 is turned off, the first source follower transistor 302 is turned on, the variable voltage VRSF is at a high level, the first storage transistor 303 and the second storage transistor 304 are turned on, the pixel capacitor Csig and the reset capacitor Crst store 1/2Vrst, respectively, and a reset signal is sampled (global sample rst);
5. the first source follower transistor 302 is turned on, the variable voltage VRSF is at a low level, the first storage transistor 303 is turned on, the pixel capacitance Csig is pulled to a low level, and the image signal precharge (pre-chg sig) is performed;
6. the transfer transistor 100 is turned on, and the photodiode PD transfers the exposure charge to the storage capacitor Cfd, ending the exposure; the transfer transistor 100 is turned off, the first storage transistor 303 is turned on, the exposure charge in the storage capacitor Cfd is transferred to the pixel capacitor Csig, vsig is stored in the pixel capacitor Csig, and the image signal is sampled (golbal sample sig);
7. the row select transistor 306 is turned on, reading 1/2Vrst; the second memory transistor 304 is turned on, and 1/2vsig+1/4Vrst is read out, and pixel signal reading (read/quantization) is performed.
8. After the pixel signals are read out, predicting the illumination level corresponding to the pixel signals <0,0> of the next frame according to the historical pixel signals, so as to obtain a corresponding row selection signal row0, a first column selection signal col0 and a second column selection signal col0_b; the method comprises the following steps:
if the illumination corresponding to the pixel signal <0,0> of the next frame is predicted to be high illumination, the row selection signal row0 is high level, the first column selection signal col0 is high level, and the second column selection signal col0_b is low level; at this time, the first control transistor 201a is turned on, and uses the original short exposure signal txs that is connected to the first connection terminal thereof as an exposure control signal tx to control the transfer transistor 100 to be turned on once in a start period and an end period of a global reset period (pre-chg), so that an actual exposure time of the photodiode PD starts from a last turn-off of the transfer transistor 100, thereby implementing photoelectric conversion of the photodiode PD in a short exposure time to generate exposure charges (as shown in fig. 5);
if the illumination corresponding to the pixel signal <0,0> of the next frame is predicted to be low illumination, the row selection signal row0 is high level, the first column selection signal col0 is low level, and the second column selection signal col0_b is high level; at this time, the second control transistor 201b is turned on, and uses the original long exposure signal txl, which is connected to the first connection terminal thereof, as the exposure control signal tx to control the transfer transistor 100 to be turned on once in the start period of the global reset phase (pre-chg), so that the actual exposure time of the photodiode PD starts from this turn-off of the transfer transistor 100, thereby implementing the photoelectric conversion of the photodiode PD for a long exposure time to generate the exposure charge (as shown in fig. 6).
As another example, as shown in fig. 1, the exposure control module 200 includes: and a control transistor 201, wherein a gate terminal of the control transistor 201 is connected to a gate control signal, a first connection terminal is connected to an original exposure signal txl/txs related to the predicted illumination level, and a second connection terminal generates the exposure control signal tx. The control transistor 201 is controlled by the gate control signal, and when the control transistor 201 is turned on, an original exposure signal txl/txs related to the predicted illumination level is applied to the gate terminal of the transfer transistor 100 as the exposure control signal tx, and the actual exposure time of the photoelectric conversion element is controlled by controlling the on and off of the transfer transistor 100.
Further, the exposure control module 200 further includes: a selection transistor 202 and an auxiliary control transistor 203, wherein a gate terminal of the selection transistor 202 is connected to a row selection signal row0, a first connection terminal is connected to a column selection signal col0, and a second connection terminal is connected to a gate terminal of the auxiliary control transistor 203; the first connection terminal of the auxiliary control transistor 203 is connected to the auxiliary control signal ctrl, and the second connection terminal is connected to the gate terminal of the control transistor 201. It should be noted that, when the exposure control module 200 further includes the selection transistor 202 and the auxiliary control transistor 203, the gate terminal of the control transistor 201 is not connected to the gate control signal any more, but is connected to the second connection terminal of the auxiliary control transistor 203.
In one embodiment, the first connection of the control transistor 201 is connected to an original short exposure signal txs (see fig. 2 and 3) related to the predicted illumination, wherein the txs signal and crtl signal are signals generated by digital circuits, and the actual long/short exposure is controlled by row0 and col0 signals.
The selection transistor 202 is controlled by the row selection signal row0, and applies the column selection signal col0 to the gate terminal of the auxiliary control transistor 203 when the selection transistor 202 is turned on; the auxiliary control transistor 203 is controlled by the column selection signal col0, and when the auxiliary control transistor 203 is turned on, the auxiliary control signal ctrl is applied to the gate terminal of the control transistor 201 to control the on or off of the control transistor 201. In an actual application, the timing design of the row selection signal row0, the column selection signal col0, the auxiliary control signal ctrl, and the original short exposure signal txs (as shown in fig. 2 and 3) can be implemented:
if the light corresponding to the pixel signal of the next frame is predicted to be high, the row selection signal row0 is high, the column selection signal col0 is first high and then low, the auxiliary control transistor 203 is turned on and then off, the gate terminal potential of the control transistor 201 is always high, and the exposure control signal tx is controlled by the original short exposure signal txs, so that the transmission transistor 100 controls the photoelectric conversion element to perform short exposure;
if the light corresponding to the pixel signal of the next frame is predicted to be low, the row selection signal row0 and the column selection signal col0 are both high, the auxiliary control transistor 203 is always in the on state, and the exposure control signal tx is generated by being controlled by the auxiliary control signal ctrl and the original short exposure signal txs together, so that the transmission transistor 100 controls the photoelectric conversion element to perform long exposure.
Still further, the exposure control module 200 further includes: a first auxiliary control capacitor C1 and a second auxiliary control capacitor C2, where a first end of the first auxiliary control capacitor C1 is connected to a second connection end of the selection transistor 202, and a second end of the first auxiliary control capacitor C1 is connected to a third reference potential; the first end of the second auxiliary control capacitor C2 is connected to the second connection end of the auxiliary control crystal 203, and the second end is connected to the fourth reference potential. In this example, by designing the first auxiliary control capacitor C1 and the second auxiliary control capacitor C2, stable control of the control transistor 201 is facilitated, and storage of signals based on storage is facilitated. Optionally, the third reference potential and the fourth reference potential are both ground potentials.
In an actual application, the predicted illumination level may be implemented by an image processing module (e.g., ISP) at the back end, and may generate an image according to a pixel signal output by a pixel circuit, and further be used to predict the illumination level corresponding to a pixel signal of a next frame according to a history pixel signal output by the pixel circuit, and generate an original exposure signal txl/txs related to the predicted illumination level (e.g., may be understood as a long-short exposure control signal based on a row selection signal row0, a column selection signal col0, an auxiliary control signal ctrl, and an original short-exposure signal txs; if the illumination corresponding to the historical pixel signal of the previous frame or the previous frames is high illumination, the illumination corresponding to the pixel signal of the next frame is predicted to be high illumination, and an original short exposure signal is formed at the moment, otherwise, when the illumination corresponding to the historical pixel signal of the previous frame or the previous frames is low illumination, the illumination corresponding to the pixel signal of the next frame is predicted to be low illumination, and an original long exposure signal is formed at the moment. In one embodiment, the image processing module may include a processing circuit, where the pixel signal of the previous frame or frames is compared with a set threshold, for example, by a comparator, and whether to perform long exposure control or short exposure control is obtained based on the comparison result.
Accordingly, the present embodiment also provides a CMOS image sensor, including: at least one pixel circuit as described above.
Specifically, the CMOS image sensor includes a plurality of pixels, the pixels are arranged in rows and columns to form a pixel array, and the pixels correspond to the pixel circuits. In practical application, the pixels are in one-to-one correspondence with the pixel circuits, namely each pixel is formed by the pixel circuits; of course, a plurality of pixels may also share the same pixel readout module, which has no effect on the present embodiment.
Specifically, the CMOS image sensor further includes an image processing circuit (e.g., ISP) connected to the output end of the pixel circuit, for generating an image according to the pixel signal; of course, the image processing circuit is further configured to predict the illumination level corresponding to the pixel signal of the next frame according to the illumination level corresponding to the historical pixel signal, and generate the relevant signals, such as row0, col0, ctrl, txs, or row0, col0, col0_b, which may be further written into the corresponding transistors through the peripheral logic control circuit. In addition, other control signals (such as a reset control signal rst, a first storage control signal gs_sig, a second storage control signal gs_rst, a row selection control signal gs_sel, etc.) related to the pixel circuit can be implemented by a peripheral logic control circuit.
Specifically, the CMOS image sensor includes a first substrate and a second substrate stacked, and the transfer transistor and the exposure control module are fabricated on the same substrate. In this example, the CMOS image sensor is disposed in a stacked structure, and the transfer transistor and the exposure control module are fabricated on the same substrate, which is beneficial to improving the overall performance of the image sensor and improving the control performance of the actual exposure time.
In one embodiment, the photoelectric conversion element is prepared on the first substrate; the transfer transistor, the storage capacitor, the exposure control module, the pixel readout circuit, and the logic circuit are fabricated on the second substrate. In another embodiment, the photoelectric conversion element is prepared on the first substrate; the transmission transistor, the storage capacitor, the exposure control module and the pixel readout circuit are prepared on the second substrate; the CMOS image sensor includes a third substrate on which a peripheral logic control circuit is fabricated. In yet another embodiment, the photoelectric conversion element, the transfer transistor, the storage capacitor, the exposure control module, the readout circuit are prepared in the first substrate, and the logic circuit is prepared in the second substrate. The logic circuit is fabricated on the third substrate. It should be further noted that, the electrical connection (bonding) between the substrates may be implemented by using existing technologies based on the circuit, for example, using metal pads and interconnection lines or using TSV through holes to implement electrical connection between transistor devices.
Accordingly, the present embodiment also provides a method for improving the dynamic range of a CMOS image sensor based on the pixel circuit described above, the method comprising:
1) Predicting the illumination level corresponding to the pixel signal of the next frame based on the illumination level corresponding to the historical pixel signal; if the illumination corresponding to the pixel signal of the previous frame or the previous frames is the first illumination, the illumination corresponding to the pixel signal of the next frame is predicted to be the first illumination, otherwise, if the illumination corresponding to the pixel signal of the previous frame or the previous frames is the second illumination, the illumination corresponding to the pixel signal of the next frame is predicted to be the second illumination, wherein the first illumination is higher than a preset illumination threshold value, and the second illumination is lower than the preset illumination threshold value; in practical applications, the first illumination higher than the preset illumination threshold is set to be high illumination, and the first illumination lower than the preset illumination threshold is set to be low illumination, for example, the preset illumination threshold may be selected from the pixel signal 240.
2) If the illumination corresponding to the pixel signal of the next frame is predicted to be the first illumination, the photoelectric conversion element performs photoelectric conversion within a short exposure time to generate exposure charges; if the illumination corresponding to the pixel signal of the next frame is predicted to be the second illumination, the photoelectric conversion element performs photoelectric conversion in a long exposure time to generate exposure charges.
Specifically, the method for implementing photoelectric conversion of the photoelectric conversion element in different exposure time to generate exposure charges includes: and controlling the actual reset time of the transmission transistor before the next exposure is started according to the predicted illumination level, and controlling the actual exposure time of the photoelectric conversion element according to the actual reset time, so that the photoelectric conversion of the photoelectric conversion element in different exposure times is realized.
In summary, according to the pixel circuit, the CMOS image sensor and the method for improving the dynamic range of the same, the CMOS image sensor performs short exposure in high illumination and long exposure in low illumination by the design of the exposure control module, so as to adjust the actual exposure time of the photodiode according to the illumination level, thereby realizing a high dynamic range. Therefore, the invention effectively overcomes various defects in the prior art and has high industrial utilization value.
The above embodiments are merely illustrative of the principles of the present invention and its effectiveness, and are not intended to limit the invention. Modifications and variations may be made to the above-described embodiments by those skilled in the art without departing from the spirit and scope of the invention. Accordingly, it is intended that all equivalent modifications and variations of the invention be covered by the claims, which are within the ordinary skill of the art, be within the spirit and scope of the present disclosure.
Claims (14)
1. A pixel circuit, the pixel circuit comprising: photoelectric conversion element, transmission transistor, storage capacitor and exposure control module, wherein,
the output end of the photoelectric conversion element is connected with the first connection end of the transmission transistor, and the other end of the photoelectric conversion element is connected with a first reference potential; the second connecting end of the transmission transistor is connected with the first end of the storage capacitor, and the gate electrode is connected with an exposure control signal; the second end of the storage capacitor is connected with a second reference potential;
the exposure control module is used for generating the exposure control signal according to the predicted illumination level and controlling the actual exposure time of the photoelectric conversion element by controlling the on and off of the transmission transistor.
2. The pixel circuit of claim 1, wherein the exposure control module comprises: and the gate end of the control transistor is connected with a gate control signal, the first connecting end is connected with an original exposure signal related to the predicted illumination level, and the second connecting end generates the exposure control signal.
3. The pixel circuit of claim 2, wherein the exposure control module further comprises: the gate end of the selection transistor is connected with a row selection signal, the first connection end is connected with a column selection signal, and the second connection end is connected with the gate end of the auxiliary control transistor; the first connecting end of the auxiliary control transistor is connected with an auxiliary control signal, and the second connecting end of the auxiliary control transistor is connected with the gate end of the control transistor.
4. The pixel circuit of claim 3, wherein the exposure control module further comprises: the first end of the first auxiliary control capacitor is connected with the second connecting end of the selection transistor, and the second end of the first auxiliary control capacitor is connected with a third reference potential; the first end of the second auxiliary control capacitor is connected with the second connecting end of the auxiliary control transistor, and the second end of the second auxiliary control capacitor is connected with the fourth reference potential.
5. The pixel circuit of claim 1, wherein the exposure control module comprises: a first control transistor and a second control transistor,
the gate end of the first control transistor is connected with a first gate control signal, the first connecting end is connected with an original short exposure signal related to predictive high illumination, and the second connecting end generates the exposure control signal;
and the gate end of the second control transistor is connected with a second gate control signal, the first connecting end is connected with an original long exposure signal related to the low light prediction, and the second connecting end generates the exposure control signal.
6. The pixel circuit of claim 5, wherein the exposure control module further comprises: a first select transistor and a second select transistor,
the gate end of the first selection transistor is connected with a row selection signal, the first connection end is connected with a first column selection signal, and the second connection end is connected with the gate end of the first control transistor;
the gate end of the second selection transistor is connected with the row selection signal, the first connection end is connected with the second column selection signal, and the second connection end is connected with the gate end of the second control transistor.
7. The pixel circuit of claim 6, wherein the exposure control module further comprises: a first energy storage capacitor and a second energy storage capacitor,
the first end of the first energy storage capacitor is connected with the second connecting end of the first selection transistor, and the second end of the first energy storage capacitor is connected with a fifth reference potential;
the first end of the second energy storage capacitor is connected with the second connection end of the second selection transistor, and the second end of the second energy storage capacitor is connected with a sixth reference potential.
8. The pixel circuit of claim 1, wherein the pixel circuit further comprises: and the pixel reading module is connected with the first end of the storage capacitor and used for reading out the charges stored in the storage capacitor and generating pixel signals.
9. The pixel circuit of claim 8, wherein the pixel readout module comprises: a reset transistor, a first source follower transistor, a first storage transistor, a pixel capacitance, a second storage transistor, a reset capacitance, and a second source follower transistor,
the gate end of the reset transistor is connected with a reset control signal, the first connecting end is connected with a first working voltage, and the second connecting end is connected with the first end of the storage capacitor;
the gate end of the first source following transistor is connected with the first end of the storage capacitor, the first connecting end is connected with variable voltage, and the second connecting end is connected with the first connecting end of the first storage transistor;
the gate end of the first storage transistor is connected with a first storage control signal, the second connection end of the first storage transistor is connected with the first connection end of the second storage transistor, and the second connection end of the first storage transistor is connected with a seventh reference potential through the pixel capacitor;
the gate end of the second storage transistor is connected with a second storage control signal, and the second connection end is connected with the gate end of the second source follower transistor and is connected with an eighth reference potential through the reset capacitor;
the first connecting end of the second source following transistor is connected with a second working voltage, the second connecting end is connected with the first connecting end of the row selecting transistor, the gate end of the row selecting transistor is connected with a row selecting control signal, and the second connecting end generates the pixel signal; alternatively, the second connection terminal of the second source follower transistor generates the pixel signal.
10. A CMOS image sensor, the CMOS image sensor comprising: at least one pixel circuit according to any one of claims 1-9.
11. The CMOS image sensor of claim 10, wherein the CMOS image sensor comprises a stacked first substrate and second substrate, the pass transistor and the exposure control module being fabricated in the same substrate.
12. The CMOS image sensor according to claim 11, wherein the photoelectric conversion element is prepared in the first substrate; the transfer transistor, the storage capacitor, the exposure control module, the readout circuit, and the logic circuit are prepared in the second substrate; alternatively, the photoelectric conversion element, the transfer transistor, the storage capacitor, the exposure control module, the readout circuit are prepared in the first substrate, and the logic circuit is prepared in the second substrate; alternatively, the photoelectric conversion element is prepared in the first substrate, the transfer transistor, the storage capacitor, the exposure control module, and the readout circuit are prepared in the second substrate, the CMOS image sensor includes a third substrate, and the logic circuit is prepared in the third substrate.
13. A method of increasing the dynamic range of a CMOS image sensor based on a pixel circuit according to any one of claims 1-9, the method comprising:
predicting the illumination level corresponding to the pixel signal of the next frame based on the illumination level corresponding to the historical pixel signal;
if the illumination corresponding to the pixel signal of the next frame is predicted to be the first illumination, the photoelectric conversion element performs photoelectric conversion within a short exposure time to generate exposure charges;
if the illumination corresponding to the pixel signal of the next frame is predicted to be the second illumination, the photoelectric conversion element performs photoelectric conversion in a long exposure time to generate exposure charges;
wherein the first illumination is higher than a preset illumination threshold and the second illumination is lower than the preset illumination threshold.
14. The method of claim 13, wherein the method of implementing photoelectric conversion of the photoelectric conversion element to generate exposure charges in different exposure times comprises: and controlling the actual reset time of the transmission transistor before the next exposure is started according to the predicted illumination level, and controlling the actual exposure time of the photoelectric conversion element according to the actual reset time, so that the photoelectric conversion of the photoelectric conversion element in different exposure times is realized.
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