CN116112074B - Average optical power signal loss detection circuit and application thereof - Google Patents

Average optical power signal loss detection circuit and application thereof Download PDF

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Publication number
CN116112074B
CN116112074B CN202310399817.XA CN202310399817A CN116112074B CN 116112074 B CN116112074 B CN 116112074B CN 202310399817 A CN202310399817 A CN 202310399817A CN 116112074 B CN116112074 B CN 116112074B
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current mirror
unit
tube
mirror
voltage dividing
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CN116112074A (en
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陈佳研
林少衡
许美如
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Xiamen Youxun Chip Co ltd
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Xiamen UX High Speed IC Co Ltd
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B10/00Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
    • H04B10/07Arrangements for monitoring or testing transmission systems; Arrangements for fault measurement of transmission systems
    • H04B10/075Arrangements for monitoring or testing transmission systems; Arrangements for fault measurement of transmission systems using an in-service signal
    • H04B10/079Arrangements for monitoring or testing transmission systems; Arrangements for fault measurement of transmission systems using an in-service signal using measurements of the data signal
    • H04B10/0795Performance monitoring; Measurement of transmission parameters
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy

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  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Amplifiers (AREA)
  • Optical Communication System (AREA)

Abstract

The invention discloses an average optical power signal loss detection circuit and application thereof, wherein the average optical power signal loss detection circuit comprises an alarm point adjusting circuit, an alarm point releasing hysteresis adjusting circuit and a hysteresis comparator circuit; the output end of the alarm point adjusting circuit is connected with the inverting input end of the comparator of the hysteresis comparator circuit; and two output ends of the alarm point releasing hysteresis adjusting circuit are connected with two input ends of a two-way selector unit of the hysteresis comparator circuit, the output end of the two-way selector unit is connected with a normal-phase input end of the comparator, and the control end of the two-way selector unit is connected with the output end of the comparator. The average optical power signal loss detection circuit can realize the adjustment of the alarm point and the adjustment of the hysteresis width.

Description

Average optical power signal loss detection circuit and application thereof
Technical Field
The invention relates to the field of optical fiber communication, in particular to an average optical power signal loss detection circuit and application thereof.
Background
Optical fiber communication has the advantages of wide transmission frequency band, strong interference resistance and small signal attenuation, so that the optical fiber communication has become one of the main transmission modes of modern communication.
In a receiving end of the optical fiber communication system for realizing data signal conversion, optical signals transmitted by optical fibers are firstly converted into photo-generated current by a photodiode, and then the photo-generated current is amplified and converted into voltage signals which can be processed by a subsequent circuit by a group-crossing amplifier circuit, so that the conversion of the photoelectric signals is realized.
In the prior art, the photodiode and the transimpedance amplifier circuit are generally integrated in the same packaging module, and meanwhile, an RSSI circuit (Received Signal Strength Indicator) capable of monitoring the photo-generated current average value of the photodiode in real time is integrated in the packaging module; the magnitude of the output signal of the RSSI circuit and the magnitude of the output signal of the transimpedance amplifier circuit can both represent the magnitude of the average optical power of the photocurrent output by the photodiode.
The photodiode is integrated in a packaging module, so that the working state of the photodiode is difficult to judge directly, and in order to solve the problem, the output signal of the transimpedance amplifier circuit is detected by the signal loss detection circuit at present so as to realize the alarm of the loss of the signal of the average optical power. Specifically, in the existing signal loss detection circuit, an output signal of a transimpedance amplifier circuit is sampled through a rectification filter circuit, the rectification filter circuit converts the output signal of the transimpedance amplifier circuit into a direct current detection signal and inputs the direct current detection signal into the signal loss detection circuit, the signal loss detection circuit compares the direct current detection signal with a preset alarm threshold voltage signal and a release alarm threshold voltage signal, when the voltage of the direct current detection signal is smaller than the voltage of the alarm threshold voltage signal, an alarm signal is output for alarm, and when the voltage of the direct current detection signal is larger than the voltage of the release alarm threshold voltage signal, the output of the alarm signal is stopped for alarm release. However, the existing signal loss detection circuit is difficult to selectively design the alarm point (i.e. the voltage value of the alarm threshold voltage signal) and the release alarm point (i.e. the voltage value of the release alarm threshold voltage signal), and cannot adjust the hysteresis width range, wherein the hysteresis width refers to the voltage difference between the alarm point and the release alarm point; it is therefore necessary to develop an average optical power loss of signal detection circuit that can adjust the hysteresis width.
Disclosure of Invention
The invention aims to provide an average optical power signal loss detection circuit capable of adjusting hysteresis width and an application thereof.
In order to achieve the above object, the solution of the present invention is:
an average optical power signal loss detection circuit comprises an alarm point adjusting circuit, an alarm point releasing hysteresis adjusting circuit and a hysteresis comparator circuit; the hysteresis comparator circuit comprises a two-way selector unit and a comparator, wherein the output end of the two-way selector unit is connected with the non-inverting input end of the comparator, the control end of the two-way selector unit is connected with the output end of the comparator, and the passage of the two-way selector unit switches the output end level of the controlled comparator; the alarm point delay relieving and adjusting circuit comprises an operational amplifier, an amplifying tube and an adjustable voltage dividing unit; the positive phase end of the operational amplifier is connected with a reference signal, the output end of the operational amplifier is connected with the control end of an amplifying tube, the input end of the amplifying tube is connected with a control power supply, the output end of the amplifying tube is connected with the input end of an adjustable voltage dividing unit, the first output end of the adjustable voltage dividing unit is connected with the first input end of a two-way selector unit, the output voltage of the first output end of the adjustable voltage dividing unit is adjustable, and the second output end of the adjustable voltage dividing unit is connected with the inverting input end of the operational amplifier and the second input end of the two-way selector unit; the output end of the alarm point adjusting circuit is connected with the inverting input end of the comparator.
The adjustable voltage dividing unit comprises a plurality of first voltage dividing resistors, a plurality of voltage dividing switches and a second voltage dividing module, wherein each first voltage dividing resistor is connected in series between the input end and the second output end of the adjustable voltage dividing unit, the series connection node between each first voltage dividing resistor is respectively connected with the input end of each voltage dividing switch, and the output end of each voltage dividing switch is connected with the first output end of the adjustable voltage dividing unit; the first end of the second voltage dividing module is connected with the second output end of the adjustable voltage dividing unit, and the second end of the second voltage dividing module is grounded.
The second voltage dividing module comprises a second voltage dividing resistor.
The two-way selector unit comprises a first switching tube and a second switching tube; the input end of the first switching tube and the input end of the second switching tube are respectively connected with the first input end and the second input end of the two-way selector unit, the output end of the first switching tube and the output end of the second switching tube are connected with the output end of the two-way selector unit, the control end of the first switching tube and the control end of the second switching tube are connected with the control end of the two-way selector unit, the first switching tube is conducted when the level of the control end of the first switching tube is high, and the second switching tube is conducted when the level of the control end of the second switching tube is low.
The first switching switch tube is an NMOS tube, and the second switching switch tube is a PMOS tube.
The alarm point adjusting circuit comprises a current mirror unit and a current-to-voltage unit, wherein the input end of the current mirror unit is connected with the input end of the alarm point adjusting circuit, the output end of the current mirror unit is grounded through the current-to-voltage unit, and the output end of the current mirror unit is connected with the output end of the alarm point adjusting circuit.
The current mirror unit comprises a mirror image unit, a current mirror main path unit and a plurality of current mirror branch path units; the mirror unit comprises a first mirror tube, a second mirror tube, a third mirror tube and a fourth mirror tube, wherein the drain electrode and the grid electrode of the first mirror tube and the grid electrode of the fourth mirror tube are connected with the input end of the current mirror unit, the source electrode of the first mirror tube is connected with the grid electrode and the source electrode of the second mirror tube and the grid electrode of the third mirror tube, the source electrode of the second mirror tube and the source electrode of the third mirror tube are grounded, and the drain electrode of the third mirror tube is connected with the source electrode of the fourth mirror tube; the current mirror main circuit unit comprises a first current mirror main pipe and a second current mirror main pipe, wherein a source electrode of the first current mirror main pipe is connected with a control power supply, a drain electrode and a grid electrode of the first current mirror main pipe are connected with a source electrode of the second current mirror main pipe, and a drain electrode and a grid electrode of the second current mirror main pipe are connected with a drain electrode of the fourth mirror pipe; the current mirror branch unit comprises a first current mirror branch pipe, a second current mirror branch pipe and a current mirror switch, wherein the source electrode of the first current mirror branch pipe is connected with a control power supply, the drain electrode of the first current mirror branch pipe is connected with the source electrode of the second current mirror branch pipe, and the drain electrode of the second current mirror branch pipe is connected with the input end of the current mirror switch; the grid electrode of the first current mirror branch pipe of each current mirror branch unit is connected with the grid electrode of the first current mirror main pipe; the grid electrode of the second current mirror branch pipe of each current mirror branch unit is connected with the grid electrode of the second current mirror main pipe; the output ends of the current mirror switches of the current mirror branch units are connected with the output ends of the current mirror units.
The first mirror image tube, the second mirror image tube, the third mirror image tube and the fourth mirror image tube of the mirror image unit are NMOS tubes; the first current mirror main pipe and the second current mirror main pipe of the current mirror main path unit are PMOS pipes; the first current mirror branch pipe and the second current mirror branch pipe of the current mirror branch unit are PMOS pipes.
The current-to-voltage unit comprises a plurality of conversion branch units which are arranged in parallel, and each conversion branch unit comprises a conversion resistor and a conversion switch which are connected in series.
An application of an average optical power signal loss detection circuit, which comprises an RSSI circuit and the average optical power signal loss detection circuit; the input end of the alarm point adjusting circuit of the average optical power signal loss detecting circuit is connected with the output end of the RSSI circuit.
After the scheme is adopted, the invention has the following characteristics:
1. the voltage difference between the first input end and the second input end of the two-way selector unit characterizes the hysteresis width of the average optical power signal loss detection circuit, the output voltage of the first output end of the adjustable voltage division unit of the alarm point releasing hysteresis regulation circuit is adjustable, and the first output end of the adjustable voltage division unit is connected with the first input end of the two-way selector unit, so that the voltage of the first input end of the two-way selector unit can be regulated through the adjustable voltage division unit, the voltage difference of the first input end and the second input end of the two-way selector unit is changed, and the hysteresis width regulation of the average optical power signal loss detection circuit is realized;
2. the current mirror unit and the current-to-voltage unit can both adjust the output voltage of the alarm point adjusting circuit, so that the alarm point and the alarm point of the average optical power signal loss detecting circuit are adjusted, and the optional range of the alarm point and the alarm point of the average optical power signal loss detecting circuit is large;
3. the input end of the alarm point adjusting circuit of the average optical power signal loss detecting circuit can be directly connected with the output end of the RSSI circuit (namely, the output signal of the RSSI circuit is directly input into the alarm point adjusting circuit), and the RSSI circuit is internally provided with a rectification filter circuit, so that the RSSI circuit is not required to be additionally provided for being connected with the alarm point adjusting circuit of the average optical power signal loss detecting circuit, and compared with the existing average optical power signal loss detecting circuit, the invention can omit the setting of the rectification filter circuit by additionally providing the rectification filter circuit, thereby being beneficial to reducing the layout area and the cost, and RSSI current signals output by the RSSI circuit are directly input into the average optical power signal loss detecting circuit, so that the detection precision is higher.
Drawings
FIG. 1 is a schematic circuit diagram of an average optical power loss of signal detection circuit according to the present invention;
fig. 2 is a schematic diagram illustrating an application of the average optical power loss detection circuit according to the present invention.
Description of the embodiments
In order to further explain the technical scheme of the invention, the invention is explained in detail by specific examples.
As shown in fig. 1, the present invention discloses an average optical power signal loss detection circuit A1, which includes an alarm point adjusting circuit 1, a cancel alarm point hysteresis adjusting circuit 2, and a hysteresis comparator circuit 3; the hysteresis comparator circuit 3 comprises a two-way selector unit 31 and a comparator U1, wherein the output end of the two-way selector unit 31 is connected with the non-inverting input end of the comparator U1, the control end of the two-way selector unit 31 is connected with the output end of the comparator U1, and the channel of the two-way selector unit 31 switches the output end level of the controlled comparator U1; the alarm point delay adjusting circuit 2 comprises an operational amplifier OPA, an amplifying tube G1 and an adjustable voltage dividing unit 21, wherein the amplifying tube G1 can be a PMOS tube, a normal phase end of the operational amplifier OPA is connected with a reference signal VREF, an output end of the operational amplifier OPA is connected with a control end of the amplifying tube G1, an input end of the amplifying tube G1 is connected with a control power VCC, an output end of the amplifying tube G1 is connected with an input end of the adjustable voltage dividing unit 21, a first output end of the adjustable voltage dividing unit 21 is connected with a first input end of the two-way selector unit 31, an output voltage of the first output end of the adjustable voltage dividing unit 21 is adjustable, and a second output end of the adjustable voltage dividing unit 21 is connected with an inverting input end of the operational amplifier OPA and a second input end of the two-way selector unit 31; the output end of the alarm point adjusting circuit 1 is connected with the inverting input end of the hysteresis comparator circuit 3, and the input end of the alarm point adjusting circuit 1 is used for receiving a signal which can represent the average optical power of the photocurrent output by the photodiode PD, and the signal can be an RSSI current signal RSSI output by the RSSI circuit A2.
The working principle of the invention is as follows: when the signal input to the input end of the alarm point adjusting circuit is normal (i.e. when the average optical power of the photocurrent output by the photodiode PD is greater than the set threshold value), the average optical power signal LOSs detecting circuit A1 of the present invention is in an unarmed state at this time, i.e. the LOS signal LOS output by the average optical power signal LOSs detecting circuit A1 of the present invention is a low level signal, so that the output end level of the comparator U1 of the hysteresis comparator circuit 3 is a low level to make the second input end of the two-way selector unit 31 and the output end thereof be conducted, and the voltage of the non-inverting input end of the comparator U1 is equal to the voltage of the second input end of the two-way selector unit 31; when the signal to be input to the input end of the alarm point adjusting circuit is lost (i.e. the photodiode PD has no photocurrent output or the average optical power of the photocurrent output by the photodiode PD is smaller than the set threshold), the output voltage of the alarm point adjusting circuit 1 will be smaller than the voltage of the second input end of the two-way selector unit 31, i.e. the voltage of the inverting input end of the comparator U1 is smaller than the voltage of the non-inverting input end of the comparator U1, so that the output end level of the comparator U1 is high, i.e. the LOS signal LOS output by the average optical power signal LOSs detecting circuit A1 of the present invention is high, at this time, the average optical power signal LOSs detecting circuit A1 of the present invention is in an alarm state, and the two-way selector unit 31 switches to make the first input end of the two-way selector unit 31 and the output end thereof conductive, so that the voltage of the non-inverting input end of the comparator U1 is equal to the voltage of the first input end of the two-way selector unit 31; when the signal to be input to the input terminal of the alarm point adjusting circuit is recovered (i.e. when the average optical power of the photocurrent output by the photodiode PD is recovered to be greater than the set threshold value), the output voltage of the alarm point adjusting circuit 1 will be greater than the voltage of the first input terminal of the two-way selector unit 31, i.e. the voltage of the inverting input terminal of the comparator U1 is greater than the voltage of the non-inverting input terminal of the comparator U1, so that the output terminal level of the comparator U1 is at a low level, i.e. the LOS signal LOS output by the average optical power signal LOSs detecting circuit A1 of the present invention is at a low level signal, and at this time the average optical power signal LOSs detecting circuit A1 of the present invention is in a state of releasing the alarm, and the two-way selector unit 31 switches so that the second input terminal of the two-way selector unit 31 is in conduction with the output terminal thereof, so that the voltage of the non-inverting input terminal of the comparator U1 is equal to the voltage of the second input terminal of the two-way selector unit 31, so that the hysteresis comparator 3 is reset.
In the present invention, the voltage difference between the first input end and the second input end of the two-way selector unit 31 characterizes the hysteresis width of the average optical power signal loss detection circuit A1 of the present invention, while the output voltage of the first output end of the adjustable voltage division unit 21 of the alarm-canceling point hysteresis adjustment circuit 2 is adjustable, and the first output end of the adjustable voltage division unit 21 is connected to the first input end of the two-way selector unit 31, so that the present invention can adjust the voltage of the first input end of the two-way selector unit 31 through the adjustable voltage division unit 21, thereby changing the voltage difference between the first input end and the second input end of the two-way selector unit 31, and further realizing the adjustment of the hysteresis width of the average optical power signal loss detection circuit A1 of the present invention.
In an embodiment of the present invention, the adjustable voltage dividing unit 21 includes a first voltage dividing module 211 and a second voltage dividing module 212; the first voltage dividing module 211 includes a plurality of first voltage dividing resistors rd_1, rd_ … rd_n and a plurality of voltage dividing switches kd_1, kd_ … kd_n, each of the first voltage dividing resistors rd_1, rd_ … rd_n is connected in series between an input end and a second output end of the adjustable voltage dividing unit 21, a series node between each of the first voltage dividing resistors rd_1, rd_ … rd_n is connected to the input end of each of the voltage dividing switches kd_1, kd_ … kd_n, an output end of each of the voltage dividing switches kd_1, kd_ … kd_n is connected to the first output end of the adjustable voltage dividing unit 21, a first end of the second voltage dividing module 212 is connected to the second output end of the adjustable voltage dividing unit 21, and a second end of the second voltage dividing module 212 is grounded; the invention controls the output voltage of the first output end of the adjustable voltage dividing unit 21 by controlling the on-off of each voltage dividing switch Kd_1, kd_ … Kd_n, wherein each voltage dividing switch Kd_1, kd_ … Kd_n requires that only one voltage dividing switch is conducted at the same time. The second voltage dividing module 212 may include a second voltage dividing resistor Rg such that the second voltage dividing resistor Rg forms a voltage output between the first output terminal and the second output terminal of the adjustable voltage dividing unit 21.
In the embodiment of the present invention, the two-way selector unit 31 includes a first switching transistor M1 and a second switching transistor M2; the input end of the first switching tube M1 and the input end of the second switching tube M2 are respectively connected with the first input end and the second input end of the two-way selector unit 31, the output end of the first switching tube M1 and the output end of the second switching tube M2 are connected with the output end of the two-way selector unit 31, the control end of the first switching tube M1 and the control end of the second switching tube M2 are connected with the control end of the two-way selector unit 31, the first switching tube M1 is turned on when the control end level is high, and the second switching tube M2 is turned on when the control end level is low. When the output end level of the comparator U1 is low, the control end level of the second switching tube M2 is low at the moment, so that the second switching tube M2 is conducted, and the second input end of the two-way selector unit 31 is conducted with the output end of the two-way selector unit; at this time, the control terminal level of the first switching tube M1 is low, so that the first switching tube M1 is turned off, and the first input terminal of the two-way selector unit 31 is not turned on with the output terminal thereof. When the output end level of the comparator U1 is high, the control end level of the first switching tube M1 is high at this time, so that the first switching tube M1 is conducted, and the first input end of the two-way selector unit 31 is conducted with the output end of the two-way selector unit; at this time, the control terminal level of the second switching tube M2 is high, so that the second switching tube M2 is turned off, and the second input terminal of the two-way selector unit 31 is not turned on with the output terminal thereof.
In the embodiment of the invention, the alarm point adjusting circuit 1 comprises a current mirror unit 11 and a current-to-voltage unit 12, wherein the input end of the current mirror unit 11 is connected with the input end of the alarm point adjusting circuit 1, the output end of the current mirror unit 11 is grounded through the current-to-voltage unit 12, and the output end of the current mirror unit 11 is connected with the output end of the signal output circuit 1. The current mirror unit 11 is configured to mirror the RSSI current signal RSSI output by the RSSI circuit A2 according to a certain ratio to obtain a mirrored RSSI current signal, and the current-to-voltage unit 12 is configured to convert the mirrored RSSI current signal into a voltage signal and input the voltage signal to the inverting input terminal of the hysteresis comparator circuit 3.
In the embodiment of the present invention, the current mirror unit 11 includes a mirror unit 111, a current mirror main path unit 112, and a plurality of current mirror branch path units 113; the mirror unit 111 includes a first mirror tube Mt1, a second mirror tube Mt2, a third mirror tube Mt3, and a fourth mirror tube Mt4, where a drain and a gate of the first mirror tube Mt1 and a gate of the fourth mirror tube Mt4 are connected to an input end of the current mirror unit 11, a source of the first mirror tube Mt1 is connected to a gate and a source of the second mirror tube Mt2 and a gate of the third mirror tube Mt3, a source of the second mirror tube Mt2 and a source of the third mirror tube Mt3 are grounded, and a drain of the third mirror tube Mt3 is connected to a source of the fourth mirror tube Mt 4; the current mirror main circuit unit 112 includes a first current mirror main pipe Mm1 and a second current mirror main pipe Mm2, wherein a source electrode of the first current mirror main pipe Mm1 is connected with a control power supply VCC, a drain electrode and a gate electrode of the first current mirror main pipe Mm1 are connected with a source electrode of the second current mirror main pipe Mm2, and a drain electrode and a gate electrode of the second current mirror main pipe Mm2 are connected with a drain electrode of the fourth mirror pipe Mt 4; the current mirror branching unit 113 includes a first current mirror branching pipe mb1_1/mb1_2/… mb1_i, a second current mirror branching pipe mb2_1/mb2_2/… mb2_i, and a current mirror switch kb_1/kb_2/… kb_i, the source of the first current mirror branching pipe mb1_1/mb1_2/… mb1_i is connected to the control power VCC, the drain of the first current mirror branching pipe mb1_1/mb1_2/… mb1_i is connected to the source of the second current mirror branching pipe mb2_1/mb2_2/… mb2_i, the drain of the second current mirror branching pipe mb2_1/mb2_2/… mb2_i is connected to the input of the current mirror switch kb_1/kb_2/… kb_i; the gates of the first current mirror branch pipes Mb1_1/Mb1_2/… Mb1_i of each current mirror branch unit 113 are connected with the gate of the first current mirror main pipe Mm 1; the gates of the second current mirror branch pipes Mb2_1/Mb2_2/… Mb2_i of each current mirror branch unit 113 are connected with the gate of the second current mirror main pipe Mm 2; the output terminals of the current mirror switches kb_1/kb_2/… kb_i of the current mirror branching units 113 are connected to the output terminal of the current mirror unit 11. The invention can adjust the mirror proportion of the current mirror unit 11 by controlling the on-off of the current mirror switches Kb_1/Kb_2/… Kb_i of each current mirror branch unit 113, and further control the magnitude of the mirror RSSI current signal output by the current mirror unit 11 to control the output voltage of the alarm point adjusting circuit 1, thereby adjusting the alarm point of the average light power signal loss detecting circuit A1. The first mirror tube Mt1, the second mirror tube Mt2, the third mirror tube Mt3, and the fourth mirror tube Mt4 of the mirror unit 111 may be NMOS tubes, the first current mirror main tube Mm1 and the second current mirror main tube Mm2 of the current mirror main path unit 112 may be PMOS tubes, and the first current mirror branch tube mb1_1/mb1_2/… mb1_i and the second current mirror branch tube mb2_1/mb2_2/… mb2_i of the current mirror branch path unit 113 may be PMOS tubes.
In the embodiment of the present invention, the current-to-voltage unit 12 includes a plurality of switching leg units 121 disposed in parallel, and each switching leg unit 121 includes a series-connected switching resistor rt_1/rt_2/… rt_j and a switching switch kt_1/kt_2/… kt_j. The invention can adjust the total resistance value of the current-to-voltage unit 12 by controlling the on-off of the change-over switches Kt_1/Kt_2/… Kt_j of each change-over branch unit 121, and further control the output voltage of the alarm point adjusting circuit 1, thereby adjusting the alarm point of the average optical power signal loss detecting circuit A1.
In the embodiment of the present invention, the current mirror unit 11 and the current-to-voltage unit 12 can both adjust the output voltage of the alarm point adjusting circuit 1 to adjust the alarm point of the average optical power signal loss detecting circuit A1 of the present invention, so that the optional range of the alarm point and the release alarm point of the average optical power signal loss detecting circuit A1 of the present invention is large.
In conjunction with fig. 2, the present invention also discloses an application of the average optical power signal loss detection circuit A1, which includes an RSSI circuit A2 and the average optical power signal loss detection circuit A1; the input end of the alarm point adjusting circuit 1 of the average optical power signal loss detecting circuit A1 is directly connected with the output end of the RSSI circuit A2, the input end of the RSSI circuit A2 is connected with the cathode of the photodiode PD, and the anode of the photodiode PD is connected with the transimpedance amplifier circuit TIA; therefore, the invention directly connects the input end of the alarm point adjusting circuit of the average optical power signal loss detecting circuit with the output end of the RSSI circuit (namely, directly inputs the RSSI current signal RSSI output by the RSSI circuit into the alarm point adjusting circuit), the RSSI circuit can be internally provided with a rectification filter circuit, so that the invention does not need to additionally arrange a rectification filter circuit to be connected with the alarm point adjusting circuit of the average optical power signal loss detecting circuit A1, and compared with the traditional average optical power signal loss detecting circuit, the invention can omit the arrangement of the rectification filter circuit by the rectification filter circuit which is additionally arranged, thereby being beneficial to reducing the layout area and the cost, and the RSSI current signal RSSI output by the RSSI circuit A2 is directly input into the average optical power signal loss detecting circuit A1 of the invention, thereby leading the detecting precision to be higher.
The above examples and drawings are not intended to limit the form or form of the present invention, and any suitable variations or modifications thereof by those skilled in the art should be construed as not departing from the scope of the present invention.

Claims (9)

1. An average optical power signal loss detection circuit, characterized in that: the alarm point delay control circuit comprises an alarm point adjusting circuit, an alarm point releasing delay adjusting circuit and a delay comparator circuit;
the hysteresis comparator circuit comprises a two-way selector unit and a comparator, wherein the output end of the two-way selector unit is connected with the non-inverting input end of the comparator, the control end of the two-way selector unit is connected with the output end of the comparator, and the passage of the two-way selector unit switches the output end level of the controlled comparator; the two-way selector unit comprises a first switching tube and a second switching tube; the input end of the first switching tube and the input end of the second switching tube are respectively connected with the first input end and the second input end of the two-way selector unit, the output end of the first switching tube and the output end of the second switching tube are connected with the output end of the two-way selector unit, the control end of the first switching tube and the control end of the second switching tube are connected with the control end of the two-way selector unit, the first switching tube is conducted when the level of the control end of the first switching tube is high, and the second switching tube is conducted when the level of the control end of the second switching tube is low;
the alarm point delay relieving and adjusting circuit comprises an operational amplifier, an amplifying tube and an adjustable voltage dividing unit; the positive phase end of the operational amplifier is connected with a reference signal, the output end of the operational amplifier is connected with the control end of an amplifying tube, the input end of the amplifying tube is connected with a control power supply, the output end of the amplifying tube is connected with the input end of an adjustable voltage dividing unit, the first output end of the adjustable voltage dividing unit is connected with the first input end of a two-way selector unit, the output voltage of the first output end of the adjustable voltage dividing unit is adjustable, and the second output end of the adjustable voltage dividing unit is connected with the inverting input end of the operational amplifier and the second input end of the two-way selector unit;
the output end of the alarm point adjusting circuit is connected with the inverting input end of the comparator.
2. The average optical power loss of signal detection circuit of claim 1, wherein: the adjustable voltage dividing unit comprises a first voltage dividing module and a second voltage dividing module; the first voltage dividing module comprises a plurality of first voltage dividing resistors and a plurality of voltage dividing switches, each first voltage dividing resistor is connected in series between the input end and the second output end of the adjustable voltage dividing unit, the series connection nodes among the first voltage dividing resistors are respectively connected with the input ends of the voltage dividing switches, and the output ends of the voltage dividing switches are connected with the first output end of the adjustable voltage dividing unit; the first end of the second voltage dividing module is connected with the second output end of the adjustable voltage dividing unit, and the second end of the second voltage dividing module is grounded.
3. The average optical power loss of signal detection circuit of claim 2, wherein: the second voltage dividing module comprises a second voltage dividing resistor.
4. The average optical power loss of signal detection circuit of claim 1, wherein: the first switching switch tube is an NMOS tube, and the second switching switch tube is a PMOS tube.
5. The average optical power loss of signal detection circuit of claim 1, wherein: the alarm point adjusting circuit comprises a current mirror unit and a current-to-voltage unit, wherein the input end of the current mirror unit is connected with the input end of the alarm point adjusting circuit, the output end of the current mirror unit is grounded through the current-to-voltage unit, and the output end of the current mirror unit is connected with the output end of the alarm point adjusting circuit.
6. The average optical power loss of signal detection circuit of claim 5, wherein: the current mirror unit comprises a mirror image unit, a current mirror main path unit and a plurality of current mirror branch path units;
the mirror unit comprises a first mirror tube, a second mirror tube, a third mirror tube and a fourth mirror tube, wherein the drain electrode and the grid electrode of the first mirror tube and the grid electrode of the fourth mirror tube are connected with the input end of the current mirror unit, the source electrode of the first mirror tube is connected with the grid electrode and the source electrode of the second mirror tube and the grid electrode of the third mirror tube, the source electrode of the second mirror tube and the source electrode of the third mirror tube are grounded, and the drain electrode of the third mirror tube is connected with the source electrode of the fourth mirror tube;
the current mirror main circuit unit comprises a first current mirror main pipe and a second current mirror main pipe, wherein a source electrode of the first current mirror main pipe is connected with a control power supply, a drain electrode and a grid electrode of the first current mirror main pipe are connected with a source electrode of the second current mirror main pipe, and a drain electrode and a grid electrode of the second current mirror main pipe are connected with a drain electrode of the fourth mirror pipe;
the current mirror branch unit comprises a first current mirror branch pipe, a second current mirror branch pipe and a current mirror switch, wherein the source electrode of the first current mirror branch pipe is connected with a control power supply, the drain electrode of the first current mirror branch pipe is connected with the source electrode of the second current mirror branch pipe, and the drain electrode of the second current mirror branch pipe is connected with the input end of the current mirror switch;
the grid electrode of the first current mirror branch pipe of each current mirror branch unit is connected with the grid electrode of the first current mirror main pipe; the grid electrode of the second current mirror branch pipe of each current mirror branch unit is connected with the grid electrode of the second current mirror main pipe; the output ends of the current mirror switches of the current mirror branch units are connected with the output ends of the current mirror units.
7. The average optical power loss of signal detection circuit of claim 6, wherein: the first mirror image tube, the second mirror image tube, the third mirror image tube and the fourth mirror image tube of the mirror image unit are NMOS tubes; the first current mirror main pipe and the second current mirror main pipe of the current mirror main path unit are PMOS pipes; the first current mirror branch pipe and the second current mirror branch pipe of the current mirror branch unit are PMOS pipes.
8. The average optical power loss of signal detection circuit of claim 5, wherein: the current-to-voltage unit comprises a plurality of conversion branch units which are arranged in parallel, and each conversion branch unit comprises a conversion resistor and a conversion switch which are connected in series.
9. An application of an average optical power signal loss detection circuit, which is characterized in that: comprising an RSSI circuit and an average optical power loss of signal detection circuit according to any one of claims 1 to 8; the input end of the alarm point adjusting circuit of the average optical power signal loss detecting circuit is connected with the output end of the RSSI circuit.
CN202310399817.XA 2023-04-14 2023-04-14 Average optical power signal loss detection circuit and application thereof Active CN116112074B (en)

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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101729153A (en) * 2008-11-03 2010-06-09 华为技术有限公司 Receiving method, device and system of optical signal
CN102088424A (en) * 2010-12-24 2011-06-08 厦门优迅高速芯片有限公司 Signal detection device
CN102638317A (en) * 2011-02-14 2012-08-15 中兴通讯股份有限公司 Signal loss detection circuit and method and amplifier
CN102790601A (en) * 2012-08-08 2012-11-21 电子科技大学 RC (resistance-capacitance) oscillator
CN112600626A (en) * 2021-03-04 2021-04-02 深圳市迅特通信技术股份有限公司 Optical module and communication device
CN115580348A (en) * 2022-11-24 2023-01-06 厦门优迅高速芯片有限公司 Photocurrent image monitoring circuit

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6819880B2 (en) * 2000-10-26 2004-11-16 Mitsubishi Denki Kabushiki Kaisha Loss of signal detection circuit for light receiver

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101729153A (en) * 2008-11-03 2010-06-09 华为技术有限公司 Receiving method, device and system of optical signal
CN102088424A (en) * 2010-12-24 2011-06-08 厦门优迅高速芯片有限公司 Signal detection device
CN102638317A (en) * 2011-02-14 2012-08-15 中兴通讯股份有限公司 Signal loss detection circuit and method and amplifier
CN102790601A (en) * 2012-08-08 2012-11-21 电子科技大学 RC (resistance-capacitance) oscillator
CN112600626A (en) * 2021-03-04 2021-04-02 深圳市迅特通信技术股份有限公司 Optical module and communication device
CN115580348A (en) * 2022-11-24 2023-01-06 厦门优迅高速芯片有限公司 Photocurrent image monitoring circuit

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
智能光模块中可变阈值的信号丢失检测电路;王蓉;王志功;徐建;吴俊;管志强;;半导体学报(第02期);全文 *

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