CN116110450A - Method for realizing analog and multi-value content addressable memory based on pulse width modulation ferroelectric field effect transistor - Google Patents

Abstract

The invention provides a method for realizing an analog and multi-value content addressable memory based on a pulse width modulation ferroelectric field effect transistor, belonging to the technical field of novel storage and calculation. Compared with the traditional implementation modes of ACAM and MCAM, the invention does not need additional transistors and complex analog peripheral circuits, can be realized by only sharing a few logic gates, has a simpler implementation mode and lower hardware cost, only needs one voltage amplitude VDD in the search process, and is more compatible with a digital system. In addition, the encoding mode of the search query and the memory entry based on pulse width ensures that the memory range is not limited by the memory window of the FeFET, and MCAM with more bits can be obtained, so that the memory density and the search energy efficiency of the CAM are further improved, and the method has wide application prospect.

Description

A method for implementing analog and multi-valued content-addressable memory based on pulse-width modulated ferroelectric field-effect transistors

technical field

The invention relates to the technical field of novel storage and computing, in particular to an analog and multi-valued content addressable memory design based on a pulse width modulation ferroelectric field effect transistor.

Background technique

Content-addressable memory (CAM) can perform search operations efficiently and in parallel, and is widely used in efficient machine learning models such as routers, database search, in-memory computing, and neuromorphic computing. CAM is a special type of memory for parallel search that can perform unique search operations in addition to the read and write operations of conventional memory. CAM was originally used to accelerate table lookup operations related to packet forwarding and classification in network routers. Since CAM can complete the entire search operation within one clock cycle, it has significant acceleration compared to other hardware or software-based search systems. As a result, on the basis of CAM, a three-state content addressable memory (TCAM) with the ability to store the state of the mask "X" has been further developed. TCAM can realize exact matching or fuzzy matching, and improve the efficiency of table lookup. In the era of big data, since CAM can complete the matching operation between the input vector (query) and all storage vectors (entry) in one search cycle, and perform feature retrieval based on distance measures according to the degree of mismatch, it is very useful in processing pattern matching, video and It is extremely attractive in edge-end machine learning tasks such as image processing.

The CAM design based on traditional static random access memory (SRAM) occupies a huge cell area, which limits its storage density for computing-intensive algorithm mapping, and the resulting large parasitic capacitance will further increase the search delay. and power consumption. Based on various emerging non-volatile memories, such as resistive random access memory (RRAM), phase change memory (PCM) and ferroelectric field effect transistor (FeFET), the designed CAM has reduced cell area and search delay and energy consumption. In addition, the analog content addressable memory (ACAM) designed by further utilizing the multi-value storage capability of emerging non-volatile memory can not only improve the storage density of CAM by quantizing it as multi-value content addressable memory (MCAM), but also can Based on its unique range matching operation, it is used in a wider range of application scenarios such as decision trees and deep random forests. However, the current ACAM and MCAM designs based on emerging non-volatile memories need to be implemented through additional hardware overhead, that is, through additional control transistors or additional peripheral complex circuits, to achieve matching operations between analog inputs and storage ranges, corresponding programming and The search method is also more complicated. Combined with the above analysis, it is of great significance to realize a more compact and easy-to-operate ACAM and MCAM design.

Contents of the invention

Aiming at the problems existing in the above prior art, the present invention proposes a kind of ACAM and MCAM design based on pulse width modulation FeFET. Compared with the current ACAM and MCAM design, no additional control transistor and complicated peripheral circuits are needed, based on The encoding method of pulse width search query and storage entry makes the matching range of ACAM based on pulse width modulation FeFET not limited by the storage window of FeFET, and can be quantized into MCAM with more bits, which improves the storage density and search energy efficiency of CAM , and only one voltage amplitude is needed in the search process, which is more compatible with digital systems.

Technical scheme of the present invention is as follows:

A method for realizing analog content addressable memory ACAM based on pulse width modulation FeFET, characterized in that it includes a CAM array composed of CAM cells, each CAM cell is composed of two N-type FeFETs, and the drains of the FeFETs are connected to Two matching lines ML and ML _b , the gate of the FeFET is connected to two search lines SL and SL _b , the source of the FeFET is grounded, in a CAM array, a row of CAM cells share two matching lines ML and ML _b , ML and ML _b are used as the two inputs of the AND gate shared by the row, and the output of the AND gate is the matching result Vout of the row; a column of CAM cells shares two search lines SL and SL _b , and the search signal SL and reference signal of each column Ref is used as the two inputs of the XOR gate shared by the column, and the output of the XOR gate is SL _b ; the precharge circuit is used to charge the two matching lines of each row; in the stage of programming the ACAM storage entry, the two FeFETs are respectively charged A certain programming voltage is applied to the gate, and it is programmed to a certain threshold voltage V _TH1 and V _TH2 . When the voltage VDD is applied to the gates of the two FeFETs, ML ₁ and ML ₂ are pre-charged to VDD through the pre-charging circuit. The discharge speed related to the threshold voltage of the FeFET is shown, and the discharge time to VDD/2 is t ₁ and t ₂ respectively. In the search phase, ML ₁ and ML ₂ are pre-charged to VDD through the pre-charging circuit first, and the SL terminal is applied with For a search voltage V _SL with a certain pulse width T _SL and an amplitude of VDD, the size of T _SL corresponds to the size of the search query, and the width of the reference signal Ref is T _Ref , then the signal at the SLb terminal has a pulse width of T _Ref -T _SL And the amplitude of the search voltage V _SLb is VDD, when the pulse width T _SL of V _SL is less than the discharge time t ₁ of the FeFET it acts on, and the pulse width T _Ref -T _SL of V _SLb is less than the discharge time t of the FeFET it acts on _2. During the search process, the voltage of ML ₁ and ML ₂ will not be discharged below VDD/2, and the output result Vout of the AND gate remains high, indicating a match, so the matching range can be obtained when T _SL is located at T _Ref Between -t ₂ and t ₁ , by programming the two FeFETs independently, different discharge times t ₁ and t ₂ can be obtained, and thus different matching ranges can be obtained. If the pulse width of V _SL is large, it will make T _SL larger than t ₁ , so that the ML ₁ of the FeFET that V _SL acts on falls below VDD/2 during the search phase, and if the pulse width of V _SL is small, it will make T If _SL is less than T _Ref -t ₂ , the ML ₂ of the FeFET that V _SLb acts on will drop below VDD/2 during the search phase. In both cases, the output result Vout will become low during the search phase, indicating a mismatch. Implements range matching operations for ACAM cells.

Further, by programming the CAM cells in the array to multiple non-overlapping pulse width matching ranges, the analog content addressable memory ACAM can be quantized into a multi-valued content addressable memory MCAM, and multiple discrete pulse width matching ranges Represents the multi-level entry state of MCAM, the pulse width of the quantized multi-level search query corresponding to the entry can take the middle value of the storage range, then in the search operation, apply the V _SL of the corresponding pulse width according to the search query, only when the multi-level When the level search query is consistent with the multi-level storage entry, the pulse width of V _SL is within the matching range, so that the time that V _SL and V _SLb act on the FeFET is shorter than the discharge time of the corresponding FeFET, so that ML ₁ during the search process and ML ₂ are greater than VDD/2, so that the output result Vout is a high level, indicating a match. Otherwise, when the multi-level search query is inconsistent with the multi-level storage entry, the pulse width of V _SL will be out of the matching range, so that ML ₁ or ML ₂ will drop below VDD/2 during the search phase, and the output result Vout will become If it is low level, it means that it does not match, and realizes MCAM matching operation.

The pulse width T _Ref of the reference signal Ref can be adjusted according to the discharge time of the FeFET after programming, and the FeFET can be programmed into a low-threshold state and a high-threshold state, so that it is fully on and off when the gate is input with VDD voltage, The corresponding discharge time is very short time and close to infinite time. Therefore, by modulating the threshold voltage of FeFET and selecting an appropriate Ref, the storage range of ACAM based on pulse width modulation FeFET is from a very small pulse width range to a theoretical The infinite pulse width range, if used in MCAM, can further increase the number of quantifiable states.

In summary, the ACAM and MCAM design based on pulse width modulation FeFET is realized by using the complementary information of pulse width. Compared with the traditional ACAM implementation, it only needs a voltage amplitude VDD in the search process, which is compatible with digital systems , In addition, the pulse width-based encoding method of search query and storage entry makes its storage range not limited by the storage window of FeFET, and can obtain MCAM with more bits, further improving the density and search energy efficiency of CAM.

The _ACAM and MCAM design based on the pulse width modulation FeFET proposed by the present invention, the _{ferroelectric} material needs to adopt various HfO doped multi-domain ferroelectric materials such as HfO doped with Zr (HZO), _HfO doped with Al (HfAlO), etc. , The device gate stack can be based on various structures such as MFMIS, MFIS, and MFS.

Technical effect of the present invention is as follows:

1. The ACAM design based on the pulse width modulation FeFET proposed by the present invention uses the complementary information of the pulse width to realize the ACAM based on the pulse width modulation FeFET. Compared with the traditional ACAM implementation, no additional transistors and complex The analog peripheral circuit can be realized with only a few logic gates that can be shared, which has a more concise implementation method and lower hardware overhead, and only one voltage amplitude VDD is needed during the search process, which is more compatible with digital systems.

2. The MCAM design based on the pulse width modulation FeFET proposed by the present invention, the encoding method of the search query and the storage entry based on the pulse width, makes its storage range not limited by the storage window of the FeFET, and can obtain MCAM with more bits, so as to Further improve the storage density and search energy efficiency of CAM.

Description of drawings

Fig. 1 is the CAM unit structure schematic diagram based on pulse width modulation FeFET of the present invention;

Fig. 2 is the ACAM function realization schematic diagram based on pulse width modulation FeFET of the present invention; Among the figure: A) is the ID _- V _G characteristic schematic diagram of two FeFETs of each CAM unit; B) is two of each CAM unit Schematic diagram of discharge characteristics of FeFET; C) is a schematic diagram of the search signal waveform of each CAM unit; D) is a schematic diagram of the output result of each CAM unit;

FIG. 3 is a schematic diagram of the realization of the MCAM function based on the pulse width modulation FeFET of the present invention.

Detailed ways

The present invention will be further clearly and completely set forth below through specific embodiments in conjunction with the accompanying drawings.

The structure of the CAM array based on the pulse width modulation FeFET of the present invention is shown in Figure 1. The CAM unit consists of two N-type FeFETs (F ₁ and F ₂ ), a row-shared two-input XOR gate, a column-shared two-input AND gate, and The precharge circuit is composed of the gates of F ₁ and F ₂ connected to two search lines SL and SLb respectively, SL and the reference signal Ref are used as the two inputs of the XOR gate, and the output of the XOR gate is SLb, F ₁ and F ₂ The drain is connected to two matching lines ML ₁ and ML ₂ , ML ₁ and ML ₂ are used as the two inputs of the AND gate, and the output of the AND gate is the matching result Vout of this line. The two matching lines ML ₁ and ML ₂ are charged to VDD, and then a search voltage is applied. If Vout remains high during the search, it indicates a match, otherwise it indicates a mismatch.

Figure 2 is a schematic diagram of the implementation of the ACAM function based on pulse width modulation FeFET in this embodiment. In the stage of programming the ACAM storage entry, a programming voltage greater than the coercive voltage is applied to the gates of _F1 and _F2 respectively, and their threshold voltages are programmed. For V _TH1 and V _TH2 , when the voltage VDD is applied to the gates of F ₁ and F ₂ , ML ₁ and ML ₂ pre-charged to VDD through the pre-charging circuit exhibit a discharge rate related to the threshold voltage of F ₁ and F ₂ , The time to discharge to VDD/2 is t ₁ and t ₂ respectively; in the search phase, ML ₁ and ML ₂ are pre-charged to VDD through the pre-charging circuit first, and the pulse width T _SL corresponding to the search query is applied to the SL terminal Search voltage V _SL , the width of reference signal Ref is T _Ref , then the signal at SLb end is pulse width T _SLb is T _Ref -T _SL , only when the pulse width T _SL of V _SL is less than the discharge time t ₁ of F ₁ , and V The pulse width T _SLb of _SLb is less than the discharge time t ₂ of F ₂ to ensure that the voltage of ML ₁ and ML ₂ will not discharge below VDD/2 during the search process, and the output result Vout of the AND gate remains high. Ping means matching, that is, the matching range is that T _SL is between T _Ref -t ₂ and t ₁ . If the pulse width of V _SL is large, it will make T _SL larger than t ₁ , making ML ₁ discharge through F ₁ to drop below VDD/2 during the search phase, and if the pulse width of V _SL is small, it will make T _SL smaller than T _Ref -t ₂ , will cause ML ₂ to drop below VDD/2 through F ₂ during the search phase, and make the output result Vout become low level during the search phase, indicating a mismatch.

As shown in Figure 3, by programming the CAM units in the above array into multiple non-overlapping pulse width matching ranges, ACAM can be quantized into MCAM, and multiple discrete pulse width matching ranges represent the multi-level entry state of MCAM, The pulse width of the quantized multi-level search query corresponding to the entry can take the middle value of the pulse width matching range to obtain greater detection margin and robustness. During the search operation, V _SL of the corresponding pulse width is applied according to the search query. When the multi-level search query is consistent with the multi-level storage entry, the pulse width of V _SL is within the matching range, so that V _SL and V _SLb act on the FeFET respectively. The time is less than the discharge time of the corresponding FeFET. During the search process, ML ₁ and ML ₂ are both greater than VDD/2, and the output result Vout is high, indicating a match; otherwise, when the multi-level search query is inconsistent with the multi-level storage entry , the pulse width of V _SL is outside the matching range, ML ₁ or ML ₂ drops below VDD/2 during the search phase, and the output result Vout becomes low level, indicating a mismatch.

This embodiment fully and details the implementation of ACAM and MCAM based on pulse width modulation FeFET, using the complementary information of pulse width to realize the ACAM function. Compared with the traditional ACAM implementation, no additional transistors and MCAM are required in the unit. The complex analog peripheral circuit, and the encoding method of search query and storage entry based on pulse width can be quantized into MCAM with more bits to improve the storage density and search energy efficiency of CAM.

Finally, it should be noted that the purpose of the disclosed embodiments is to help further understand the present invention, but those skilled in the art can understand that various replacements and modifications can be made without departing from the spirit and scope of the present invention and the appended claims. It's all possible. Therefore, the present invention should not be limited to the content disclosed in the embodiments, and the protection scope of the present invention is subject to the scope defined in the claims.

Claims (4)

1. Realizing analog content addressable memoryA method for storing ACAM is characterized by comprising a CAM array composed of CAM cells, each CAM cell is composed of two N-type FeFETs, and the drain electrode of each FeFET is connected with two matching lines ML and ML _b The grid of the FeFET is connected with two search lines SL and SL _b The source of the FeFET is grounded, and in the CAM array, a row of CAM cells shares two match lines ML and ML _b ML and ML _b As two inputs of an and gate shared by the rows, the output of the and gate is the matching result Vout of the row; one column of CAM cells shares two search lines SL and SL _b The search signal SL and the reference signal Ref of each column are taken as two inputs of an exclusive OR gate shared by the columns, and the output of the exclusive OR gate is SL _b The method comprises the steps of carrying out a first treatment on the surface of the The precharge circuit is used for charging the two match lines of each row; in the programming of ACAM memory entry, a certain programming voltage is applied to the gates of two FeFETs of a CAM cell, and the two FEFETs are programmed to a certain threshold voltage V _TH1 And V _TH2 When the voltage VDD is applied to the gates of the two FeFETs, ML is precharged to VDD by a precharge circuit ₁ And ML (ML) ₂ Exhibits a discharge rate related to the FeFET threshold voltage, and discharges to VDD/2 for a time t, respectively ₁ And t ₂ In the searching stage, ML is first performed by a pre-charge circuit ₁ And ML (ML) ₂ Pre-charge to VDD, SL end application with a certain pulse width T _SL And the search voltage V with the amplitude of VDD _SL ，T _SL Corresponding to the size of the search query, the reference signal Ref has a width T _Ref The signal at SLb end is pulse width T _Ref -T _SL And the search voltage V with the amplitude of VDD _SLb When V _SL Pulse width T of (2) _SL Less than the discharge time t of the FeFET it acts on ₁ And V is _SLb Pulse width T of (2) _Ref -T _SL Less than the discharge time t of the FeFET it acts on ₂ During the search, ML ₁ And ML (ML) ₂ The voltage of (2) will not discharge below VDD/2 and the output of AND gate Vout will remain high, indicating a match, resulting in a match range of T _SL At T _Ref -t ₂ To t ₁ Between them; if V is _SL Is large in pulse width, T _SL Greater than t ₁ So that V _SL ML of acting FeFET ₁ Falling below VDD/2 during the search phase, or if V _SL Is small in pulse width, T _SL Less than T _Ref -t ₂ ，V _SLb ML of acting FeFET ₂ When the search stage falls below VDD/2, the output result Vout becomes low level in the search stage, which indicates no match, and ACAM matching operation is realized.

2. A method for realizing multi-value content addressable memory (ACAM) is characterized in that the ACAM as claimed in claim 1 is adopted to program CAM cells in an array into a plurality of non-overlapping pulse width matching ranges, the plurality of discrete pulse width matching ranges represent multi-stage entry states of MCAM, and V with corresponding pulse width is applied according to search query during search operation _SL When the multi-level search query is consistent with the multi-level storage entry, V _SL Is within a matching range such that V _SL And V _SLb The respective time of action on the FeFETs is less than the discharge time of the corresponding FeFET, ML during search ₁ And ML (ML) ₂ Are all larger than VDD/2, and the output result Vout is high level and indicates matching; otherwise, when the multi-level search query is inconsistent with the multi-level storage entry, V _SL Is outside the matching range, ML ₁ Or ML (ML) ₂ In the search stage, the output result Vout goes low, indicating a mismatch, and the MCAM matching operation is implemented.

3. The method of claim 1 or 2, wherein the FeFET is a MFMIS, MFIS, MFS-based device.

4. The method of claim 3, wherein the ferroelectric material of the FeFET is HfO ₂ Zr-doped or HfO-doped ₂ Al is doped.

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