CN116095199A - Multi-protocol access device based on FPGA - Google Patents
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Abstract
The invention provides a multi-protocol access device based on an FPGA, which belongs to the field of Internet of things systems and comprises an interface layer, a protocol layer and a control layer, wherein the interface layer is connected with an external radio frequency module, and data packets are transmitted between the external radio frequency module and the protocol layer; the protocol layer encapsulates the data packet and abstracts the protocol, transmits the data packet to the control layer, receives a feedback instruction of the control layer, processes the encapsulated and abstracted data packet into the data packet, and transmits the data packet to the interface layer; the control layer transmits the effective data load to the processor, receives the control instruction of the processor and issues a feedback instruction to the protocol layer. The invention can support the dynamic access and control of the radio frequency modules based on various communication protocols, encapsulates the communication protocols of the Internet of things in the model, provides a uniform operation interface, realizes the compatibility of the communication protocols, and ensures that the radio frequency modules are uniformly controlled by the processor so as to enable the dynamic load balance of the network resources of the Internet of things.
Description
Technical Field
The invention belongs to the field of internet of things systems, and particularly relates to a multi-protocol access device based on an FPGA.
Background
In the communication of the internet of things device, in order to meet the requirements under different application situations, there are various wireless communication protocols, such as LTE, zigBee, bluetooth, and the characteristics of the communication protocols of the internet of things are shown in fig. 1. In many application situations, there are multiple wireless communication protocols, and each communication module needs to communicate across protocols. The invention of application publication number CN105516185a discloses a multi-protocol gateway device, which is used for performing protocol conversion on received IP network information or home appliance information to make the received IP network information or home appliance information consistent with a protocol adopted by a port of a destination device, and then performing information transmission, and includes an IP network function module, a gateway device controller and a heterogeneous network protocol conversion module. The multi-protocol gateway device can solve the problem of difficult message transfer between devices with different communication media and different communication protocols. The invention of application publication number CN102448202A discloses a multi-protocol multi-interface wireless sensor network gateway, which relates to the technical field of wireless sensor networks, and mainly comprises an embedded processor, SDRAM, a Flash memory, a WiFi wireless radio frequency transceiver module, a ZigBee wireless radio frequency transceiver module, a GPRS module, a Bluetooth module, a GPS data acquisition module and an Ethernet interface control module, wherein an operating system uses a networked operating system Linux and is compatible with TCP/IP protocol IPv6. The patent completes conversion among various protocols by designing protocol conversion program processing, and can be used for constructing networks with various architectures, interconnection among the networks with various architectures and data forwarding. However, the problems of inconsistent data packet form, poor synchronism and the like are associated with the inter-protocol communication of each communication module, and the patent cannot solve the problems by adopting a method of route forwarding between different protocol networks. And the gateway has the problems of portability and poor expansibility.
Disclosure of Invention
Aiming at the technical problems existing in the prior art, the invention provides the multi-protocol access device based on the FPGA, which can support the dynamic access and control of the radio frequency modules based on various communication protocols, encapsulate the communication protocols of the Internet of things in a model, provide a uniform operation interface, enhance the expansibility of the Internet of things software and hardware systems of heterogeneous Internet of things systems, realize the compatibility of the communication protocols, and enable the dynamic load balance of the network resources of the Internet of things to be possible by uniformly controlling the radio frequency modules through the embedded processor.
The technical scheme adopted by the invention is as follows: a multi-protocol access device based on FPGA comprises an interface layer, a protocol layer and a control layer which are sequentially arranged,
the interface layer is used for connecting with an external radio frequency module, carrying out bus logic management on different interface protocols, transmitting data packets between the external radio frequency module and the protocol layers,
the protocol layer is used for identifying different interface protocols, carrying out initialization configuration on an external radio frequency module, carrying out effective load encapsulation and protocol abstraction on a data packet, transmitting the data packet to the control layer, receiving a feedback instruction of the control layer, processing the encapsulated effective load and the protocol abstract into the data packet, and transmitting the data packet to the interface layer;
the control layer is used for receiving the effective data load and the protocol abstract, carrying out state management on the effective data load, transmitting the effective data load to the processor, receiving a control instruction of the processor, and sending a feedback instruction to the protocol layer.
Further, the interface layer comprises a bus protocol logic management module and a bus protocol interface, the bus protocol logic management module is connected with a plurality of different bus protocol interfaces, the bus protocol interface is used for being connected with an external radio frequency module,
the protocol layer comprises a protocol stack, a load encapsulation module, an abstract protocol stack and an access equipment self-identification and initialization configuration module, wherein a plurality of protocol stacks are connected with the load encapsulation module, the load encapsulation module is connected with the abstract protocol stack, the access equipment self-identification and initialization configuration module and the protocol stack are connected with a bus protocol logic management module,
the control layer comprises a connection control module, a data transmission module, a state management module and a controller module, wherein the controller module is respectively connected with the connection control module, the data transmission module and the state management module, the state management module is respectively connected with the connection control module, the data transmission module and the access equipment self-identification and initialization configuration module, the connection control module and the data transmission module are both connected with the abstract protocol stack, and the controller module is used for connecting a processor.
Further, the protocol stacks are used for carrying out protocol analysis, disassembly of data packets and extraction of payloads on the input of the external radio frequency module, the number of the protocol stacks is multiple, and different types of protocols are processed respectively; the payload encapsulation module is used for carrying out fusion processing and unified encapsulation on the payloads extracted from the protocol stack; the abstract protocol stack is used for uniformly packaging different types of protocols in the protocol stack and providing a uniform interface for a control layer.
Further, the bus protocol interfaces are a plurality of UART interfaces, I2C interfaces, SPI interfaces, USB interfaces, mini PCIE interfaces.
Further, the access device automatic identification and initialization configuration module is used for identifying the model of the external radio frequency module and configuring the external radio frequency module through an XML file.
Furthermore, the controller module and the embedded processor adopt an on-chip connection mode or an external board-level connection mode.
Further, after the external radio frequency module is connected with the bus protocol interface, an interrupt signal corresponding to the bus protocol is generated, and the bus protocol logic management module processes the interrupt signal into a unified form and transmits the unified form to the access equipment self-identification and initialization configuration module; the access device sequentially sends a request command for entering a configuration mode to the external radio frequency module from the identification and initialization configuration module, reads an XML file corresponding to the external radio frequency module to configure the external radio frequency module after obtaining a correct response, and sends the access condition of the external radio frequency module to the state management module;
after the configuration of the external radio frequency module is finished, the input data packet is transmitted to a protocol stack through a bus protocol interface and a bus protocol logic management module, is transmitted to a data transmission module after being processed by the protocol stack, a load encapsulation module and an abstract protocol stack, and is transmitted to a processor through a controller module;
the processor performs logic operation according to a preset rule and a preset rule to form an information packet and a control instruction, and sends the information packet and the control instruction to the control layer, the data transmission module transmits the information packet to the protocol layer, the information packet is provided with the encapsulated and abstracted effective load data to be processed, and meanwhile, the data transmission module is connected with the control module to send a feedback instruction to the protocol layer according to the control instruction. The protocol layer processes the information packet into a data packet through the abstract protocol stack, the load packaging module and the protocol stack in sequence according to the feedback instruction, and then sends the data packet to the external radio frequency module through the interface layer.
Further, if the external radio frequency module which does not support hot plug is connected, the bus protocol logic management module sends an interrupt signal in a unified form after the multi-protocol access device is restarted.
Further, whether hot plug is supported is determined by the type of the bus protocol and the type of the external radio frequency module.
Further, the connection control module is used for establishing/switching/disconnecting connection between the device and the external radio frequency module; the data transmission module is used for receiving the effective data load from the protocol layer and sending the load to the data transmission module; the state management module is used for inquiring the working state of the device.
Compared with the prior art, the invention has the following beneficial effects:
1. compared with other multi-protocol gateway equipment, the invention adopts a layered structure, and definitely prescribes specific functional modules inside each layer and communication among each layer, thereby providing support for subsequent practical application. The communication mode and the transmitted content among all layers are definitely defined, and an interface is provided for the subsequent application based on the communication mode and the transmitted content. The layers are mutually independent, so that standardized interfaces are facilitated, and the maintenance of a model in the presence of update of a subsequent Internet of things communication protocol stack, a bus protocol and the like is facilitated.
2. The invention divides various functional modules aiming at specific functions in each layer, and each part has definite labor division and is convenient to realize. The access layer can support various bus protocols, and realizes the hot plug of certain communication modules, so that the equipment adopting the invention can freely access other existing Internet of things communication networks, can flexibly select the accessed modules and corresponding communication protocols, can select the corresponding types to be accessed by a specific module, has lower cost and higher flexibility compared with other fixed Internet of things gateways supporting the specific protocols, and can be accessed to the equipment based on the model again through the access layer after the subsequent new modules appear, thereby having stronger expansibility. The method comprises the steps of splitting specific data packets of various supported specific Internet of things communication protocols in a protocol layer, transmitting effective loads into a data transmission module of a control layer, adding a self-identification and initialization configuration module of equipment, classifying newly-accessed modules by the module, transmitting module state information to an upper layer, and transmitting specific configuration commands by using XML files in module initialization configuration, so that the configuration process is simpler. The state management module is added in the control layer, so that the opening and closing states, connection conditions and the like of the specific modules can be controlled more clearly and specifically.
3. The invention realizes the support of the hot plug of the access device to the access communication module and the automatic identification of the module, and enhances the portability of the Internet of things equipment. Payload compression at the protocol layer allows limited network bandwidth to transfer more useful information and increases protocol resolution speed. The hierarchical structure enables decoupling and encapsulation of the functionality of the modules to provide a unified and convenient interface for higher level applications. The functions, the transmission information and the transmission modes of all layers are definitely specified, and a unified hierarchical model is designed to realize cross-hierarchy dynamic analysis of different protocols and high-speed interconnection and interworking among different protocols.
4. The invention has two schemes of on-chip connection and external board-level connection for the connection mode of the control layer and the embedded processor, can select a more suitable connection mode from the aspects of cost, throughput and the like, and has stronger flexibility.
Drawings
Fig. 1 is a schematic diagram of features of a communication protocol of a common internet of things;
fig. 2 is a block diagram of an embodiment of the present invention.
In the figure: the system comprises a 1-bus protocol interface, a 2-bus protocol logic management module, a 3-access device self-identification and initialization configuration module, a 4-protocol stack, a 5-load encapsulation module, a 6-abstract protocol stack, a 7-state management module, an 8-connection control module, a 9-data transmission module, a 10-controller module, an 11-external radio frequency module and a 12-processor.
Detailed Description
The present invention will be described in detail below with reference to the drawings and the specific embodiments, so that those skilled in the art can better understand the technical solutions of the present invention.
The embodiment of the invention provides a multi-protocol access device based on an FPGA, which comprises an interface layer, a protocol layer and a control layer which are sequentially arranged as shown in figure 2.
The interface layer is used for connecting with the external radio frequency module 11, carrying out bus logic management on different interface protocols, and transmitting data packets between the external radio frequency module 11 and the protocol layers. The interface layer comprises a bus protocol logic management module 2 and a bus protocol interface 1, wherein the bus protocol logic management module 2 is connected with a plurality of different bus protocol interfaces 1, and the bus protocol interface 1 is used for being connected with an external radio frequency module 11. Each of the bus protocol interfaces 1 is adapted to a bus protocol, typically the bus protocol interface 1 comprises UART interfaces, I 2 C interface, SPI interface, USB interface, mini PCIE interface. Whether hot plug is supported is determined by the type of bus protocol and the model of the external rf module 11.
Electrical specification of interface layer: the device and the external radio frequency module 11 are connected and interconnected to meet the national standard of relevant electrical specifications so as to prevent problems in connection, safety and the like. Working mode: the interface layer has a master/slave switching function, and when adapting other bus protocols except UART, the device automatically switches to a master device working mode; when the UART bus protocol is adapted, the device is switched to a slave device working mode. Hot plug: when the accessed external radio frequency module 11 is adapted to USB and mini PCIE bus protocols, hot plug of the accessed radio frequency module is supported. Automatic identification: when the access equipment which does not support hot plug is accessed, the device scans different bus protocol access devices after being electrified so as to confirm the physical interface of an access module, the type of the device and the type of the supported bus protocol.
The protocol layer is configured to identify different interface protocols and perform initialization configuration on the external radio frequency module 11, and perform payload encapsulation and protocol abstraction on the data packet, and transmit the data packet to the control layer, and receive a feedback instruction from the control layer, and process the payload after encapsulation and protocol abstraction into the data packet, and transmit the data packet to the interface layer. The protocol layer comprises a protocol stack 4, a load encapsulation module 5, an abstract protocol stack 6 and an access equipment self-identification and initialization configuration module 3, wherein a plurality of the protocol stacks 4 are connected with the load encapsulation module 5, the load encapsulation module 5 is connected with the abstract protocol stack 6, and the access equipment self-identification and initialization configuration module 3 and the protocol stacks 4 are connected with the bus protocol logic management module 2. The protocol stack 4 is used for carrying out protocol analysis, disassembly of data packets and extraction of payloads on the input of the external radio frequency module 11, the number of the protocol stacks 4 is multiple, different types of protocols are processed respectively, and the model of the external radio frequency module 11 determines the wireless communication protocol adopted by the external radio frequency module. The payload encapsulation module 5 is configured to perform fusion processing and unified encapsulation on the payload extracted from the protocol stack 4. The abstract protocol stack 6 is used for uniformly packaging different types of protocols in the protocol stack 4, providing a uniform interface for a control layer, realizing the provision of a uniform interoperation interface, and shielding detail differences of each specific protocol stack 4 for the control layer. The automatic identification and initialization configuration module of the access device is used for identifying the model of the external radio frequency module 11 and configuring the external radio frequency module 11 through an XML file.
The control layer is configured to receive the payload and the protocol abstraction, perform state management on the payload, transmit the payload to the processor 12, receive a control instruction from the processor 12, and send a feedback instruction to the protocol layer. The control layer comprises a connection control module 8, a data transmission module 9, a state management module 7 and a controller module 10, wherein the controller module 10 is respectively connected with the connection control module 8, the data transmission module 9 and the state management module 7, the state management module 7 is respectively connected with the connection control module 8, the data transmission module 9 and the access equipment self-identification and initialization configuration module 3, the connection control module 8 and the data transmission module 9 are both connected with the abstract protocol stack 6, and the controller module 10 is used for connecting a processor 12. The connection control module 8 is used for establishing/switching/disconnecting connection between the device and the external radio frequency module 11; the data transmission module 9 is configured to receive and send payload from and to the protocol layer; the state management module 7 is used for inquiring the working state of the device, and the specific parameters displayed are different due to the difference of wireless communication protocols based on the accessed radio frequency module.
The controller module 10 and the embedded processor 12 are connected in an on-chip manner or an external board-level manner. When connected on-chip, the device is accessed as a special controller in the processor 12 in the form of an AXI bus or SRAM-like bus. When connected board-level, the device acts as a stand-alone chip, and is board-level connected to the processor 12. The specific communication protocol is not limited, and various common bus protocol interfaces 1 may be selected for implementation. When using I 2 C and when the SPI is used as a bus interface, the device side enters a slave device mode.
The content of the control layer can be loaded into a multi-protocol fusion communication device driver and a multi-protocol fusion communication tool library; the multi-protocol fusion communication device driver is compatible with a general Linux system environment, and provides a standardized API interoperation interface conforming to the POSIX standard for an application program; and the multi-protocol fusion communication tool library packages the application layer of the common operation of the Internet of things on the API of the driver on the basis of the driver, and shields the access details of the driver so as to realize decoupling of the application program of the Internet of things, the operating system and the hardware platform.
Interface layer and protocol layer connection details:
a) The connection mode is as follows: the connection between the interface layer and the protocol layer is an on-chip signal connection.
b) The signals are mainly divided into: data signals (bidirectional, interface layer < - > protocol layer), interface layer data signal responses (unidirectional, interface layer- > protocol layer), and protocol layer data signal responses (unidirectional, protocol layer- > interface layer).
c) Communication mode: the interface layer communicates with the protocol layer in an asynchronous manner. The protocol layer returns a response that the signal was correctly received immediately after the signal sent by the interface layer was received by the protocol layer. If the module self-identified signal is received, the protocol layer firstly transmits a correctly received response, and then the access equipment self-identified and initialized configuration module in the protocol layer processes the response and transmits the result to the control layer; if the external radio frequency module 11 receives the information signal, after sending the response of correct receiving, the signal is sent to the control layer by the protocol layer corresponding protocol stack 4, and then the payload encapsulation module 5 and the abstract protocol stack 6 sequentially pass through.
Details of protocol layer and control layer connections:
a) The connection mode is as follows: the connection between the control layer and the protocol layer is an on-chip signal connection.
b) The signals are mainly divided into: control signals (unidirectional, control layer- > protocol layer), control signal responses (unidirectional, protocol layer- > control layer), data signals (bidirectional, control layer- > protocol layer) and data signal responses (bidirectional, control layer- > protocol layer).
c) Communication mode: the control layer and protocol layer communication may use either synchronous or asynchronous means. In the synchronous mode, signals (control signals and data signals) sent by the control layer are received by the protocol layer, after the abstract protocol stack 6 finishes receiving and processing data, the control layer feeds back an execution result to the control layer through a response signal, and updates the state and sends an interrupt to the processor 12 after receiving the response signal to prompt that the processing is finished. The synchronous communication mode is suitable for low-delay operation. In the asynchronous mode, the signal protocol layer sent by the control layer returns a response immediately after receiving the signal, which indicates that the signal has been received correctly. The control layer, upon receiving the response, issues an interrupt signal to the processor 12 informing that the signal has been properly sent. When the request processing of the signal is completed, the protocol layer sends the processing result to the control layer again through the response signal. The control layer informs the processor 12 of the status inquiry by means of an interrupt signal, prompting the completion of the processing. Asynchronous communication is suitable for high-latency operations, such as establishing network connections, sending network data, etc.
The protocol layer actively transmits data or response signals to the control layer after receiving the network data to change state or write data into the received data buffer.
The following describes a specific use procedure of the embodiment through an access procedure of the external rf module 11 supporting hot plug:
after the external radio frequency module 11 accesses the bus protocol interface 1, it generates interrupt signals corresponding to the bus protocols, where the interrupt signals generated by different bus protocols are different, and each bus protocol corresponds to a specific interrupt signal. After the interrupt signal enters the bus protocol logic management module 2, the bus protocol logic management module 2 processes the interrupt signal into a unified form and transmits the unified form to the access equipment self-identification and initialization configuration module 3.
The access device self-identification and initialization configuration module 3 sequentially sends request commands for entering a configuration mode to all external radio frequency modules 11 connected with the access device, after obtaining correct response, the access device reads XML files corresponding to the external radio frequency modules 11 to configure the external radio frequency modules 11, and sends the access condition of the external radio frequency modules 11 to the state management module 7. The model of the corresponding external radio frequency module 11 can be judged by whether the correct response of the external radio frequency module 11 can be obtained, and the external radio frequency module 11 is identified.
After the configuration of the external radio frequency module 11 is completed, the input data packet is transmitted to the protocol stack 4 corresponding to the model and the bus protocol of the external radio frequency module 11 through the bus protocol interface 1 and the bus protocol logic management module 2, and is sequentially processed by the protocol stack 4, the load encapsulation module 5 and the abstract protocol stack 6, and then is transmitted to the data transmission module 9, and finally is transmitted to the processor 12 through the controller module 10.
The processor 12 performs logic operation according to preset rules according to the payload after encapsulation and abstraction to form an information packet and a control instruction, and sends the information packet and the control instruction to the control layer, the data transmission module 9 transmits the information packet to the protocol layer, the payload data after encapsulation and abstraction to be processed in the information packet is connected with the control module 8, and meanwhile, a feedback instruction is sent to the protocol layer according to the control instruction. The protocol layer processes the information packet into a data packet through the abstract protocol stack 6, the load encapsulation module 5 and the protocol stack 4 in sequence according to the feedback instruction, and then sends the data packet to the external radio frequency module 11 through the interface layer. If the inter-protocol communication is performed, each radio frequency module connected with the device responds to the inter-protocol communication through the embedded processor 12.
If the external radio frequency module 11 which does not support hot plug is connected, the device resets and restarts, the bus protocol logic management module 2 transmits a unified interrupt signal again, the module is automatically identified and configured, and various functions such as subsequent information transfer and the like are consistent with the connection of the module which supports hot plug. If the module which does not support the hot plug is to be removed, the module should be removed after the equipment is shut down. If multiple modules which do not support hot plug are to be accessed simultaneously, the processing mode of accessing one module is the same.
The device can realize unified access, data acquisition and transmission and instruction control of the external equipment of the Internet of things using various common wireless communication protocols such as 3GPP LTE protocol, IEEE 802.11g protocol, IEEE802.15.4, zigBee protocol, bluetooth protocol and the like. The device supports common physical interfaces based on protocols such as UART, I2C and SPI, provides abstract fusion of various wireless communication protocols, and provides a unified data transmission channel for application software, so that the application software can realize receiving and transmitting of payload data through the unified interfaces.
The device can realize the following functions:
1. the method comprises the steps of hot plug and self-identification of an external equipment radio frequency module, automatic initialization configuration of each radio frequency module, and state monitoring and management of each module, so that dynamic change of a wireless communication protocol is realized.
2. Different wireless communication protocol stacks 4 are identified, and data packets are automatically split and packaged, so that a unified interface is provided for controlling each communication module, and cross-protocol communication is simpler and more convenient.
3. The payload is passed into the embedded processor 12 in a unified form to facilitate subsequent logic operations in the processor 12 and formation and issuing of control instructions.
4. The dynamic plug and control of the external radio frequency module 11 improves the expansibility of the hardware system of the Internet of things, and the packaging of each level shields the internal details, so that the decoupling of the application program, the operating system and the hardware is realized.
The present invention has been described in detail by way of examples, but the description is merely exemplary of the invention and should not be construed as limiting the scope of the invention. The scope of the invention is defined by the claims. In the technical scheme of the invention, or under the inspired by the technical scheme of the invention, similar technical schemes are designed to achieve the technical effects, or equivalent changes and improvements to the application scope are still included in the protection scope of the patent coverage of the invention.
Claims (10)
1. The utility model provides a multiprotocol access device based on FPGA which characterized in that: comprises an interface layer, a protocol layer and a control layer which are sequentially arranged,
the interface layer is used for connecting with an external radio frequency module, carrying out bus logic management on different interface protocols, and transmitting data packets between the external radio frequency module and the protocol layers;
the protocol layer is used for identifying different interface protocols, carrying out initialization configuration on an external radio frequency module, carrying out effective load encapsulation and protocol abstraction on a data packet, transmitting the data packet to the control layer, receiving a feedback instruction of the control layer, processing the encapsulated effective load and the protocol abstract into the data packet, and transmitting the data packet to the interface layer;
the control layer is used for receiving the effective data load and the protocol abstract, carrying out state management on the effective data load, transmitting the effective data load to the processor, receiving a control instruction of the processor, and sending a feedback instruction to the protocol layer.
2. The FPGA-based multiprotocol access device of claim 1, wherein: the interface layer comprises a bus protocol logic management module and a bus protocol interface, wherein the bus protocol logic management module is connected with a plurality of different bus protocol interfaces, and the bus protocol interface is used for being connected with an external radio frequency module;
the protocol layer comprises a protocol stack, a load encapsulation module, an abstract protocol stack and an access equipment self-identification and initialization configuration module, wherein a plurality of protocol stacks are connected with the load encapsulation module, the load encapsulation module is connected with the abstract protocol stack, and the access equipment self-identification and initialization configuration module and the protocol stack are connected with a bus protocol logic management module;
the control layer comprises a connection control module, a data transmission module, a state management module and a controller module, wherein the controller module is respectively connected with the connection control module, the data transmission module and the state management module, the state management module is respectively connected with the connection control module, the data transmission module and the access equipment self-identification and initialization configuration module, the connection control module and the data transmission module are both connected with the abstract protocol stack, and the controller module is used for connecting a processor.
3. The FPGA-based multiprotocol access device of claim 2, wherein: the bus protocol interface is UART interface, I 2 And a plurality of C interfaces, SPI interfaces, USB interfaces and mini PCIE interfaces.
4. The FPGA-based multiprotocol access device of claim 2, wherein: the controller module and the embedded processor adopt an on-chip connection mode or an external board-level connection mode.
5. The FPGA-based multiprotocol access device of claim 2, wherein: the protocol stacks are used for carrying out protocol analysis, disassembly of data packets and effective load extraction on the input of the external radio frequency module, the number of the protocol stacks is multiple, and different types of protocols are processed respectively; the payload encapsulation module is used for carrying out fusion processing and unified encapsulation on the payloads extracted from the protocol stack; the abstract protocol stack is used for uniformly packaging different types of protocols in the protocol stack and providing a uniform interface for a control layer.
6. The FPGA-based multiprotocol access device of claim 2, wherein: the access equipment automatic identification and initialization configuration module is used for identifying the model of the external radio frequency module and configuring the external radio frequency module through an XML file.
7. The FPGA-based multiprotocol access device of claim 5, wherein: after the external radio frequency module is connected with the bus protocol interface, an interrupt signal corresponding to the bus protocol is generated, and the bus protocol logic management module processes the interrupt signal into a unified form and transmits the unified form to the access equipment self-identification and initialization configuration module; the access device sequentially sends a request command for entering a configuration mode to the external radio frequency module from the identification and initialization configuration module, reads an XML file corresponding to the external radio frequency module to configure the external radio frequency module after obtaining a correct response, and sends the access condition of the external radio frequency module to the state management module;
after the configuration of the external radio frequency module is finished, the input data packet is transmitted to a protocol stack through a bus protocol interface and a bus protocol logic management module, is transmitted to a data transmission module after being processed by the protocol stack, a load encapsulation module and an abstract protocol stack, and is transmitted to a processor through a controller module;
the processor performs logic operation according to a preset rule and a preset rule to form an information packet and a control instruction, and sends the information packet and the control instruction to the control layer, the data transmission module transmits the information packet to the protocol layer, the information packet is provided with the encapsulated and abstracted effective load data to be processed, and meanwhile, the data transmission module is connected with the control module to send a feedback instruction to the protocol layer according to the control instruction. The protocol layer processes the information packet into a data packet through the abstract protocol stack, the load packaging module and the protocol stack in sequence according to the feedback instruction, and then sends the data packet to the external radio frequency module through the interface layer.
8. The FPGA-based multiprotocol access device of claim 7, wherein: if an external radio frequency module which does not support hot plug is connected, the bus protocol logic management module sends an interrupt signal in a unified form after the multi-protocol access device is restarted.
9. The FPGA-based multiprotocol access device of claim 8, wherein: whether hot plug is supported is determined by the type of bus protocol and the model of the external radio frequency module.
10. The FPGA-based multiprotocol access device of claim 2, wherein: the connection control module is used for establishing/switching/disconnecting connection between the device and the external radio frequency module; the data transmission module is used for receiving the effective data load from the protocol layer and sending the load to the data transmission module; the state management module is used for inquiring the working state of the device.
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