CN116093217A - Micron light-emitting device and preparation method thereof - Google Patents
Micron light-emitting device and preparation method thereof Download PDFInfo
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0093—Wafer bonding; Removal of the growth substrate
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
- H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
- H01L27/156—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/08—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a plurality of light emitting regions, e.g. laterally discontinuous light emitting layer or photoluminescent region integrated within the semiconductor body
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/40—Materials therefor
- H01L33/42—Transparent materials
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Abstract
The invention relates to a micron luminescent device and a preparation method thereof, comprising the following steps: providing a driving substrate and a light emitting device layer, respectively; sequentially forming a first bonding layer and a second bonding layer on the first surface of the driving substrate; sequentially forming a third bonding layer and a fourth bonding layer on the first surface of the light-emitting device layer; patterning the second bonding layer and the fourth bonding layer respectively to form a first pattern layer on the second bonding layer and a second pattern layer on the fourth bonding layer; pre-bonding the first pattern layer and the second pattern layer to form a first pre-bonding structure; and annealing and pressurizing the first pre-bonding structure. The method provides a scheme for vertical stacking of full-color Micro-LEDs, and can solve the problems that the conventional bonding material cannot directly realize n-pole interconnection of pixels with the same color on a horizontal plane, the array etching difficulty is high, and the service life of the bonding material is short in the vertical stacking process.
Description
Technical Field
The application relates to the technical field of display devices, in particular to a light-emitting device capable of realizing micron and a preparation method thereof
Background
In the field of display devices, micro light emitting diodes (Micro-LEDs) have a wide prospect, and compared with the traditional display technology, the Micro light emitting diodes have great advantages in various aspects of light emitting mechanism, contrast ratio, service life, refresh rate, energy consumption and the like, and once the concept is proposed, the Micro light emitting diodes are greatly focused and gradually become a new generation of display technology, especially in the field of near-to-eye display application. The biggest difficulty faced in the current commercialization of Micro-LEDs is to realize the full color of Micro-LEDs. At present, the full-color Micro-LED scheme combines red, green and blue Light Emitting Diodes (LEDs) into one pixel on a horizontal plane, but the single pixel formed by the method has large area, and in addition, the red, green and blue Micro-LEDs are precisely transferred and arranged in a large area, so that the method has great difficulty.
In order to solve the above problems, the red, green and blue LEDs and the silicon-based driving circuit can be stacked, bonded and arrayed in a vertical direction by heterogeneous integration to form a single pixel, and theoretically, the technology can reduce the area of the single pixel by 1/3. The verticality of the pixels is the best way to achieve a high resolution display on a smaller footprint. To achieve integrated stacking of three-color LEDs in the vertical direction, one of the most critical steps is to find a transparent material to bond them. Silicon dioxide (SiO) 2 ) Transparent materials such as Polyimide (PI), SU8 photoresist and the like are one choice, but to realize full-color array of Micro-LEDs, a conductive layer needs to be deposited between the n poles of the LEDs in advance to realize n pole interconnection; in addition, in the subsequent arrayed etching process, siO 2 The etching difficulty is high, the realization in the process is more difficult, the PI and SU8 photoresist belongs to organic materials, and the service life of a display device can be influenced in the actual display process.
Disclosure of Invention
Based on this, it is necessary to address SiO in the prior art 2 The transparent materials of PI and SU8 photoresist can not directly realize n-pole interconnection in the Micro-LED array process, and SiO 2 Array etching difficulty is high, and service life of PI and SU8 photoresist is longShort-life problem, providing a micron light-emitting device and a preparation method thereof
In a first aspect, there is provided a method of manufacturing a micro light emitting device, the method comprising:
providing a driving substrate and a light emitting device layer, respectively;
sequentially forming a first bonding layer and a second bonding layer on the first surface of the driving substrate;
sequentially forming a third bonding layer and a fourth bonding layer on the first surface of the light-emitting device layer; wherein the first bonding layer, the second bonding layer, the third bonding layer and the fourth bonding layer are transparent conductive layers respectively;
Patterning the second bonding layer and the fourth bonding layer respectively to form a first pattern layer on the second bonding layer and a second pattern layer on the fourth bonding layer; wherein the patterns in the first pattern layer and the patterns in the second pattern layer are capable of nesting with each other;
pre-bonding the first pattern layer and the second pattern layer to form a first pre-bonding structure;
annealing and pressurizing the first pre-bonding structure to form a structure to be arrayed; the annealing temperature of the annealing and pressurizing treatment is lower than the forming environment temperature of the first bonding layer and the third bonding layer and higher than the forming environment temperature of the second bonding layer and the fourth bonding layer respectively;
and carrying out array processing on the structure to be arrayed.
In one embodiment, the forming a first bonding layer and a second bonding layer on the first surface of the driving substrate sequentially includes:
depositing a first bonding material on the first surface of the driving substrate in a first preset temperature environment to form a first bonding layer;
depositing a second bonding material on the first surface of the first bonding layer in a second preset temperature environment to form the second bonding layer;
And forming a third bonding layer and a fourth bonding layer on the first surface of the light-emitting device layer in sequence, wherein the third bonding layer and the fourth bonding layer comprise:
depositing a third bonding material on the first surface of the light emitting device layer in the first preset temperature environment to form the third bonding layer;
and depositing a fourth bonding material on the first surface of the third bonding layer in the second preset temperature environment to form the fourth bonding layer.
In one embodiment, the first bonding material, the second bonding material, the third bonding material, and the fourth bonding material are each a transparent conductive material, and the transparent conductive material includes at least one of indium tin oxide, indium gallium tin oxide, and zinc oxide transparent conductive material.
In one embodiment, the first preset temperature is 600 ℃ to 650 ℃; the second preset temperature is 25-35 ℃.
In one embodiment, before the patterning the second bonding layer and the fourth bonding layer, the patterning method includes:
and respectively carrying out thinning polishing treatment on the second bonding layer and the fourth bonding layer.
In one embodiment, the patterning the second bonding layer and the fourth bonding layer to form a first pattern layer on the second bonding layer and a second pattern layer on the fourth bonding layer respectively includes:
Spin-coating a first photoresist on the first surface of the second bonding layer to form a first photoresist layer;
spin-coating a second photoresist on the first surface of the fourth bonding layer to form a second photoresist layer;
exposing the first surface of the first photoresist layer through a first preset photomask to form a first development area;
exposing the first surface of the second photoresist layer through a second preset photomask to form a second development area;
etching after developing the first developing region to form the first pattern layer;
and etching after the second development area is developed to form the second pattern layer.
In one embodiment, before the pre-bonding the first pattern layer and the second pattern layer to form a first pre-bonding structure, the method includes:
respectively activating the first surface of the second bonding layer and the first surface of the fourth bonding layer; wherein the activation treatment comprises plasma activation treatment and high-activity sol soaking strengthening activation treatment.
In one embodiment, the annealing temperature in the annealing and pressurizing treatment is 550-600 ℃ and the annealing time is 0.5-3 h.
In one embodiment, the light emitting device layer is a red light emitting device layer, and the method further comprises:
providing a green light emitting device layer and a blue light emitting device layer, respectively;
sequentially forming a fifth bonding layer and a sixth bonding layer on the second surface of the red light-emitting device layer; wherein the first surface and the second surface of the red light emitting device layer are opposite;
sequentially forming a seventh bonding layer and an eighth bonding layer on the first surface of the green light-emitting device layer, and sequentially forming a ninth bonding layer and a tenth bonding layer on the second surface of the green light-emitting device layer; wherein the first surface and the second surface of the green light emitting device layer are opposite;
sequentially forming an eleventh bonding layer and a twelfth bonding layer on the first surface of the blue light-emitting device layer;
patterning the sixth bonding layer, the eighth bonding layer, the tenth bonding layer and the twelfth bonding layer respectively to form a third pattern layer on the sixth bonding layer, a fourth pattern layer on the eighth bonding layer, a fifth pattern layer on the tenth bonding layer and a sixth pattern layer on the twelfth bonding layer; wherein the patterns in the third pattern layer and the patterns in the fourth pattern layer can be nested with each other, and the patterns in the fifth pattern layer and the patterns in the sixth pattern layer can be nested with each other;
Pre-bonding the third pattern layer and the fourth pattern layer to form a second pre-bonding structure;
annealing and pressurizing the second pre-bonding structure;
pre-bonding the fifth pattern layer and the sixth pattern layer to form a third pre-bonding structure;
annealing and pressurizing the third pre-bonding structure to form a structure to be arrayed;
and carrying out array processing on the structure to be arrayed.
In a second aspect, a micro light emitting device is provided, and the micro light emitting device is prepared by using the preparation method of the micro light emitting device.
According to the preparation method of the micro light-emitting device and the micro light-emitting device, the first bonding layer and the second bonding layer are sequentially formed on the driving substrate, the third bonding layer and the fourth bonding layer are sequentially formed on the light-emitting device layer, the second bonding layer and the fourth bonding layer are subjected to patterning treatment to obtain the first pattern layer and the second pattern layer which can be mutually nested, the driving substrate and the light-emitting device layer are pre-bonded to form the first pre-bonding structure by utilizing the first pattern layer and the second pattern layer through a hydrophilic bonding method, and the first pre-bonding structure is subjected to annealing and pressurizing treatment, wherein at the moment, the annealing temperature is lower than the forming environment temperature of the first bonding layer and the third bonding layer and higher than the forming environment temperature of the second bonding layer and the fourth bonding layer respectively, and in the annealing and pressurizing process, the second bonding layer and the fourth bonding layer grow at high temperature so that bonding gaps are reduced, and bonding is tight; and the first bonding layer and the second bonding layer do not grow at the annealing temperature to protect the driving substrate and the light emitting device layer. The micro light emitting device is obtained after annealing and pressurizing treatment, the brightness of the micro light emitting device is not affected because the first bonding layer, the second bonding layer, the third bonding layer and the fourth bonding layer are transparent conductive layers, and the micro light emitting device is very beneficial to the n-pole interconnection of the subsequent pixel array because of being conductive materials, and in addition, the process is simpler to realize due to the characteristic of easy etching. After annealing and pressurizing to form the structure to be arrayed, the structure is arrayed to obtain the arrayed micron light emitting device.
Drawings
In order to more clearly illustrate the technical solutions of embodiments or conventional techniques of the present application, the drawings required for the descriptions of the embodiments or conventional techniques will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present application, and other drawings may be obtained according to these drawings without inventive effort for a person of ordinary skill in the art.
FIG. 1 is a flow chart of a method of fabricating a micro-light emitting device according to one embodiment;
FIGS. 2 a-2 f are schematic cross-sectional views of structures obtained at various steps in a method for fabricating a micro-light emitting device according to an embodiment;
fig. 3 is a flowchart of a method of manufacturing a micro light emitting device provided in another embodiment;
FIG. 4 is a flow chart of patterning steps in a method of fabricating a micro-light emitting device according to one embodiment;
fig. 5 is a flowchart of a method of manufacturing a micro light emitting device provided in yet another embodiment;
fig. 6 is a schematic cross-sectional structure of a micro light emitting device according to an embodiment.
Reference numerals illustrate:
110. a driving substrate; 111. a first bonding layer; 112. a second bonding layer; 113. a first pattern layer; 120. a light emitting device layer; 121. a third bonding layer; 122. a fourth bonding layer; 123. a second pattern layer; 210. a red light emitting device layer; 211. a fifth bonding layer; 212. a third pattern layer; 220. a green light emitting device layer; 221. a seventh bonding layer; 222. a fourth pattern layer; 223. a ninth bonding layer; 224. a fifth pattern layer; 230. a blue light emitting device layer; 231. an eleventh bonding layer; 232. and a sixth pattern layer.
Detailed Description
In order to facilitate an understanding of the present application, a more complete description of the present application will now be provided with reference to the relevant figures. Examples of the present application are given in the accompanying drawings. This application may, however, be embodied in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the description of the application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.
It will be understood that when an element or layer is referred to as being "on," "adjacent," "connected to," or "coupled to" another element or layer, it can be directly on, adjacent, connected, or coupled to the other element or layer, or intervening elements or layers may be present. In contrast, when an element is referred to as being "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" another element or layer, there are no intervening elements or layers present. It will be understood that, although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers, doping types and/or sections, these elements, components, regions, layers, doping types and/or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer, doping type or section from another element, component, region, layer, doping type or section. Thus, a first element, component, region, layer, doping type or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the present invention; for example, the first doping type may be made the second doping type, and similarly, the second doping type may be made the first doping type; the first doping type and the second doping type are different doping types, for example, the first doping type may be P-type and the second doping type may be N-type, or the first doping type may be N-type and the second doping type may be P-type.
Spatially relative terms, such as "under", "below", "beneath", "under", "above", "over" and the like, may be used herein to describe one element or feature's relationship to another element or feature as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use and operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements or features described as "under" or "beneath" other elements would then be oriented "on" the other elements or features. Thus, the exemplary terms "below" and "under" may include both an upper and a lower orientation. Furthermore, the device may also include an additional orientation (e.g., rotated 90 degrees or other orientations) and the spatial descriptors used herein interpreted accordingly.
As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and/or "comprising," and/or the like, specify the presence of stated features, integers, steps, operations, elements, components, or groups thereof, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, or groups thereof.
Embodiments of the invention are described herein with reference to cross-sectional illustrations that are schematic illustrations of idealized embodiments (and intermediate structures) of the invention, such that variations of the illustrated shapes due to, for example, manufacturing techniques and/or tolerances are to be expected. Thus, embodiments of the present invention should not be limited to the particular shapes of the regions illustrated herein, but rather include deviations in shapes that result, for example, from manufacturing techniques. For example, an implanted region shown as a rectangle typically has rounded or curved features and/or implant concentration gradients at its edges rather than a binary change from implanted to non-implanted regions. Also, a buried region formed by implantation may result in some implantation in the region between the buried region and the surface over which the implantation is performed. Thus, the regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the actual shape of a region of a device and are not intended to limit the scope of the invention.
Referring to fig. 1, the present invention provides a method for preparing a micro light emitting device, comprising the following steps:
step S11: a drive substrate and a light emitting device layer are provided, respectively.
The driving substrate may be a substrate of a silicon-based driving circuit, and the light emitting device layer may be an LED chip layer.
Step S12: and sequentially forming a first bonding layer and a second bonding layer on the first surface of the driving substrate.
As shown in fig. 2a, a first bonding layer 111 is first formed on a first surface of a driving substrate 110, and then a second bonding layer 112 is formed on the first surface of the first bonding layer 111. The first surface of the first bonding layer 111 is a surface of the first bonding layer 111 away from the driving substrate 110. The first bonding layer 111 and the second bonding layer 112 are transparent conductive layers, that is, the materials of the first bonding layer 111 and the second bonding layer 112 are transparent conductive materials, and the materials of the first bonding layer 111 and the second bonding layer 112 may be the same or different.
Step S13: and sequentially forming a third bonding layer and a fourth bonding layer on the first surface of the light-emitting device layer.
As shown in fig. 2b, the third bonding layer 121 is first formed on the first surface of the light emitting device layer 120, and then the fourth bonding layer 122 is formed on the first surface of the third bonding layer 121. The first surface of the third bonding layer 121 is a surface of the third bonding layer 121 remote from the light emitting device layer 120. The third bonding layer 121 and the fourth bonding layer 122 are transparent conductive layers, that is, the materials of the third bonding layer 121 and the fourth bonding layer 122 are transparent conductive materials, and the materials of the third bonding layer 121 and the fourth bonding layer 122 may be the same or different.
Step S14: and respectively carrying out graphical treatment on the second bonding layer and the fourth bonding layer so as to form a first pattern layer on the second bonding layer and form a second pattern layer on the fourth bonding layer.
As shown in fig. 2c, the second bonding layer 112 is patterned to form the first pattern layer 113, and fig. 2c only shows an example of the first pattern layer 113, and the first pattern layer 113 may have a rectangular cross section as shown in fig. 2c, or may have other shapes. As shown in fig. 2d, the fourth bonding layer 122 is patterned to form the second pattern layer 123, and fig. 2d only shows an example of the second pattern layer 123, and the first pattern layer 113 may have a rectangular cross section as shown in fig. 2d, or may have other shapes. It should be noted that, the patterns in the first pattern layer 113 and the patterns in the second pattern layer 123 can be nested with each other, that is, the front projection of the pattern formed by the first pattern layer 113 on the plane of the driving substrate 110 does not coincide with the front projection of the pattern formed by the second pattern layer 123 on the plane of the driving substrate 110. If the cross sections of the first pattern layer 113 and the second pattern layer 123 are respectively rectangular, the pattern layer has a height in the order of micrometers, a length in the order of centimeters, and a width in the order of millimeters.
Step S15: and pre-bonding the first pattern layer and the second pattern layer to form a first pre-bonding structure.
As shown in fig. 2e, the second pattern layer 123 is turned over to be opposite to the first pattern layer 113 and close to form a first pre-bonding structure, that is, a structure formed by sequentially connecting the light emitting device layer 120, the third bonding layer 121 and the second pattern layer 123 is turned over, so that the first surface of the light emitting device layer 120 is close to the first surface of the driving substrate 110 and far away from the second surface of the driving substrate 110, and the second surface of the driving substrate 110 is a surface opposite to the first surface on the driving substrate 110.
Optionally, the front projection of the pattern in the first pattern layer 113 on the plane of the driving substrate 110 is not coincident with the front projection of the pattern in the second pattern layer 123 on the plane of the driving substrate 110, and there is no intersecting line. With continued reference to fig. 2c, 2d, and 2e, the cross section of the first pattern layer 113 may be a plurality of first rectangles, and the interval between two adjacent first rectangles is y; the second pattern layer 123 may have a plurality of second rectangles with a length x, where the length x of the second rectangles is smaller than y, which means that when the first pre-bonding structure is formed, the first rectangles and the second rectangles are not bonded to each other and have gaps, and the first pre-bonding structure includes a plurality of gaps.
Step S16: and annealing and pressurizing the first pre-bonding structure to form a structure to be arrayed.
The annealing temperature of the annealing and the pressing treatment is lower than the forming environment temperature of the first bonding layer 111 and the third bonding layer 121, and higher than the forming environment temperature of the second bonding layer 112 and the fourth bonding layer 122. Since the annealing temperature is higher than the forming ambient temperature of the second bonding layer 112 and the fourth bonding layer 122, during the annealing and pressing processes, the first patterned layer 113 formed by patterning the second bonding layer 112 and the second patterned layer 123 formed by patterning the fourth bonding layer 122 will grow, i.e. the first rectangles and the second rectangles in fig. 2e will grow (x becomes larger and y becomes smaller) respectively, so that the gaps in the first pre-bonding structure will be narrowed (i.e. the gap width will be reduced to a minimum value), so that the bonding between the first patterned layer 113 and the second patterned layer 123 will be tighter, and the bonding strength will be enhanced, as shown in fig. 2f. The gaps do not disappear, but the width is extremely narrow, dehydration occurs when the first pattern layer 113 and the second pattern layer 123 grow at high temperature, and water molecules will be present in the gaps. And the annealing temperature is lower than the formation ambient temperature of the first bonding layer 111 and the third bonding layer 121 to ensure that the first bonding layer 111 and the third bonding layer 121 do not grow, thereby protecting the driving substrate 110 and the light emitting device layer 120.
Step S17: and carrying out array processing on the structure to be arrayed.
The array processing comprises the steps of sequentially carrying out array etching, hole filling, through hole, n-pole interconnection, encapsulation and the like on the structure to be arrayed.
In the above example, the first bonding layer 111 and the second bonding layer 112 are sequentially formed on the driving substrate 110, the third bonding layer 121 and the fourth bonding layer 122 are sequentially formed on the light emitting device layer 120, the second bonding layer 112 and the fourth bonding layer 122 are subjected to patterning treatment to obtain the first pattern layer 113 and the second pattern layer 123 which can be mutually nested, the driving substrate 110 and the light emitting device layer 120 are pre-bonded through the first pattern layer 113 and the second pattern layer 123 to form a first pre-bonding structure, and the first pre-bonding structure is subjected to annealing and pressurizing treatment, at this time, the annealing temperature is respectively lower than the forming environment temperature of the first bonding layer 111 and the third bonding layer 121 and higher than the forming environment temperature of the second bonding layer 112 and the fourth bonding layer 122, so that during the annealing and pressurizing, the second bonding layer 112 and the fourth bonding layer 122 grow at high temperature to reduce bonding gaps and compact bonding gaps; and the first bonding layer 111 and the second bonding layer 112 do not grow at the annealing temperature to protect the driving substrate 110 and the light emitting device layer 120. The micro light emitting device is obtained after annealing and pressurizing treatment, and the first bonding layer 111, the second bonding layer 112, the third bonding layer 121 and the fourth bonding layer 122 are transparent conductive layers, so that the brightness of the micro light emitting device is not affected, and the conductive materials are very beneficial to the n-pole interconnection of the subsequent pixel array, and in addition, the characteristic of easy etching can also make the realization of the process simpler. After annealing and pressurizing to form the structure to be arrayed, the structure is arrayed to obtain the arrayed micron light emitting device.
In one embodiment, step S12, sequentially forming a first bonding layer and a second bonding layer on the first surface of the driving substrate includes step S121 and step S122.
Step S121: and depositing a first bonding material on the first surface of the driving substrate in a first preset temperature environment to form the first bonding layer.
The first preset temperature is the forming ambient temperature of the first bonding layer in the above embodiment, the first preset temperature may be 600 ℃ to 650 ℃, and the first bonding material is a transparent conductive material. Optionally, the first bonding material may be at least one of transparent conductive materials such as indium tin oxide, indium gallium tin oxide, zinc oxide, and the like. The first bonding material may be deposited on the first surface of the drive substrate by at least one of electron beam evaporation, thermal evaporation, magnetic control sputtering. The thickness of the first bonding layer may be 70nm to 80nm.
Step S122: and depositing a second bonding material on the first surface of the first bonding layer in a second preset temperature environment to form the second bonding layer.
The second preset temperature is the forming ambient temperature of the second bonding layer in the above embodiment, the second preset temperature may be 25-35 ℃, and the second bonding material is a transparent conductive material. Optionally, the second bonding material may be at least one of transparent conductive materials such as indium tin oxide, indium gallium tin oxide, zinc oxide, and the like. The second bonding material may be the same as the first bonding material or may be different from the first bonding material, and is not limited herein. The first surface of the first bonding layer is a surface of the first bonding layer away from the driving substrate. The second bonding material may be deposited on the first surface of the first bonding layer by at least one of electron beam evaporation, thermal evaporation, magnetic control sputtering. The thickness of the second bonding layer is smaller than that of the first bonding layer, and the thickness of the second bonding layer may be 50nm to 60nm.
And step S13, sequentially forming a third bonding layer and a fourth bonding layer on the first surface of the light-emitting device layer, wherein the step S131 and the step S132 are included.
Step S131: and depositing a third bonding material on the first surface of the light-emitting device layer in the first preset temperature environment to form the third bonding layer.
The first preset temperature is the forming ambient temperature of the third bonding layer in the above embodiment, the first preset temperature may be 600 ℃ to 650 ℃, and the third bonding material is a transparent conductive material. Alternatively, the third bonding material may be at least one of transparent conductive materials such as indium tin oxide, indium gallium tin oxide, zinc oxide, and the like. The third bonding material may be deposited on the first surface of the light emitting device layer by at least one of electron beam evaporation, thermal evaporation, magnetic control sputtering. The thickness of the third bonding layer may be 70nm to 80nm.
Step S132: and depositing a fourth bonding material on the first surface of the third bonding layer in the second preset temperature environment to form the fourth bonding layer.
The second preset temperature is the forming ambient temperature of the fourth bonding layer in the above embodiment, the second preset temperature may be 25-35 ℃, and the fourth bonding material is a transparent conductive material. Optionally, the fourth bonding material may be at least one of transparent conductive materials such as indium tin oxide, indium gallium tin oxide, zinc oxide, and the like. The fourth bonding material may be the same as the third bonding material or may be different from the third bonding material, and is not limited herein. The first surface of the third bonding layer is a surface of the third bonding layer remote from the light emitting device layer. The fourth bonding material may be deposited on the first surface of the third bonding layer by at least one of electron beam evaporation, thermal evaporation, magnetic control sputtering. The thickness of the fourth bonding layer is smaller than that of the third bonding layer, and the thickness of the fourth bonding layer may be 50nm to 60nm.
Optionally, the annealing temperature in the annealing and pressing process is lower than a first preset temperature and higher than a second preset temperature. The annealing temperature can be 550-600 ℃, and the annealing time can be 0.5-3 h.
In the above example, the first preset temperature of the forming environment of the first bonding layer and the third bonding layer is higher than the second preset temperature of the environment of the second bonding layer and the fourth bonding layer, respectively, so the annealing temperature is set to be higher than the second preset temperature and lower than the first preset temperature, so that the second bonding layer and the fourth bonding layer grow to make bonding more compact in the annealing and pressurizing process; and the first bonding layer and the third bonding layer can not grow, and the thickness of the first bonding layer is larger than that of the second bonding layer, so that the first bonding layer can buffer the growth stress of the second bonding layer so as to protect the driving substrate, and the thickness of the third bonding layer is larger than that of the fourth bonding layer, so that the third bonding layer can buffer the growth stress of the fourth bonding layer so as to protect the light-emitting device layer.
In one embodiment, referring to fig. 3, step S1301 is further included before step S14, and step S1401 is further included before step S15.
Step S1301: and respectively carrying out thinning polishing treatment on the second bonding layer and the fourth bonding layer.
The thinning polishing treatment refers to reducing the surface roughness of the second bonding layer and the fourth bonding layer by using a mechanical, chemical or electrochemical action. Step S1301 is to perform thinning polishing treatment on the first surface of the second bonding layer and the first surface of the fourth bonding layer, so as to reduce the roughness of the first surface of the second bonding layer to less than 0.5nm, and reduce the roughness of the first surface of the fourth bonding layer to less than 0.5nm. The first surface of the second bonding layer is the surface of the second bonding layer far away from the first bonding layer, and the first surface of the fourth bonding layer is the surface of the fourth bonding layer far away from the third bonding layer. If the thinning polishing treatment is performed by a chemical mechanical polishing method, the polishing liquid may use extremely small sol particles to make the roughness smaller.
Step S1401: and respectively performing activation treatment on the first surface of the second bonding layer and the first surface of the fourth bonding layer.
Wherein the activation treatment comprises plasma activation treatment and high-activity sol soaking strengthening activation treatment. The first surface of the second bonding layer is the surface of the second bonding layer far away from the first bonding layer, and the first surface of the fourth bonding layer is the surface of the fourth bonding layer far away from the third bonding layer. The activation treatment is to make the first surface of the second bonding layer and the first surface of the fourth bonding layer more hydrophilic so as to enhance the bonding effect. The surface contact angles of the first surface of the second bonding layer and the first surface of the fourth bonding layer are reduced to 5 ° by the activation treatment, respectively. The high-activity sol soaking strengthening activation treatment is to use the high-activity sol to soak the second bonding layer and the fourth bonding layer. The sol is made of the same material as the second bonding material and the fourth bonding material, and the solvent can be at least one of indium tin oxide, indium gallium tin oxide and zinc oxide transparent conductive materials.
In the above example, the surface roughness of the second bonding layer and the fourth bonding layer is reduced by the thinning polishing treatment to make the surfaces of the second bonding layer and the fourth bonding layer smoother, and the surface contact angle of the second bonding layer and the fourth bonding layer is reduced by the activation treatment to make the surfaces of the second bonding layer and the fourth bonding layer more hydrophilic. The first pattern layer obtained after patterning the second bonding layer and the second pattern layer obtained after patterning the fourth bonding layer are bonded through thinning polishing treatment and activating treatment, so that the bonding strength is higher and the bonding is tighter.
As shown in fig. 4, in one embodiment, step S14, patterning the second bonding layer and the fourth bonding layer respectively to form a first pattern layer on the second bonding layer, and forming a second pattern layer on the fourth bonding layer includes steps S141 to S146.
Step S141: and spin-coating a first photoresist on the first surface of the second bonding layer to form a first photoresist layer.
The first photoresist can be positive photoresist or negative photoresist, and after the first photoresist is spin-coated on the first surface of the second bonding layer, the first photoresist is cured by baking to form a first photoresist layer.
Step S142: and spin-coating a second photoresist on the first surface of the fourth bonding layer to form a second photoresist layer.
The second photoresist can be positive photoresist or negative photoresist, and after the second photoresist is spin-coated on the first surface of the fourth bonding layer, the second photoresist is cured by baking to form a second photoresist layer. The first photoresist may be the same as or different from the second photoresist.
Step S143: and exposing the first surface of the first photoresist layer through a first preset photomask to form a first development area.
The first preset photomask is designed according to a preset first bonding area, a light-transmitting part on the first preset photomask is overlapped with the first bonding area, and a light-non-transmitting part on the first preset photomask is not the first bonding area. And placing a first preset photomask on the first surface of the first photoresist layer for exposure treatment, placing the first photoresist layer after the exposure treatment in a developing solution, reacting the developing solution on the light transmission position of the photoresist to form a first development area if the first photoresist is positive photoresist, increasing the light transmission position if the first photoresist is over-exposed, and increasing the range of the first development area, wherein the orthographic projection of the first bonding area on the plane of the driving substrate is positioned in the orthographic projection of the first development area on the plane of the driving substrate.
Step S144: and exposing the first surface of the second photoresist layer through a second preset photomask to form a second development area.
If the second photoresist is the same as the first photoresist, the second preset photomask is a nested photomask of the first preset photomask, namely, the light transmission position and the non-light transmission position are opposite. If the second photoresist is different from the first photoresist, the second preset photomask is the same as the first preset photomask. Taking the first photoresist as positive photoresist and the second photoresist as negative photoresist as an example, placing a second preset photomask on the first surface of the second photoresist layer for exposure treatment, and placing the exposed second photoresist layer in a developing solution. Because the first photoresist layer adopts positive photoresist and overexposure, and the second photoresist layer adopts negative photoresist and low-energy exposure, although the first photoresist layer and the second photoresist layer use the photomask with the same shape, the first development area and the second development area with the non-coincident projections on the plane of the driving substrate can be obtained, and gaps exist after the first pattern layer and the second pattern layer obtained in the later step are pre-bonded due to the enlargement of the first development area and the second development area caused by high exposure and low exposure.
Alternatively, a high energy exposure is used if the photoresist is a positive photoresist and a low energy exposure is used if the photoresist is a negative photoresist.
Step S145: and etching after developing the first developing area to form the first pattern layer.
And etching the second bonding layer positioned in the first development area by using high power of plasma, slowly etching the remaining second bonding layer by using a wet method, and smoothing the surface of the second bonding layer by using low power and low loss etching of the plasma. The high-power etching thickness is 40nm, and the wet etching thickness is 10-20nm. Finally, removing the residual first photoresist by using the photoresist removing solution to obtain a first pattern layer. The plasma etching adopts at least one of oxygen, nitrogen and argon as gas.
Step S146: and etching after the second development area is developed to form the second pattern layer.
And etching the fourth bonding layer positioned in the second development area by using high power of plasma, slowly etching the remaining fourth bonding layer by using a wet method, and smoothing the surface of the fourth bonding layer by using low power and low loss etching of plasma. The high-power etching thickness is 40nm, and the wet etching thickness is 10-20nm. Finally, removing the residual second photoresist by using the photoresist removing solution to obtain a second pattern layer. The plasma etching adopts at least one of oxygen, nitrogen and argon as gas.
In the above example, if the first photoresist is the same as the second photoresist, the first preset photomask and the second preset photomask which are completely nested may be used to perform development respectively to obtain the first development area and the second development area respectively; if the first photoresist and the second photoresist are different, the first preset photomask and the second preset photomask which are identical can be adopted for developing respectively to obtain a first developing area and a second developing area. The energy exposure modes adopted by different photoresists adopted by the first photoresist layer and the second photoresist layer are different, so that a certain distance exists between orthographic projections of the plane of the driving substrate and between the first developing region and the second developing region, and gaps exist between the first pattern layer and the second pattern layer after pre-bonding so as to facilitate the growth process in the subsequent annealing and pressurizing treatment.
As shown in fig. 5, in one embodiment, the light emitting device layer is a red light emitting device layer, and before the array processing is performed on the structure to be arrayed in step S17, the method for manufacturing the micro light emitting device further includes steps S21 to S30.
Step S21: a green light emitting device layer and a blue light emitting device layer are provided, respectively.
As shown in fig. 6, the red light emitting device layer 210, the green light emitting device layer 220, and the blue light emitting device layer 230 are LED chip layers, respectively.
Step S22: and sequentially forming a fifth bonding layer and a sixth bonding layer on the second surface of the red light-emitting device layer.
Wherein the first and second surfaces of the red light emitting device layer 210 are opposite. The first surface of the red light emitting device layer 210 may be a p-pole of the red light emitting device layer 210 and the second surface of the red light emitting device layer 210 may be an n-pole of the red light emitting device layer 210. That is, the p-electrode of the red light emitting device layer 210 is bonded to the driving substrate in steps S11 to S16. The fifth bonding layer 211 and the sixth bonding layer are transparent conductive materials, and the fifth bonding layer 211 and the sixth bonding layer may be at least one of indium tin oxide, indium gallium tin oxide, and zinc oxide transparent conductive materials, respectively.
Step S23: and sequentially forming a seventh bonding layer and an eighth bonding layer on the first surface of the green light-emitting device layer, and sequentially forming a ninth bonding layer and a tenth bonding layer on the second surface.
Wherein the first and second surfaces of the green light emitting device layer 220 are opposite. The first surface of the green light emitting device layer 220 may be a p-pole of the green light emitting device layer 220 and the second surface of the green light emitting device layer 220 may be an n-pole of the green light emitting device layer 220. The seventh bonding layer 221, the eighth bonding layer, the ninth bonding layer 223, and the tenth bonding layer are all transparent conductive materials, and the seventh bonding layer 221, the eighth bonding layer, the ninth bonding layer 223, and the tenth bonding layer may be at least one of indium tin oxide, indium gallium tin oxide, and zinc oxide transparent conductive materials, respectively.
Step S24: and sequentially forming an eleventh bonding layer and a twelfth bonding layer on the first surface of the blue light-emitting device layer.
The first surface of the blue light emitting device layer 230 may be the p-pole of the blue light emitting device layer 230. The eleventh bonding layer 231 and the twelfth bonding layer are both transparent conductive materials, and the eleventh bonding layer 231 and the twelfth bonding layer may be at least one of indium tin oxide, indium gallium tin oxide, and zinc oxide transparent conductive materials, respectively.
Step S25: and respectively carrying out graphical treatment on the sixth bonding layer, the eighth bonding layer, the tenth bonding layer and the twelfth bonding layer so as to form a third pattern layer on the sixth bonding layer, form a fourth pattern layer on the eighth bonding layer, form a fifth pattern layer on the tenth bonding layer and form a sixth pattern layer on the twelfth bonding layer.
Wherein the patterns in the third pattern layer 212 and the fourth pattern layer 222 can be nested with each other, and the patterns in the fifth pattern layer 224 and the sixth pattern layer 232 can be nested with each other. The step of the patterning process in step S25 may be the same as the step of step S14.
Step S26: and pre-bonding the third pattern layer and the fourth pattern layer to form a second pre-bonding structure.
The fourth pattern layer 222 is flipped over to be opposite to the third pattern layer 212 and close to form a second pre-bonding structure.
Step S27: and annealing and pressurizing the second pre-bonding structure.
The second pre-bonding structure may be placed in a bonding machine, a vacuum operation is performed on the bonding machine, the temperature of the thermally conductive graphite up and down in the bonding machine is raised, the pre-bonding region of the second pre-bonding structure is pressurized at the bonding temperature, and the bonding is maintained for a certain time to complete the p-electrode bonding of the green light emitting device layer 220 with the n-electrode bonding of the red light emitting device layer 210. The vacuum degree is about 1mtorr, the bonding temperature, i.e. the annealing temperature in the above examples is 550-600 ℃, the bonding pressure is 20000N, and the bonding time is 2h.
Step S28: and pre-bonding the fifth pattern layer and the sixth pattern layer to form a third pre-bonding structure.
The sixth patterned layer 232 is flipped over to be opposite and adjacent to the fifth patterned layer 224 to form a third pre-bond structure.
Step S29: and annealing and pressurizing the third pre-bonding structure to form a structure to be arrayed.
The p-electrode of the blue light emitting device layer 230 is bonded with the n-electrode of the green light emitting device layer 220 through the same annealing and pressurizing process as step S27 to form a micro light emitting device as shown in fig. 6.
Step S17: and carrying out array processing on the structure to be arrayed.
In the above example, the red light emitting device layer 210 is bonded on the driving substrate, the green light emitting device layer 220 is bonded on the red light emitting device layer 210, and the blue light emitting device layer 230 is bonded on the green light emitting device layer 220 to form a vertically stacked full-color Micro-LED wafer, which is bonded by using a transparent conductive material, thus greatly facilitating the subsequent Micro-LED array process and n-pole interconnection.
In one embodiment, a bonding structure of a micro light emitting device is also provided, and the micro light emitting device and the preparation method thereof are realized by applying the bonding structure.
In the above example, a first bonding layer and a second bonding layer are sequentially formed on the driving substrate, a third bonding layer and a fourth bonding layer are sequentially formed on the light emitting device layer, the second bonding layer and the fourth bonding layer are subjected to patterning treatment to obtain a first pattern layer and a second pattern layer which can be mutually nested, the driving substrate and the light emitting device layer are pre-bonded by using the first pattern layer and the second pattern layer through a hydrophilic bonding method to form a first pre-bonding structure, the first pre-bonding structure is subjected to annealing and pressurizing treatment, and at the moment, the annealing temperature is respectively lower than the forming environment temperature of the first bonding layer and the third bonding layer and higher than the forming environment temperature of the second bonding layer and the fourth bonding layer, so that the second bonding layer and the fourth bonding layer can grow at high temperature in the annealing and pressurizing process, and bonding gaps are reduced, and the bonding is tight; and the first bonding layer and the second bonding layer do not grow at the annealing temperature to protect the driving substrate and the light emitting device layer. The Micro light emitting device is obtained after annealing and pressurizing treatment, and the first bonding layer, the second bonding layer, the third bonding layer and the fourth bonding layer are transparent layers, so that the brightness of the Micro light emitting device is not affected, and in the subsequent full-color Micro-LED array process, the Micro light emitting device can be directly used as the n poles of red, green and blue LEDs to realize respective n pole interconnection, and then the formed full-color Micro-LED wafer is subjected to array etching, hole filling, through holes and electric interconnection to form the active driving full-color array Micro-LED.
It should be understood that, although the steps in the flowcharts of this application are shown in order as indicated by the arrows, these steps are not necessarily performed in order as indicated by the arrows. The steps are not strictly limited to the order of execution unless explicitly recited herein, and the steps may be executed in other orders. Moreover, at least a portion of the steps in each flowchart may include a plurality of steps or stages, which are not necessarily performed at the same time, but may be performed at different times, and the order of the steps or stages is not necessarily sequential, and may be performed in rotation or alternatively with at least a portion of the steps or stages in other steps or other steps.
In the description of the present specification, reference to the terms "some embodiments," "other embodiments," "desired embodiments," and the like, means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, schematic descriptions of the above terms do not necessarily refer to the same embodiment or example.
The technical features of the above embodiments may be arbitrarily combined, and for brevity, all of the possible combinations of the technical features of the above embodiments are not described, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.
The above examples only represent a few embodiments of the present application, which are described in more detail and are not to be construed as limiting the scope of the claims. It should be noted that it would be apparent to those skilled in the art that various modifications and improvements could be made without departing from the spirit of the present application, which would be within the scope of the present application. Accordingly, the scope of protection of the present application is to be determined by the claims appended hereto.
Claims (10)
1. A method of making a micro light emitting device, the method comprising:
providing a driving substrate and a light emitting device layer, respectively;
sequentially forming a first bonding layer and a second bonding layer on the first surface of the driving substrate;
sequentially forming a third bonding layer and a fourth bonding layer on the first surface of the light-emitting device layer; wherein the first bonding layer, the second bonding layer, the third bonding layer and the fourth bonding layer are transparent conductive layers respectively;
Patterning the second bonding layer and the fourth bonding layer respectively to form a first pattern layer on the second bonding layer and a second pattern layer on the fourth bonding layer; wherein the patterns in the first pattern layer and the patterns in the second pattern layer are capable of nesting with each other;
pre-bonding the first pattern layer and the second pattern layer to form a first pre-bonding structure;
annealing and pressurizing the first pre-bonding structure to form a structure to be arrayed; the annealing temperature of the annealing and pressurizing treatment is lower than the forming environment temperature of the first bonding layer and the third bonding layer and higher than the forming environment temperature of the second bonding layer and the fourth bonding layer respectively;
and carrying out array processing on the structure to be arrayed.
2. The method for manufacturing a micro light emitting device according to claim 1, wherein sequentially forming a first bonding layer and a second bonding layer on the first surface of the driving substrate comprises:
depositing a first bonding material on the first surface of the driving substrate in a first preset temperature environment to form a first bonding layer;
Depositing a second bonding material on the first surface of the first bonding layer in a second preset temperature environment to form the second bonding layer;
and forming a third bonding layer and a fourth bonding layer on the first surface of the light-emitting device layer in sequence, wherein the third bonding layer and the fourth bonding layer comprise:
depositing a third bonding material on the first surface of the light emitting device layer in the first preset temperature environment to form the third bonding layer;
and depositing a fourth bonding material on the first surface of the third bonding layer in the second preset temperature environment to form the fourth bonding layer.
3. The method of manufacturing a micro light emitting device according to claim 2, wherein the first bonding material, the second bonding material, the third bonding material, and the fourth bonding material are respectively transparent conductive materials including at least one of indium tin oxide, indium gallium tin oxide, and zinc oxide.
4. The method of manufacturing a micro light emitting device according to claim 2, wherein the first preset temperature is 600 ℃ to 650 ℃; the second preset temperature is 25-35 ℃.
5. The method of manufacturing a micro light emitting device according to claim 1, wherein before patterning the second bonding layer and the fourth bonding layer, respectively, comprises:
And respectively carrying out thinning polishing treatment on the second bonding layer and the fourth bonding layer.
6. The method of manufacturing a micro light emitting device according to claim 1, wherein patterning the second bonding layer and the fourth bonding layer to form a first pattern layer on the second bonding layer and a second pattern layer on the fourth bonding layer, respectively, comprises:
spin-coating a first photoresist on the first surface of the second bonding layer to form a first photoresist layer;
spin-coating a second photoresist on the first surface of the fourth bonding layer to form a second photoresist layer;
exposing the first surface of the first photoresist layer through a first preset photomask to form a first development area;
exposing the first surface of the second photoresist layer through a second preset photomask to form a second development area;
etching after developing the first developing region to form the first pattern layer;
and etching after the second development area is developed to form the second pattern layer.
7. The method of manufacturing a micro light emitting device according to claim 1, wherein before the pre-bonding the first pattern layer and the second pattern layer to form a first pre-bonding structure, the method comprises:
Respectively activating the first surface of the second bonding layer and the first surface of the fourth bonding layer; wherein the activation treatment comprises plasma activation treatment and high-activity sol soaking strengthening activation treatment.
8. The method of manufacturing a micro light emitting device according to claim 1, wherein the annealing temperature is 550 ℃ to 600 ℃ and the annealing time is 0.5h to 3h in the annealing and pressurizing treatment.
9. The method of manufacturing a micro light emitting device according to claim 1, wherein the light emitting device layer is a red light emitting device layer, the method further comprising:
providing a green light emitting device layer and a blue light emitting device layer, respectively;
sequentially forming a fifth bonding layer and a sixth bonding layer on the second surface of the red light-emitting device layer; wherein the first surface and the second surface of the red light emitting device layer are opposite;
sequentially forming a seventh bonding layer and an eighth bonding layer on the first surface of the green light-emitting device layer, and sequentially forming a ninth bonding layer and a tenth bonding layer on the second surface of the green light-emitting device layer; wherein the first surface and the second surface of the green light emitting device layer are opposite;
sequentially forming an eleventh bonding layer and a twelfth bonding layer on the first surface of the blue light-emitting device layer;
Patterning the sixth bonding layer, the eighth bonding layer, the tenth bonding layer and the twelfth bonding layer respectively to form a third pattern layer on the sixth bonding layer, a fourth pattern layer on the eighth bonding layer, a fifth pattern layer on the tenth bonding layer and a sixth pattern layer on the twelfth bonding layer; wherein the patterns in the third pattern layer and the patterns in the fourth pattern layer can be nested with each other, and the patterns in the fifth pattern layer and the patterns in the sixth pattern layer can be nested with each other;
pre-bonding the third pattern layer and the fourth pattern layer to form a second pre-bonding structure;
annealing and pressurizing the second pre-bonding structure;
pre-bonding the fifth pattern layer and the sixth pattern layer to form a third pre-bonding structure;
and annealing and pressurizing the third pre-bonding structure to form a structure to be arrayed.
10. A micro light emitting device, characterized in that it is manufactured by applying the manufacturing method of the micro light emitting device according to any one of claims 1 to 9.
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