CN116087733A

CN116087733A - Method for positioning failure point on semiconductor structure and method for manufacturing jig

Info

Publication number: CN116087733A
Application number: CN202310074661.8A
Authority: CN
Inventors: 陈家宝
Original assignee: Changxin Memory Technologies Inc
Current assignee: Changxin Memory Technologies Inc
Priority date: 2023-01-16
Filing date: 2023-01-16
Publication date: 2023-05-09

Abstract

The present disclosure relates to a method for positioning a failure point on a semiconductor structure and a method for manufacturing a jig, wherein the method for positioning the failure point on the semiconductor structure comprises: providing a jig; acquiring failure coordinates of failure points on a target device; the jig is close to the target device; and marking the corresponding position on the target device according to the retrieved positioning point corresponding to the failure coordinate. According to the method and the device, the specific position of the failure coordinate is directly positioned through the jig corresponding to the position of the target device, the specific position of the failure coordinate on the target device is not needed to be determined through the number of normally-closed contacts, the time consumed for finding the failure point on the target device according to the failure address grabbed on the electrical testing equipment in the pre-step before the delamination slice detection is reduced, the possibility of electrical result deviation caused by the irradiation duration of the electron beam received by the target device is reduced, and meanwhile, positioning is provided for the subsequent positioning and sample cutting step, and the difficulty of the subsequent detection step is reduced.

Description

Method for positioning failure point on semiconductor structure and method for manufacturing jig

Technical Field

The disclosure relates to the technical field of semiconductors, and in particular relates to a method for positioning failure points on a semiconductor structure and a method for manufacturing a jig.

Background

When failure analysis is performed currently, after the failure address is captured on the electrical test equipment, the delamination slice is required to find the specific defect position finally.

Before the delamination slice detection, a failure point needs to be found on the target device according to the failure address grabbed on the electrical test equipment in the pre-step, when the address of the bit line or the word line is longer, the time required for finding the failure point can be obviously increased, the irradiation duration of the electron beam received by the corresponding target device can be increased, and the electrical result deviation of the target device is easily caused.

Disclosure of Invention

The following is a summary of the subject matter of the detailed description of the present disclosure. This summary is not intended to limit the scope of the claims.

In order to overcome the problems in the related art, the present disclosure provides a method for positioning a failure point on a semiconductor structure and a method for manufacturing a jig.

The embodiment of the disclosure provides a method for positioning a failure point on a semiconductor structure, which comprises the following steps: providing a jig, wherein the jig is provided with a plurality of positioning points defined by the determined coordinates, and the positioning points are distributed at intervals in an array shape; acquiring failure coordinates of failure points on a target device; and transferring the target device to a detection machine, approaching the jig to the target device, and searching the positioning point corresponding to the failure coordinate on the jig.

According to some embodiments of the disclosure, the obtaining the failure coordinates of the failure point on the target device includes: and determining the failure point on the target device through a nano probe sample pricking test, and acquiring the coordinate of the failure point.

According to some embodiments of the disclosure, the approaching the jig to the target device includes: and fixing the jig above the target device, wherein each positioning point on the jig only corresponds to one failure point on the target device, or the area between a plurality of adjacent positioning points on the jig only corresponds to one failure point on the target device.

According to some embodiments of the disclosure, the retrieving the anchor point on the jig corresponding to the failure coordinates includes: and determining positioning points consistent with the failure coordinates or a plurality of positioning points corresponding to the failure coordinates and positioned on the periphery of the failure coordinates on the jig.

According to some embodiments of the disclosure, after the locating point corresponding to the failure coordinate is retrieved on the jig, a corresponding position is marked on the target device according to the retrieved locating point corresponding to the failure coordinate.

According to some embodiments of the disclosure, marking the corresponding location on the target device according to the retrieved location point corresponding to the failure coordinate includes: and setting a plurality of position identification points on the target device, wherein each position identification point corresponds to the positioning point corresponding to the failure coordinate.

According to some embodiments of the disclosure, the marking the corresponding location on the target device includes: removing part of entities corresponding to the corresponding positions on the target device on the jig; and fixing part of the entity removed from the jig on the target device to be used as the mark of the corresponding position.

In a second aspect of the embodiments of the present disclosure, there is provided a method for detecting a semiconductor structure, the method for detecting a semiconductor structure including: determining the area where the failure point is located through a mark corresponding to the positioning point on the target device; and detecting the area where the failure point is located.

According to some embodiments of the present disclosure, the determining the failure point location by the mark on the target device corresponding to the positioning point includes: locating a marked location boundary on the target device, the failure point being located at a central location within the marked location boundary.

According to some embodiments of the disclosure, the detecting the failure point includes: and carrying out scanning electron microscope observation and/or nano probe electrical test and/or transmission electron microscope slicing photographing on the failure point.

According to some embodiments of the disclosure, the photographing the point of failure with a radio electron microscope slice includes: plating platinum on the surface of the jig, and slicing together with the jig.

In a third aspect of the disclosed embodiments, a jig is provided, where the jig includes a plurality of positioning shafts that are crisscrossed and equally spaced apart, and a positioning point is formed at a junction of the crisscrossed positioning shafts.

In a fourth aspect of the embodiments of the present disclosure, a method for manufacturing a jig is provided, where the method for manufacturing a jig includes: providing a substrate; determining locating points and locating point coordinates according to the word line width and/or bit line width and/or peripheral contact spacing of the target device; and removing part of the matrix, wherein the rest of the matrix is in a grid shape, and the positioning points are positioned at criss-cross positions of the rest of the matrix.

According to some embodiments of the disclosure, removing a portion of the substrate, and remaining the substrate in a grid shape includes: and removing part of the matrix through ion etching, so that the rest of the matrix is in a grid shape, and the grid intervals of the rest of the matrix are consistent with the peripheral contact intervals of the target device.

According to some embodiments of the present disclosure, the grid on the substrate in a grid shape corresponds to a location of a failure point on the target device.

According to some embodiments of the disclosure, after removing a portion of the substrate and making the rest of the substrate into a grid shape, a marking layer is covered on the substrate, and a material of the marking layer has hot melt.

The technical scheme provided by the embodiment of the disclosure can comprise the following beneficial effects: the fixture corresponding to the position of the target device is used for directly positioning the specific position of the failure coordinate, the number of normally-closed contacts is not required to be counted to determine the specific position of the failure coordinate on the target device, the time required for finding the failure point on the target device according to the failure address grabbed on the electrical testing equipment in the pre-step before the delamination slice detection is reduced, the possibility of electrical result deviation caused by the irradiation duration of the electron beam borne by the target device is reduced, and meanwhile, positioning is provided for the subsequent positioning and sample cutting step, and the difficulty of the subsequent detection step is reduced.

It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure. Other aspects will become apparent upon reading and understanding the accompanying drawings and detailed description.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the invention and together with the description, serve to explain the principles of the invention.

FIG. 1 is a flow chart illustrating a method of locating a failure point on a semiconductor structure, according to an exemplary embodiment.

Fig. 2 is a schematic diagram showing a layout of normally closed contacts according to an exemplary embodiment.

Fig. 3 is a schematic structural view of a jig according to an exemplary embodiment.

FIG. 4 is a schematic diagram illustrating a setpoint coverage failure point in accordance with an exemplary embodiment.

FIG. 5 is a schematic diagram illustrating the exposure of a void of a robot on the top of a failure point, according to an example embodiment.

Fig. 6 is a flow chart illustrating a method of locating a failure point on a semiconductor structure, according to an exemplary embodiment.

Fig. 7 is a flowchart illustrating a method of detecting a semiconductor structure according to an exemplary embodiment.

Fig. 8 is a flowchart illustrating a method of fabricating a jig according to an exemplary embodiment.

Fig. 9 is a schematic diagram illustrating a cut trace layout according to an example embodiment.

Reference numerals

1. A substrate; 11. a normally closed contact; 12. a failure point; 2. a jig; 21. positioning a shaft; 22. a longitudinal grid axis; 23. a transverse grid axis; 24. positioning points; 3. a block of tungsten material; 4. a full tungsten sampling needle; 5. marking lines; 6. a base; 61. cutting marks; 62. a marking layer.

Detailed Description

For the purpose of making the objects, technical solutions and advantages of the embodiments of the present disclosure more apparent, the technical solutions in the disclosed embodiments will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present disclosure, and it is apparent that the described embodiments are some embodiments of the present disclosure, but not all embodiments. Based on the embodiments in this disclosure, all other embodiments that a person skilled in the art would obtain without making any inventive effort are within the scope of protection of this disclosure. It should be noted that, without conflict, the embodiments of the present disclosure and features of the embodiments may be arbitrarily combined with each other.

As described in the background art, before the delamination slice detection, a failure point needs to be found on the target device according to the failure address captured on the electrical test device in the pre-step, when the address of the bit line or the word line is longer, the time required for finding the failure point will obviously increase, the irradiation duration of the electron beam received by the corresponding target device will also increase, and the electrical result deviation of the target device is easily caused.

According to the method for locating the failure point on the semiconductor structure and the method for manufacturing the jig, the jig corresponding to the position of the target device is used for directly locating the specific position of the failure coordinate, the number of normally-closed contacts is not required to be used for determining the specific position of the failure coordinate on the target device, the time required for finding the failure point on the target device according to the failure address grabbed on the electrical testing equipment in the pre-step before the delamination slice detection is reduced, the possibility of electrical result deviation caused by the irradiation duration of the electron beam received by the target device is reduced, meanwhile, the positioning is provided for the subsequent positioning and sample cutting step, and the difficulty of the subsequent detection step is reduced.

In an exemplary embodiment of the disclosure, a method for positioning a failure point on a semiconductor structure and a method for manufacturing a jig are provided, as shown in fig. 1, fig. 1 is a flowchart illustrating a method for positioning a failure point on a semiconductor structure according to an exemplary embodiment; fig. 2 is a schematic diagram showing a normally closed contact layout according to an exemplary embodiment; FIG. 3 is a schematic diagram of a jig according to an example embodiment; FIG. 4 is a schematic diagram illustrating a setpoint coverage failure point in accordance with an exemplary embodiment; FIG. 5 is a schematic illustration of the exposure of a void of a robot on the top of a failure point, according to an example embodiment; FIG. 6 is a flowchart illustrating a method of locating a failure point on a semiconductor structure, in accordance with an exemplary embodiment; FIG. 7 is a flowchart illustrating a method of detecting a semiconductor structure, according to an exemplary embodiment; FIG. 8 is a flowchart illustrating a method of fabricating a jig according to an example embodiment; fig. 9 is a schematic diagram illustrating a cut trace layout according to an example embodiment. The following is explained in connection with fig. 1 to 9.

The following description is given for the purpose of facilitating understanding of the present embodiment by those skilled in the art, and is not intended to limit the scope of the present invention to the particular embodiments described below.

Referring to fig. 1, a method for locating a failure point on a semiconductor structure according to an exemplary embodiment of the present disclosure includes:

s100, providing a jig, wherein the jig is provided with a plurality of positioning points defined by the determined coordinates, and the positioning points are distributed at intervals in an array shape.

For example, referring to fig. 3, the jig 2 is in a grid shape with a contour consistent with the shape of the target device to be measured, the positioning points 24 are distributed at the physical structure intersection of the grid-shaped jig 2 at equal intervals, and the physical structure intersection of the grid-shaped jig 2 only has the positioning points 24, and all the positioning points 24 on the jig 2 have coordinates which are determined and unique relative to the sharp corners on the jig 2.

In this embodiment, one sharp angle of the jig 2 is used as a reference base for the positions of all positioning points 24 on the jig 2, and in other embodiments, the reference base for determining the position coordinates of the positioning points 24 may also be a certain positioning point 24 on the jig 2, or a certain point of the external operation position with a fixed relative position relationship with the jig 2.

The locating points 24 are distributed at the staggered parts of the solid structures of the grid-shaped jig 2 at equal intervals, so that the locating points 24 are regularly distributed, namely, the coordinates of the locating points 24 are regularly changed, the locating points 24 are convenient to find and locate, the using difficulty of the jig 2 is reduced, and meanwhile, the manufacturing difficulty of the jig 2 is also reduced.

S200, acquiring failure coordinates of failure points on the target device.

Referring to fig. 2 and 3, an exemplary target device includes a substrate 1 and normally-closed contacts 11 located on the substrate 1, where the substrate 1 is used to carry and support the normally-closed contacts 11, the substrate 1 has a plurality of normally-closed contacts 11, and the normally-closed contacts 11 are distributed in an array shape at equal intervals, each normally-closed contact 11 on the substrate 1 has a determined and unique coordinate, a failure point 12 to be detected exists in the normally-closed contacts 11, and by electrically testing the normally-closed contacts 11 on the substrate 1, the position of the failure point 12 in the normally-closed contacts 11 is determined, and the coordinate of the failure point 12 is recorded.

In the present embodiment, one sharp corner of the substrate 1 is used as a reference base for the position of all normally-closed contacts 11 on the substrate 1, and in other embodiments, the reference base for determining the position coordinates of the normally-closed contacts 11 on the substrate 1 may also be a point where a certain normally-closed contact 11 on the substrate 1, or an external operation position is fixed in a relative positional relationship with the substrate 1.

By determining the position coordinates of normally-closed contacts 11 regularly distributed on the substrate 1, the specific normally-closed contacts 11 can be conveniently searched and positioned, namely, the failure point 12 can be effectively and accurately positioned after the failure point 12 is found through an electrical test, so that the position of the failure point 12 relative to other normally-closed contacts 11 is determined, the possibility that the position relation between the failure point 12 and other normally-closed contacts 11 cannot be extracted at any time after the failure point 12 is found is reduced, the positioning range of the failure point 12 is shortened, and the possibility that the found failure point 12 is lost is reduced.

S300, transferring the target device to a detection machine, approaching the jig to the target device, and searching positioning points corresponding to failure coordinates on the jig.

For example, referring to fig. 3 and 4, after electrical testing, the normally-closed contacts 11 on the substrate 1 are fixed on the detection machine along with the substrate 1, the jig 2 is square with the same size as the outline of the substrate 1, the intervals between the adjacent positioning points 24 on the jig 2 are consistent with the intervals between the adjacent normally-closed contacts 11 on the substrate 1, the reference basis of the positioning points 24 on the jig 2 is a sharp angle of the jig 2, and the reference basis of the normally-closed contacts 11 on the substrate 1 is a sharp angle of the substrate 1. The sharp angle serving as a reference basis on the jig 2 is correspondingly overlapped with the sharp angle serving as the reference basis on the substrate 1 up and down, so that the jig 2 covers the substrate 1 in the vertical direction, the locating point 24 on the jig 2 is positioned above the normally closed contact 11 on the substrate 1 in the vertical direction and covers the normally closed contact 11, the top surface of the substrate 1 on one side of the normally closed contact 11 is exposed from a cavity between adjacent locating points 24 on the grid-shaped jig 2, namely, the locating points 24 on the jig 2 are in one-to-one correspondence with the normally closed contacts 11 on the substrate 1, and the locating point 24 on the jig 2 corresponding to the coordinates of the failure point 12 on the substrate 1 can be directly obtained by bringing the obtained coordinates of the failure point 12 into a coordinate file of the locating point 24 on the jig 2, and the normally closed contact 11 below the locating point 24 is the failure point 12 to be detected on the substrate 1.

In this embodiment, the substrate 1 with the normally closed contact 11 needs to be transferred to a detection machine to perform a subsequent detection step, the substrate 1 is separated from a reference object used for locating the failure point 12 during an electrical test after transfer, the failure point 12 can no longer be found quickly and accurately on the premise of not indicating the reference object, and the determined coordinates of the failure point 12 are brought into a coordinate file of a locating point 24 on the jig 2, because the jig 2 corresponds to a reference base of the substrate 1 and the locating point 24 corresponds to a position of the normally closed contact 11, the position of the failure point 12 is located below the locating point 24 on the jig 2 corresponding to the position coordinates of the failure point 12, and the position of the failure point 12 can be quickly and accurately relocated through the locating point 24 on the jig 2, so that the subsequent detection step is convenient, and the time consumption for locating the failure point 12 again is reduced.

It should be understood that, referring to fig. 4, the positioning points 24 on the jig 2 are located above the normally-closed contacts 11 on the substrate 1 in the vertical direction and cover the normally-closed contacts 11, and the top surface of the substrate 1 on one side of the normally-closed contacts 11 is exposed from the cavity between the adjacent positioning points 24 on the grid-shaped jig 2, that is, the one-to-one correspondence between the positioning points 24 on the jig 2 and the normally-closed contacts 11 on the substrate 1 is only one specific implementation, and in other embodiments, it may also be that: referring to fig. 5, the normally-closed contacts 11 are exposed from the hollows between the adjacent positioning points 24 on the grid-shaped jig 2, and the positioning points 24 cover the top surface of the substrate 1 on one side of the normally-closed contacts 11 in the vertical direction, that is, every four positioning points 24 enclose a normally-closed contact 11 in the vertical direction.

In an exemplary embodiment of the present disclosure, referring to fig. 2, step S200, acquiring failure coordinates of a failure point on a target device specifically includes:

and determining the failure point 12 on the target device through a nano probe sample pricking test, and acquiring the coordinates of the failure point 12.

The electrical test is performed by probing the normally-closed contacts 11 on the substrate 1 one by one through the nano-probe, an abnormal point of an electrical test result is found in the process of probing the nano-probe one by one, the position of the normally-closed contact 11 where the abnormal point is located is the failure point 12 to be detected, and the coordinates of the abnormal normally-closed contact 11 relative to the reference base of the substrate 1 are determined through the word line, the bit line and other normally-closed contacts 11 on the substrate 1.

In this embodiment, the normally closed contacts 11 on the substrate 1 are individually probed by the nano probes to find the failure points 12 with abnormal electrical test results, the detection range is comprehensive and the detection results are accurate, so that the possibility of missing the failure points 12 or the possibility of overlarge positioning range of the failure points 12 is reduced. In addition, the word line, the bit line and the normal normally closed contact 11 used for determining the coordinates of the failure point 12 are all inherent devices on the substrate 1, so that the obtained coordinates of the failure point 12 by taking the word line, the bit line and the other normal normally closed contacts 11 as references are accurate and stable, the possibility that the coordinates of the failure point 12 are changed due to the influence of the environment or the outside is reduced, the difficulty of the subsequent marking and detecting processes is reduced, and the stability of the whole test is improved.

In an exemplary embodiment of the present disclosure, referring to fig. 2 and 3, step S300, bringing a jig close to a target device specifically includes:

the jig is fixed above the target device, and each positioning point on the jig corresponds to only one failure point on the target device, or the area between the adjacent positioning points on the jig corresponds to only one failure point on the target device.

Illustratively, referring to fig. 2 and 3, an all-tungsten sampling needle 4 is fixed at the edge of the jig 2, and the jig 2 is moved over the substrate 1 and fixed at the current position by controlling the all-tungsten sampling needle 4. The fixture 2 and the all-tungsten sampling needle 4 are connected and fixed through welding of the tungsten material block 3, and the fixture 2 can be fixed relative to the substrate 1 through fixing the all-tungsten sampling needle 4.

Referring to fig. 4 and 5, the positioning points 24 on the jig 2 are located above the normally-closed contacts 11 on the substrate 1 in the vertical direction and cover the normally-closed contacts 11, and the top surface of the substrate 1 on one side of the normally-closed contacts 11 is exposed from the cavities between the adjacent positioning points 24 on the grid-shaped jig 2, namely, the positioning points 24 on the jig 2 are in one-to-one correspondence with the normally-closed contacts 11 on the substrate 1. Or, the normally-closed contact 11 is exposed from a cavity between adjacent positioning points 24 on the grid-shaped jig 2, and the positioning points 24 cover the top surface of the substrate 1 on one side of the normally-closed contact 11 in the vertical direction, namely every four positioning points 24 surround the normally-closed contact 11 in the vertical direction.

It should be understood that, in the above-mentioned embodiment, each four positioning points 24 in the vertical direction enclose a normally-closed contact 11, and in other embodiments, according to the structure of the jig 2, three adjacent positioning points 24 may enclose a normally-closed contact 11 in the vertical direction, or according to the position change of the jig 2 relative to the substrate 1, the normally-closed contact 11 is located between two adjacent positioning points 24 in the vertical direction. Similarly, the above-mentioned implementation of fixing the jig 2 relative to the substrate 1 by fixing the all-tungsten sampling needle 4 is only one specific embodiment, and in other embodiments, the jig 2 and the substrate 1 may be welded to the all-tungsten sampling needle 4 simultaneously by tungsten welding.

In an exemplary embodiment of the present disclosure, referring to fig. 4 and 5, step S300 of retrieving, on a jig, a positioning point corresponding to a failure coordinate specifically includes:

and determining positioning points consistent with the failure coordinates or a plurality of positioning points corresponding to the failure coordinates and positioned at the periphery of the failure coordinates on the jig.

For example, referring to fig. 4 and 5, when the jig 2 is located above the substrate 1 and the locating point 24 on the jig 2 covers the normally-closed contact 11 on the substrate 1 in the vertical direction, step S300 is to retrieve the locating point 24 corresponding to the failure coordinate on the jig 2 specifically as follows: a locating point 24 consistent with the failure coordinates is determined on the jig 2. When the jig 2 is located above the substrate 1, and the positioning points 24 on the jig 2 cover the top surface of the substrate 1 around the normally-closed contact 11 in the vertical direction, and the top surface of the normally-closed contact 11 is exposed from between the four adjacent positioning points 24, the step S300 of retrieving the positioning points corresponding to the failure coordinates on the jig specifically includes: and determining four positioning points which correspond to the failure coordinates and are positioned at the periphery of the failure coordinates on the jig.

In an exemplary embodiment of the disclosure, referring to fig. 1, step S300 is performed to transfer a target device to a detection machine, approach a jig to the target device, and perform step S400 after searching a positioning point corresponding to a failure coordinate on the jig: and marking the corresponding position on the target device according to the retrieved positioning point corresponding to the failure coordinate.

For example, referring to fig. 4 and 5, the normally closed contact 11 below the positioning point 24 on the jig 2 corresponding to the coordinates of the failure point 12 on the substrate 1 is the failure point 12 to be detected on the substrate 1, and the marking line 5 is scored on the substrate 1 around the failure point 12 by the all-tungsten sampling needle 4.

In this embodiment, the rectangular frame surrounding the failure point 12 is marked by scribing the rectangular frame on the substrate 1 through the all-tungsten sampling needle 4, and the range of the rectangular frame is determined according to the working condition and the subsequent detection requirement, for example, the rectangular frame may be a normally closed contact 11 only surrounding the failure point 12, or may be a normally closed contact 11 surrounding a part of the periphery of the failure point 12.

Through the mark line 5 formed on the substrate 1 after the positioning of the jig 2, the target device can be quickly and accurately positioned to the position of the failure point 12 on different testing machines, the time consumption for positioning the failure point 12 when the target device is tested on different testing machines is reduced, and the whole detection time is shortened.

In an exemplary embodiment of the present disclosure, referring to fig. 4 and 5, in step S400, marking a corresponding location on a target device according to the retrieved location point corresponding to the failure coordinate specifically includes:

and setting a plurality of position identification points on the target device, wherein each position identification point corresponds to a positioning point corresponding to the failure coordinate.

Illustratively, referring to fig. 4 and 5, a plurality of position recognition points are scribed below the retrieved positioning point 24 corresponding to the failure coordinates by the all-tungsten sampling needle 4, and a closed rectangular mark line 5 surrounding the positioning point 24 is formed by connecting all the position recognition points.

In this embodiment, the rectangular frame surrounding the failure point 12 is marked by scribing the rectangular frame on the substrate 1 through the all-tungsten sampling needle 4, and the range of the rectangular frame is determined according to the working condition and the subsequent detection requirement, for example, the rectangular frame may be a normally closed contact 11 only surrounding the failure point 12, or may be a part of a normally closed contact 11 surrounding the periphery of the failure point 12.

The mark line 5 formed on the substrate 1 after the positioning of the jig 2 enables the target device to be positioned to the position of the failure point 12 quickly and accurately on different test machines, reduces the time consumption for positioning the failure point 12 when the target device is tested on different test machines, and shortens the whole detection time.

It should be appreciated that the above-described scoring of the marking line 5 on the substrate 1 around the failure point 12 by the all-tungsten sampling needle 4 is only one specific embodiment, and that the failure point 12 may be marked in other ways in other embodiments.

In an exemplary embodiment of the present disclosure, referring to fig. 7, in step S400, marking, on a target device, a corresponding position according to the retrieved positioning point corresponding to the failure coordinate specifically includes:

s410, removing partial entities corresponding to the corresponding positions on the target device on the jig.

S420, fixing a part of the entity removed from the jig on the target device, and using the part of the entity as a mark of a corresponding position.

For example, referring to fig. 4 and 5, a part of the outer wall of the jig 2 is detached by focusing an ion beam process and deposited on the substrate 1 to form a mark around the failure point 12, and the detached part of the outer wall of the jig 2 may be a marking material previously covered on the jig 2, so that the jig 2 can be reused; part of the structural entity of the jig 2 can be also adopted to reduce the preliminary preparation steps and shorten the time consumption for positioning the failure point 12.

In a second aspect of the embodiments of the present disclosure, a method for detecting a semiconductor structure is provided, and referring to fig. 7, the method for detecting a semiconductor structure includes:

s100, determining the area where the failure point is located through a mark corresponding to the positioning point on the target device.

S200, detecting the area where the failure point is located.

For example, referring to fig. 4 and 5, a region of the substrate 1 on which the rectangular mark line 5 is scribed is searched and selected on the test machine, and after the rectangular mark line 5 is positioned to enclose the region, the region is selected for detection.

In this embodiment, the mark line 5 formed on the substrate 1 after the positioning of the jig 2 enables the target device to be quickly and accurately positioned to the position of the failure point 12 on different test machines, so that the time required for positioning the failure point 12 when the target device is tested on different test machines is reduced, and the overall detection time is shortened.

In an exemplary embodiment of the present disclosure, referring to fig. 4 and 5, step S100, determining a failure point location through a mark corresponding to a positioning point on a target device specifically includes:

the marked location boundary on the target device is located and the failure point is located at a central location within the marked location boundary.

For example, referring to fig. 4 and 5, the jig 2 is located above the substrate 1, and when the normally-closed contact 11 on the substrate 1 is covered by the positioning point 24 on the jig 2 in the vertical direction, only one normally-closed contact 11 with complete outline is enclosed by the marking line 5, and the normally-closed contact 11 is the failure point 12 to be detected. When the jig 2 is located above the substrate 1, the locating points 24 on the jig 2 cover the top surface of the substrate 1 around the normally closed contacts 11 in the vertical direction, and when the top surface of the normally closed contacts 11 is exposed from between the four adjacent locating points 24, three normally closed contacts 11 distributed at intervals along a straight line exist in the area surrounded by the marking line 5, the normally closed contacts 11 located at the middle position in the three normally closed contacts 11 are failure points 12 to be detected, and the other two normally closed contacts 11 are normal normally closed contacts 11 or normally closed contacts 11 to be detected in the non-current step.

In this embodiment, limiting the failure point 12 to be detected to the middle position of the rectangular area surrounded by the marking line 5 can more comprehensively expose the failure point 12 in the subsequent detection step, so as to obtain a more comprehensive detection result, and meanwhile, the area limited by the marking line 5 also has a normal normally closed contact 11, and the normal normally closed contact 11 can be used for comparison in the detection process of the failure point 12, so as to obtain a more accurate detection result. For the detection step of the part needing to execute the sectioning operation, for the detection of the failure point 12 needing to be sectioned, the failure point 12 is positioned in the middle area, so that the sectioning difficulty can be reduced; for the detection of the area except the area needing to be cut off the failure point 12, the failure point 12 is positioned in the middle area, so that the possibility of accidental injury of the failure point 12 can be reduced, and the accuracy of a detection result is ensured.

In an exemplary embodiment of the present disclosure, referring to fig. 4 and 5, step S200 of detecting a failure point specifically includes:

and (3) carrying out scanning electron microscope observation and/or nano probe electrical test and/or transmission electron microscope slicing photographing on the failure point.

Illustratively, step S200 of photographing the failure point by electron microscope includes: plating platinum on the surface of the jig, and slicing together with the jig.

In this embodiment, the jig 2 and the substrate 1 are welded on the all-tungsten sampling needle 4 at the same time in a tungsten welding manner, that is, the jig 2 and the substrate 1 are relatively fixed, the jig 2 is interfered when the substrate 1 is sliced, the steps of heating, removing the jig 2 and the like are involved in the process of removing the jig 2, the steps are complicated, the substrate 1 and the normally-closed contact 11 on the substrate 1 are easily damaged in the heating process, therefore, platinum is plated on the surface of the jig 2 above the area limited by the mark line 5, and the jig 2 is sliced together when the substrate 1 is sliced to make a sample, so that the damage to the substrate 1 is reduced, and the accuracy of the subsequent detection result is ensured. When the slicing position is positioned at the joint of the jig 2 and the substrate 1, the jig 2 with the slicing can be selected to perform section sample preparation analysis; when the dicing site is located at a position where the jig 2 is separated from the substrate 1, it is possible to select the jig 2 after dicing from the substrate 1 (with the failure point 12) and perform the cross-sectional sample analysis only on the substrate 1 with the failure point 12.

In a third aspect of the embodiments of the present disclosure, referring to fig. 2 and 3, a jig is provided, where the jig includes a plurality of positioning shafts 21 that are crisscrossed and distributed at equal intervals, and positioning points 24 are formed at the junctions of the crisscrossed positioning shafts 21.

Illustratively, the positioning shaft 21 includes a longitudinal grid shaft 22 and a transverse grid shaft 23, the longitudinal grid shaft 22 being disposed along the length of the bit line on the substrate 1, the transverse grid shaft 23 being disposed along the length of the word line on the substrate 1, and the positioning points 24 forming intersections with the longitudinal grid shaft 22 and the transverse grid shaft 23.

In this embodiment, the longitudinal grid shaft 22 is disposed along the length direction of the bit line on the substrate 1, and the transverse grid shaft 23 is disposed along the length direction of the word line on the substrate 1, so that both the longitudinal grid shaft 22 and the transverse grid shaft 23 can extend along the arrangement direction of the normally closed contacts 11 on the substrate 1, each positioning point 24 can cover the normally closed contacts 11 in the vertical direction, or each positioning point 24 can cover the top surface of the substrate 1 on one side of the normally closed contacts 11 in the vertical direction, the distribution mode of the positioning points 24 is consistent with or corresponds to the distribution direction of the normally closed contacts 11, so that the position of the failure point 12 on the jig can be conveniently located through the coordinates of the failure point 12 on the detection machine after the electrical test of the normally closed contacts 11, no matter whether the positioning point 24 is located right above the normally closed contacts 11 in the connection process of the jig and the substrate 1, the region of the failure point 12 can be accurately found through the coordinates of the failure point 12, and the region is surrounded and covered by one or more regularly distributed positioning points 24.

In an exemplary embodiment of the present disclosure, the positioning shaft 21 is made of tungsten.

Illustratively, the jig formed by the positioning shaft 21 made of tungsten has high hardness, is not easy to deform and can resist high temperature, and meanwhile, when the substrate 1 and the normally-closed contact 11 are subjected to slicing photographing by a transmission electron microscope, the jig made of tungsten can be subjected to slicing sample preparation together with the substrate 1 without interfering with the final detection result.

In an exemplary embodiment of the present disclosure, referring to fig. 3 and 5, the outer diameter of the positioning shaft 21 is consistent with the contact spacing on the target device.

Illustratively, the interval between two adjacent normally-closed contacts 11 on the target device is d, the outer diameter=d of the positioning shaft 21, and the positioning shaft 21 covers the top surface of the substrate 1 between the two normally-closed contacts 11 in the vertical direction, and the normally-closed contacts 11 are exposed from the middle of an area surrounded by four positioning points 24 distributed in rectangular four corners.

When the jig is used: four positioning points 24 corresponding to the failure coordinates and located at the periphery of the failure coordinates are determined on the jig, and marking lines 5 are marked on the substrate 1 around the four failure points 12 through the all-tungsten sampling needle 4, specifically: the number of the marking lines 5 is four, two opposite ones of the four marking lines 5 penetrate through three adjacent normally closed contacts 11, and two other opposite ones of the four marking lines 5 extend along the edge of one complete normally closed contact 11, so that a rectangular area to be tested, which surrounds the three complete normally closed contacts 11 distributed along a straight line, is finally formed, and the failure point 12 is located at the middle position of the area to be tested, namely, one of the three normally closed contacts 11 is located in the middle.

In a fourth aspect of the embodiments of the present disclosure, a method for manufacturing a jig is provided, and referring to fig. 8, the method for manufacturing a jig includes:

s100, providing a matrix.

S200, determining positioning points and positioning point coordinates according to the word line width and/or bit line width and/or peripheral contact spacing of the target device.

S300, removing part of the matrix, wherein the rest matrix is in a grid shape, and positioning points are positioned at criss-cross positions of the rest matrix.

For example, referring to fig. 2 and 9, the base 6 is a rectangular and flat plate, the distance between two adjacent normally-closed contacts 11 on the substrate 1 is obtained through the design data of the target device, so that the layout of the normally-closed contacts 11 on the substrate 1 is drawn, the base 6 is cut according to the layout of the normally-closed contacts 11 on the substrate 1, the cutting trace 61 corresponding to the position of the normally-closed contacts 11 is formed on the base 6, the cutting trace 61 is a rectangle with the same size and the same outline as the normally-closed contacts 11, and after the solid structure of part of the base 6 inside the cutting trace 61 is removed, the grid-shaped jig shown in fig. 3 is formed, wherein the positioning points 24 are located at the criss-cross positions on the grid-shaped jig.

In an exemplary embodiment of the present disclosure, referring to fig. 3 and 9, step S300, removing a portion of the substrate, where the remaining substrate is in a grid shape specifically includes: and removing part of the matrix by ion etching to enable the residual matrix to be in a grid shape, wherein the grid intervals of the residual matrix are consistent with the peripheral contact intervals of the target device.

Illustratively, the substrate 6 is trimmed by an ion beam into pieces that conform to the contours of the target device and are the same size, and portions of the substrate 6 physical structure inside the scribe line 61 are removed by an etching process. The physical structure of the part of the substrate 6 in the cutting mark 61 can be removed by selecting an etching process, the processing process can be controlled by a program, the labor force is liberated, the precision is higher than that of manual operation, the cavity of the formed grid-shaped jig is more accurate and corresponds to the failure point 12 or the top surface of the substrate 1, and the subsequent test error caused by insufficient precision of the jig is reduced.

In an exemplary embodiment of the present disclosure, referring to fig. 2 and 3, the grid on the grid-like substrate 6 corresponds to the location of the failure point 12 on the target device.

Illustratively, when the edge of the jig is aligned with the edge of the substrate 1 in the vertical direction, the top surface of the normally-closed contact 11 is exposed from the hollow space on the grid-shaped base body 6, that is, every four positioning points 24 distributed in rectangular sharp corners surround one normally-closed contact 11.

In an exemplary embodiment of the disclosure, referring to fig. 8, step S300 is performed to remove a portion of the substrate, and after the remaining substrate is in a grid shape, step S400 is performed: and covering the substrate with a marking layer, wherein the material of the marking layer has hot melt.

For example, referring to fig. 5 and 9, the marking layer 62 is made of platinum, and the marking layer 62 covers the top and bottom surfaces of the substrate 6 and the outer wall of the substrate 6 exposed after the dicing mark is removed.

In this embodiment, by focusing the ion beam process, the ion beam bombards a certain position on the substrate 6, so that the platinum mark layer 62 on the bombarded position on the substrate 6 can be melted and falls on the substrate 1 below the current position on the substrate 6, and marks are formed around the failure point 12 on the substrate 1, so as to indicate the position of the failure point 12. The substrate 6 bombarded with the ion beam can be used for further localization of the failure point 12 on the next substrate 1 after re-platinization.

Other embodiments of the disclosure will be apparent to those skilled in the art from consideration of the specification and practice of the disclosure disclosed herein. This disclosure is intended to cover any adaptations, uses, or adaptations of the disclosure following the general principles of the disclosure and including such departures from the present disclosure as come within known or customary practice within the art to which the disclosure pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the disclosure being indicated by the following claims.

It is to be understood that the present disclosure is not limited to the precise arrangements and instrumentalities shown in the drawings, and that various modifications and changes may be effected without departing from the scope thereof. The scope of the present disclosure is limited only by the appended claims.

Claims

1. The method for positioning the failure point on the semiconductor structure is characterized by comprising the following steps of:

providing a jig, wherein the jig is provided with a plurality of positioning points defined by the determined coordinates, and the positioning points are distributed at intervals in an array shape;

acquiring failure coordinates of failure points on a target device;

and transferring the target device to a detection machine, approaching the jig to the target device, and searching the positioning point corresponding to the failure coordinate on the jig.

2. The method for locating a failure point on a semiconductor structure according to claim 1, wherein the obtaining the failure coordinates of the failure point on the target device includes: and determining the failure point on the target device through a nano probe sample pricking test, and acquiring the coordinate of the failure point.

3. The method of claim 1, wherein said positioning the jig proximate to the target device comprises:

and fixing the jig above the target device, wherein each positioning point on the jig only corresponds to one failure point on the target device, or the area between a plurality of adjacent positioning points on the jig only corresponds to one failure point on the target device.

4. The method of claim 1, wherein retrieving the anchor point on the jig corresponding to the failure coordinate comprises:

and determining positioning points consistent with the failure coordinates or a plurality of positioning points corresponding to the failure coordinates and positioned on the periphery of the failure coordinates on the jig.

5. The method according to claim 1, wherein after the positioning points corresponding to the failure coordinates are retrieved from the jig, the corresponding positions are marked on the target device according to the retrieved positioning points corresponding to the failure coordinates.

6. The method of claim 5, wherein marking the corresponding location on the target device according to the retrieved location point corresponding to the failure coordinate comprises: and setting a plurality of position identification points on the target device, wherein each position identification point corresponds to the positioning point corresponding to the failure coordinate.

7. The method of claim 5, wherein marking the corresponding location on the target device comprises:

removing part of entities corresponding to the corresponding positions on the target device on the jig;

and fixing part of the entity removed from the jig on the target device to be used as the mark of the corresponding position.

8. A method for inspecting a semiconductor structure, the method comprising: determining the area where the failure point is located through a mark corresponding to the positioning point on the target device;

and detecting the area where the failure point is located.

9. The method of claim 8, wherein determining the location of the failure point by a mark on the target device corresponding to the location point comprises: locating a marked location boundary on the target device, the failure point being located at a central location within the marked location boundary.

10. The method of claim 9, wherein detecting the failure point comprises: and carrying out scanning electron microscope observation and/or nano probe electrical test and/or transmission electron microscope slicing photographing on the failure point.

11. The method of claim 8, wherein said taking a picture of said failure point by electron emission microscopy sections comprises: plating platinum on the surface of the jig, and slicing together with the jig.

12. The jig is characterized by comprising a plurality of positioning shafts which are crisscrossed and distributed at equal intervals, and positioning points are formed at the junctions of the crisscrossed positioning shafts.

13. The manufacturing method of the jig is characterized by comprising the following steps of:

providing a substrate;

determining locating points and locating point coordinates according to the word line width and/or bit line width and/or peripheral contact spacing of the target device;

and removing part of the matrix, wherein the rest of the matrix is in a grid shape, and the positioning points are positioned at criss-cross positions of the rest of the matrix.

14. The method of manufacturing a jig according to claim 13, wherein removing a portion of the base body, and remaining the base body in a grid shape includes: and removing part of the matrix through ion etching, so that the rest of the matrix is in a grid shape, and the grid intervals of the rest of the matrix are consistent with the peripheral contact intervals of the target device.

15. The method of manufacturing a jig according to claim 14, wherein after removing a part of the substrate and leaving the substrate in a grid shape, a marking layer is coated on the substrate, and a material of the marking layer has a hot melt.