CN116073852A - Base station and signal processing method - Google Patents
Base station and signal processing method Download PDFInfo
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- CN116073852A CN116073852A CN202111331627.1A CN202111331627A CN116073852A CN 116073852 A CN116073852 A CN 116073852A CN 202111331627 A CN202111331627 A CN 202111331627A CN 116073852 A CN116073852 A CN 116073852A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
- H04B1/40—Circuits
- H04B1/50—Circuits using different frequencies for the two directions of communication
- H04B1/52—Hybrid arrangements, i.e. arrangements for transition from single-path two-direction transmission to single-direction transmission on each of two paths or vice versa
- H04B1/525—Hybrid arrangements, i.e. arrangements for transition from single-path two-direction transmission to single-direction transmission on each of two paths or vice versa with means for reducing leakage of transmitter signal into the receiver
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04W—WIRELESS COMMUNICATION NETWORKS
- H04W88/00—Devices specially adapted for wireless communication networks, e.g. terminals, base stations or access point devices
- H04W88/08—Access point devices
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D30/00—Reducing energy consumption in communication networks
- Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks
Abstract
A base station and a signal processing method, the base station comprises a memory, a processor, a radio frequency circuit and an output-input circuit. The processor is coupled to the memory for reading at least one computer program to perform a plurality of operations, including: generating a digital signal of the physical layer; estimating a sampling parameter value and an insertion parameter value; performing an inner difference finite impulse response filtering process on the digital signal of the physical layer according to the sampling parameter value and the insertion parameter value to generate a first sub-signal. The radio frequency circuit is used for carrying out mask filtering processing on the first sub-signal according to the mask filtering cut-off frequency so as to generate a second sub-signal, converting the second sub-signal into an analog signal and generating an output signal according to the analog signal. The output-input circuit is used for transmitting an output signal. The implementation can optimize the bandwidth resource utilization.
Description
Technical Field
The present disclosure relates to a base station and a signal processing method, and more particularly to a base station and a signal processing method applied to NB-IoT (narrowband internet of things).
Background
NB-IoT is a mobile communication technology specially designed for the Internet of things by the 3GPP (third generation partnership project) international standard organization, and is also a leading technology for a large number of connections in three application scenarios of 5G (fifth generation mobile communication technology), and the 3GPP is also discussing that NB-IoT over NTN (satellite Internet of things) technology is brought into future standards. In the technology of NB-IoT over NTN, the NB-IoT base station can transmit with the ground NB-IoT terminal through a section of bandwidth in satellite communication, so that the coverage area is enlarged to an area with insufficient ground network service, and whether the new technology is mature or not can help promote the scale of satellite internet of things industry application.
Current 3GPP standard document 36.104 has a specification independent (standby) NB-IoT base station adjacent channel leakage power limit (ACLR limit) of 40dB at 300KHz (kilohertz) from center frequency and 50dB at 500KHz from center frequency. However, since the requirement for adjacent channel leakage power limitation in satellite communication is higher than that in the terrestrial network, and the satellite bandwidth resources are relatively limited and expensive, the use of the satellite bandwidth can be effectively improved if the adjacent channel leakage power of the NB-IoT base station can be limited to a smaller range in the technology of NB-IoT over NTN.
Disclosure of Invention
In one aspect, a base station is provided that includes a memory, a processor, a radio frequency circuit, and an input/output circuit. The memory is used for storing at least one computer program. The processor is coupled to the memory for reading at least one computer program to perform operations for limiting adjacent channel leakage power of an output signal of the base station, the operations comprising: generating a digital signal of the physical layer; estimating a sampling parameter value and an insertion parameter value; and performing intra-difference finite impulse response filtering (interpolation finite impulse response filter) on the physical layer digital signal based on the sampled parameter values and the inserted parameter values to generate a first sub-signal; the radio frequency circuit is coupled to the processor and is used for performing mask filtering (masking filter) processing on the first sub-signal according to the mask filtering cut-off frequency so as to generate a second sub-signal, converting the second sub-signal into an analog signal and generating an output signal according to the analog signal. The output-input circuit is coupled to the radio frequency circuit for transmitting the output signal.
In some embodiments, the adjacent channel leakage power comprises a standard passing frequency and a standard cutoff frequency, wherein the processor is further configured to estimate the insertion parameter value according to the standard passing frequency and the standard cutoff frequency.
In some embodiments, the processor is further configured to estimate the sampling parameter value according to the standard pass frequency, the standard cutoff frequency, and the insertion parameter value.
In some embodiments, the RF circuit is further configured to calculate the mask filter cutoff frequency according to the insertion parameter value and the standard cutoff frequency.
In some embodiments, the processor is further configured to perform a finite impulse response filtering (finite impulse response filter) process on the digital signal according to the sampling parameter value to generate a third sub-signal, and to perform an interpolation (interpolation) process on the third sub-signal according to the interpolation parameter value to generate the first sub-signal.
Another aspect of the present invention provides a signal processing method, which is suitable for a base station and is used for limiting adjacent channel leakage power of an output signal of the base station. The signal processing method comprises the following steps: generating, by a processor of the base station, a digital signal of the physical layer; estimating, by the processor, the sampling parameter value and the insertion parameter value; performing, by the processor, intra-difference finite impulse response filtering processing on the digital signal of the physical layer according to the sampling parameter value and the insertion parameter value to generate a first sub-signal; performing mask filtering processing on the first sub-signal by a radio frequency circuit of the base station according to the mask filtering cut-off frequency to generate a second sub-signal; converting the second sub-signal into an analog signal by the radio frequency circuit, and generating an output signal according to the analog signal; and transmitting the output signal by an output-input circuit of the base station.
In some embodiments, the adjacent channel leakage power comprises a standard pass frequency and a standard cut-off frequency, wherein the signal processing method further comprises: the processor estimates the insertion parameter value according to the standard passing frequency and the standard cut-off frequency.
In some embodiments, the processor estimates the sampling parameter value based on the standard pass frequency, the standard cut-off frequency, and the insertion parameter value.
In some embodiments, the method further comprises: the mask filter cut-off frequency is calculated by the radio frequency circuit according to the insertion parameter value and the standard cut-off frequency.
In some embodiments, the method further comprises: performing, by the processor, a finite impulse response filtering (finite impulse response filter) of the digital signal based on the sampled parameter values to generate a third sub-signal; and performing, by the processor, an interpolation (interpolation) process on the third sub-signal according to the interpolation parameter value to generate the first sub-signal.
Drawings
The foregoing and other objects, features, advantages and embodiments of the present disclosure will be apparent from the following description of the drawings in which:
fig. 1 is a schematic diagram of a base station according to some embodiments of the present invention;
FIG. 2 is a schematic diagram of a signal processing method according to some embodiments of the invention;
FIG. 3 is a diagram illustrating an adjacent channel leakage power limit specification according to some embodiments of the invention;
FIG. 4 is a schematic diagram of an impulse response of a third sub-signal generated after a pulse response filtering process according to some embodiments of the present invention;
FIG. 5 is a schematic diagram of an impulse response of a first sub-signal generated after an interpolation process according to some embodiments of the present invention;
FIG. 6 is a schematic diagram of a filter amplitude response after an interpolation finite impulse response filtering process according to some embodiments of the present invention;
FIG. 7 is a schematic diagram of a masking filter process according to some embodiments of the invention; and
fig. 8 is a schematic diagram of a filter amplitude response after a mask filtering process according to some embodiments of the invention.
[ symbolic description ]
100 base station
110 memory
130 processor
150 radio frequency circuit
170 input/output circuit
200 Signal processing method
S210, S220, S230, S240, S250, S260 step
Center frequency C
fpass standard pass frequency
fstop standard cut-off frequency
M is the insertion parameter value
Hbe (f) filter amplitude response
Hma (f) mask filter processing
Hific (f) Filter amplitude response
Detailed Description
The following disclosure provides many different embodiments, or examples, for implementing different features of the invention. The elements and configurations of specific examples are set forth in the following discussion to simplify the present disclosure. Any exemplifications set out herein are for illustrative purposes only, and are not intended to limit the scope and meaning of the invention or its exemplifications in any manner.
Please refer to fig. 1. Fig. 1 is a schematic diagram of a base station 100 according to some embodiments of the present invention. As shown in fig. 1, the base station 100 includes a memory 110, a processor 130, a radio frequency circuit 150, and an input/output circuit 170. In connection, the processor 130 is coupled to the memory 110, the RF circuit 150 is coupled to the processor 130, and the I/O circuit 170 is coupled to the RF circuit 150.
The operation method of the base station 100 will be described with reference to fig. 2.
Please refer to fig. 2. Fig. 2 is a schematic diagram of a signal processing method 200 according to some embodiments of the invention. The embodiments of the present invention are not limited in this regard.
It should be noted that this signal processing method 200 can be applied to a system that is the same as or similar to the structure of the base station 100 in fig. 1. For simplicity of description, the operation method will be described below by taking fig. 1 as an example, but the invention is not limited to the application of fig. 1.
It should be noted that, in some embodiments, the signal processing method 200 may also be implemented as a computer program and stored in a non-transitory computer readable medium or the memory 110 shown in fig. 1, so that the computer, the electronic device, or the processor 130 in the base station 100 shown in fig. 1 can execute the operation method after reading the recording medium, and the processor 130 may be composed of one or more chips. The non-transitory computer readable recording medium may be a read-only memory, a flash memory, a floppy disk, a hard disk, a compact disk, a portable disk, a magnetic tape, a network accessible database, or a non-transitory computer readable recording medium having the same functions as will be readily appreciated by those skilled in the art.
In addition, it should be understood that the operations of the signal processing method 200 in this embodiment may be performed simultaneously or partially simultaneously, and the order thereof may be adjusted according to the actual needs, unless specifically stated otherwise.
Moreover, in various embodiments, such operations may be adaptively added, substituted, and/or omitted.
Please refer to fig. 2. The signal processing method 200 includes the following steps.
In step S210, a physical layer digital signal is generated. In some embodiments, step S210 may be performed by the processor 130 shown in fig. 1.
In step S220, the sampling parameter value and the insertion parameter value are estimated. In some embodiments, step S210 may be performed by the processor 130 shown in fig. 1. In some embodiments, the adjacent channel leakage power of the base station 100 in fig. 1 includes a standard pass frequency and a standard cut-off frequency. In some embodiments, the processor 130 in fig. 1 estimates the insertion parameter values according to the standard pass frequency and the standard cut-off frequency.
Please refer to fig. 3. Fig. 3 is a schematic diagram of an ACLR specification according to some embodiments of the invention. The specification of NP-IOT over NTN is described as an example. The standard pass frequency fpass of the ACLR of the base station 100 as in fig. 1 is 90kHz, while the standard cut-off frequency fstop of the ACLR of the base station 100 is 100kHz.
In some embodiments, the processor 130 in fig. 1 estimates the insertion parameter value according to the following equation (1).
In the above expression, the normalized standard passing frequency normalized by fpass is fpassN, and the normalized standard cut-off frequency normalized by fsop is fstopN. Mcount is the result of the calculation.
In some embodiments, when the processor 130 in fig. 1 performs the normalization operation with the standard pass frequency fpass equal to 90kHz and the standard cut-off frequency fsto 100kHz at the sampling frequency (sampling rate) of 1.92MHz, the normalized pass frequency fpassN is 0.052083 and the normalized cut-off frequency fsto is 0.046875.
Substituting the normalized standard passing frequency fpassN and normalized standard cut-off frequency fstopN into the above formula for calculation, the calculation result Mcount of the insertion parameter value is 5.84. In some embodiments, the processor 130 in fig. 1 takes the insertion parameter value Mcount as an integer and takes a multiple of 2 to obtain possible insertion parameter values M close to the insertion parameter value Mcount, including 2, 4, 8, etc. In some embodiments, the processor 130 in fig. 1 takes the insertion parameter value M as 4 for operation, but this is not a limitation.
In some embodiments, the processor 130 in fig. 1 estimates the sampling parameter value Tap according to the standard pass frequency fpass, the standard cut-off frequency fstop, and the insertion parameter value M. In some embodiments, the processor 130 is further configured to calculate the sampling parameter value Tap according to the normalized passing frequency fpassN, the normalized cut-off frequency fstopN and the insertion parameter value M.
In some embodiments, the processor 130 in fig. 1 estimates the sampling parameter value according to the following equation (2).
In the above equation, atten is the attenuation value of the cut-off frequency fstop, M is the insertion parameter value, fstop n is the normalized standard cut-off frequency, and fpassN is the normalized standard pass-through frequency.
Assuming that the attenuation value Atten is 60dB, the insertion parameter value M is 4, the normalized pass frequency fpassN is 0.052083, and the normalized cut-off frequency fstopN is 0.046875. The processor 130 in fig. 1 calculates the sampling parameter value calculation result Npr as 132 according to the parameter value substituted into equation (2) and taken as an integer.
In some embodiments, the processor 130 takes a multiple value of 2 as the sampling parameter value N according to the calculated sampling parameter value calculation result Npr. For example, in some embodiments, the processor 130 takes 128 as the sampling parameter value N.
Please refer back to fig. 2. In step S230, an intra-difference finite impulse response filtering process is performed on the digital signal of the physical layer according to the sampling parameter value and the insertion parameter value to generate a first sub-signal.
For example, in some embodiments, the processor 130 in fig. 1 performs finite impulse response filtering (finite impulse response filter) on the digital signal according to the sampled parameter values to generate a third sub-signal, and performs interpolation (interpolation) on the third sub-signal according to the interpolated parameter values to generate a second sub-signal.
In some embodiments, the processor 130 in fig. 1 performs the finite impulse response filtering process according to the following equation (3).
In the above equation (3), N is a sampling parameter value calculated according to the equation (2). hpr (k) is the physical layer digital signal. Hpr (z) is a third sub-signal generated by performing finite impulse response filtering processing on the digital signal according to the sampled parameter values.
In some embodiments, the processor 130 in fig. 1 performs the interpolation process according to the following equation (4) to generate the first sub-signal.
In the above expression (4), M is an insertion parameter value. Wherein the method comprises the steps of
Is the third sub-signal.
Please refer to fig. 4. Fig. 4 is a schematic diagram illustrating an impulse response of a third sub-signal generated after the impulse response filtering process according to some embodiments of the present invention.
Please refer to fig. 5. Fig. 5 is a schematic diagram illustrating an impulse response of a first sub-signal generated after an insertion process according to some embodiments of the present invention. Fig. 5 shows a case where the insertion parameter value M is 3.
Please refer to fig. 6. Fig. 6 is a schematic diagram of a filter magnitude response (filter magnitude response) Hbe (f) after interpolation finite impulse response filtering according to some embodiments of the present invention.
As shown in FIG. 6, there are two noise in the frequency band above 1/M-fstop. Where M is the insertion parameter value and fstop is the standard cut-off frequency.
Please refer back to fig. 2. In step S240, a mask filtering process is performed on the first sub-signal according to the mask filtering cut-off frequency to generate a second sub-signal. In some embodiments, step S240 may be performed by the rf circuit 150 shown in fig. 1.
Please refer to fig. 6. As shown in fig. 6, noise in the frequency band higher than 1/M-fstop is eliminated.
In some embodiments, the RF circuit 150 calculates the mask filter cutoff frequency according to the insertion parameter value and the standard cutoff frequency. In the case illustrated in FIG. 6, the calculated mask filter cutoff frequency is 1/M-fstop. The RF circuit 150 then performs a masking filter process on the portion above the masking filter cutoff frequency 1/M-fstop to generate a second sub-signal.
Please refer to fig. 7. Fig. 7 is a schematic diagram of a masking filter processing Hma (f) according to some embodiments of the invention. As shown in fig. 7, the masking filter cut-off frequency of the masking filter process is at a frequency of 1/M-fstop.
Please refer to fig. 8. Fig. 8 is a schematic diagram of a filter amplitude response Hifir (f) after masking filter processing according to some embodiments of the present invention. As shown in fig. 8, after the mask filtering process, the passing frequency of the filter amplitude response is the frequency fpass, and the cut-off frequency is the frequency fstop.
Please refer back to fig. 2. In step S250, the second sub-signal is converted into an analog signal, and an output signal is generated according to the analog signal. In some embodiments, step S250 may be performed by the rf circuit 150 shown in fig. 1.
In step S260, an output signal is transmitted. In some embodiments, step S260 may be performed by the input/output circuit 170 shown in fig. 1 to output the output signal to an external device.
In some embodiments, the processor 130 may be a server or other device. In some embodiments, the processor 130 may be a server, a circuit, a central processing unit (central processor unit, CPU), a Microprocessor (MCU) or other devices with equivalent functions for storing, calculating, reading data, receiving signals or messages, transmitting signals or messages, etc. In some embodiments, the RF circuit 150 may be an RF integrated circuit or a device with similar functions. The input-output circuit 170 may be an element having a signal output and a signal input or the like.
As can be seen from the above embodiments, the present embodiment provides a base station and a signal processing method, which are implemented by using intra-differential finite impulse response filtering (interpolation finite impulse response filter) in the NB-IOT physical layer to estimate the best sampling parameter value and the best insertion parameter value, and then filter the digital signal. Therefore, the use of the satellite bandwidth can be effectively reduced under the condition of improving the ACLR limit performance of the base station signal, the interference of a frequency separation channel during communication is overcome, and the resource utilization rate of the satellite bandwidth is improved. After the bandwidth resource utilization is optimized, the number of NB-IOT base stations which can be served by the satellite can be increased, and the number of more access terminals can be increased.
In addition, the above examples include exemplary steps in a sequence, but the steps need not be performed in the order shown. It is within the contemplation of the present disclosure that the steps be executed in a different order. It is contemplated that steps may be added, substituted, altered in order and/or omitted within the spirit and scope of the embodiments of the disclosure.
While the present invention has been described with reference to the embodiments, it should be understood that the invention is not limited thereto, but may be variously modified and modified by those skilled in the art without departing from the spirit and scope of the present invention, and the scope of the present invention is accordingly defined by the appended claims.
Claims (10)
1. A base station, comprising:
a memory for storing at least one computer program;
a processor, coupled to the memory, for reading the at least one computer program to perform operations to limit an adjacent channel leakage power of an output signal of the base station, comprising:
generating a digital signal of a physical layer;
estimating a sampling parameter value and an insertion parameter value; and
performing an inner difference finite impulse response filtering process on the digital signal of the physical layer according to the sampling parameter value and the insertion parameter value to generate a first sub-signal;
the radio frequency circuit is coupled to the processor and is used for carrying out mask filtering processing on the first sub-signal according to a mask filtering cut-off frequency so as to generate a second sub-signal, converting the second sub-signal into an analog signal and generating the output signal according to the analog signal; and
and the output and input circuit is coupled with the radio frequency circuit and used for transmitting the output signal.
2. The base station of claim 1 wherein the adjacent channel leakage power comprises a standard pass frequency and a standard cutoff frequency, wherein the processor is further configured to estimate the insertion parameter value based on the standard pass frequency and the standard cutoff frequency.
3. The base station of claim 2 wherein the processor is further configured to estimate the sampling parameter value based on the standard pass frequency, the standard cut-off frequency, and the insertion parameter value.
4. The base station of claim 2 wherein the radio frequency circuit is further configured to calculate the mask filter cutoff frequency based on the insertion parameter value and the standard cutoff frequency.
5. The base station of claim 1 wherein the processor is further configured to perform a finite impulse response filtering process on the digital signal based on the sampled parameter values to generate a third sub-signal, and to perform an interpolation process on the third sub-signal based on the interpolated parameter values to generate the first sub-signal.
6. A signal processing method for a base station, for limiting a neighboring channel leakage power of an output signal of the base station, comprising:
generating a digital signal of a physical layer by a processor of the base station;
estimating, by the processor, a sampling parameter value and an insertion parameter value;
performing an inner difference finite impulse response filtering process on the digital signal of the physical layer by the processor according to the sampling parameter value and the insertion parameter value to generate a first sub-signal;
performing a mask filtering process on the first sub-signal by a radio frequency circuit of the base station according to a mask filtering cut-off frequency to generate a second sub-signal;
converting the second sub-signal into an analog signal by the radio frequency circuit, and generating the output signal according to the analog signal; and
the output signal is transmitted by an input-output circuit of the base station.
7. The signal processing method of claim 6, wherein the adjacent channel leakage power comprises a standard pass frequency and a standard cutoff frequency, and wherein the signal processing method further comprises:
the processor estimates the insertion parameter value according to the standard passing frequency and the standard cut-off frequency.
8. The signal processing method according to claim 7, further comprising:
the processor estimates the sampling parameter value according to the standard passing frequency, the standard cut-off frequency and the insertion parameter value.
9. The signal processing method according to claim 7, further comprising:
the mask filter cut-off frequency is calculated by the radio frequency circuit according to the insertion parameter value and the standard cut-off frequency.
10. The signal processing method according to claim 6, further comprising:
performing a finite impulse response filtering process on the digital signal according to the sampling parameter value by the processor to generate a third sub-signal; and
performing an interpolation process on the third sub-signal by the processor according to the interpolation parameter value to generate the first sub-signal.
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