CN116032251A - Microcontroller clock device and electronic equipment based on precision compensation - Google Patents

Abstract

The application relates to the field of oscillators and discloses a microcontroller clock device and electronic equipment based on precision compensation. The device generates and respectively duplicates and outputs two groups of charging current, compensation current and bias current through a current mirror unit; the charging current is used for charging the capacitor of the charging and discharging oscillating unit, and the bias current is used for supplying power to the comparing unit; the comparison unit generates complementary clock signals so that the logic control unit carries out logic processing on the complementary clock signals to generate a charging control signal and a compensation control signal; the charge-discharge oscillation unit controls charge and discharge of the capacitor according to the charge control signal so as to oscillate and generate a clock signal; according to the compensation control signal, the clock signal is compensated for precision by the compensation current. According to the embodiment of the application, the charging control signal and the compensation control signal are generated through the complementary clock signals, so that the compensation control of the clock signals is realized, and the precision of the clock signals is improved.

Description

Microcontroller clock device and electronic equipment based on precision compensation

Technical Field

The present application relates to the field of oscillators, and in particular, to a microcontroller clock device and an electronic device based on precision compensation.

Background

Along with the continuous development of the internet of things technology in recent years, the market volume of the internet of things technology is also continuously increased, and a large number of internet of things terminals are used in daily life. In the node of the internet of things, one extremely critical module is a microcontroller (i.e., MCU). MCU is used as core module, controls whole thing networking node, and is integrated as an organic wholely with functions such as communication, sensor, signal acquisition and data processing simultaneously, needs to ensure that the instruction that the user sent microcontroller can correctly step by step. Under the present and continuously-changed application scenes, the functions of the micro-controller chips are more and more complex, the information quantity to be processed is more and more, the processing speed is faster and more, and higher requirements are also put on how to measure the precision, the area and the power consumption.

In the prior art, a clock signal is provided to a microcontroller through an oscillator-based clock generation device, so that the microcontroller can process various operations in time. However, the delay variation of the oscillator causes errors in the output clock signal, and how to provide a high-precision clock signal for the microcontroller is a problem to be solved.

Disclosure of Invention

In view of the above, in order to solve the problems in the prior art, the present application provides a microcontroller clock device and an electronic device based on precision compensation.

In a first aspect, the present application provides a microcontroller clock device based on precision compensation, including a current mirror unit, a charge-discharge oscillation unit, a comparison unit, and a logic control unit;

the current mirror unit is used for generating and respectively duplicating and outputting two groups of charging current, compensation current and bias current; the charging current is used for charging the capacitor of the charging and discharging oscillating unit, and the bias current is used for supplying power to the comparing unit;

the comparison unit is used for generating complementary clock signals so that the logic control unit carries out logic processing on the complementary clock signals to generate a charging control signal and a compensation control signal;

the charge-discharge oscillation unit is used for controlling charge and discharge of the capacitor according to the charge control signal so as to oscillate and generate a clock signal; and according to the compensation control signal, performing precision compensation on the clock signal through the compensation current.

In an alternative embodiment, the charge-discharge oscillation unit comprises an RC oscillator, the RC oscillator comprising a first capacitor, a second capacitor, a resistor, and four current control switches;

one ends of the first capacitor, the second capacitor and the resistor are respectively connected with the two current control switches, and the other ends of the first capacitor, the second capacitor and the resistor are grounded; five parallel oscillator sub-loops are formed among the first capacitor, the second capacitor, the resistor and the four current control switches;

an intermediate node is correspondingly arranged between two adjacent current control switches in each oscillation sub-loop, and each intermediate node is used for being correspondingly connected with the compensation current or the charging current.

In an alternative embodiment, the RC oscillator further comprises two sets of compensation control switches;

the RC oscillator is used for respectively connecting the compensation current to the oscillator sub-loop through two groups of compensation control switches, and respectively connecting a group of charging current through intermediate nodes among the first capacitor, the second capacitor and the resistor which are connected in parallel.

In an alternative embodiment, the comparison unit comprises a first comparator and a second comparator;

the first comparator and the second comparator are each configured to generate a pair of complementary clock signals;

the logic control unit is used for carrying out logic processing on complementary clock signals from the first comparator and the second comparator to generate a compensation control signal; the compensation control signal is used for controlling the on-off of the compensation control switch.

In an alternative embodiment, the comparing unit further comprises a first inverter, a second inverter and a third inverter;

the input end of the first comparator is respectively connected with an intermediate node for accessing the charging current, and the input end of the second comparator is respectively connected with an intermediate node for accessing the compensation current;

the output end of the first comparator is used for outputting a first complementary clock signal to the second inverter and the logic control unit through the first inverter respectively, and the output end of the first comparator is also used for outputting a second complementary clock signal to the logic control unit;

the output end of the second comparator outputs a third complementary clock signal to the logic control unit through the third inverter, and the output end of the second comparator is also used for outputting a fourth complementary clock signal to the logic control unit.

In an alternative embodiment, the logic control unit is configured to output a pair of compensation control signals according to the first to fourth complementary clock signals, where each of the compensation control signals is configured to correspondingly control on/off of one of the compensation control switches.

In an alternative embodiment, the intermediate nodes for accessing the charging current are a first node and a second node, respectively, and the intermediate nodes for accessing the compensation current are a third node and a fourth node, respectively;

and the level time sequence of the compensation control signal is further controlled by controlling the level time sequences of the first complementary clock signal and the second complementary clock signal so as to control the on or off of each oscillation sub-loop.

In an alternative embodiment, if the first complementary clock signal and the second complementary clock signal are opposite in level, each of the compensation control signals is the same in level, and when the capacitor is charged by the charging current, if the voltage at the first node is greater than or less than the voltage at the second node, the level of the first comparator is inverted.

In an alternative embodiment, if the first complementary clock signal and the second complementary clock signal are opposite in level, each of the compensation control signals is opposite in level, and when the capacitor is charged by the charging current and the compensation current, if the voltage at the third node is smaller than the voltage at the fourth node, the level of the second comparator is inverted.

In a second aspect, the present application provides an electronic device comprising a precision compensation based microcontroller clock arrangement and a microcontroller according to any of the previous embodiments;

the precision compensation-based microcontroller clock device is used for providing a clock signal for the microcontroller.

The embodiment of the application has the following beneficial effects:

the embodiment of the application provides a microcontroller clock device based on precision compensation, which comprises a current mirror unit, a charge-discharge oscillation unit, a comparison unit and a logic control unit; the current mirror unit is used for generating and respectively duplicating and outputting two groups of charging current, compensation current and bias current; the charging current is used for charging the capacitor of the charging and discharging oscillating unit, and the bias current is used for supplying power to the comparing unit; the comparison unit is used for generating complementary clock signals so that the logic control unit carries out logic processing on the complementary clock signals to generate a charging control signal and a compensation control signal; the charge-discharge oscillation unit is used for controlling charge and discharge of the capacitor according to the charge control signal so as to oscillate and generate a clock signal; according to the compensation control signal, the clock signal is compensated for precision by the compensation current. According to the embodiment of the application, the complementary clock signals are generated through the comparison unit, so that the logic control unit carries out logic processing on the complementary clock signals, and the charging control signals and the compensation control signals are generated, so that the compensation of the clock signals is realized. The compensation method of the embodiment of the application is simple and easy to realize, and no extra element is added while the clock signal precision is improved, so that the device has small area and low power consumption.

Drawings

In order to more clearly illustrate the technical solutions of the present application, the drawings that are required for the embodiments will be briefly described, it being understood that the following drawings only illustrate some embodiments of the present application and therefore should not be considered as limiting the scope of protection of the present application. Like elements are numbered alike in the various figures.

FIG. 1 shows a first schematic diagram of a precision compensation based microcontroller clock device in an embodiment of the present application;

FIG. 2 shows a second schematic diagram of a precision compensation based microcontroller clock device in an embodiment of the present application;

FIG. 3 shows a third schematic diagram of a precision compensation based microcontroller clock device in an embodiment of the present application;

FIG. 4 shows a schematic diagram of a precision compensation based microcontroller clock device in an embodiment of the present application;

FIG. 5 is a schematic diagram showing the output waveforms of the signals and intermediate nodes in a precision compensation-based microcontroller clock device in an embodiment of the present application;

fig. 6 is a schematic diagram illustrating a charge-discharge process corresponding to a first oscillation process in a microcontroller clock device based on precision compensation according to an embodiment of the present application;

fig. 7 is a schematic diagram illustrating a charge-discharge process corresponding to a second oscillation process in the microcontroller clock device based on precision compensation according to an embodiment of the present application;

fig. 8 is a schematic diagram illustrating a charge-discharge process corresponding to a third oscillation process in the microcontroller clock device based on precision compensation according to the embodiment of the present application;

fig. 9 is a schematic diagram illustrating a charge-discharge process corresponding to a fourth oscillation process in the microcontroller clock device based on precision compensation according to the embodiment of the present application.

Detailed Description

The following description of the embodiments of the present application will be made clearly and completely with reference to the drawings in the embodiments of the present application, and it is apparent that the described embodiments are only some embodiments of the present application, not all embodiments.

The components of the embodiments of the present application, which are generally described and illustrated in the figures herein, may be arranged and designed in a wide variety of different configurations. Thus, the following detailed description of the embodiments of the present application, as provided in the accompanying drawings, is not intended to limit the scope of the application, as claimed, but is merely representative of selected embodiments of the application. All other embodiments, which can be made by those skilled in the art based on the embodiments of the present application without making any inventive effort, are intended to be within the scope of the present application.

In the following, the terms "comprises", "comprising", "having" and their cognate terms may be used in various embodiments of the present application are intended only to refer to a particular feature, number, step, operation, element, component, or combination of the foregoing, and should not be interpreted as first excluding the existence of or increasing the likelihood of one or more other features, numbers, steps, operations, elements, components, or combinations of the foregoing.

Furthermore, the terms "first," "second," "third," and the like are used merely to distinguish between descriptions and should not be construed as indicating or implying relative importance.

Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which various embodiments of this application belong. Terms (such as those defined in commonly used dictionaries) will be interpreted as having a meaning that is the same as the context of the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein in connection with the various embodiments of the application.

As micro-controller technology advances, the performance requirements for clock systems therein are also becoming more stringent. The digital architecture of the current micro controller is complex, so that the clock source integrated in the interior is required to output the clock stably and reliably, and meanwhile, the power consumption and the area can be further reduced, and the precision is also improved. In the traditional oscillator clock structure, the precision is greatly influenced by the temperature change of the bias current, and the relatively accurate reference current source occupies a relatively large chip area, so in the improvement of the traditional oscillator clock structure, a low-power consumption design is adopted, the charging and discharging processes of the clock are switched in a voltage comparison mode, the scheme is simple, and the design is improvement of the traditional oscillator clock structure in precision and power consumption performance.

However, in such an improved oscillator clock structure, comparator delay variation becomes one of the main factors of its error.

Further, clock generation modules in conventional oscillator clock structures can be classified into crystal oscillators, ring oscillators, RC oscillators, and LC oscillators. For microcontrollers, most oscillators are internally integrated, and the crystal oscillator and LC oscillator described above are not suitable for being internally integrated. In the ring oscillator and the RC oscillator, the precision of the ring oscillator is difficult to be made higher, so that the RC oscillator is the best clock generation scheme choice integrating the requirements of area, power consumption and precision in the application scene of the Internet of things of today.

Furthermore, the embodiment of the application constructs the microcontroller clock device based on precision compensation based on the RC oscillator so as to realize the generation and compensation of clock signals, and the device has the advantages of simple structure, low power consumption, high precision and no additional element, compensates the output clock signals so as to improve the precision of the clock signals, further effectively improve the performance of the microcontroller and better meet the current requirement of the Internet of things.

The embodiment of the application provides a microcontroller clock device (hereinafter referred to as microcontroller clock device) based on precision compensation, when the delay is increased, the injection time length of compensation current is correspondingly increased, so that the output frequency is hardly changed, and the precision compensation of clock signals is realized.

Referring to fig. 1 and 2, the precision compensation-based microcontroller clock device in the embodiment of the present application includes a current mirror unit 100, a charge-discharge oscillation unit 200, a comparison unit 300, and a logic control unit 400.

Exemplary, the current mirror unit 100 is configured to generate and respectively copy and output two sets of charging currents (i.e., I _charge ) Compensation current (i.e. I _compensate ) And bias current (i.e. I _bias ) The method comprises the steps of carrying out a first treatment on the surface of the Wherein the charging current is used forThe capacitor of the charge-discharge oscillation unit 200 is charged, and the bias current is used to power the comparison unit 300.

The comparing unit 300 is configured to generate complementary clock signals, so that the logic control unit 400 performs logic processing on the complementary clock signals to generate a charging control signal and a compensation control signal.

The charge-discharge oscillation unit 200 is configured to control charge and discharge of the capacitor according to the charge control signal, so as to oscillate and generate a clock signal (CLK); according to the compensation control signal, the clock signal is compensated for precision by the compensation current.

In an embodiment, the charge-discharge oscillation unit 200 includes an RC oscillator, which includes a first capacitor (i.e., C1), a second capacitor (i.e., C2), a resistor (i.e., R), and four current control switches; one end of the first capacitor, one end of the second capacitor and one end of the resistor are respectively connected with the two current control switches, and the other ends of the first capacitor, the second capacitor and the resistor are grounded; five parallel oscillator sub-loops are formed among the first capacitor, the second capacitor, the resistor and the four current control switches; an intermediate Node (namely Node0-Node 3) is correspondingly arranged between two adjacent current control switches in each oscillation sub-loop, and each intermediate Node is used for correspondingly accessing compensation current or charging current.

Optionally, the RC oscillator further comprises two sets of compensation control switches; the RC oscillator is used for respectively accessing compensation current to the oscillation sub-loop through two groups of compensation control switches, and respectively accessing a group of charging current through intermediate nodes among the first capacitor, the second capacitor and the resistor which are connected in parallel.

Further, the comparing unit 300 includes a first Comparator (i.e., comparator 0) and a second Comparator (i.e., comparator 1); the first comparator and the second comparator are used for generating a pair of complementary clock signals; the logic control unit 400 is configured to perform logic processing on complementary clock signals from the first comparator and the second comparator, and generate compensation control signals (i.e., CPS0, CPS 1); the compensation control signal is used for controlling the on-off of the compensation control switch.

As an alternative embodiment, the comparison unit 300 further includes a first inverter (i.e., inv 1), a second inverter (i.e., inv 2), and a third inverter (i.e., inv 3); the input end of the first comparator is respectively connected with the intermediate node for accessing the charging current, and the input end of the second comparator is respectively connected with the intermediate node for accessing the compensation current; the output end of the first comparator is used for outputting a first complementary clock signal (i.e. phi 1) to the second inverter and the logic control unit 400 through the first inverter, and the output end of the first comparator is also used for outputting a second complementary clock signal (i.e. phi 2) to the logic control unit 400; the output terminal of the second comparator outputs a third complementary clock signal (i.e., comp) to the logic control unit 400 through the third inverter, and the output terminal of the second comparator is further configured to output a fourth complementary clock signal (i.e., comp) to the logic control unit 400.

In the present embodiment, the intermediate nodes for switching in the charging current are set as the first Node (i.e., node 0) and the second Node (i.e., node 1), respectively, and the intermediate nodes for switching in the compensation current are set as the third Node (i.e., node 2) and the fourth Node (i.e., node 3), respectively.

The logic control unit 400 is configured to output a pair of compensation control signals according to the first to fourth complementary clock signals, where each compensation control signal is configured to correspondingly control on/off of one compensation control switch. Furthermore, the microcontroller clock device can control the level timing of the compensation control signal by controlling the level timing of the first complementary clock signal and the second complementary clock signal so as to control the on or off of the corresponding oscillator subcircuit.

In the present embodiment, the current mirror unit 100 is used to provide current to the microcontroller clock device, including a charging current (i.e. I _charge ) Compensation current (i.e. I _compensate ) And a bias current (i.e., I) for ensuring proper operation of the respective comparators in the comparison unit 300 _bias ) The method comprises the steps of carrying out a first treatment on the surface of the Meanwhile, the charging current and the compensation current are controlled to be output in a specific proportion relation, and the specific proportion relation expression is as follows:

I _compensate ＝α·I _charge 。

where α represents a proportional value between the charging current and the compensation current.

The charge-discharge oscillation unit 200 is configured to complete charge-discharge of the capacitor and oscillate to generate a clock signal, and complete switching control of charge-discharge of the capacitor according to the complementary clock signal of the comparison unit 300, and perform compensation control on the output clock signal according to the compensation control signal output by the logic control unit 400.

The comparison unit 300 is an improvement over existing clock modules, and has the effect of reducing the offset and delay of the comparator while minimizing the power consumption and area of the microcontroller clock device.

The logic control unit 400 is configured to perform logic processing based on the complementary clock signal output by the comparing unit 300, and generate a compensation control signal and a charging control signal, where the compensation control signal is used to implement compensation control of the charging and discharging oscillating unit 200 on the clock signal, and the charging control signal is used to implement charging control of the charging and discharging oscillating unit 200.

As an alternative embodiment, as shown in fig. 3, it is assumed that in the ideal case, i.e. in the absence of a delay in the comparator, the voltage V generated at Node0 is when Φ1=1, on, Φ2=0, off ₀ The method comprises the following steps:

V ₀ ＝I _charge ·R；

wherein R is the resistance value of resistor R in the micro-controller clock circuit, and voltage V generated at Node1 ₁ The method comprises the following steps:

wherein T is the oscillation period of the charge-discharge oscillation unit 200, and C is the capacitance value of the access circuit at Node 1.

The voltages of the two nodes are input to the first comparator, so that the phase of the output clock signal is turned over when the voltages of the two nodes are equal, and the two voltage formulas corresponding to the Node0 Node and the Node1 Node are combined to obtain an expression of the frequency (namely F) of the clock signal:

furthermore, in an ideal situation, the accuracy of the frequency of the output clock signal is only related to the values of the capacitor and the resistor, but the comparator introduces a delay, and the delay is a main source of the frequency error of the clock signal output by the existing clock device, based on which the embodiment performs precision compensation for the error to obtain a higher frequency precision of the clock signal.

Further, as shown in FIG. 4, in a typical RC oscillator with comparative voltage control charging and discharging, the comparator introduces a delay such that the voltage V originally generated at Node0 (or Node 2) ₀ Exceeding the reference voltage source (i.e. V _ref ) Then immediately after the Node1 Node (or Node3 Node) starts charging, the voltage V is generated ₁ The time of starting charging is delayed, and the delay time is set to be deltat, so the embodiment of the application proposes V ₁ First charge current with ratio (i.e. I _charge ) A suitably large current (i.e. comprising a charging current and a compensation current) (I _charge +I _compensate ) To charge the capacitance at the corresponding node, thereby V ₁ Curve will catch up with V ₀ And the comparator is used to determine whether to catch up, and the original charging current is used after the catching up (i.e. I _charge ) The current charges the capacitor, but the current is also pulled back after the delay Δt of the comparator. In the case where two comparators are identical, the present embodiment is implemented by using appropriate compensation currents (i.e., I _compensate ) To complete the compensation of the precision error.

In the case where the capacitance value of the capacitor at each node (i.e., capacitor C) is the same, the amount of charge corresponding to the capacitor (i.e., Q) can be obtained as:

Q＝C*U；

if it is determined that the accuracy compensation is completed, the following relation needs to be satisfied:

Q＝I _charge ·(t1+2·Δt)＝(I _charge +I _compensate )·(t1+Δt)；

wherein t1 is V generated when Node1 Node starts charging ₁ Back to V ₁ Catch up with V ₀ The corresponding time period.

Further, I can be obtained _compensate And I _charge Is defined by the relation:

secondly, when the temperature or voltage and other environments change, the delay (i.e. Δt) of the comparator also changes, and in the conventional RC oscillator, the increase of the delay causes the decrease of the output frequency, so that in this embodiment, the accuracy compensation is realized by compensating the current.

In this embodiment, during the operation of the clock device of the microcontroller, a clock oscillation is generated for a complete period to output a clock signal, which can be divided into four oscillation processes.

Referring to fig. 5 and 6 together, fig. 5 is a corresponding first oscillation process in a complete clock oscillation cycle. Wherein Φ1=0, off; phi 2=1, is on; CPS0=1, on; CPS1=0, off; current I _charge Through a resistor to form a reference voltage (i.e. I _charge R), current (i.e. I _charge +I _compensate ) The second capacitor at Node2 is charged and the first capacitor at Node3 is discharged to ground. This phase is the catch-up phase described above, and when the catch-up is successful, i.e. the voltage at Node2 is higher than the voltage at Node3, and the relevant control signals (i.e. the complementary clock signal and the compensation control signal) are returned by the second comparator and logic control unit 400, the second oscillation process is entered.

Referring to fig. 5 and 7 together, fig. 7 corresponds to the second oscillation process, in which Φ1=0, Φ2=1, on, CPS 0=cps 0=0, and off. During this oscillation, there is no I _compensate Charging the capacitor with only I _charge Charging a second capacitor at Node2 with a current I _charge Still flow through resistor RForming a reference voltage (I) _charge R), the first capacitance at Node3 discharges to ground to 0. When the second capacitor is charged, the output level of the first comparator is turned over when the voltage at the Node0 is higher than the voltage at the Node1, and then the third oscillation process is performed.

That is, if the first complementary clock signal and the second complementary clock signal are opposite in level, the levels of the compensation control signals are the same, and when the capacitor is charged by the charging current, if the voltage at the first node is greater than the voltage at the second node, the level of the first comparator is inverted.

Referring to fig. 5 and 8 together, fig. 8 corresponds to a third oscillation process, in which phi1=1, is on,

for off, CPS 0=0, for off, CPS 1=1, for on. During this oscillation, the current (I _charge +I _compensate ) Charging a first capacitor at Node3, current I _charge Through resistor R to form a reference voltage (I _charge R), the second capacitance at Node2 discharges to ground. Similarly, when the voltage at the Node3 is higher than the voltage at the Node2, the output level of the second comparator is inverted, and then, the fourth oscillation process is entered.

That is, if the first complementary clock signal and the second complementary clock signal are opposite in level, the levels of the compensation control signals are opposite, and when the capacitor is charged by the charging current and the compensation current, if the voltage at the third node is smaller than the voltage at the fourth node, the level of the second comparator is inverted.

Referring to fig. 5 and 9 together, fig. 9 corresponds to a fourth oscillation process, in which Φ1=1, Φ2=0, and CPS 0=cps 1=0 are on and off, respectively. In Process four, current I _charge Charging a first capacitor at Node3, current I _charge Through resistor R to form a reference voltage (I _charge R), the second capacitance at Node2 discharges to ground to 0. When the voltage at Node1 is higher than the voltage at Node0,the output level of the first comparator is inverted and re-enters the first oscillation process, thereby reciprocating to periodically output the compensated clock signal.

That is, if the first complementary clock signal and the second complementary clock signal are opposite in level, the levels of the compensation control signals are the same, and when the capacitor is charged by the charging current, if the voltage at the first node is smaller than the voltage at the second node, the level of the first comparator is inverted.

In summary, the delay error of the comparator can be compensated in this embodiment, so that the actual output frequency is greatly reduced under the influence of the delay error change, and the frequency of the output clock signal is close to the clock signal frequency in the ideal state.

According to the embodiment of the application, the complementary clock signals are generated through the comparison unit, so that the logic control unit carries out logic processing on the complementary clock signals, and the charging control signals and the compensation control signals are generated, so that the compensation of the clock signals is realized. The compensation method of the embodiment of the application is simple and easy to realize, and no extra element is added while the clock signal precision is improved, so that the device has small area and low power consumption; and further, the device is easy to apply to the microcontroller so as to provide corresponding high-precision clock signals for the microcontroller.

The embodiment of the application also provides electronic equipment, which comprises the microcontroller clock device and the microcontroller based on precision compensation; the microcontroller clock device based on precision compensation is used for providing a clock signal for a microcontroller.

It can be appreciated that the precision-based microcontroller clock device corresponds to the electronic device of the present embodiment, and any optional item of the above embodiment may be applied to the present embodiment, so that the description thereof is omitted herein.

In the several embodiments provided in this application, it should be understood that the disclosed apparatus and method may be implemented in other manners as well. The apparatus embodiments described above are merely illustrative, for example, of the flow diagrams and block diagrams in the figures, which illustrate the architecture, functionality, and operation of possible implementations of apparatus, methods and computer program products according to various embodiments of the present application. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that, in alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.

In addition, functional modules or units in the embodiments of the present application may be integrated together to form a single part, or each module may exist alone, or two or more modules may be integrated to form a single part.

The foregoing is merely specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily think about changes or substitutions within the technical scope of the present application, and the changes or substitutions are intended to be covered by the scope of the present application.

Claims (10)

1. The microcontroller clock device based on precision compensation is characterized by comprising a current mirror unit, a charge-discharge oscillation unit, a comparison unit and a logic control unit;

the current mirror unit is used for generating and respectively duplicating and outputting two groups of charging current, compensation current and bias current; the charging current is used for charging the capacitor of the charging and discharging oscillating unit, and the bias current is used for supplying power to the comparing unit;

the comparison unit is used for generating complementary clock signals so that the logic control unit carries out logic processing on the complementary clock signals to generate a charging control signal and a compensation control signal;

the charge-discharge oscillation unit is used for controlling charge and discharge of the capacitor according to the charge control signal so as to oscillate and generate a clock signal; and according to the compensation control signal, performing precision compensation on the clock signal through the compensation current.

2. The precision compensation-based microcontroller clock apparatus of claim 1 wherein the charge-discharge oscillation unit comprises an RC oscillator comprising a first capacitance, a second capacitance, a resistance, and four current control switches;

one ends of the first capacitor, the second capacitor and the resistor are respectively connected with the two current control switches, and the other ends of the first capacitor, the second capacitor and the resistor are grounded; five parallel oscillator sub-loops are formed among the first capacitor, the second capacitor, the resistor and the four current control switches;

an intermediate node is correspondingly arranged between two adjacent current control switches in each oscillation sub-loop, and each intermediate node is used for being correspondingly connected with the compensation current or the charging current.

3. The precision compensation-based microcontroller clock apparatus of claim 2 wherein the RC oscillator further comprises two sets of compensation control switches;

the RC oscillator is used for respectively connecting the compensation current to the oscillator sub-loop through two groups of compensation control switches, and respectively connecting a group of charging current through intermediate nodes among the first capacitor, the second capacitor and the resistor which are connected in parallel.

4. A precision compensation based microcontroller clock arrangement according to claim 3, characterized in that the comparison unit comprises a first comparator and a second comparator;

the first comparator and the second comparator are each configured to generate a pair of complementary clock signals;

the logic control unit is used for carrying out logic processing on complementary clock signals from the first comparator and the second comparator to generate a compensation control signal; the compensation control signal is used for controlling the on-off of the compensation control switch.

5. The precision compensation-based microcontroller clock apparatus of claim 4 wherein the comparison unit further comprises a first inverter, a second inverter and a third inverter;

the input end of the first comparator is respectively connected with an intermediate node for accessing the charging current, and the input end of the second comparator is respectively connected with an intermediate node for accessing the compensation current;

the output end of the first comparator is used for outputting a first complementary clock signal to the second inverter and the logic control unit through the first inverter respectively, and the output end of the first comparator is also used for outputting a second complementary clock signal to the logic control unit;

the output end of the second comparator outputs a third complementary clock signal to the logic control unit through the third inverter, and the output end of the second comparator is also used for outputting a fourth complementary clock signal to the logic control unit.

6. The precision compensation-based microcontroller clock apparatus of claim 5 wherein the logic control unit is configured to output a pair of compensation control signals according to the first through fourth complementary clock signals, each of the compensation control signals being configured to correspondingly control the on/off of one of the compensation control switches.

7. The precision compensation-based microcontroller clock apparatus of claim 6 wherein the intermediate nodes for accessing the charging current are a first node and a second node, respectively, and the intermediate nodes for accessing the compensation current are a third node and a fourth node, respectively;

and the level time sequence of the compensation control signal is further controlled by controlling the level time sequences of the first complementary clock signal and the second complementary clock signal so as to control the on or off of the corresponding oscillator subcircuit.

8. The precision compensation-based microcontroller clock apparatus of claim 7 wherein the level of the first comparator toggles if the voltage at the first node is greater than or less than the voltage at the second node when the capacitor is charged by the charging current if the first complementary clock signal is at an opposite level to the second complementary clock signal.

9. The precision compensation-based microcontroller clock apparatus of claim 7 wherein if the first complementary clock signal is at an opposite level to the second complementary clock signal, each of the compensation control signals is at an opposite level, the level of the second comparator toggles if the voltage at the third node is less than the voltage at the fourth node when the capacitor is charged by the charging current and the compensation current.

10. An electronic device comprising a precision compensation based microcontroller clock arrangement and a microcontroller according to any one of claims 1-9;

the precision compensation-based microcontroller clock device is used for providing a clock signal for the microcontroller.

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