CN116028428A - Server, server component and server cluster - Google Patents
Server, server component and server cluster Download PDFInfo
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- CN116028428A CN116028428A CN202310096797.9A CN202310096797A CN116028428A CN 116028428 A CN116028428 A CN 116028428A CN 202310096797 A CN202310096797 A CN 202310096797A CN 116028428 A CN116028428 A CN 116028428A
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Abstract
The application provides a server, a server component and a server cluster. The server is used for being electrically connected with the switching module; the server comprises a controller, a chip module and a signal processing module; the chip module, the signal processing module and the switching module are electrically connected in sequence; the controller is electrically connected with the switching module and the signal processing module respectively, and is configured to acquire the type of the switching module, configure the signal processing module according to the type of the switching module and enable the chip module to communicate with the switching module through the signal processing module. Therefore, the signal transmission mode between the chip module and the switching module can not be locked, and the same server main board can be adapted to different types of chip modules, so that the development cost of the server main board is saved, and the maintenance and production of the server main board are facilitated.
Description
Technical Field
The present disclosure relates to the field of server technologies, and in particular, to a server, a server component, and a server cluster.
Background
With the continuous development of internet technology and the continuous increase of parallel computing demands, a graphics processor (Graphics Processing Unit, GPU for short) can effectively release computing pressure with excellent graphics processing capability and high performance computing capability, and significantly improve the computing processing efficiency and competitiveness of products, so that GPU servers are gradually rising and presenting an increasingly strong trend.
In order to fully exert the computing performance of the GPU, in the GPU server, the GPU installation mode has been converted from a traditional card-inserting GPU form to an onboard GPU form, unlike the card-inserting GPU, the onboard GPU needs to provide multiple groups of high-speed bus signals for the GPU to realize the data transmission of the GPU. In addition, the GPU servers also have interconnected application scenarios.
However, because the bandwidths of the different GPUs are different, different server motherboards need to be developed for the different GPUs to adapt.
Disclosure of Invention
The embodiment of the application provides a server, a server assembly and a server cluster, which can adapt to different GPUs by using the same server mainboard.
In a first aspect, an embodiment of the present application provides a server, configured to be electrically connected to a switching module; the server comprises a controller, a chip module and a signal processing module; the chip module, the signal processing module and the switching module are electrically connected in sequence; the controller is respectively and electrically connected with the switching module and the signal processing module, and is configured to acquire the type of the switching module, configure the signal processing module according to the type of the switching module, and enable the chip module to communicate with the switching module through the signal processing module.
The server provided by the embodiment of the application is used for being electrically connected with the switching module. The server comprises a controller, a chip module and a signal processing module. The chip module, the signal processing module and the switching module are electrically connected in sequence, the controller is electrically connected with the switching module and the signal processing module respectively, the controller is configured to acquire the type of the switching module, and the signal processing module is configured according to the type of the switching module, so that the chip module is communicated with the switching module through the signal processing module. Therefore, the signal transmission mode between the chip module and the switching module can not be locked, and the controller can configure the signal processing module according to the type of the switching module aiming at different chip modules so as to realize the communication between the chip module and the switching module.
On the one hand, the same server main board can be adapted to different types of chip modules, so that the development cost of the server main board is saved, and the maintenance and production of the server main board are facilitated. On the other hand, the chip module supporting various signal transmission modes can be in communication connection with different switching modules, so that a better topological structure is convenient to select, and cost is saved.
In one possible implementation, the server further includes a programmable logic device connected in series between the controller and the patching module, the programmable logic device configured to detect a type of the patching module and transmit to the controller.
The programmable logic device is connected in series between the controller and the switching module, so that the programmable logic device can not only finish the work of detecting the type of the switching module and transmitting the type of the switching module to the controller, but also increase the fault detection function through the programmable logic device, thereby improving the reliability of the server.
In one possible implementation, the controller is further electrically connected to the chip module, and the controller is configured to obtain a type of the chip module, and configure the signal processing module according to the type of the chip module and the type of the switching module, so that the chip module communicates with the switching module through the signal processing module.
The controller is electrically connected with the chip module, so that the controller can directly detect the type of the chip module, the type of the chip module does not need to be preset in the controller in advance, the setting process of the controller is simplified, and the flexibility of adapting the server main board to the chip module is improved.
In one possible implementation, the server further includes a first circuit board and a second circuit board, the controller is disposed on the first circuit board, and the programmable logic device, the chip module, and the signal processing module are disposed on the second circuit board.
In one possible implementation, the first circuit board and the second circuit board are of unitary construction.
In one possible implementation manner, the number of the chip modules is at least two, and the number of the signal processing modules is at least two; at least two chip modules are electrically connected with at least two signal processing modules in a one-to-one correspondence.
In one possible implementation, the signal processing module includes one of a digital signal processing chip and a logic device.
In one possible implementation, the chip module includes one of a central processor and a graphics processor.
In one possible implementation, the controller comprises a baseboard management controller.
In one possible implementation, the programmable logic device comprises a complex programmable logic device.
In a second aspect, embodiments of the present application provide a server assembly comprising a transit module and a server according to any one of the first aspects; and the signal processing module of the server and the controller of the server are electrically connected with the switching module.
The server component provided in this embodiment of the present application includes the server of the first aspect, so the server of the first aspect has the effects, and the server component in this embodiment of the present application also has the effects, which are not described herein again.
In one possible implementation manner, the switching module comprises at least two types, and the switching modules of the at least two types support at least two transmission protocols in one-to-one correspondence; the chip module of the server supports at least one of at least two of the transport protocols.
By the arrangement, the chip module and at least one type of transfer module can communicate through the signal processing module.
In one possible implementation, the patching modules include a first type patching module and a second type patching module; the first type switching module is configured to support a four-level pulse amplitude modulation transmission protocol; the second type switching module is configured to support a non-return to zero transmission protocol; the chip module supports at least one of the four-level pulse amplitude modulation transmission protocol and the non-return to zero transmission protocol.
The arrangement ensures that the chip module can communicate with the first type switching module or the second type switching module through the signal processing module.
In one possible implementation, the switching module is a first type of switching module when the chip module supports the four-level pwm transmission protocol and the non-return to zero transmission protocol simultaneously.
The arrangement ensures that the chip modules mutually transmit signals through the four-level pulse amplitude modulation transmission protocol between the signal processing module and the first type switching module, thereby reducing the number of cables between the signal processing module and the first type switching module, further being beneficial to saving cost and facilitating operation and maintenance.
In one possible implementation manner, the number of the switching modules is at least two, and at least two switching modules are electrically connected with at least two signal processing modules of the server in a one-to-one correspondence manner.
In a third aspect, embodiments of the present application provide a server cluster, including a server as described in the first aspect, and a server component as described in the second aspect; the server is electrically connected with the transfer module of the server component.
The server cluster provided by the embodiment of the application comprises the server in the first aspect and the server component in the second aspect, and the server and the switching module of the server component are electrically connected, so that the server and the server component can communicate with each other, and higher calculation speed and higher performance are obtained.
The server cluster provided in the embodiment of the present application includes the server of the first aspect, so the server of the first aspect has the effect, and the server cluster in the embodiment of the present application also has the effect, which is not described herein.
In addition to the technical problems, technical features constituting the technical solutions, and beneficial effects caused by the technical features of the technical solutions described above in the embodiments of the present application, other technical problems that can be solved by the server, the server component, and the server cluster provided in the embodiments of the present application, other technical features included in the technical solutions, and beneficial effects caused by the technical features will be described in further detail in the detailed description of the present application.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, a brief description will be given below of the drawings that are needed in the embodiments or the prior art descriptions, and it is obvious that the drawings in the following description are some embodiments of the present application, and that other drawings can be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of a server component according to an embodiment of the present disclosure;
FIG. 2 is a second schematic structural diagram of a server component according to an embodiment of the present disclosure;
FIG. 3 is a schematic diagram of a server component according to an embodiment of the present disclosure;
fig. 4 is a schematic structural diagram of a server component according to an embodiment of the present application;
fig. 5 is a schematic structural diagram of a server according to an embodiment of the present application;
fig. 6 is a schematic structural diagram of a server according to an embodiment of the present application;
fig. 7 is a schematic structural diagram of a server cluster according to an embodiment of the present application.
Reference numerals:
100A, 100B-servers;
110-a motherboard;
111-a controller;
112-a chip module;
113-a signal processing module;
114-a programmable logic device;
200-switching modules;
210-a first type of patching module;
220-a second type switching module;
300-server component.
Detailed Description
The terminology used in the description section of the present application is for the purpose of describing particular embodiments of the present application only and is not intended to be limiting of the present application.
A baseboard management controller (Baseboard Management Controller, abbreviated as BMC) is a small dedicated processor that is used for managing and remotely monitoring a motherboard in a server.
A programmable logic device (Programmable Logic Device, abbreviated as PLD) is produced as a general-purpose integrated circuit whose logic functions are determined by user programming of the device. The integration of a typical PLD is high enough to meet the needs of designing a typical digital system.
A complex programmable logic device (Complex Programmable Logic Device, abbreviated as CPLD) is a high-density, high-speed and low-power programmable logic device consisting essentially of three parts, namely a logic block, a programmable interconnect channel and an input/output block.
Management data input Output (abbreviated MDIO) for G-bit ethernet, the serial communication bus is referred to as management data input Output.
An integrated circuit bus (Inter-Integrated Circuit, abbreviated as I2C) is a synchronous, half-duplex communication bus.
Four-level pulse amplitude modulation (4 Pulse Amplitude Modulation, abbreviated PAM 4), a modulation technique that uses 4 different signal levels for signal transmission, has been widely used in the field of high-speed signal interconnection.
Non-Return-to-Zero (NRZ) is a binary signal code in which both 1 and 0 are represented by different electronically significant states, respectively, and in addition, there is no neutral state or other state.
Local Bus (Local Bus) is an open Bus architecture.
The digital signal processing chip (Retimer chip) is a chip with data clock recovery inside, and after data recovery is realized, signals are sent out according to a serial channel.
As described in the background art, the servers also have application scenes of interconnection, and when the servers are interconnected, a switching module is needed. At present, because different GPUs are interconnected with different bandwidths, a specific GPU needs to be disposed on a specific server motherboard, and the specific server motherboard is connected with a specific switching module in a matching manner, so that a signal transmission mode between the GPU and the switching module is locked. Therefore, different GPUs are required to be matched with different server mainboards, the development cost is high, and the maintenance and the production are inconvenient; and the GPU can only support one specific signal transmission mode, which is unfavorable for optimizing the topological structure.
In view of this, embodiments of the present application provide a server, a server component, and a server cluster. The server is used for being electrically connected with the switching module. The server comprises a controller, a chip module and a signal processing module. The chip module, the signal processing module and the switching module are electrically connected in sequence, the controller is electrically connected with the switching module and the signal processing module respectively, the controller is configured to acquire the type of the switching module, and the signal processing module is configured according to the type of the switching module, so that the chip module is communicated with the switching module through the signal processing module. Therefore, the signal transmission mode between the chip module and the switching module can not be locked, and the controller can configure the signal processing module according to the type of the switching module aiming at different chip modules so as to realize the communication between the chip module and the switching module.
On the one hand, the same server main board can be adapted to different types of chip modules, so that the development cost of the server main board is saved, and the maintenance and production of the server main board are facilitated. On the other hand, the chip module supporting various signal transmission modes can be in communication connection with different switching modules, so that a better topological structure is convenient to select, and cost is saved.
In order to make the above objects, features and advantages of the embodiments of the present application more comprehensible, the following description will make the technical solutions of the embodiments of the present application clear and complete with reference to the accompanying drawings in the embodiments of the present application. It will be apparent that the described embodiments are only some, but not all, of the embodiments of the present application. All other embodiments, based on the embodiments herein, which are within the scope of the protection of the present application, will be within the purview of one of ordinary skill in the art without the exercise of inventive faculty.
Referring to FIG. 1, an embodiment of the present application provides a server assembly 300. The server assembly 300 includes a server 100A and a patching module 200. The server 100A includes a controller 111, a chip module 112, and a signal processing module 113. In one possible implementation, the server 100A may further include a first circuit board and a second circuit board, where the controller 111 may be disposed on the first circuit board, and the chip module 112 and the signal processing module 113 may each be disposed on the second circuit board, which may be the motherboard 110 of the server 100A. In other possible implementations, the first circuit board and the second circuit board are integrally formed, i.e., the first circuit board and the second circuit board are combined into a single circuit board, which may be the motherboard 110 of the server 100A.
The controller 111 may be, for example, a baseboard management controller 111, or the controller 111 may be other control devices that meet the requirements of embodiments of the present application. The chip module 112 may be a central processing unit, or the chip module 112 may be a graphics processor module, or the chip module 112 may be other chip devices that meet the requirements of the embodiments of the present application. The signal processing module 113 may be a digital signal processing chip (Retimer chip), or the signal processing module 113 may be a logic device, or the signal processing module 113 may be other signal processing devices that meet the requirements of the embodiments of the present application.
The chip module 112 of the embodiment of the present application takes a graphics processor module as an example, and the graphics processor module may include a graphics processor substrate and a graphics processor chip disposed on the graphics processor substrate. The mounting mode of the graphics processor module is an on-board mode, that is, the graphics processor substrate is provided with a female connector (male connector), the motherboard 110 of the server 100A is provided with a male connector (female connector), the female connector and the male connector of the connector are mutually inserted, so that the graphics processor module is mounted on the motherboard 110 of the server 100A, and the graphics processor substrate and the motherboard 110 of the server 100A are parallel to each other.
The chip module 112, the signal processing module 113 and the switching module 200 are electrically connected in sequence. For example, the chip module 112 may be electrically connected to the motherboard 110 of the server 100A by soldering, etc., the signal processing module 113 may be electrically connected to the motherboard 110 of the server 100A by soldering, etc., and the chip module 112 and the signal processing module 113 may be electrically connected by a cable or a wire embedded in the motherboard 110 of the server 100A. The signal processing module 113 and the switching module 200 may be electrically connected through a cable.
The patching module 200 may include a first type patching module 210 and a second type patching module 220. Wherein the first type of switching module 210 may be configured to support a four-level pulse amplitude modulation transmission protocol and the second type of switching module 220 may be configured to support a non-return to zero transmission protocol.
16-channel signal transmission can be performed between the chip module 112 and the signal processing module 113. The signal processing module 113 and the first type switching module 210 can perform 8-channel signal transmission, which is beneficial to reducing the number of cables, saving the cost and facilitating the operation and maintenance. 16-channel signal transmission can be performed between the signal processing module 113 and the second type switching module 220.
In the first example, when the chip module 112 supports the four-level pwm transmission protocol, the switching module 200 may select the first type switching module 210, so that the signal processing module 113 and the first type switching module 210 perform 8-channel signal transmission, and the transmission protocol is the four-level pwm transmission protocol.
In a second example, when the chip module 112 supports the non-return-to-zero transmission protocol, the switching module 200 may select the second type switching module 220 to enable 16-channel signal transmission between the signal processing module 113 and the second type switching module 220, where the transmission protocol is the non-return-to-zero transmission protocol.
In a third example, when the chip module 112 supports both the four-level pwm transmission protocol and the non-return-to-zero transmission protocol, the switching module 200 may select the first type switching module 210 so that the signal processing module 113 and the first type switching module 210 perform 8-channel signal transmission, and the transmission protocol is the four-level pwm transmission protocol. Alternatively, the switching module 200 may select the second type switching module 220, so that the signal processing module 113 and the second type switching module 220 perform 16-channel signal transmission, and the transmission protocol is a non-return to zero transmission protocol. It can be appreciated that the first type of the patching module 210 is preferred for the patching module 200, so as to save cables and facilitate operation and maintenance, and further reduce material cost and operation and maintenance cost to obtain a better topology.
The controller 111 is electrically connected to the switching module 200 and the signal processing module 113. The controller 111 may be electrically connected to the motherboard 110 of the server 100A by welding, and the controller 111 and the signal processing module 113 may be electrically connected by a cable or a wire embedded in the motherboard 110 of the server 100A; alternatively, the controller 111 may be electrically connected to other circuit boards by soldering, and the controller 111 and the signal processing module 113 may be electrically connected by a cable. The controller 111 and the switching module 200 may be directly or indirectly electrically connected through a cable.
The controller 111 is configured to acquire the type of the patching module 200 and configure the signal processing module 113 according to the type of the patching module 200, so that the chip module 112 communicates with the patching module 200 through the signal processing module 113. For example, when the controller 111 obtains the information that the switching module 200 is the first type switching module 210, the controller 111 may configure the signal processing module 113 to switch the interior of the signal processing module 113 to 8-channel signal transmission and support the four-level pulse amplitude modulation transmission protocol. When the controller 111 obtains the information that the transfer module 200 is the second type transfer module 220, the controller 111 may configure the signal processing module 113 to switch the interior of the signal processing module 113 to 16-channel signal transmission and support the non-return-to-zero transmission protocol.
It should be noted that the types of the transit module 200 include, but are not limited to, the two types of the above-mentioned transmission protocols, and the transmission protocols include, but are not limited to, the two types of the above-mentioned transmission protocols. Illustratively, the patching modules 200 may include at least two types, and the at least two types of patching modules 200 may support at least two transport protocols in a one-to-one correspondence. The chip module 112 may support at least one of at least two transmission protocols, so as to ensure that the chip module 112 may select an adapted switching module 200 from at least two types of switching modules 200, so that the controller 111 may configure the signal processing module 113 according to the type of the switching module 200, thereby achieving the purpose that the chip module 112 communicates with the switching module 200 through the signal processing module 113.
The signal transmission mode between the chip module and the switching module can not be locked, and the controller can configure the signal processing module according to the type of the switching module aiming at different chip modules so as to realize the communication between the chip module and the switching module. On the one hand, the same server main board can be adapted to different types of chip modules, so that the development cost of the server main board is saved, and the maintenance and production of the server main board are facilitated. On the other hand, the chip module supporting various signal transmission modes can be in communication connection with different switching modules, so that a better topological structure is convenient to select, and labor cost and operation and maintenance cost are saved.
Alternatively, the number of the chip modules 112 in the embodiment of the present application may be at least two, the number of the signal processing modules 113 may be at least two, the number of the switching modules 200 may be at least two, and the at least two chip modules 112, the at least two signal processing modules 113 and the at least two switching modules 200 are electrically connected in one-to-one correspondence in sequence. For example, the number of chip modules 112, the number of signal processing modules 113, and the number of switching modules 200 may be 8, and the 8 chip modules, the 8 signal processing modules, and the 8 switching modules may be electrically connected in a one-to-one correspondence. Of course, the number of the chip modules 112, the number of the signal processing modules 113 and the number of the switching modules 200 may also be set to 4 (as shown in the figure) or other values according to actual needs, which will not be described herein.
Referring to fig. 2 and 3, the server 100A in the server assembly 300 according to the embodiment of the present application may further include a programmable logic device 114, and the programmable logic device 114 may be disposed on the second circuit board.
The programmable logic device 114 is connected in series between the controller 111 and the patching module 200, and the programmable logic device 114 is configured to detect the type of the patching module 200 and transmit to the controller 111. For example, the programmable logic device 114 may be electrically connected to the motherboard 110 of the server 100A by soldering, etc., and when the controller 111 is electrically connected to the motherboard 110 of the server 100A, the programmable logic device 114 and the controller 111 may be electrically connected by a cable or a wire embedded in the motherboard 110 of the server 100A; alternatively, when the controller 111 is electrically connected to other circuit boards, the programmable logic device 114 and the controller 111 may be electrically connected by a cable. The programmable logic device 114 and the patching module 200 may be electrically connected by a cable.
Referring to fig. 2, in the server assembly 300 of the embodiment of the present application, the switch module 200 is a first type switch module 210, and the chip module 112 is a chip module 112 supporting a four-level pwm transmission protocol. The programmable logic device 114 is electrically connected to the patching module 200 to detect a type of the patching module 200. The programmable logic device 114 is further electrically connected to the controller 111 to transmit the type of the patching module 200 to the controller 111, and the programmable logic device 114 may transmit the type of the patching module 200 to the controller 111 through I2C, local Bus, or other protocols.
The controller 111 is also electrically connected to the signal processing module 113 to configure the signal processing module 113 according to the type of the patching module 200, and the controller 111 may configure the signal processing module 113 through MDIO, I2C, or other protocols, for example. The chip module 112 is electrically connected to the signal processing module 113, the chip module 112 and the signal processing module 113 perform signal transmission through 16 channels, and the signal processing module 113 and the first type switching module 210 perform signal transmission through 8 channels and a four-level pulse amplitude modulation transmission protocol. The first-type patching module 210 also has an external interface that can be used to electrically connect with other servers or electronic devices.
Referring to fig. 3, in the server assembly 300 of the embodiment of the present application, the switch module 200 is a second type switch module 220, and the chip module 112 is a chip module 112 supporting a non-return to zero transmission protocol. The programmable logic device 114 is electrically connected to the patching module 200 to detect a type of the patching module 200. The programmable logic device 114 is further electrically connected to the controller 111 to transmit the type of the patching module 200 to the controller 111, and the programmable logic device 114 may transmit the type of the patching module 200 to the controller 111 through I2C, local Bus, or other protocols.
The controller 111 is also electrically connected to the signal processing module 113 to configure the signal processing module 113 according to the type of the patching module 200, and the controller 111 may configure the signal processing module 113 through MDIO, I2C, or other protocols, for example. The chip module 112 is electrically connected with the signal processing module 113, the chip module 112 and the signal processing module 113 perform signal transmission through 16 channels, and the signal processing module 113 and the second type switching module 220 perform signal transmission through 16 channels and a non-return-to-zero transmission protocol. The second-type patching module 220 also has an external interface that can be used to electrically connect with other servers or electronic devices.
Referring to fig. 4, the controller 111 in the server assembly 300 of the embodiment of the present application may be further electrically connected to the chip module 112, and illustratively, when the controller 111 is electrically connected to the motherboard 110 of the server 100A, the controller 111 and the chip module 112 may be electrically connected through a cable or a wire embedded in the motherboard 110 of the server 100A; alternatively, when the controller 111 is electrically connected to other circuit boards, the controller 111 and the chip module 112 may be electrically connected through a cable.
The controller 111 may be configured to acquire the type of the chip module 112 and configure the signal processing module 113 according to the type of the chip module 112 and the type of the patching module 200, so that the chip module 112 communicates with the patching module 200 through the signal processing module 113. Illustratively, the types of the chip modules 112 may be divided according to the transport protocols supported by the chip modules 112.
Referring to fig. 5, an embodiment of the present application provides a server 100B, where the server 100B is consistent with the features of the server 100A in the server component 300 described above. The server 100B includes a controller 111, a chip module 112, and a signal processing module 113. In one possible implementation, the server 100B may further include a first circuit board and a second circuit board, where the controller 111 may be disposed on the first circuit board, and the chip module 112 and the signal processing module 113 may each be disposed on the second circuit board, which may be the motherboard 110 of the server 100B. In other possible implementations, the first circuit board and the second circuit board are integrally formed, i.e., the first circuit board and the second circuit board are combined into a single circuit board, which may be the motherboard 110 of the server 100B.
The controller 111 may be, for example, a baseboard management controller 111, or the controller 111 may be other control devices that meet the requirements of embodiments of the present application. The chip module 112 may be a central processing unit, or the chip module 112 may be a graphics processor module, or the chip module 112 may be other chip devices that meet the requirements of the embodiments of the present application. The signal processing module 113 may be a digital signal processing chip (Retimer chip), or the signal processing module 113 may be a logic device, or the signal processing module 113 may be other signal processing devices that meet the requirements of the embodiments of the present application.
The chip module 112 of the embodiment of the present application takes a graphics processor module as an example, and the graphics processor module may include a graphics processor substrate and a graphics processor chip disposed on the graphics processor substrate. The mounting mode of the graphics processor module is an on-board mode, that is, the graphics processor substrate is provided with a female connector (male connector), the motherboard 110 of the server 100B is provided with a male connector (female connector), the female connector and the male connector of the connector are mutually plugged, so that the graphics processor module is mounted on the motherboard 110 of the server 100B, and the graphics processor substrate and the motherboard 110 of the server 100B are parallel to each other.
The chip module 112 is electrically connected to the signal processing module 113. For example, the chip module 112 may be electrically connected to the motherboard 110 of the server 100B by soldering, etc., the signal processing module 113 may be electrically connected to the motherboard 110 of the server 100B by soldering, etc., and the chip module 112 and the signal processing module 113 may be electrically connected by a cable or a wire embedded in the motherboard 110 of the server 100B. The signal processing module 113 further has an external interface, which can be used for electrically connecting with the switch module 200. 16-channel signal transmission can be performed between the chip module 112 and the signal processing module 113.
The controller 111 is electrically connected to the signal processing module 113. The controller 111 may be electrically connected to the motherboard 110 of the server 100B by welding, and the controller 111 and the signal processing module 113 may be electrically connected by a cable or a wire embedded in the motherboard 110 of the server 100B; alternatively, the controller 111 may be electrically connected to other circuit boards by soldering, and the controller 111 and the signal processing module 113 may be electrically connected by a cable. The controller 111 is further configured to be directly or indirectly electrically connected to the adaptor module 200. The controller 111 is configured to acquire the type of the patching module 200 and configure the signal processing module 113 according to the type of the patching module 200, so that the chip module 112 communicates with the patching module 200 through the signal processing module 113.
Optionally, the number of the chip modules 112 in the embodiment of the present application may be at least two, the number of the signal processing modules 113 may be at least two, at least two chip modules 112 and at least two signal processing modules 113 are electrically connected in one-to-one correspondence in sequence, and at least two signal processing modules 113 are further used for electrically connecting with at least two switching modules 200 in one-to-one correspondence in sequence. For example, the number of the chip modules 112 and the number of the signal processing modules 113 may be 8, the 8 chip modules and the 8 signal processing modules are electrically connected in a one-to-one correspondence, and the 8 signal processing modules are also electrically connected in a one-to-one correspondence with the 8 switching modules. Of course, the number of the chip modules 112 and the number of the signal processing modules 113 may also be set to 4 (as shown in the figure) or other values according to actual needs, which will not be described herein.
With continued reference to fig. 5, the server 100B of an embodiment of the present application may further include a programmable logic device 114, and the programmable logic device 114 may be disposed on the second circuit board.
The programmable logic device 114 is connected in series between the controller 111 and the patching module 200, and the programmable logic device 114 is configured to detect the type of the patching module 200 and transmit to the controller 111. For example, the programmable logic device 114 may be electrically connected to the motherboard 110 of the server 100B by soldering, etc., and when the controller 111 is electrically connected to the motherboard 110 of the server 100B, the programmable logic device 114 and the controller 111 may be electrically connected by a cable or a wire embedded in the motherboard 110 of the server 100B; alternatively, when the controller 111 is electrically connected to other circuit boards, the programmable logic device 114 and the controller 111 may be electrically connected by a cable. The programmable logic device 114 may also be configured to electrically connect with the patching module 200 via a cable.
Referring to fig. 6, the controller 111 in the server 100B of the embodiment of the present application may be further electrically connected to the chip module 112, and illustratively, when the controller 111 is electrically connected to the motherboard 110 of the server 100B, the controller 111 and the chip module 112 may be electrically connected through a cable or a wire embedded in the motherboard 110 of the server 100B; alternatively, when the controller 111 is electrically connected to other circuit boards, the controller 111 and the chip module 112 may be electrically connected through a cable.
The controller 111 may be configured to acquire the type of the chip module 112 and configure the signal processing module 113 according to the type of the chip module 112 and the type of the patching module 200, so that the chip module 112 communicates with the patching module 200 through the signal processing module 113. Illustratively, the types of the chip modules 112 may be divided according to the transport protocols supported by the chip modules 112.
The server 100B provided in the embodiment of the present application includes the server 100A in the server assembly 300, so the server 100A in the server assembly 300 has the same effects, and the description of the server 100B in the embodiment of the present application is omitted here.
Referring to fig. 7, an embodiment of the present application provides a server cluster. The server cluster includes the server assembly 300 and the server 100B, where the switching module of the server assembly 300 may be electrically connected to the server 100B, and illustratively, the switching module of the server assembly 300 may be electrically connected to the server 100B through a cable.
The server cluster provided by the embodiment of the application includes the server assembly 300 and the server 100B, and the switching module of the server assembly 300 is electrically connected with the server 100B, so that the server assembly 300 and the server 100B can communicate with each other, thereby obtaining higher computing speed and performance.
The server cluster provided in the embodiment of the present application includes the server component 300, so the server component 300 has the same effects, and the description thereof is omitted herein.
In the description of the embodiments of the present application, it should be noted that, unless explicitly specified and limited otherwise, the terms "mounted," "connected," and "connected" are to be construed broadly, and may be, for example, fixedly connected, indirectly connected through an intermediary, or may be in communication with each other between two elements or in an interaction relationship between two elements. The specific meaning of the above terms in the embodiments of the present application will be understood by those of ordinary skill in the art according to the specific circumstances.
The embodiments or implications herein must have a particular orientation, be constructed and operate in a particular orientation, and therefore should not be construed as limiting the embodiments herein. In the description of the embodiments of the present application, the meaning of "a plurality" is two or more, unless specifically stated otherwise.
The terms first, second, third, fourth and the like in the description and in the claims of embodiments of the application and in the above-described figures, if any, are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that embodiments of the present application described herein may be capable of implementation in sequences other than those illustrated or described herein, for example. Furthermore, the terms "may include" and "have," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed or inherent to such process, method, article, or apparatus.
Finally, it should be noted that: the foregoing embodiments are merely for illustrating the technical solutions of the embodiments of the present application, and are not limited thereto, and although the embodiments of the present application have been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may be modified or some or all of the technical features may be replaced equivalently, and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments in this application.
Claims (14)
1. The server is characterized by being electrically connected with the switching module;
the server comprises a controller, a chip module and a signal processing module;
the chip module, the signal processing module and the switching module are electrically connected in sequence;
the controller is respectively and electrically connected with the switching module and the signal processing module, and is configured to acquire the type of the switching module, configure the signal processing module according to the type of the switching module, and enable the chip module to communicate with the switching module through the signal processing module.
2. The server of claim 1, further comprising a programmable logic device connected in series between the controller and the patching module, the programmable logic device configured to detect a type of the patching module and transmit to the controller.
3. The server of claim 1, wherein the controller is further electrically connected to the chip module, the controller configured to obtain a type of the chip module and configure the signal processing module according to the type of the chip module and the type of the switch module such that the chip module communicates with the switch module through the signal processing module.
4. The server of claim 2, further comprising a first circuit board and a second circuit board, wherein the controller is disposed on the first circuit board, and wherein the programmable logic device, the chip module, and the signal processing module are disposed on the second circuit board.
5. The server of claim 4, wherein the first circuit board and the second circuit board are of unitary construction.
6. The server according to any one of claims 1-5, wherein the number of the chip modules is at least two, and the number of the signal processing modules is at least two; at least two chip modules are electrically connected with at least two signal processing modules in a one-to-one correspondence.
7. The server according to any one of claims 1-5, wherein the signal processing module comprises one of a digital signal processing chip and a logic device;
and/or the chip module comprises one of a central processor and a graphics processor.
8. The server of claim 2, wherein the controller comprises a baseboard management controller; and/or the programmable logic device comprises a complex programmable logic device.
9. A server assembly comprising a patching module and the server of any of claims 1-8; and the signal processing module of the server and the controller of the server are electrically connected with the switching module.
10. The server assembly of claim 9, wherein the patching modules include at least two types, the patching modules of at least two types supporting at least two transport protocols in one-to-one correspondence;
the chip module of the server supports at least one of at least two of the transport protocols.
11. The server assembly of claim 10, wherein the patching modules include a first type patching module and a second type patching module;
the first type switching module is configured to support a four-level pulse amplitude modulation transmission protocol;
the second type switching module is configured to support a non-return to zero transmission protocol;
the chip module supports at least one of the four-level pulse amplitude modulation transmission protocol and the non-return to zero transmission protocol.
12. The server assembly of claim 11, wherein the patching module is a first type patching module when the chip module supports the four-level pulse amplitude modulation transmission protocol and the non-return to zero transmission protocol simultaneously.
13. The server assembly according to any one of claims 9-12, wherein the number of the switching modules is at least two, and at least two of the switching modules are electrically connected to at least two of the signal processing modules of the server in a one-to-one correspondence.
14. A server cluster comprising a server according to any of claims 1-8, and a server component according to any of claims 9-13; the server is electrically connected with the transfer module of the server component.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310096797.9A CN116028428A (en) | 2023-01-12 | 2023-01-12 | Server, server component and server cluster |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310096797.9A CN116028428A (en) | 2023-01-12 | 2023-01-12 | Server, server component and server cluster |
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| Publication Number | Publication Date |
|---|---|
| CN116028428A true CN116028428A (en) | 2023-04-28 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN202310096797.9A Pending CN116028428A (en) | 2023-01-12 | 2023-01-12 | Server, server component and server cluster |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| RU227818U1 (en) * | 2024-01-12 | 2024-08-07 | Акционерное общество Научно-производственный центр "Электронные вычислительно-информационные системы" (АО НПЦ "ЭЛВИС") | MULTICLUSTER COMPUTING UNIT BASED ON HETOROGENEOUS SNC |
-
2023
- 2023-01-12 CN CN202310096797.9A patent/CN116028428A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| RU227818U1 (en) * | 2024-01-12 | 2024-08-07 | Акционерное общество Научно-производственный центр "Электронные вычислительно-информационные системы" (АО НПЦ "ЭЛВИС") | MULTICLUSTER COMPUTING UNIT BASED ON HETOROGENEOUS SNC |
| RU227818U9 (en) * | 2024-01-12 | 2024-10-08 | Акционерное общество Научно-производственный центр "Электронные вычислительно-информационные системы" (АО НПЦ "ЭЛВИС") | MULTICLUSTER COMPUTING UNIT BASED ON HETEROGENEOUS SNC |
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