CN116011379B

CN116011379B - Simulation method, simulation device, electronic equipment and storage medium

Info

Publication number: CN116011379B
Application number: CN202310307756.XA
Authority: CN
Inventors: 徐帆
Original assignee: Changxin Memory Technologies Inc
Current assignee: Changxin Memory Technologies Inc
Priority date: 2023-03-28
Filing date: 2023-03-28
Publication date: 2023-08-15
Anticipated expiration: 2043-03-28
Also published as: CN116011379A

Abstract

The present disclosure provides a simulation method, an apparatus, an electronic device, and a storage medium, where when a semiconductor integrated circuit is simulated according to a circuit netlist, the simulation apparatus may obtain an initial circuit netlist, adjust power selection parameters in the initial circuit netlist according to different simulation modes, and perform simulation based on an excitation file and an adjusted target circuit netlist, to obtain a current simulation result of the integrated circuit. The method and the device can reduce the computational complexity when the semiconductor integrated circuit is simulated, and improve the efficiency of simulating the semiconductor integrated circuit.

Description

Simulation method, simulation device, electronic equipment and storage medium

Technical Field

The disclosure relates to the field of semiconductor technology, and in particular, to a simulation method, a simulation device, electronic equipment and a storage medium.

Background

In the processes of developing, designing, producing and the like of a semiconductor, the simulation device can test the semiconductor in a simulation mode so as to determine whether the semiconductor can realize functions. Specifically, the simulation device can execute simulation according to the excitation file and the circuit netlist of the semiconductor in a simulation mode, so that a simulation result of the semiconductor is obtained.

In the prior art, when the simulation modes of the semiconductor are different, the circuit netlist used when the simulation device executes the simulation is different. At this time, even if the same semiconductor is simulated, the simulation device needs to determine the circuit netlists of the semiconductor corresponding to different simulation modes, and the simulation of the semiconductor in the different simulation modes can be realized through the circuit netlists and the excitation files corresponding to the different simulation modes, so that the calculation complexity of the simulation of the semiconductor is greatly increased, and the simulation efficiency of the semiconductor is lower.

Disclosure of Invention

The disclosure provides a simulation method, a simulation device, electronic equipment and a storage medium, which are used for solving the technical problem of low efficiency when a semiconductor is simulated.

A first aspect of the present disclosure provides a simulation method, including: determining an integrated circuit to be simulated, wherein the integrated circuit comprises a power supply selection module and a plurality of target circuit modules; the power supply selection module is used for acquiring a plurality of input power supplies, selecting one input power supply from the plurality of input power supplies as a power supply for each target circuit module, and providing the power supply for the corresponding target circuit module; acquiring an initial circuit netlist of the integrated circuit, wherein the initial circuit netlist comprises power supply selection parameters of the power supply selection module, and the power supply selection parameters indicate the power supply selected by the power supply selection module from the plurality of input power supplies; acquiring a simulation mode of the integrated circuit, and adjusting a power supply selection parameter in the initial circuit netlist to be a target parameter value according to the simulation mode to obtain a target circuit netlist; and obtaining a simulation excitation file of the integrated circuit, and executing simulation based on the simulation excitation file and the target circuit netlist to obtain a simulation result of the integrated circuit.

In a first embodiment of the first aspect of the present disclosure, the plurality of input power sources includes: a global input power supply for supplying power to the integrated circuit; and the local input power supplies are respectively used for supplying power to the corresponding target circuit modules.

In an embodiment of the first aspect of the present disclosure, the adjusting the power supply selection parameter in the initial circuit netlist to the target parameter value according to the simulation mode includes: and according to the simulation mode, adjusting the power supply selection parameters to a first preset value or a second preset value, and determining that the power supply provided by the power supply selection module to each target circuit module is the global input power supply or the corresponding local input power supply according to the adjusted power supply selection parameters.

In a first embodiment of the first aspect of the present disclosure, the simulation mode includes: a power network architecture PDN emulation mode and a power current IDD emulation mode.

In an embodiment of the first aspect of the present disclosure, the adjusting the power selection parameter to a first preset value or a second preset value according to the simulation mode, and determining, according to the adjusted power selection parameter, that the power supply provided by the power supply selection module to each target circuit module is the global input power supply or the local input power supply, includes: and when the simulation mode is an IDD simulation mode, adjusting the power supply selection parameter to a first preset value, and determining that the power supply provided by the power supply selection module to each target circuit module in each target circuit module is the global input power supply according to the first preset value.

In an embodiment of the first aspect of the present disclosure, according to the simulation mode, the adjusting the power selection parameter to a first preset value or a second preset value, and determining, according to the adjusted power selection parameter, that the power supply provided by the power supply selection module to each target circuit module is the global input power supply or the local input power supply, further includes: and when the simulation mode is a PDN simulation mode, adjusting the power supply selection parameter to a second preset value, and determining that the power supply provided by the power supply selection module to each target circuit module is the local input power supply corresponding to each target circuit module according to the second preset value.

In a first embodiment of the first aspect of the present disclosure, the power supply selection module includes: the power supply selection units are respectively used for providing power supply for the corresponding target circuit modules; wherein the power supply selection unit comprises a first switch and a second switch; the first end of the first switch is connected with the corresponding local input power supply, the first end of the second switch is connected with the global input power supply, the second end of the first switch is connected with the second end of the second switch, and the second end of the first switch and the second end of the second switch are simultaneously connected with the target circuit module corresponding to the power supply selection unit.

In an embodiment of the first aspect of the present disclosure, when the power selection parameter is adjusted to the first preset value, the power selection parameter indicates that the first switch is in an off state and the second switch is in an on state; the determining, according to the adjusted power selection parameters, that the power supply provided by the power supply selection module to each target circuit module is the global input power supply or the local input power supply, includes: controlling the second switch to be communicated with the global input power supply and the corresponding target circuit module according to the first preset value, and taking the global input power supply as a power supply of the target circuit module; when the power supply selection parameter is adjusted to the second preset value, the power supply selection parameter indicates that the first switch is in a conducting state and the second switch is in a disconnecting state; the determining, according to the adjusted power selection parameters, that the power supply provided by the power supply selection module to each target circuit module is the global input power supply or the local input power supply, includes: and controlling the first switch to be communicated with the corresponding local input power supply and the corresponding target circuit module according to the second preset value, and taking the local input power supply as a power supply of the target circuit module.

In a first embodiment of the first aspect of the present disclosure, the power supply selection module includes: a plurality of power supply selection units, each of which is used for selecting one input power supply from the plurality of input power supplies as a power supply source and providing the power supply source to the corresponding target circuit module; the power supply selection unit comprises a first resistor and a second resistor; the first end of the first resistor is used for being connected with the corresponding local input power supply, the first end of the second resistor is used for being connected with the global input power supply, the second end of the first resistor is connected with the second end of the second resistor, and the second end of the first resistor and the second end of the second resistor are simultaneously connected with the target circuit module corresponding to the power supply selection unit.

In an embodiment of the first aspect of the present disclosure, when the power selection parameter is adjusted to the first preset value, the determining, according to the adjusted power selection parameter, that the power provided by the power selection module to each target circuit module is the global input power or the local input power, includes: setting the first resistor as a first resistance value and the second resistor as a second resistance value according to the first preset value, and providing the global input power supply as the power supply to the corresponding target circuit module; when the power selection parameter is adjusted to the second preset value, the determining, according to the adjusted power selection parameter, that the power supply provided by the power supply selection module to each target circuit module is the global input power supply or the local input power supply, includes: setting the first resistor as the second resistance value and the second resistor as the first resistance value according to the second preset value, and providing the corresponding local input power supply as the power supply to the corresponding target circuit module; the first resistance is larger than the equivalent load of the target circuit module, and the second resistance is smaller than the equivalent load of the target circuit module.

In a first embodiment of the first aspect of the present disclosure, the obtaining the simulation mode of the integrated circuit includes: receiving simulation mode indication information; and determining the simulation mode of the integrated circuit according to the simulation mode indication information.

A second aspect of the present disclosure provides an emulation apparatus, including: the system comprises a determining module, a power supply selecting module and a plurality of target circuit modules, wherein the determining module is used for determining an integrated circuit to be simulated, and the integrated circuit comprises the power supply selecting module and the plurality of target circuit modules; the power supply selection module is used for acquiring a plurality of input power supplies, selecting one input power supply from the plurality of input power supplies as a power supply for each target circuit module, and providing the power supply for the corresponding target circuit module; an obtaining module, configured to obtain an initial circuit netlist of the integrated circuit, where the initial circuit netlist includes power supply selection parameters of the power supply selection module, where the power supply selection parameters indicate the power supply selected by the power supply selection module from the plurality of input power supplies; the adjusting module is used for acquiring a simulation mode of the integrated circuit, and adjusting the power supply selection parameters in the initial circuit netlist to target parameter values according to the simulation mode to obtain a target circuit netlist; and the simulation module is used for acquiring a simulation excitation file of the integrated circuit, and executing simulation based on the simulation excitation file and the target circuit netlist to obtain a simulation result of the integrated circuit.

A third aspect of the present disclosure provides an electronic device, comprising: at least one processor and memory; the memory stores computer instructions; the at least one processor, when executing the computer instructions stored by the memory, performs the method of any one of the first aspects of the present disclosure.

A fourth aspect of the present disclosure provides a computer readable storage medium having stored therein computer instructions which, when executed by a processor, implement a method as in any of the first aspects of the present disclosure.

A fifth aspect of the present disclosure provides a computer program product comprising a computer program which, when executed, implements the method of any one of the first aspects of the present disclosure.

In summary, the simulation method, the simulation device, the electronic equipment and the storage medium provided by the disclosure can obtain an initial circuit netlist when the simulation device simulates a semiconductor integrated circuit according to the circuit netlist, adjust power supply selection parameters in the initial circuit netlist according to different simulation modes, and perform simulation based on an excitation file and an adjusted target circuit netlist to obtain a current simulation result of the integrated circuit. The simulation method and the simulation system can realize the simulation of the semiconductor integrated circuit under different simulation modes based on the same circuit netlist, so that the simulation result of the semiconductor integrated circuit is obtained, the calculation complexity during the simulation of the semiconductor integrated circuit can be reduced, and the simulation efficiency of the semiconductor integrated circuit is improved.

Drawings

In order to more clearly illustrate the embodiments of the present disclosure or the solutions in the prior art, the drawings that are required for the embodiments or the description of the prior art will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present disclosure, and that other drawings may be obtained according to these drawings without inventive faculty for a person skilled in the art.

Fig. 1 is a schematic circuit diagram of a semiconductor integrated circuit provided in the present disclosure;

FIG. 2 is a schematic top-level circuit diagram of a semiconductor integrated circuit provided by the present disclosure;

FIG. 3 is a schematic diagram of a top level circuit of another semiconductor integrated circuit provided by the present disclosure;

FIG. 4 is a schematic diagram of a top level circuit of yet another semiconductor integrated circuit provided by the present disclosure;

FIG. 5 is a schematic diagram of a simulation model for performing a simulation based on different top level circuits;

FIG. 6 is a schematic flow chart of a simulation method provided by the present disclosure;

FIG. 7 is a schematic diagram of an embodiment of a circuit configuration of an integrated circuit according to an embodiment of the present disclosure;

FIG. 8 is a schematic diagram of another embodiment of a circuit configuration of an integrated circuit provided in an embodiment of the present disclosure;

FIG. 9 is a schematic diagram of a simulation mode for performing simulation based on different top-level circuits according to the present application;

FIG. 10 is a schematic diagram of an embodiment of a power selection unit in an integrated circuit according to the present disclosure;

FIG. 11 is a schematic diagram of another embodiment of a power selection unit in an integrated circuit according to the present application;

FIG. 12 is a schematic diagram of an embodiment of a simulation apparatus provided in the present disclosure;

fig. 13 is a schematic structural diagram of an embodiment of an electronic device provided in the present disclosure.

Detailed Description

The following description of the technical solutions in the embodiments of the present disclosure will be made clearly and completely with reference to the accompanying drawings in the embodiments of the present disclosure, and it is apparent that the described embodiments are only some embodiments of the present disclosure, not all embodiments. Based on the embodiments in this disclosure, all other embodiments that a person of ordinary skill in the art would obtain without making any inventive effort are within the scope of protection of this disclosure.

The terms "first," "second," "third," "fourth" and the like in the description and in the claims and in the above-described figures, if any, are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that the embodiments of the disclosure described herein may be capable of operation in sequences other than those illustrated or described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.

The method and the device are applied to the manufacturing process of the semiconductor, and simulation is carried out on the semiconductor to obtain a simulation result corresponding to the semiconductor. The semiconductor may be a dynamic random access memory (Dynamic Random Access Memory, abbreviated as DRAM) or the like.

Fig. 1 is a schematic circuit diagram of a semiconductor integrated circuit according to the present disclosure. The semiconductor integrated circuit shown in fig. 1 includes 4 regions, which are sequentially denoted as region a, region B, region C, and region D. The 4 regions are distributed in a determinant of 2 rows and 2 columns. In the example of fig. 1, each region of the semiconductor integrated circuit includes 4 target circuit modules 201,4 inter-target circuit module connections. For example, region A includes target circuit modules A1-A4, region B includes target circuit modules B1-B4, region C includes target circuit modules C1-C4, and region D includes target circuit modules D1-D4.

The embodiments of the present disclosure are not limited to devices specifically included in a semiconductor integrated circuit. In one embodiment, the semiconductor integrated circuit shown in fig. 1 may be a memory chip, for example, a DRAM or the like. The memory chip includes a plurality of memory ARRAYs (ARRAY BANKs), each of which may be 1 target circuit module as shown in fig. 1.

In one embodiment, fig. 2 is a top-level circuit schematic diagram of a semiconductor integrated circuit provided by the present disclosure, wherein fig. 2 illustrates a specific implementation of the semiconductor integrated circuit of fig. 1. The semiconductor integrated circuit shown in fig. 2 is exemplified by a memory chip including a plurality of target circuit modules 201, which are denoted as target circuit modules A1 to A4, target circuit modules B1 to B4, target circuit modules C1 to C4, and target circuit modules D1 to D4. A control circuit module 202 is further included between the target circuit modules A3, A4, B3, and B4 shown in fig. 2 and the target circuit modules C1, C2, D1, and D2. The control circuit module 202 may be a control circuit in a memory chip, and the control circuit module 202 may be used to control devices in the memory chip. For example, the control circuit module 202 may be used to control devices in each memory chip.

In the process of developing, designing, producing and the like of a semiconductor integrated circuit, a tester of the semiconductor integrated circuit can test the semiconductor integrated circuit in a simulation mode through a simulation device to obtain a simulation result, wherein the simulation result comprises working parameters such as current, voltage and the like of the semiconductor integrated circuit, further, the working performance of the semiconductor integrated circuit is determined according to the working parameters of the semiconductor integrated circuit, whether the semiconductor integrated circuit can realize relevant functions or not is determined, and the optimization and improvement of the semiconductor integrated circuit can be guided according to the simulation result.

In one embodiment, the simulation apparatus may perform simulation based on a stimulus file and a circuit netlist of the semiconductor integrated circuit, thereby obtaining simulation results of the semiconductor integrated circuit. The excitation file includes simulation condition parameters in a circuit netlist of the semiconductor integrated circuit, and the simulation condition parameters can be input voltages and the like. In particular, the input voltage is used to power devices in a semiconductor integrated circuit.

Fig. 3 is a schematic diagram of a top-level circuit of another semiconductor integrated circuit provided by the present disclosure. When the simulation software of the simulation device performs power network structure (Power Delivery Network, abbreviated as PDN) simulation on the semiconductor integrated circuit shown in fig. 2, a voltage simulation result of the target circuit module 201 in the semiconductor integrated circuit can be obtained.

When PDN simulation is performed, the corresponding input power supply in the circuit netlist of the semiconductor integrated circuit may have parasitic effect parameters generated on the transmission line, which may cause the input power supply and other circuit module loads to affect the voltage simulation result. Therefore, when the simulation device simulates a semiconductor integrated circuit based on the circuit netlist and the stimulus file corresponding to the top-level circuit shown in fig. 3, the influence of the parasitic effect on the current simulation result needs to be considered.

Specifically, in the circuit netlist corresponding to the top-level circuit shown in fig. 3, a Global Power supply (Global Power) 100 supplies Power to the semiconductor integrated circuit through a Power input interface of the semiconductor integrated circuit. In this case, the power supply voltages of the local input power supplies 101 corresponding to the target circuit modules 201 are different in the circuit netlist due to the influence of the parasitic effect parameters on the transmission line between the global input power supply 100 and the corresponding target circuit modules 201. The local input power may be provided to the target circuit module 201 in different regions by different local input power sources 101 in the circuit netlist and the power supply voltages provided by the different local power sources 101 are different. For example, global input power supply 100 may supply power to target circuit blocks A1-A4 within region A via local input power supply 101A in the circuit netlist. In addition, the transmission paths through which the same local input power supply 101A supplies power to different target circuit modules A1 to A4 are different, that is, the power supply voltages supplied to each target circuit module may be different due to the difference of parasitic effects. For example, when the local input power supply 101A supplies power to the target circuit modules A1-A4, the power supply voltages supplied to the target circuit modules A1-A4 are also different. Alternatively, in another embodiment, the same number of local data sources as the number of target circuit modules may be provided in the circuit netlist, such that each local input source supplies power to a corresponding one of the target circuit modules.

In one embodiment, global input power supply 100 is a power supply that can supply power to target circuits of different levels of a semiconductor integrated circuit, and local input power supply 101 is a power supply that can supply power to target circuits corresponding to the level at which target circuit module 201 is located in the semiconductor integrated circuit.

Fig. 4 is a schematic diagram of a top-level circuit of yet another semiconductor integrated circuit provided by the present disclosure. As shown in fig. 4, when the simulation apparatus performs power supply current (IDD) simulation on the integrated circuit shown in fig. 2 to obtain the current simulation result of the target circuit module 201 in the integrated circuit, if the influence of the parasitic current generated by the input power supply on the transmission line on the voltage simulation result is considered, that is, the voltage value of the power supply of each module is different, the complexity of current calculation may be greatly increased, resulting in excessively long IDD simulation time. And even if the influence of parasitic effect is considered, the influence on the current simulation result of the IDD is not great, so that the influence of parasitic current generated by an input power supply on a transmission line on the voltage simulation result in the process of transmitting the input voltage in the circuit netlist to the target circuit module 201 can be not considered in actual IDD simulation, the complexity of current calculation in IDD simulation is reduced, and the IDD simulation time is further saved. That is, each target circuit module 201 in the corresponding circuit netlist is received by the ideal global input power supply 100.

For example, in the circuit netlist corresponding to the top-level circuit shown in fig. 4, the global input power supply 100 is supplied to the control circuit block 202 through the power input interface of the semiconductor integrated circuit. The global input power supply 100 also directly supplies the global input power supply 100 to the target circuit modules A1 to A4 in the area a, the target circuit modules B1 to B4 in the area B, the target circuit modules C1 to C4 in the area C, and the target circuit modules D1 to D4 in the area D, respectively, on the basis of not passing through the transmission line as shown in fig. 3.

As can be seen from the above and the top level circuit of the two different simulation modes shown in fig. 3 and 4, when the simulation modes of the semiconductor integrated circuit for performing the simulation are different, the simulation apparatus needs to perform the corresponding simulation based on the different circuit netlists. Even if the simulation device tests the same semiconductor integrated circuit, the top-layer circuit needs to use two corresponding different circuit netlists in two different simulation modes in a PDN simulation mode and an IDD simulation mode. And simulation under different test modes can be implemented on the integrated circuit through the circuit netlist and the excitation file corresponding to the different simulation modes. For example, fig. 5 is a schematic diagram of simulation patterns based on simulation of different top-level circuits, when PDN simulation is performed based on a PDN circuit structure, a PDN simulation circuit netlist (containing parasitics parameters, thus powering the target circuit module through a local input power supply) is used for PDN simulation. When IDD simulation is performed based on an IDD circuit structure, the corresponding IDD simulated circuit netlist (not including parasitic parameters, thereby powering the target circuit module through the global input power supply) is simulated using IDD. Therefore, the simulation method for the semiconductor integrated circuit has higher complexity when the semiconductor integrated circuit is simulated in multiple modes due to the fact that the simulation of the semiconductor integrated circuit in different simulation modes cannot be realized through the same circuit netlist, and therefore the simulation efficiency of the semiconductor integrated circuit is reduced.

Based on the above, the present disclosure provides a simulation method, apparatus, electronic device and storage medium, which can adjust parameters in a circuit netlist according to different simulation modes when a simulation apparatus simulates a semiconductor according to the circuit netlist, thereby realizing the simulation of the semiconductor integrated circuit in different simulation modes based on the same circuit netlist and further obtaining a current simulation result of the semiconductor integrated circuit. The simulation method, the simulation device, the electronic equipment and the storage medium reduce the calculation complexity when the semiconductor integrated circuit is simulated in multiple modes, and improve the efficiency when the semiconductor integrated circuit is simulated.

The technical scheme of the present disclosure is described in detail below with specific examples. The following embodiments may be combined with each other, and some embodiments may not be repeated for the same or similar concepts or processes.

Fig. 6 is a schematic flow chart of a simulation method provided in the present disclosure, where the simulation method shown in fig. 6 may be executed by a simulation apparatus and may be used to simulate an integrated circuit. For example, the simulation apparatus may be used to simulate the semiconductor integrated circuit shown in fig. 1 and 2, and a simulation result of the integrated circuit is obtained. In one embodiment, the simulation device may be an electronic device with relevant simulation processing capability, such as a computer, a server, a workstation, etc., and the simulation device is used as an execution body in the embodiment of the disclosure for illustration, but not limitation. Specifically, the simulation method as shown in fig. 6 includes:

S101: the simulation device determines an integrated circuit to be simulated.

In particular, embodiments of the present disclosure provide an integrated circuit that includes a power supply selection module and a plurality of target circuit modules. The power supply selection module is used for acquiring a plurality of input power supplies. The power selection module then also determines a power supply for each of the target circuit modules. The power supply selection module selects one input power supply from the acquired multiple input power supplies as a power supply for each target circuit module, and provides the power supply to the corresponding target circuit module, namely, the power supply selection module selects one input power supply from the multiple input power supplies as the power supply for each target circuit module.

In one embodiment, the semiconductor integrated circuit provided in this embodiment may be a DRAM integrated circuit, and the target circuit module may be a memory array module in the DRAM integrated circuit.

In one embodiment, the power selection module includes at least one power selection unit, and the number of power selection units is the same as the number of target circuit modules 201. Each power supply selection unit is configured to obtain a plurality of input power supplies, and select one input power supply from the plurality of input power supplies as a power supply source of the corresponding target circuit module 201.

For example, fig. 7 is a schematic diagram of an embodiment of a circuit structure of an integrated circuit according to an embodiment of the present disclosure, where when a target circuit module 201 is included in the integrated circuit 20, the power supply selection module shown in fig. 7 includes a power supply selection unit 200, and the power supply selection unit 200 is used to obtain a plurality of input power sources, and the embodiment shown in fig. 7 is illustrated by taking 2 input power sources Vin1 and Vin2 as an example. The power supply selection unit 200 is further configured to select one from the received plurality of input power supplies as the power supply Vout to be supplied to the target circuit module 201.

For another example, fig. 8 is a schematic diagram of another circuit structure embodiment of an integrated circuit provided in an embodiment of the present disclosure, where when N target circuit modules 201 are included in the integrated circuit 20, the power supply selection module shown in fig. 8 includes N power supply selection units, where the power supply selection unit 200-1 is configured to receive multiple input power sources, and the embodiment shown in fig. 8 is illustrated by taking 2 input power sources Vin1-1 and Vin2-1 as examples, and the power supply selection unit 200-1 is configured to select one of the N input power sources as the power supply source Vout-1 to be provided to the target circuit modules 201-1. Similarly, the power supply selection unit 200-2 is configured to receive a plurality of input power sources, such as the embodiment shown in fig. 8, for example, 2 input power sources Vin1-2 and Vin2-2, and select one of the input power sources as the power supply source Vout-2 to be provided to the target circuit module 201-2, and so on.

In one embodiment, input power source Vin2 shown in FIG. 7 may be a global input power source, and input power sources Vin2-1, vin2- … …, vin2-N shown in FIG. 8 may be the same global input power source. In another embodiment, the input power source Vin1 shown in FIG. 7 may be a local input power source, and the input power sources Vin1-1, vin1-2 and … … shown in FIG. 8 are different local input power sources.

In one embodiment, the simulation apparatus may receive an integrated circuit instructed or input by the tester through an interactive device such as a mouse or a keyboard in S101, so as to determine the integrated circuit to be simulated, or the simulation apparatus may also receive an integrated circuit sent by another device in S101, so as to determine the integrated circuit to be simulated.

S102: the simulation device obtains an initial circuit netlist of the integrated circuit. Wherein the initial circuit netlist comprises power supply selection parameters of a power supply selection module. Specifically, the power selection parameter indicates a power supply selected by the power supply selection module from a plurality of input power supplies.

For example, the simulation device may obtain an initial circuit netlist of integrated circuit 20 as shown in FIG. 7. In the initial circuit netlist, the power supply selection module may select an input power source Vin2 as a power supply source from a plurality of input power sources Vin1 and Vin2 according to an instruction of a power supply selection parameter, and provide the power supply source to the target circuit module 201.

S103: the simulation device obtains a simulation mode of the integrated circuit, and adjusts the power supply selection parameters in the initial circuit netlist to target parameter values according to the simulation mode to obtain a target circuit netlist.

In one embodiment, the simulation device may receive simulation mode indication information input by a tester through an interactive device such as a mouse or a keyboard, and determine a simulation mode according to the indication information. Or the simulation device can also receive simulation mode indication information sent by other equipment and determine a simulation mode according to the indication information. Alternatively still, the simulation means may determine the simulation mode by means of a code or set simulation parameters.

In one embodiment, taking the integrated circuit shown in fig. 7 as an example, the plurality of input power sources acquired by the power supply selection unit 200 may include a local input power source Vin1 and a global input power source Vin2. The global input power Vin2 is used for supplying power to the integrated circuit, and the local input power Vin1 is used for supplying power to the target circuit module 201 corresponding to the power supply selection unit 200. The global input power supply 100 is a power supply that can supply power to target circuits of different levels of the semiconductor integrated circuit, and the local input power supply 101 is a power supply that can supply power to corresponding target circuits of the level where the target circuit module 201 is located in the semiconductor integrated circuit.

In one embodiment, the power supply selection unit 200 may determine the received local input voltage Vin1 as the power supply voltage Vout and provide the power supply voltage Vout to the target circuit module 201, where vout=vjn1. Alternatively, the power supply selection unit 200 may also determine the received global input voltage Vin2 as the power supply voltage Vout and supply the power supply voltage Vout to the target circuit module 201, where vout=vin 2.

In one embodiment, a simulation mode of a simulation apparatus when simulating an integrated circuit includes: PDN emulation mode and IDD emulation mode.

In the PDN emulation mode, the local input power Vin1 is supplied to the target circuit module 201 by the local input power Vin1. Accordingly, when the emulation mode is the PDN emulation mode, the emulation device determines the local input power Vin1 received by the power supply selection unit 200 as the power supply source, and supplies the power supply source to the target circuit module 201.

In the IDD simulation mode, the global input power Vin2 is provided to the target circuit module 201 by the global input power Vin2. Accordingly, when the emulation mode is the IDD emulation mode, the emulation device determines the global input power Vin2 received by the power supply selection unit 200 as the power supply source, and supplies the power supply source to the target circuit module 201.

In one embodiment, the power selection parameters of the initial circuit netlist may have initial default values, and after the simulation device obtains the initial circuit netlist, the simulation device may adjust the power selection parameters in the initial circuit netlist to target parameter values according to a simulation mode. Wherein the power selection parameter indicates a power supply selected by the power selection module from a plurality of input power supplies.

In the IDD simulation mode, the target parameter value is a first preset value, and at this time, the simulation device adjusts the power supply selection parameter in the initial circuit netlist to the first preset value to obtain a target circuit netlist including the first preset value. The simulation device may determine, according to the first preset value in the target circuit netlist, that the power supply provided by the power supply selection unit 200 to the corresponding target circuit module 201 is the global input power Vin2.

In the PDN simulation mode, the target parameter value is a second preset value, and at the moment, the simulation device adjusts the power supply selection parameter in the initial circuit netlist to the second preset value to obtain a target circuit netlist comprising the second preset value. The simulation device may determine, according to the second preset value in the target circuit netlist, that the power supply provided by the power supply selection unit 200 to the corresponding target circuit module 201 is the local input power Vin1.

It will be appreciated that when the initial default values of the power selection parameters in the circuit netlist are different from the target parameter values, the simulation device may adjust the power selection parameters to the target parameter values, thereby obtaining the target circuit netlist. When the initial default value of the power selection parameter in the circuit netlist is the same as the target parameter value, the simulation device can directly take the initial circuit netlist as the target circuit netlist without modifying the default value of the power selection parameter.

S104: the simulation device obtains the simulation excitation file, and executes simulation based on the simulation excitation file and the target circuit netlist determined in S103 to obtain a simulation result of the integrated circuit.

Specifically, the simulation stimulus file includes a global input power supply provided to the target circuit netlist. For example, in the example shown in fig. 7, a simulated stimulus file may be used to provide the global input power Vin2. The local input voltage Vin1 can be obtained according to the global input voltage Vin2 according to the setting of parasitic parameters in the circuit netlist. The local input power Vin1 is a power obtained by taking into account the parasitic effect of the global input voltage Vin2 on the power line supplying power to the target circuit module 201, and the voltage value of the local input power Vin1 is different from the voltage value of the global input power Vin2 due to the voltage drop generated by the parasitic effect, so that the voltage value of the local input power Vin1 can be used to represent the power supply actually received by the target circuit module 201. The global input power Vin2 is directly input to the power node of the target circuit module 201, does not pass through a power transmission line inside the integrated circuit, is a power without taking parasitic effects into consideration, and can be used to represent the power received by the target circuit module 201 under ideal conditions. In some embodiments, the voltage value of the local input power source Vin1 is less than the voltage value of the global input power source Vin2. Meanwhile, because the power supply is transmitted to different target circuit modules through different transmission lines, the parasitic effect has different effects on the change of the power supply voltage, and therefore, the voltage values of the local input power supply Vin1 received by the different target circuit modules are different.

In one embodiment, the simulation device can receive simulation excitation files input by a tester through interaction equipment such as a mouse, a keyboard and the like; alternatively, the simulation device may also receive the simulation excitation file sent by the other device.

Then, the simulation device performs simulation based on the acquired simulation excitation file and the target circuit netlist obtained in S103, and obtains a simulation result of the integrated circuit. The simulation result may be used to indicate a current value of the target circuit module 201 in the integrated circuit, and the like.

In summary, according to the simulation method provided by the embodiment, when the simulation device simulates the semiconductor integrated circuit according to the circuit netlist, after the initial circuit netlist is obtained, the power supply selection parameters in the initial circuit netlist are adjusted to target parameter values according to different simulation modes to obtain the target circuit netlist, and the simulation result of the semiconductor integrated circuit is obtained based on the obtained excitation file and the adjusted target circuit netlist.

Further, when the simulation device simulates a circuit netlist including parasitic parameters corresponding to the PDN simulation mode in the PDN simulation mode described in fig. 3 and the IDD simulation mode shown in fig. 4, the simulation device may directly simulate the circuit netlist according to the circuit netlist in the PDN simulation mode, and the simulation device may simulate the adjusted circuit netlist only by adjusting the power selection parameters in the circuit netlist in the IDD simulation mode. For example, fig. 9 is a schematic diagram of a simulation mode for performing simulation based on different top-level circuits, where when PDN simulation is performed based on a PDN circuit structure, a PDN simulation circuit netlist is corresponding to the PDN simulation using the PDN simulation. When IDD simulation is performed based on the IDD circuit structure, the simulation device can adjust the PDN circuit netlist according to the circuit selection parameters to obtain the IDD circuit netlist. Therefore, when the simulation method provided by the embodiment simulates the semiconductor integrated circuit, the simulation of the semiconductor integrated circuit in different simulation modes can be realized through the same circuit netlist, so that the calculated amount and the calculated complexity when the simulation is carried out on the semiconductor integrated circuit are reduced, and the simulation efficiency of the semiconductor is further improved.

Fig. 10 is a schematic structural diagram of an embodiment of a power supply selection unit in an integrated circuit provided in the present disclosure, and the power supply selection unit 200 shown in fig. 10 may be applied to the embodiment shown in fig. 7 or fig. 8. Taking the power supply selection unit 200 in fig. 7 as an example, the power supply selection unit 200 includes: a first switch S1 and a second switch S2. The first terminal a of the first switch S1 is connected to the local input power source Vin1, and the first terminal c of the second switch S2 is connected to the global input power source Vin2. The second terminal b of the first switch S1 is connected to the second terminal d of the second switch S2, and the second terminal b of the first switch S1 and the second terminal d of the second switch S2 are also connected to the target circuit module 201 corresponding to the power supply selection unit 200.

When the emulation mode is a PDN emulation mode, the first preset value indicates that the first switch S1 is in an off state and the second switch is in an on state. The simulation device controls the first switch S1 to be in an off state and the second switch S2 to be in an on state according to the first preset value, so that the second switch S2 is connected with the global input power Vin2 and the corresponding target circuit module 201. The first terminal c of the second switch S2 receives the global input power Vin2, the global input power Vin2 passes through the second switch S2, the second terminal d of the second switch S2 provides the power supply Vout to the target circuit module 201, and at this time, the voltage of the global input power Vin2 at the first terminal c of the second switch S2 is the same as the voltage of the power supply Vout at the second terminal d.

When the simulation mode is the IDD simulation mode, the second preset value is used for indicating that the first switch S1 is in an on state and the second switch is in an off state. The simulation device controls the first switch S1 to be in an on state and the second switch S2 to be in an off state according to the second preset value, so that the first switch S1 is connected with the local input power source Vin1 and the corresponding target circuit module 201. The first terminal a of the first switch S1 receives the local input power source Vin1, the local input power source voltage Vin1 passes through the first switch S1, the second terminal b of the first switch S1 provides the power source Vout to the target circuit module 201, and at this time, the voltage of the local input power source Vin1 at the first terminal a of the first switch S1 is the same as the voltage of the power source Vout at the second terminal b.

In one embodiment, the simulation device may receive the simulation indication information and determine the simulation mode based on the received simulation mode indication information.

In one embodiment, the simulation device may adjust the power selection parameter according to different simulation modes, and control the first switch S1 and the second switch S2 according to the power selection parameter. In one embodiment, the simulation apparatus may store the correspondence relationship between the simulation mode indication information FLAG, the power selection parameter PS, the state of the first switch S1, and the state of the second switch S2 in the manner of table 1 below.

TABLE 1

Therefore, when the simulation mode indication information flag=0 received by the simulation device, the simulation device can determine that the power selection parameter PS is set to the second preset value according to table 1. Subsequently, the simulation device controls the first switch S1 to be in an on state and the second switch S2 to be in an off state according to the second preset value, so that the first end a of the first switch S1 receives the local input power source Vin1, the local input power source Vin1 passes through the first switch S1, and the second end b of the first switch S1 provides the power supply Vout for the target circuit module 201, thereby realizing the PDN simulation mode according to the simulation mode indication information flag=0.

When the simulation mode indication information flag=1 received by the simulation device, the simulation device may determine, according to table 1, that the power selection parameter PS is set to a first preset value. Subsequently, the simulation device controls the first switch S1 to be in an off state and the second switch S2 to be in an on state according to the first preset value, the first end c of the second switch S2 receives the global input power Vin2, the global input power Vin2 passes through the second switch S2, and the second end d of the second switch S2 provides the power supply Vout to the target circuit module 201, so that the IDD simulation mode is realized according to the simulation mode indication information flag=1.

In one embodiment, the emulation mode indication information FLAG and the power supply selection parameter PS may be equal. Alternatively, in another embodiment, the emulation mode indication information FLAG may be used to represent the power supply selection parameter PS. For example, the simulation apparatus may store the correspondence relationship among the simulation mode indication information FLAG, the state of the first switch S1, and the state of the second switch S2 in the manner of table 2 below. At this time, the simulation mode indication information may be used to represent the power supply selection parameter. Then when the simulation mode indication information flag=0 received by the simulation device, the simulation device can set the power selection parameter PS to 0 according to the power selection parameter PS; when the simulation mode indication information flag=1 received by the simulation device, the simulation device may set the power selection parameter PS to 1 according to the power selection parameter PS.

TABLE 2

Fig. 11 is a schematic structural diagram of another embodiment of a power supply selection unit in an integrated circuit according to the present application, where the power supply selection unit 200 shown in fig. 11 may be applied to the embodiment shown in fig. 7 or fig. 8. Taking the power supply selection unit 200 in fig. 7 as an example, the power supply selection unit 200 includes: a first resistor R1 and a second resistor R2. The first terminal a of the first resistor R1 receives the local input power Vin1, and the first terminal c of the second resistor R2 receives the global input power Vin2. The second end b of the first resistor R1 is connected to the second end d of the second resistor R2, and the second end b of the first resistor R1 and the second end d of the second resistor R2 are also connected to the target circuit module 201 corresponding to the power supply selection unit 200.

When the simulation mode is the IDD simulation mode, the first preset value indicates that the resistance of the first resistor R1 is the first resistance and the resistance of the second resistor R2 is the second resistance. The simulation device sets the resistance of the first resistor R1 to be a first resistance and sets the resistance of the second resistor R2 to be a second resistance according to the first preset value. The first resistance is greater than the equivalent load of the target circuit module 201, and the second resistance is less than the equivalent load of the target circuit module 201. At this time, the resistance of the first resistor R1 approaches infinity, and the resistance of the second resistor R2 approaches infinity, so that the second resistor R2 is connected to the global input power Vin2 and the target circuit module 201. The first terminal c of the second resistor R2 receives the global input power Vin2, the global input voltage Vin2 passes through the second resistor R2, and the second terminal d of the second resistor R2 provides the power supply Vout to the target circuit module 201. Since the resistance of the second resistor R2 approaches infinity and is smaller than the equivalent load of the target circuit module 201, the voltage values of the global input power Vin2 at the first terminal c and the power supply Vout at the second terminal d of the second resistor R2 can be considered to be approximately the same.

When the simulation mode is a PDN simulation mode, the second preset value indicates that the resistance of the first resistor R1 is the second resistance and the resistance of the second resistor R2 is the first resistance. The simulation device sets the resistance of the first resistor R1 to be a second resistance and sets the resistance of the second resistor R2 to be a first resistance according to the second preset value. The first resistance is greater than the equivalent load of the target circuit module 201, and the second resistance is less than the equivalent load of the target circuit module 201. At this time, the resistance of the first resistor R1 approaches infinity, and the resistance of the second resistor R2 approaches infinity, so that the first resistor R1 communicates the global input power Vin2 with the target circuit module 201. The first end a of the first resistor R1 receives the local input power source Vin1, the local input power source Vin1 passes through the first resistor R1, and the second end b of the first resistor R1 provides the power supply Vout to the target circuit module 201. Since the resistance of the first resistor R1 approaches infinity and is smaller than the equivalent load of the target circuit module 201, the voltages of the local input power Vin1 at the first terminal a and the power supply Vout at the second terminal b of the first resistor R1 can be considered to be the same.

In one embodiment, the simulation device may determine a simulation mode according to the received simulation mode indication information, adjust the power selection parameter according to different simulation modes, and determine the resistance values of the first resistor R1 and the second resistor R2 according to the power selection parameter. In one embodiment, the simulation apparatus may determine the resistance value of the first resistor R1 and the resistance value of the second resistor R2 according to the simulation mode indication information FLAG by using the following program codes. The resistance of the first resistor R1 may be set to 10e9 x FLAG, and the resistance of the second resistor R2 may be set to 10e9 x (1-FLAG).

.subckt VDD_Switch IN OUT

R1 IN OUT r= 10e9*FLAG

R2 VDD! OUT r= 10e9*(1-FLAG)

.ends VDD_Switch

.parameter FLAG=0 ### PDN

In this example, the simulation device uses the simulation mode indication information FLAG as the power selection parameter PS as an example, and when the simulation device receives the code, the simulation device can determine that the power selection parameter PS is 0 according to the simulation mode indication information flag=0, so as to implement the PDN simulation mode according to the power selection parameter PS.

For another example, when the program code includes:

.subckt VDD_Switch IN OUT

R1 IN OUT r= 10e9*(1-FLAG)

R2 VDD! OUT r= 10e9*FLAG

.ends VDD_Switch

.parameter FLAG=1 ### IDD

when the simulation device receives the code, the simulation device can determine that the power selection parameter PS is 1 according to the simulation mode indication information flag=1, so as to realize the IDD simulation mode according to the power selection parameter PS.

In the above embodiments, taking the value of the simulation mode indication information FLAG received by the power supply selection module as 0 or 1 as an example. And the number of bits of the emulation mode indication information FLAG is related to the number of input power supplies. For example, when the power supply selection unit receives 2 input power supplies, the number of bits of the simulation mode indication information FLAG is 1 bit, when the power supply selection unit receives 3 to 4 input power supplies, the number of bits of the simulation mode indication information FLAG is 2 bits, and so on, and when the power supply selection unit receives n input power supplies, the number of bits of the simulation mode indication information FLAG is 2n bits.

It will be appreciated that, for the integrated circuit of fig. 8, when the power supply selection module includes a plurality of power supply selection units 200, each power supply selection unit 200 may respectively receive a plurality of input power sources, and determine a power supply voltage corresponding to its corresponding target circuit module 201 according to the received power source selection parameters. For example, the power selection unit 200-1 receives the global input power Vin2-1 and the local input power Vin1-1, selects the power Vout-1 according to the received power selection parameter 1 to provide to the target circuit module 201-1, the power selection unit 200-2 receives the global input power Vin2-2 and the local input power Vin1-2, selects the power Vout-2 according to the received power selection parameter 2 to provide to the target circuit module 201-2, and so on. The power supply selection unit 200-N receives the global input power source Vin2-N and the local input power source Vin1-N, and selects the power supply Vout2-N according to the received power supply selection parameter N to provide to the target circuit module 201-N.

The power selection parameters received by the plurality of power selection units 200 in the integrated circuit may be set according to the emulation mode.

For example, in one embodiment, the power selection parameters received by multiple power selection units 200 in an integrated circuit may be the same, e.g., each power selection unit 200 selects a received global input power as a power supply according to the power selection parameters, or each power selection unit 200 selects a received local input power as a power supply according to the power selection parameters.

In another embodiment, the power selection parameters received by each power selection unit 200 in the integrated circuit may be different, and then one part of the plurality of power selection units 200 selects the received global input power as the power supply according to the power selection parameters, and the other part selects the received local input power as the power supply according to the power selection parameters.

In the foregoing embodiments, the method provided by the embodiments of the present disclosure is described, and in order to implement the functions in the method provided by the embodiments of the present disclosure, a device or an apparatus that is a main body for performing the method, for example, an emulation apparatus may include a hardware structure and/or a software module, and implement the functions in the form of a hardware structure, a software module, or a hardware structure plus a software module. Some of the functions described above are performed in a hardware configuration, a software module, or a combination of hardware and software modules, depending on the specific application of the solution and design constraints.

For example, fig. 12 is a schematic structural diagram of an embodiment of a simulation apparatus provided in the present disclosure. As shown in fig. 12, the simulation apparatus 1000 provided in the present disclosure includes: a determination module 1001, an acquisition module 1002, an adjustment module 1003, and a simulation module 1004. The determining module 1001 is configured to determine an integrated circuit to be emulated, where the integrated circuit includes a power supply selecting module and a plurality of target circuit modules; the power supply selection module is used for acquiring a plurality of input power supplies, selecting one input power supply from the plurality of input power supplies as a power supply for each target circuit module, and providing the power supply for the corresponding target circuit module. The acquiring module 1002 is configured to acquire an initial circuit netlist of an integrated circuit, where the initial circuit netlist includes power selection parameters of a power supply selection module, where the power selection parameters are used to instruct the power supply selection module to select a power supply from a plurality of input power supplies. The adjusting module 1003 is configured to obtain a simulation mode of the integrated circuit, and adjust a power supply selection parameter in the initial circuit netlist to a target parameter value according to the simulation mode, so as to obtain a target circuit netlist. The simulation module 1004 is configured to obtain a simulation excitation file of the integrated circuit, and perform simulation based on the simulation excitation file and the target circuit netlist to obtain a simulation result of the integrated circuit.

In one embodiment of the present disclosure, the plurality of input power sources includes: the global input power supply is used for supplying power to the integrated circuit to be simulated; and the local input power supplies are respectively used for supplying power to the corresponding target circuit modules.

In an embodiment of the present disclosure, the adjusting module 1003 is specifically configured to adjust the power selection parameter to a first preset value or a second preset value according to the simulation mode, and determine, according to the target parameter value, whether the power supply provided by the power supply selection module to the plurality of target circuit modules is a global input power supply or a local input power supply.

In one embodiment of the present disclosure, the simulation mode includes: a power network architecture PDN emulation mode and a power current IDD emulation mode.

In an embodiment of the present disclosure, the adjusting module 1003 is specifically configured to adjust the power selection parameter to a target parameter value when the simulation mode is the IDD simulation mode, and determine, according to the target parameter value, that the power supply provided by the power supply selection module to each of the plurality of target circuit modules is a global input power supply.

In an embodiment of the present disclosure, the adjusting module 1003 is specifically configured to adjust the power selection parameter to a second preset value to obtain a target parameter value when the simulation mode is a PDN simulation mode, and determine, according to the target parameter value, that the power supply provided by the power supply selection module to the plurality of target circuit modules is a plurality of local input voltages, respectively.

In an embodiment of the present disclosure, the power supply selection module includes: a plurality of power supply selection units, each of which is used for selecting one input power supply from the plurality of input power supplies as a power supply source and providing the power supply source to the corresponding target circuit module; the power supply selection unit comprises a first switch and a second switch; the first end of the first switch is used for being connected with a local input power supply, the first end of the second switch is used for being connected with a global input power supply, the second end of the first switch is connected with the second end of the second switch, and the second end of the first switch and the second end of the second switch are simultaneously connected with a target circuit module corresponding to the power supply selection unit.

In an embodiment of the disclosure, the first preset value is used for indicating that the first switch is in an off state and the second switch is in an on state, so that the second resistor receives the global input voltage and provides a power supply for the target circuit module; the second preset value is used for indicating that the first switch is in an on state and the second switch is in an off state, so that the first switch receives the local input voltage and provides power supply for the target circuit module.

In an embodiment of the present disclosure, the power supply selection module includes: the power supply selection units are respectively used for providing power supply for the corresponding target circuit modules; the power supply selection unit comprises a first resistor and a second resistor; the first end of the first resistor is used for being connected with a local input power supply, the first end of the second resistor is used for being connected with a global input power supply, the second end of the first resistor is connected with the second end of the second resistor, and the second end of the first resistor and the second end of the second resistor are simultaneously connected with a target circuit module corresponding to the power supply selection unit.

In an embodiment of the disclosure, the first preset value is used for indicating a first resistance value of the first resistor and a second resistance value of the second resistor, so that the second resistor receives the global input voltage and provides the output voltage to the memory array module; the second preset value is used for indicating a third resistance value of the first resistor and a fourth resistance value of the second resistor, so that the first resistor receives the local input voltage and provides the output voltage for the memory array module.

In an embodiment of the present disclosure, the obtaining module 1001 is specifically configured to receive simulation mode indication information; and determining the simulation mode of the integrated circuit according to the simulation mode indication information.

The implementation manner and principle of the simulation device provided in this embodiment may refer to the simulation method provided in the foregoing embodiment of the present disclosure, and will not be described in detail.

It should be noted that, it should be understood that the division of each module in the above simulation apparatus is only a division of a logic function, and may be fully or partially integrated into one physical entity or may be physically separated. And these modules may all be implemented in software in the form of calls by the processing element; or can be realized in hardware; the method can also be realized in a form of calling software by a processing element, and the method can be realized in a form of hardware by a part of modules. For example, the processing module may be a processing element that is set up separately, may be implemented as integrated in a semiconductor of the above-mentioned apparatus, or may be stored in a memory of the above-mentioned apparatus in the form of program code, and the functions of the above-mentioned determining module may be called and executed by the processing element of the above-mentioned apparatus. The implementation of the other modules is similar. In addition, all or part of the modules can be integrated together or can be independently implemented. The processing element described herein may be an integrated circuit having signal processing capabilities. In implementation, each step of the above method or each module above may be implemented by an integrated logic circuit of hardware in a processor element or an instruction in a software form.

For example, the modules above may be one or more integrated circuits configured to implement the methods above, such as: one or more specific integrated circuits (application specific integrated circuit, ASIC), or one or more microprocessors (digital signal processor, DSP), or one or more field programmable gate arrays (field programmable gate array, FPGA), or the like. For another example, when a module above is implemented in the form of a processing element calling program code, the processing element may be a general-purpose processor, such as a central processing unit (central processing unit, CPU) or other processor that may call program code. For another example, the modules may be integrated together and implemented in the form of a system-on-a-chip (SOC).

In the above embodiments, it may be implemented in whole or in part by software, hardware, firmware, or any combination thereof. When implemented in software, may be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When loaded and executed on a computer, produces a flow or function in accordance with embodiments of the present disclosure, in whole or in part. The computer may be a general purpose computer, a special purpose computer, a computer network, or other programmable apparatus. The computer instructions may be stored in or transmitted from one computer-readable storage medium to another, for example, by wired (e.g., coaxial cable, optical fiber, digital Subscriber Line (DSL)), or wireless (e.g., infrared, wireless, microwave, etc.). The computer readable storage medium may be any available medium that can be accessed by a computer or a data storage device such as a server, data center, etc. that contains an integration of one or more available media. The usable medium may be a magnetic medium (e.g., floppy disk, hard disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium (e.g., solid State Disk (SSD)), etc.

For example, fig. 13 is a schematic structural diagram of an embodiment of an electronic device provided in the present disclosure, where the electronic device may be used to perform any of the simulation methods according to the foregoing embodiments of the present disclosure. As shown in fig. 13, the electronic device provided by the present disclosure includes: at least one processor 2001 and memory 2002; wherein the memory 2002 has stored therein computer instructions that can be executed by the at least one processor 2001. When the processor 2001 executes computer instructions, the processor 2001 may be used to perform steps in a method as in any of the foregoing embodiments of the present disclosure. In one embodiment, processor 2001 may communicate via communication interface 2003, such as obtaining a circuit netlist and a stimulus file, etc.

The present disclosure also provides a computer readable storage medium having stored thereon computer instructions which, when executed by a processor, are operable to perform a simulation method as in any of the foregoing embodiments of the present disclosure.

Embodiments of the present disclosure also provide a semiconductor for executing instructions for performing any of the simulation methods as previously described in the present disclosure.

Embodiments of the present disclosure also provide a computer program product comprising a computer program stored in a storage medium from which at least one processor can read, the at least one processor executing the computer program implementing the steps of any one of the simulation methods as described in the present disclosure.

Those of ordinary skill in the art will appreciate that: all or part of the steps for implementing the method embodiments described above may be performed by hardware associated with program instructions. The foregoing program may be stored in a computer readable storage medium. The program, when executed, performs steps including the method embodiments described above; and the aforementioned storage medium includes: various media that can store program code, such as ROM, RAM, magnetic or optical disks.

Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present disclosure, and not for limiting the same; although the present disclosure has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some or all of the technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present disclosure.

Claims

1. A simulation method, comprising:

determining an integrated circuit to be simulated, wherein the integrated circuit comprises a power supply selection module and a plurality of target circuit modules; the power supply selection module is used for acquiring a plurality of input power supplies, selecting one input power supply from the plurality of input power supplies as a power supply for each target circuit module, and providing the power supply for the corresponding target circuit module;

Acquiring an initial circuit netlist of the integrated circuit, wherein the initial circuit netlist comprises power supply selection parameters of the power supply selection module, and the power supply selection parameters indicate the power supply selected by the power supply selection module from the plurality of input power supplies;

acquiring a simulation mode of the integrated circuit, and adjusting a power supply selection parameter in the initial circuit netlist to be a target parameter value according to the simulation mode to obtain a target circuit netlist;

acquiring a simulation excitation file of the integrated circuit, and executing simulation based on the simulation excitation file and the target circuit netlist to obtain a simulation result of the integrated circuit;

the plurality of input power sources includes:

a global input power supply for supplying power to the integrated circuit;

a plurality of local input power sources for supplying power to the corresponding target circuit modules respectively;

the adjusting the power supply selection parameter in the initial circuit netlist to a target parameter value according to the simulation mode comprises the following steps:

according to the simulation mode, the power supply selection parameters are adjusted to be a first preset value or a second preset value, and the power supply provided by the power supply selection module to each target circuit module is determined to be the global input power supply or the corresponding local input power supply according to the adjusted power supply selection parameters;

The simulation modes comprise a PDN simulation mode and a power supply current IDD simulation mode of the power supply network structure.

2. The method according to claim 1, wherein the adjusting the power selection parameter to a first preset value or a second preset value according to the simulation mode, and determining, according to the adjusted power selection parameter, that the power supply provided by the power supply selection module to each of the target circuit modules is the global input power supply or the local input power supply, includes:

and when the simulation mode is an IDD simulation mode, adjusting the power supply selection parameter to a first preset value, and determining that the power supply provided by the power supply selection module to each target circuit module in each target circuit module is the global input power supply according to the first preset value.

3. The method of claim 1, wherein the adjusting the power selection parameter to a first preset value or a second preset value according to the simulation mode, and determining, according to the adjusted power selection parameter, that the power provided by the power selection module to each of the target circuit modules is the global input power or the local input power, further comprises:

And when the simulation mode is a PDN simulation mode, adjusting the power supply selection parameter to a second preset value, and determining that the power supply provided by the power supply selection module to each target circuit module is the local input power supply corresponding to each target circuit module according to the second preset value.

4. A method according to claim 2 or 3, wherein the power supply selection module comprises:

a plurality of power supply selection units, each of which is used for selecting one input power supply from the plurality of input power supplies as a power supply source and providing the power supply source to the corresponding target circuit module;

wherein the power supply selection unit comprises a first switch and a second switch; the first end of the first switch is connected with the corresponding local input power supply, the first end of the second switch is connected with the global input power supply, the second end of the first switch is connected with the second end of the second switch, and the second end of the first switch and the second end of the second switch are simultaneously connected with the target circuit module corresponding to the power supply selection unit.

5. The method of claim 4, wherein the step of determining the position of the first electrode is performed,

When the power supply selection parameter is adjusted to the first preset value, the power supply selection parameter indicates that the first switch is in an off state and the second switch is in an on state; the determining, according to the adjusted power selection parameters, that the power supply provided by the power supply selection module to each target circuit module is the global input power supply or the local input power supply, includes: controlling the second switch to be communicated with the global input power supply and the corresponding target circuit module according to the first preset value, and taking the global input power supply as a power supply of the target circuit module; when the power supply selection parameter is adjusted to the second preset value, the power supply selection parameter indicates that the first switch is in a conducting state and the second switch is in a disconnecting state; the determining, according to the adjusted power selection parameters, that the power supply provided by the power supply selection module to each target circuit module is the global input power supply or the local input power supply, includes: and controlling the first switch to be communicated with the corresponding local input power supply and the corresponding target circuit module according to the second preset value, and taking the local input power supply as a power supply of the target circuit module.

6. A method according to claim 2 or 3, wherein the power supply selection module comprises:

a plurality of power supply selection units for respectively providing power supply to the corresponding plurality of target circuit modules;

the power supply selection unit comprises a first resistor and a second resistor; the first end of the first resistor is used for being connected with the corresponding local input power supply, the first end of the second resistor is used for being connected with the global input power supply, the second end of the first resistor is connected with the second end of the second resistor, and the second end of the first resistor and the second end of the second resistor are simultaneously connected with the target circuit module corresponding to the power supply selection unit.

7. The method of claim 6, wherein the step of providing the first layer comprises,

when the power selection parameter is adjusted to the first preset value, the determining, according to the adjusted power selection parameter, that the power supply provided by the power supply selection module to each target circuit module is the global input power supply or the local input power supply, includes: setting the first resistor as a first resistance value and the second resistor as a second resistance value according to the first preset value, and providing the global input power supply as the power supply to the corresponding target circuit module;

When the power selection parameter is adjusted to the second preset value, the determining, according to the adjusted power selection parameter, that the power supply provided by the power supply selection module to each target circuit module is the global input power supply or the local input power supply, includes: setting the first resistor as the second resistance value and the second resistor as the first resistance value according to the second preset value, and providing the corresponding local input power supply as the power supply to the corresponding target circuit module;

the first resistance is larger than the equivalent load of the target circuit module, and the second resistance is smaller than the equivalent load of the target circuit module.

8. The method of claim 7, wherein the obtaining the simulation pattern of the integrated circuit comprises:

receiving simulation mode indication information;

and determining the simulation mode of the integrated circuit according to the simulation mode indication information.

9. A simulation apparatus, comprising:

the system comprises a determining module, a power supply selecting module and a plurality of target circuit modules, wherein the determining module is used for determining an integrated circuit to be simulated, and the integrated circuit comprises the power supply selecting module and the plurality of target circuit modules; the power supply selection module is used for acquiring a plurality of input power supplies, selecting one input power supply from the plurality of input power supplies as a power supply for each target circuit module, and providing the power supply for the corresponding target circuit module;

An obtaining module, configured to obtain an initial circuit netlist of the integrated circuit, where the initial circuit netlist includes power supply selection parameters of the power supply selection module, where the power supply selection parameters indicate the power supply selected by the power supply selection module from the plurality of input power supplies;

the adjusting module is used for acquiring a simulation mode of the integrated circuit, and adjusting the power supply selection parameters in the initial circuit netlist to target parameter values according to the simulation mode to obtain a target circuit netlist;

the simulation module is used for acquiring a simulation excitation file of the integrated circuit, and executing simulation based on the simulation excitation file and the target circuit netlist to obtain a simulation result of the integrated circuit;

the plurality of input power sources includes:

a global input power supply for supplying power to the integrated circuit;

10. An electronic device, comprising: at least one processor and memory; the memory stores computer instructions; the at least one processor, when executing the computer instructions stored by the memory, performs the method of any one of claims 1-8.

11. A computer readable storage medium having stored therein computer instructions which, when executed by a processor, implement the method of any of claims 1-8.