CN116009792A - Data reading and writing device and method in image processing and electronic equipment - Google Patents

Data reading and writing device and method in image processing and electronic equipment Download PDF

Info

Publication number
CN116009792A
CN116009792A CN202310305061.8A CN202310305061A CN116009792A CN 116009792 A CN116009792 A CN 116009792A CN 202310305061 A CN202310305061 A CN 202310305061A CN 116009792 A CN116009792 A CN 116009792A
Authority
CN
China
Prior art keywords
pixel
read
writing
pixel block
target memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN202310305061.8A
Other languages
Chinese (zh)
Other versions
CN116009792B (en
Inventor
请求不公布姓名
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Moore Threads Technology Co Ltd
Original Assignee
Moore Threads Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Moore Threads Technology Co Ltd filed Critical Moore Threads Technology Co Ltd
Priority to CN202310305061.8A priority Critical patent/CN116009792B/en
Publication of CN116009792A publication Critical patent/CN116009792A/en
Application granted granted Critical
Publication of CN116009792B publication Critical patent/CN116009792B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Image Input (AREA)

Abstract

The disclosure relates to the technical field of computers, and discloses a data reading and writing device and method in image processing, and an electronic device, wherein the device comprises: the method comprises the steps that an identification reading module sends a first data reading request for requesting to read a writing identification corresponding to a pixel block to be read stored in a target memory to the target memory; the judging module judges whether the pixel block to be read is an effective pixel block according to the writing identification corresponding to the pixel block to be read; the pixel reading module sends a second data reading request for requesting to read the pixel block to be read to the target memory under the condition that the pixel block to be read is an effective pixel block; the receiving module receives a pixel block to be read returned by the target memory. The embodiment of the disclosure can effectively improve the data reading efficiency in the image processing process.

Description

Data reading and writing device and method in image processing and electronic equipment
Technical Field
The disclosure relates to the field of computer technology, and in particular, to a data reading and writing device and method in image processing, and an electronic device.
Background
In image processing, processing of pixels may involve a process of reading pixel data. The pixel data read at a time may occupy hundreds or thousands of bits wide, and the pixel data read for the entire image may involve an extra large order of magnitude of data interaction. In the related art, redundant data interaction exists in the pixel data reading process in the image processing process, so that the image processing efficiency is affected.
Disclosure of Invention
The present disclosure provides a data reading and writing device and method in image processing, and a technical scheme of an electronic device.
According to an aspect of the present disclosure, there is provided a data reading apparatus in image processing, including: the device comprises an identification reading module, a storage module and a storage module, wherein the identification reading module is used for sending a first data reading request to a target memory, wherein the first data reading request is used for requesting to read a writing identification corresponding to a pixel block to be read stored in the target memory; the judging module is used for judging whether the pixel block to be read is an effective pixel block or not according to the writing identification corresponding to the pixel block to be read returned by the target memory; the pixel reading module is used for sending a second data reading request to the target memory when the pixel block to be read is an effective pixel block, wherein the second data reading request is used for requesting to read the pixel block to be read; and the receiving module is used for receiving the pixel block to be read returned by the target memory.
In one possible implementation manner, the writing identifier corresponding to the pixel block to be read includes a writing identifier corresponding to each pixel point in the pixel block to be read; the judging module is used for: determining the pixel block to be read as an effective pixel block under the condition that at least one effective writing identifier exists in the writing identifiers corresponding to the pixel block to be read, wherein the pixel point corresponding to the effective writing identifier is effective pixel data in the pixel block to be read; or determining that the pixel block to be read is not an effective pixel block under the condition that the writing identification corresponding to each pixel point in the writing identification corresponding to the pixel block to be read is an invalid writing identification.
In one possible implementation, the apparatus further includes: and the optimization module is used for replacing the pixel value of the pixel point corresponding to the invalid writing mark in the read pixel block with a preset background pixel value under the condition that the writing mark corresponding to the read pixel block comprises the valid writing mark and the invalid writing mark.
According to an aspect of the present disclosure, there is provided a data writing apparatus in image processing, the apparatus being applied to a target memory, the target memory being divided into N pixel storage groups, where N is a positive integer of 2 or more, the apparatus comprising: a pixel writing module for receiving a data parallel writing request, wherein the data parallel writing request is used for requesting 2 in a target image m Writing the pixel blocks into the target memory in parallel, wherein 2 m Is a positive integer of 2 or more and N or less; a storage packet selection module for determining said 2 m A pixel storage group identifier corresponding to each pixel block in the pixel blocks, wherein the pixel storage group identifier is 2 m Adjacent pixel blocks in the pixel blocks correspond to different pixel storage group identifications; an identification generation module for generating identification information according to the method 2 m Storing group identifiers corresponding to each pixel block in the pixel blocks, and carrying out the process of 2 m Writing blocks of pixels in parallel to the target memory, and determining the 2 m And writing identification corresponding to each pixel block in the pixel blocks.
In one possible implementation manner, each pixel storage group includes M pixel storage rows, where M is a positive integer greater than or equal to 2, and the target memory includes an identification storage unit with a size of m×n; the identification generation module is used for: for said 2 m And determining a writing identification in the ith column and the jth row in the identification storage unit according to whether each pixel point in the pixel block is successfully written into the jth pixel storage row in the ith pixel storage group or not by any pixel block in the pixel blocks, wherein the writing identification in the ith column and the jth row comprises the writing identification corresponding to each pixel point in the pixel block.
In one possible implementation manner, the identifier generating module is configured to: for any pixel point in the pixel block, determining a writing identifier corresponding to the pixel point as an effective writing identifier when the pixel point is successfully written into the j-th pixel storage row in the i-th pixel storage group; or determining that the writing identification corresponding to the pixel point is an invalid writing identification under the condition that the pixel point is not successfully written into the j-th pixel storage row in the i-th pixel storage group.
According to an aspect of the present disclosure, there is provided a data reading apparatus in image processing, including: an identifier reading module, configured to send a first data parallel reading request to a target memory, where the first data parallel reading request is used to request parallel reading of 2 stored in the target memory m Writing identification corresponding to each pixel block to be read, wherein the target memory is divided into N pixel storage groups, and the number of the pixel storage groups is 2 m The pixel blocks to be read are stored in different pixel storage groups, N is a positive integer greater than or equal to 2, 2 m Is a positive integer of 2 or more and N or less; a judging module, configured to return the 2 according to the target memory m Judging the writing identification corresponding to each pixel block to be read in the pixel blocks to be read, and judging the 2 m Whether the pixel blocks to be read comprise valid pixel blocks or not; a pixel reading module for reading the pixel data at the position 2 m Sending a second data parallel read request to the target memory when the effective pixel block is included in the pixel block to be read, wherein the second data parallel read request is used for requesting the data of the data block 2 m The effective pixel blocks included in the pixel blocks to be read are read in parallel; a receiving module, configured to receive the 2 returned by the target memory m And valid pixel blocks included in the pixel blocks to be read.
According to an aspect of the present disclosure, there is provided a data reading method in image processing, including: a first data reading request is sent to a target memory, wherein the first data reading request is used for requesting to read a writing identifier corresponding to a pixel block to be read stored in the target memory; judging whether the pixel block to be read is an effective pixel block or not according to the writing identification corresponding to the pixel block to be read returned by the target memory; sending a second data reading request to the target memory under the condition that the pixel block to be read is an effective pixel block, wherein the second data reading request is used for requesting to read the pixel block to be read; and receiving the pixel block to be read returned by the target memory.
According to an aspect of the present disclosure, there is provided a data writing method in image processing, the method being applied to a target memory, the target memory being divided into N pixel storage groups, where N is a positive integer greater than or equal to 2, the method comprising: receiving a data parallel write request, wherein the data parallel write request is used for requesting 2 in a target image m Writing the pixel blocks into the target memory in parallel, wherein 2 m Is a positive integer of 2 or more and N or less; determining said 2 m A pixel storage group identifier corresponding to each pixel block in the pixel blocks, wherein the pixel storage group identifier is 2 m Adjacent pixel blocks in the pixel blocks correspond to different pixel storage group identifications; according to said 2 m Storing group identifiers corresponding to each pixel block in the pixel blocks, and carrying out the process of 2 m Writing blocks of pixels in parallel to the target memory, and determining the 2 m And writing identification corresponding to each pixel block in the pixel blocks.
According to an aspect of the present disclosure, there is provided a data reading method in image processing, including: sending a first data parallel reading request to a target memory, wherein the first data parallel reading request is used for requesting to read 2 stored in the target memory in parallel m Writing identification corresponding to each pixel block to be read, wherein the target memory is divided into N pixel storage groups, and the number of the pixel storage groups is 2 m The pixel blocks to be read are stored in different pixel storage groups, N is a positive integer greater than or equal to 2, 2 m Is a positive integer of 2 or more and N or less; according to the 2 returned by the target memory m Judging the writing identification corresponding to each pixel block to be read in the pixel blocks to be read, and judging the 2 m Whether the pixel blocks to be read comprise valid pixel blocks or not; at said 2 m Sending a second data parallel read request to the target memory when the effective pixel block is included in the pixel block to be read, wherein the second data parallel read request is used for requesting the data of the data block 2 m The effective pixel blocks included in the pixel blocks to be read are read in parallel; receiving the 2 returned by the target memory m Pixel blocks to be readThe effective pixel block included in the display panel.
According to an aspect of the present disclosure, there is provided an electronic apparatus including: a processor; a memory for storing processor-executable instructions; wherein the processor is configured to invoke the instructions stored in the memory to perform the above method.
According to an aspect of the present disclosure, there is provided a computer readable storage medium having stored thereon computer program instructions which, when executed by a processor, implement the above-described method.
In a data reading module in image processing in an embodiment of the present disclosure, an identifier reading module sends a first data reading request for requesting to read a writing identifier corresponding to a pixel block to be read stored in a target memory to the target memory; the judging module judges whether the pixel block to be read is an effective pixel block according to the writing identification corresponding to the pixel block to be read returned by the target memory; the pixel reading module sends a second data reading request for requesting to read the pixel block to be read to a target memory under the condition that the pixel block to be read is an effective pixel block; the receiving module receives a pixel block to be read returned by the target memory. Based on the writing identification corresponding to the pixel block read from the target memory by the identification reading module, only the effective pixel block in the target memory can be read later, and the load power consumption caused by reading the ineffective pixel block is reduced, so that the data reading efficiency in the image processing process is effectively improved.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure. Other features and aspects of the present disclosure will become apparent from the following detailed description of exemplary embodiments, which proceeds with reference to the accompanying drawings.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the disclosure and together with the description, serve to explain the technical aspects of the disclosure.
Fig. 1 shows a flowchart of a data reading method in image processing according to an embodiment of the present disclosure.
Fig. 2 shows a schematic diagram of a write identification and pixel data corresponding to one pixel block according to an embodiment of the present disclosure.
Fig. 3 shows a schematic diagram of a write identification and pixel data corresponding to one pixel block according to an embodiment of the present disclosure.
Fig. 4 shows a schematic diagram of a write identification and pixel data corresponding to one pixel block according to an embodiment of the present disclosure.
Fig. 5 shows a flowchart of a data writing method in image processing according to an embodiment of the present disclosure.
Fig. 6 illustrates a schematic structure of a target memory according to an embodiment of the disclosure.
Fig. 7 shows a flowchart of a data reading method in image processing according to an embodiment of the present disclosure.
Fig. 8 shows a block diagram of a data reading apparatus in image processing according to an embodiment of the present disclosure.
Fig. 9 shows a block diagram of a data writing apparatus in image processing according to an embodiment of the present disclosure.
Fig. 10 shows a block diagram of a data reading apparatus in image processing according to an embodiment of the present disclosure.
Fig. 11 shows a block diagram of an electronic device, according to an embodiment of the disclosure.
Detailed Description
Various exemplary embodiments, features and aspects of the disclosure will be described in detail below with reference to the drawings. In the drawings, like reference numbers indicate identical or functionally similar elements. Although various aspects of the embodiments are illustrated in the accompanying drawings, the drawings are not necessarily drawn to scale unless specifically indicated.
The word "exemplary" is used herein to mean "serving as an example, embodiment, or illustration. Any embodiment described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other embodiments.
The term "and/or" is herein merely an association relationship describing an associated object, meaning that there may be three relationships, e.g., a and/or B, may represent: a exists alone, A and B exist together, and B exists alone. In addition, the term "at least one" herein means any one of a plurality or any combination of at least two of a plurality, for example, including at least one of A, B, C, and may mean including any one or more elements selected from the group consisting of A, B and C.
Furthermore, numerous specific details are set forth in the following detailed description in order to provide a better understanding of the present disclosure. It will be understood by those skilled in the art that the present disclosure may be practiced without some of these specific details. In some instances, methods, means, elements, and circuits well known to those skilled in the art have not been described in detail in order not to obscure the present disclosure.
In image processing, processing of pixels may involve a process of reading pixel data. The pixel data read at a time may occupy hundreds or thousands of bits wide, and the pixel data read for the entire image may involve an extra large order of magnitude of data interaction. In order to improve the pixel data reading rate and further improve the image processing efficiency, the disclosure provides a data reading method in image processing, which can effectively reduce the load power consumption caused by reading an invalid pixel block in the image processing process, thereby effectively improving the data reading rate in the image processing process and further improving the image processing efficiency. The data reading method in the image processing provided by the present disclosure is described in detail below.
Fig. 1 shows a flowchart of a data reading method in image processing according to an embodiment of the present disclosure. The method may be performed by an electronic device, such as a terminal device or a server, the terminal device may be a User Equipment (UE), a mobile device, a User terminal, a cellular phone, a cordless phone, a personal digital assistant (Personal Digital Assistant, PDA), a handheld device, a computing device, a vehicle mounted device, a wearable device, etc., and the method may be implemented by a processor invoking computer readable instructions stored in a memory. Alternatively, the method may be performed by a server. As shown in fig. 1, the method includes:
In step S11, a first data read request is sent to the target memory, where the first data read request is used to request to read a write identifier corresponding to a pixel block to be read stored in the target memory.
The target memory stores both the image and the writing identification corresponding to each pixel block in the image. For example, for any pixel block, after a write operation of writing the pixel block into the target memory is executed, a write identifier corresponding to the pixel block is determined according to an actual write condition, and is stored in the target memory.
When image processing is required for a pixel block in an image, the pixel block needs to be read from the target memory. In order to reduce redundant data interaction, before a pixel block to be read is read, a first data reading request for requesting to read a writing identifier corresponding to the pixel block to be read is sent to a target memory.
In step S12, according to the write-in identifier corresponding to the pixel block to be read returned by the target memory, it is determined whether the pixel block to be read is an effective pixel block.
After the writing identification corresponding to the pixel block to be read is read from the target memory, whether the pixel block to be read is an effective pixel block or not, namely whether the pixel block to be read is an effective pixel block written into the target memory or not can be judged according to the writing identification corresponding to the pixel block to be read. The detailed description of the specific process of judging whether the pixel block to be read is an effective pixel block according to the writing identifier corresponding to the pixel block to be read will be omitted herein.
In step S13, if the pixel block to be read is a valid pixel block, a second data read request is sent to the target memory, where the second data read request is used to request to read the pixel block to be read.
And under the condition that the pixel block to be read is determined to be the effective pixel block according to the writing identification corresponding to the pixel block to be read, a second data reading request for requesting to read the pixel block to be read can be sent to the target memory. At this time, for an efficient data reading process, there is no data redundancy interaction.
In step S14, a pixel block to be read returned from the target memory is received.
And reading the pixel block to be read from the target memory based on the second data reading request.
According to the embodiment of the disclosure, based on the writing identification corresponding to the pixel block stored in the target memory, only the effective pixel block can be read, and the load power consumption caused by reading the ineffective pixel block is reduced, so that the data reading efficiency in the image processing process is effectively improved.
Under the condition that the pixel block to be read is not an effective pixel block according to the writing identification corresponding to the pixel block to be read, the pixel block to be read cannot be effectively read from the target memory because the pixel block to be read is not the effective pixel block, and in order to reduce data redundancy interaction in the data reading process, a second data reading request for requesting to read the pixel block to be read does not need to be sent to the target memory.
The sending of the first data reading request and the second data reading request may be a pixel processing module, where the pixel processing module is configured to perform a subsequent image processing operation on the read pixel block to be read. The pixel processing module may be a hardware module or a software program, which is not specifically limited in this disclosure.
In one possible implementation manner, the writing identifier corresponding to the pixel block to be read includes a writing identifier corresponding to each pixel point in the pixel block to be read; judging whether the pixel block to be read is an effective pixel block according to the writing identification corresponding to the pixel block to be read returned by the target memory, comprising: under the condition that at least one effective writing identifier exists in the writing identifiers corresponding to the pixel blocks to be read, determining the pixel blocks to be read as effective pixel blocks, wherein the pixel points corresponding to the effective writing identifiers are effective pixel data in the pixel blocks to be read; or determining that the pixel block to be read is not an effective pixel block under the condition that the writing identification corresponding to each pixel point in the writing identifications corresponding to the pixel block to be read is an invalid writing identification.
The writing identification corresponding to the pixel block to be read comprises writing identification corresponding to each pixel point in the pixel block to be read, and if it is determined that at least one effective writing identification exists in the writing identification corresponding to the pixel block to be read, it can be determined that at least one pixel point in the pixel block to be read is effectively written into the target memory, and at this time, it can be determined that the pixel block to be read is an effective pixel block.
The number of pixel points included in the pixel block to be read can be flexibly set according to actual situations, which is not particularly limited in the disclosure.
The pixel block to be read comprises a plurality of pixel points, and the writing identification corresponding to the pixel block to be read comprises the writing identification corresponding to each pixel point. For example, an active write flag is denoted by 0, and an inactive write flag is denoted by 1. The valid writing mark and the invalid writing mark can be represented by 0 and 1, and can be represented by other forms according to actual situations, and the disclosure is not particularly limited.
Fig. 2 shows a schematic diagram of a write identification and pixel data corresponding to one pixel block according to an embodiment of the present disclosure. As shown in fig. 2, the pixel block a to be read includes 4 pixel points: pixel 0-pixel 3, wherein the writing mark corresponding to pixel 0 is 1, the writing mark corresponding to pixel 1 is 0, the writing mark corresponding to pixel 2 is 1, and the writing mark corresponding to pixel 3 is 0; at this time, the write flag corresponding to the pixel block a to be read is 0101.
And under the condition that at least one effective writing identifier exists in the writing identifiers corresponding to the pixel blocks to be read, indicating that at least one pixel point in the pixel blocks to be read is effectively written into the target memory, and determining the pixel blocks to be read as effective pixel blocks. As shown in fig. 2, the writing identifier of the pixel block a to be read is 0101, which includes two valid writing identifiers 0, which indicates that there are two pixel points (pixel point 1 and pixel point 3) in the pixel block a to be read that effectively write into the target memory, and at this time, the pixel block a to be read is determined to be a valid pixel block. The pixel data length of the pixel block A to be read is 256bits, the pixel data length of each pixel point is 64bits, and the pixel point 1 and the pixel point 3 correspond to effective pixel data in the pixel block A to be read.
Fig. 3 shows a schematic diagram of a write identification and pixel data corresponding to one pixel block according to an embodiment of the present disclosure. As shown in fig. 3, the pixel block B to be read includes 4 pixel points: and the writing marks corresponding to the pixel points 0-3 to be read are 0000, and the writing marks comprise 4 effective writing marks 0, which indicate that all the pixel points in the pixel block B to be read are effectively written into the target memory, and at the moment, the pixel block B to be read is determined to be an effective pixel block. The pixel data length of the pixel block B to be read is 256bits, the pixel data length of each pixel point is 64bits, and the pixel points 0-3 correspond to effective pixel data in the pixel block B to be read.
And under the condition that the writing identification corresponding to each pixel point in the writing identification corresponding to the pixel block to be read is an invalid writing identification, indicating that all the pixel points in the pixel block to be read have no valid writing target memory, and determining that the pixel block to be read is not a valid pixel block at the moment. Fig. 4 shows a schematic diagram of a write identification and pixel data corresponding to one pixel block according to an embodiment of the present disclosure. As shown in fig. 4, the pixel block C to be read includes 4 pixel points, the writing identifier corresponding to the pixel block C to be read is 1111, and includes 4 invalid writing identifiers, which indicates that all the pixel points in the pixel block C to be read have no valid writing target memory, and at this time, it is determined that the pixel block C to be read is not a valid pixel block.
In a possible implementation manner, in a case that the writing identifier corresponding to the pixel block to be read includes both a valid writing identifier and an invalid writing identifier, the method further includes: and replacing the pixel value of the pixel point corresponding to the invalid writing mark in the read pixel block to be read with a preset background pixel value.
After the pixel block to be processed is read, if the writing identification corresponding to the pixel block to be read includes both the valid writing identification and the invalid writing identification, the pixel value of the pixel point corresponding to the invalid writing identification in the pixel block to be read is replaced by the preset background pixel value because the pixel value of the pixel point corresponding to the invalid writing identification is not the pixel value in the valid writing target memory and may be uninitialized disordered invalid data, so that uncontrollable and unexpected images are avoided and subsequent image processing is effectively performed. The specific value of the preset background pixel value can be flexibly set according to the actual image condition, which is not particularly limited in the disclosure.
As shown in fig. 2, the pixel values of the pixel point 0 and the pixel point 2 in the pixel block a to be read are replaced with the preset background pixel value BGV when the pixel point 0 and the pixel point 2 in the pixel block a to be read are corresponding to the invalid writing identifier 1.
The pixel points corresponding to the effective writing identification are written in the pixel blocks to be read, and the pixel points corresponding to the effective writing identification are pixel values in the image effective writing target memory, so that the pixel points corresponding to the effective writing identification are written in the pixel blocks to be read, and pixel value replacement processing is not needed.
In the embodiment of the disclosure, a first data reading request for requesting to read a writing identifier corresponding to a pixel block to be read stored in a target memory is sent to the target memory, whether the pixel block to be read is an effective pixel block is judged according to the writing identifier corresponding to the pixel block to be read returned by the target memory, and if the pixel block to be read is the effective pixel block, a second data reading request for requesting to read the pixel block to be read is sent to the target memory, and the pixel block to be read returned by the target memory is received. Based on the writing identification corresponding to the pixel blocks stored in the target memory, only the effective pixel blocks can be read, and load power consumption caused by reading the ineffective pixel blocks is reduced, so that the data reading efficiency in the image processing process is effectively improved.
In the pixel data processing process in image processing, adjacent pixel blocks are usually requested together or are combined together for data transmission after processing, so if the pixel data of the adjacent pixel blocks can be written into a memory in parallel, the subsequent parallel reading is realized, the reading and writing speed of the pixel data is effectively accelerated, and the processing efficiency and the transmission efficiency of the image can be effectively improved.
The data writing method applied to image processing of the target memory can effectively realize parallel processing of a plurality of adjacent pixel blocks in the target image by using the target memory. The data writing method in the image processing provided by the present disclosure is described in detail below.
Fig. 5 shows a flowchart of a data writing method in image processing according to an embodiment of the present disclosure. The method may be performed by an electronic device, such as a terminal device or a server, the terminal device may be a User Equipment (UE), a mobile device, a User terminal, a cellular phone, a cordless phone, a personal digital assistant (Personal Digital Assistant, PDA), a handheld device, a computing device, a vehicle mounted device, a wearable device, etc., and the method may be implemented by a processor invoking computer readable instructions stored in a memory. Alternatively, the method may be performed by a server. The method is applied to image processing by utilizing a target memory, wherein the target memory is divided into N pixel storage groups, and N is a positive integer greater than or equal to 2. As shown in fig. 5, the method includes:
in step S51, a data parallel write request is received, wherein the data parallel write request is used for requesting 2 in the target image m Writing the pixel blocks into a target memory in parallel, wherein 2 m Is a positive integer of 2 or more and N or less.
The target image includes a plurality of pixel points, and the data amount of the pixel data of each pixel point can be flexibly set according to the actual situation, which is not particularly limited in the present disclosure. In order to improve the image processing efficiency, image processing is performed on a pixel block unit composed of a plurality of pixel points in a target image. The number of pixel points included in one pixel block may be flexibly set according to practical situations, which is not particularly limited in the present disclosure.
In order to further improve the image processing efficiency, the number of pixel blocks processed in parallel with a single maximum in-target memory is typically greater than 1, i.e., a plurality of pixel blocks are processed in parallel. Thus, to achieve parallel processing of 2 in a target image with target memory m A block of pixels, first, based on a data parallel write request, for requesting 2 in the target image m And writing the pixel blocks into the target memory in parallel. Root of Chinese characterAccording to the different values of m, 2, 4, 8, 16 and other pixel blocks in the target image can be written into the target memory in parallel, and the details are not repeated here.
The sending of the data parallel writing request may be a pixel generating module, where the pixel generating module is configured to write a plurality of pixel blocks in the target image into the target memory in parallel. The pixel generating module may be a hardware module or a software program, which is not specifically limited in this disclosure.
The number of N pixel storage groups in the target memory needs to meet the number of pixel blocks processed in a single maximum parallel. For example, when the number of pixel blocks processed in a single maximum parallel is 2, the target memory is divided into at least n=2 pixel storage groups.
Considering the parallelization expansion performance of the system, the number of N pixel storage groups divided into by the target memory can be larger than the number of the current single maximum parallel processing pixel blocks. For example, when the number of the current single maximum parallel processing pixel blocks is 2, the target memory is divided into at least n=4 pixel storage groups, so as to provide support for expanding the number of the single maximum parallel processing pixel blocks to 4. Fig. 6 illustrates a schematic structure of a target memory according to an embodiment of the disclosure. As shown in fig. 6, the target memory is divided into n=4 pixel storage groups: group 0 to group 3.
In step S52, 2 is determined m A pixel storage group identifier corresponding to each pixel block in the pixel blocks, wherein 2 m Adjacent ones of the pixel blocks correspond to different pixel storage group identifications.
Considering that there is an operation process on adjacent pixel data in the target image during the image processing or there is a packed transmission of a plurality of adjacent pixel data together after the process is finished to reduce the interactive interface, 2 m Adjacent pixel blocks in the pixel blocks are written into different pixel storage groups in the target memory, so that parallel processing of the adjacent pixel blocks by using the target memory is realized.
In one example, in the case where the target memory is a linear memory storage arrangement, determine 2 m Pixels corresponding to each pixel block in the pixel blocksStoring a group identification, comprising: at 2 m Each pixel block is 2 adjacent to the horizontal direction in the target image m Determining 2 when each pixel block is m The pixel blocks respectively correspond to different pixel storage group identifiers; or, at 2 m Each pixel block is 2 longitudinally adjacent in the target image m Determining 2 when each pixel block is m The pixel blocks respectively correspond to different pixel storage group identifications.
Under the condition that the target memory is in linear memory storage arrangement, pixel blocks in the target image are written into the target memory row by row and column by column for storage, so as to ensure 2 in the target image m The adjacent pixel blocks can be processed in parallel to enable 2 adjacent to each other in the transverse direction in the target image m Writing the pixel blocks into different pixel storage groups; and/or, 2 longitudinally adjacent in the target image m The blocks of pixels are written to different pixel storage groups.
In one example, in the case where the target memory is a Z-type memory storage arrangement, determine 2 m The pixel storage group identifier corresponding to each pixel block in the pixel blocks comprises: at 2 m When each pixel block comprises at least one 2×2 structure in the target image, determining that 4 pixel blocks in each 2×2 structure respectively correspond to different pixel storage group identifications.
Under the condition that the target memory is in Z-type memory storage arrangement, writing pixel blocks in the target image into the target memory for storage according to a 2X 2 structure, so as to ensure 2 in the target image m The adjacent pixel blocks can be processed in parallel, and 4 pixel blocks in each 2×2 structure in the target image are respectively written into different pixel storage groups.
In step S53, according to 2 m Storing group identifiers corresponding to each pixel block in the pixel blocks, and adding 2 m Writing the blocks of pixels in parallel to the target memory and determining 2 m And writing identification corresponding to each pixel block in the pixel blocks.
In accordance with 2 m Storing group identifiers corresponding to each pixel block in the pixel blocks, and adding 2 m After each pixel block is written into the target memory in parallel, determining a writing identification corresponding to each pixel block according to the writing condition of each pixel blockTo prepare for the subsequent pixel block read process. The details of how to determine the writing identifier corresponding to each pixel block will be described in detail in connection with possible implementations of the present disclosure, which will not be described herein.
In the embodiment of the disclosure, the target memory is divided into different pixel storage groups, adjacent pixel blocks in the target image are written into the different pixel storage groups in parallel, and the writing identification corresponding to each pixel block is determined, so that effective parallel reading of a plurality of adjacent pixel blocks in the target image by using the writing identification can be realized, load power consumption caused by invalid data reading is reduced, and data reading efficiency in an image processing process is effectively improved.
In one possible implementation, each pixel storage group includes M pixel storage rows, where M is a positive integer greater than or equal to 2, and the target memory includes an identification storage unit with a size of mxn; determination 2 m The writing identification corresponding to each pixel block in the pixel blocks comprises the following steps: for 2 m And determining a writing identifier in the ith column and the jth row in the identifier storage unit according to whether each pixel point in the pixel block is successfully written into the jth pixel storage row in the ith pixel storage group or not by any pixel block in the pixel blocks, wherein the writing identifier in the ith column and the jth row comprises the writing identifier corresponding to each pixel point in the pixel block.
In the target memory, each pixel storage group includes M pixel storage rows, one for storing one pixel block. And the target memory also comprises an identification storage unit with the size of M multiplied by N, which is used for storing the writing identification corresponding to the pixel block written into any pixel storage line in any pixel storage group. As shown in fig. 6, each pixel storage group includes 16 pixel storage lines, and the target memory includes an identification storage unit of 16×4 size.
A writing flag in the ith column and jth row in the flag storage unit indicates whether the jth pixel storage row in the ith pixel storage group is successfully written into the pixel block. That is, for any one pixel block, when the pixel block needs to be written into the jth pixel storage row in the ith pixel storage group, determining a writing identifier in the ith column and the jth row in the identifier storage unit according to whether each pixel point in the pixel block is successfully written into the jth pixel storage row in the ith pixel storage group, wherein the writing identifier in the ith column and the jth row comprises a writing identifier corresponding to each pixel point in the pixel block.
In one possible implementation, for 2 m Any one pixel block in the pixel blocks determines a writing identification in the ith column and the jth row in the identification storage unit according to whether each pixel point in the pixel block is successfully written into the jth pixel storage row in the ith pixel storage group, and the writing identification comprises the following steps: for any pixel point in the pixel block, determining a writing identifier corresponding to the pixel point as an effective writing identifier under the condition that the pixel point is successfully written into a jth pixel storage row in an ith pixel storage group; or determining the writing identification corresponding to the pixel point as an invalid writing identification under the condition that the pixel point is not successfully written into the j-th pixel storage row in the i-th pixel storage group.
For any one pixel block, when the pixel block needs to be written into the j-th pixel storage row in the i-th pixel storage group, that is, each pixel point in the pixel block needs to be written into the j-th pixel storage row in the i-th pixel storage group. For any pixel point in the pixel block, determining a writing mark corresponding to the pixel point as an effective writing mark 0 under the condition that the pixel point is successfully written into a jth pixel storage row in an ith pixel storage group; or, in the case that the pixel point is not successfully written into the j-th pixel storage row in the i-th pixel storage group, determining the writing identifier corresponding to the pixel point as an invalid writing identifier 1.
In one example, the default write identifications may be invalid write identification 1 when initialized in the identification storage unit. For any pixel point in the pixel block, under the condition that the pixel point is successfully written into the jth pixel storage row in the ith pixel storage group, updating the writing identification corresponding to the pixel point in the jth pixel storage row in the ith pixel storage group from the invalid writing identification 1 to the valid writing identification 0; or, in the case that the pixel point is not successfully written into the jth pixel storage row in the ith pixel storage group, keeping the writing identifier corresponding to the pixel point in the jth pixel storage row in the ith pixel storage group as the invalid writing identifier 1.
And storing the writing identifications corresponding to the pixel points in one pixel block by using the identification storage unit with the size of M multiplied by N, so that the writing identifications corresponding to the pixel points in one pixel block can be read in parallel subsequently, and the data reading efficiency is improved.
And storing the writing identifications corresponding to the N pixel blocks in the same pixel storage row in the 4 groups in the same row of the identification storage unit by using the identification storage unit with the size of M multiplied by N, so that the writing identifications corresponding to the N pixel blocks can be read in parallel subsequently, and the data reading efficiency is improved.
Fig. 7 shows a flowchart of a data reading method in image processing according to an embodiment of the present disclosure. The method may be performed by an electronic device, such as a terminal device or a server, the terminal device may be a User Equipment (UE), a mobile device, a User terminal, a cellular phone, a cordless phone, a personal digital assistant (Personal Digital Assistant, PDA), a handheld device, a computing device, a vehicle mounted device, a wearable device, etc., and the method may be implemented by a processor invoking computer readable instructions stored in a memory. Alternatively, the method may be performed by a server. As shown in fig. 7, the method includes:
In step S71, a first data parallel read request is sent to the target memory, where the first data parallel read request is used to request parallel reading of 2 stored in the target memory m Writing marks corresponding to pixel blocks to be read, wherein the target memory is divided into N pixel storage groups (2) m The pixel blocks to be read are stored in different pixel storage groups, N is a positive integer greater than or equal to 2, 2 m Is a positive integer of 2 or more and N or less.
The storage manner of each pixel block in the target image in the target memory may refer to the related description of the above embodiment, which is not described herein.
Storage party based on target memoryCan be used for storing 2 in different pixel storage groups in a target memory m And the pixel blocks to be read are read in parallel. In order to reduce redundant data interactions, in pair 2 m Before parallel reading is carried out on pixel blocks to be read, the pixel blocks to be read are sent to a target memory to request parallel reading 2 m And the first data parallel reading requests of the writing identifiers corresponding to the pixel blocks to be read.
In step S72, 2 is returned according to the target memory m Judging 2, namely, judging the writing identification corresponding to each pixel block to be read in the pixel blocks to be read m Whether each pixel block to be read includes a valid pixel block.
Read to 2 from target memory m After the writing marks corresponding to the pixel blocks to be read, the writing marks can be recorded according to 2 m Writing identification corresponding to each pixel block to be read, judging 2 m Whether each pixel block to be read comprises a valid pixel block, namely whether each pixel block in the target memory is valid to be written.
For any pixel block to be read, a specific process of determining whether the pixel block to be read is an effective pixel block according to the writing identifier corresponding to the pixel block to be read may refer to the related description of the above embodiment, which is not repeated herein.
In step S73, at 2 m In the case that the effective pixel block is included in the pixel block to be read, sending a second data parallel read request to the target memory, wherein the second data parallel read request is used for requesting pair 2 m And carrying out parallel reading on the effective pixel blocks included in the pixel blocks to be read.
In accordance with 2 m Determining 2 according to the writing identification corresponding to the pixel block to be read m In the case that the pixel block to be read includes a valid pixel block, the pixel block to be read may be sent to the target memory for pair 2 m And performing parallel reading of second data by the effective pixel blocks included in the pixel blocks to be read. At this time, only 2 is read m The effective pixel blocks included in the pixel blocks to be read are not read, so that data redundancy interaction caused by reading the ineffective pixel blocks is reduced, and data reading efficiency is improved.
In step S74, a target memory return 2 is received m And valid pixel blocks included in the pixel blocks to be read.
Parallel reading 2 from the target memory based on the second data parallel read request m And valid pixel blocks included in the pixel blocks to be read.
According to an embodiment of the present disclosure, 2 stored in the target memory is based on m Writing identification corresponding to each pixel block can realize that only 2 is read in parallel m And the effective pixel blocks included in the pixel blocks reduce the load power consumption caused by reading the ineffective pixel blocks, thereby effectively improving the data reading efficiency in the image processing process.
The sending of the first data parallel reading request and the second data parallel reading request may be a pixel processing module, where the pixel processing module is configured to perform a subsequent image processing operation on the plurality of pixel blocks to be read that are read in parallel. The pixel processing module may be a hardware module or a software program, which is not specifically limited in this disclosure.
In a possible implementation manner, for any read pixel block to be read, when the writing identifier corresponding to the pixel block to be read includes both an effective writing identifier and an ineffective writing identifier, the pixel value of the pixel point corresponding to the ineffective writing identifier in the read pixel block to be read is replaced with a preset background pixel value, and the specific process may refer to the related description of the above embodiment and is not repeated herein.
It will be appreciated that the above-mentioned method embodiments of the present disclosure may be combined with each other to form a combined embodiment without departing from the principle logic, and are limited to the description of the present disclosure. It will be appreciated by those skilled in the art that in the above-described methods of the embodiments, the particular order of execution of the steps should be determined by their function and possible inherent logic.
In addition, the disclosure further provides a data reading and writing device, an electronic device, a computer readable storage medium and a program in image processing, which can be used for implementing any of the data reading and writing methods in image processing provided in the disclosure, and corresponding technical schemes and descriptions and corresponding descriptions of method parts are omitted.
Fig. 8 shows a block diagram of a data reading apparatus in image processing according to an embodiment of the present disclosure. As shown in fig. 8, the apparatus 80 includes:
the identifier reading module 81 is configured to send a first data reading request to the target memory, where the first data reading request is used to request to read a write identifier corresponding to a pixel block to be read stored in the target memory;
the judging module 82 is configured to judge whether the pixel block to be read is an effective pixel block according to the write identifier corresponding to the pixel block to be read returned by the target memory;
The pixel reading module 83 is configured to send a second data reading request to the target memory when the pixel block to be read is a valid pixel block, where the second data reading request is used for requesting to read the pixel block to be read;
the receiving module 84 is configured to receive the pixel block to be read returned by the target memory.
In one possible implementation manner, the writing identifier corresponding to the pixel block to be read includes a writing identifier corresponding to each pixel point in the pixel block to be read;
a judging module 82, configured to:
under the condition that at least one effective writing identifier exists in the writing identifiers corresponding to the pixel blocks to be read, determining the pixel blocks to be read as effective pixel blocks, wherein the pixel points corresponding to the effective writing identifiers are effective pixel data in the pixel blocks to be read; or alternatively, the first and second heat exchangers may be,
and under the condition that the writing identification corresponding to each pixel point in the writing identifications corresponding to the pixel blocks to be read is an invalid writing identification, determining that the pixel blocks to be read are not valid pixel blocks.
In one possible implementation, the apparatus 80 further includes:
and the optimizing module is used for replacing the pixel value of the pixel point corresponding to the invalid writing mark in the read pixel block to be read with a preset background pixel value under the condition that the writing mark corresponding to the pixel block to be read comprises the valid writing mark and the invalid writing mark.
Fig. 9 shows a block diagram of a data writing apparatus in image processing according to an embodiment of the present disclosure. The device is applied to a target memory, and the target memory is divided into N pixel storage groups, wherein N is a positive integer greater than or equal to 2. As shown in fig. 9, the apparatus 90 includes:
a pixel writing module 91 for receiving a data parallel writing request for requesting 2 in the target image m Writing the pixel blocks into a target memory in parallel, wherein 2 m Is a positive integer of 2 or more and N or less;
a storage packet selection module 92 for determining 2 m A pixel storage group identifier corresponding to each pixel block in the pixel blocks, wherein 2 m Adjacent pixel blocks in the pixel blocks correspond to different pixel storage group identifications;
an identification generation module 93 for generating identification according to 2 m Storing group identifiers corresponding to each pixel block in the pixel blocks, and adding 2 m Writing the pixel blocks into the target memory in parallel, and determining 2 m And writing identification corresponding to each pixel block in the pixel blocks.
In one possible implementation, each pixel storage group includes M pixel storage rows, where M is a positive integer greater than or equal to 2, and the target memory includes an identification storage unit with a size of mxn;
An identification generation module 93 for:
for 2 m And determining a writing identifier in the ith column and the jth row in the identifier storage unit according to whether each pixel point in the pixel block is successfully written into the jth pixel storage row in the ith pixel storage group or not by any pixel block in the pixel blocks, wherein the writing identifier in the ith column and the jth row comprises the writing identifier corresponding to each pixel point in the pixel block.
In one possible implementation, the identifier generation module 93 is configured to:
for any pixel point in the pixel block, determining a writing identifier corresponding to the pixel point as an effective writing identifier under the condition that the pixel point is successfully written into a jth pixel storage row in an ith pixel storage group; or alternatively, the first and second heat exchangers may be,
and under the condition that the pixel point is not successfully written into the j-th pixel storage row in the i-th pixel storage group, determining the writing identification corresponding to the pixel point as an invalid writing identification.
Fig. 10 shows a block diagram of a data reading apparatus in image processing according to an embodiment of the present disclosure. As shown in fig. 10, the apparatus 100 includes:
an identifier reading module 101 for sending a first data parallel reading request to the target memory, where the first data parallel reading request is used for requesting to read 2 stored in the target memory in parallel m Writing marks corresponding to pixel blocks to be read, wherein the target memory is divided into N pixel storage groups (2) m The pixel blocks to be read are stored in different pixel storage groups, N is a positive integer greater than or equal to 2, 2 m Is a positive integer of 2 or more and N or less;
a judging module 102 for returning 2 according to the target memory m Judging 2, namely, judging the writing identification corresponding to each pixel block to be read in the pixel blocks to be read m Whether the pixel blocks to be read comprise valid pixel blocks or not;
a pixel reading module 103 for reading at 2 m In the case that the effective pixel block is included in the pixel block to be read, sending a second data parallel read request to the target memory, wherein the second data parallel read request is used for requesting pair 2 m The effective pixel blocks included in the pixel blocks to be read are read in parallel;
a receiving module 104 for receiving the returned 2 of the target memory m And valid pixel blocks included in the pixel blocks to be read.
The method has specific technical association with the internal structure of the computer system, and can solve the technical problems of improving the hardware operation efficiency or the execution effect (including reducing the data storage amount, reducing the data transmission amount, improving the hardware processing speed and the like), thereby obtaining the technical effect of improving the internal performance of the computer system which accords with the natural law.
In some embodiments, functions or modules included in an apparatus provided by the embodiments of the present disclosure may be used to perform a method described in the foregoing method embodiments, and specific implementations thereof may refer to descriptions of the foregoing method embodiments, which are not repeated herein for brevity.
The disclosed embodiments also provide a computer readable storage medium having stored thereon computer program instructions which, when executed by a processor, implement the above-described method. The computer readable storage medium may be a volatile or nonvolatile computer readable storage medium.
The embodiment of the disclosure also provides an electronic device, which comprises: a processor; a memory for storing processor-executable instructions; wherein the processor is configured to invoke the instructions stored in the memory to perform the above method.
Embodiments of the present disclosure also provide a computer program product comprising computer readable code, or a non-transitory computer readable storage medium carrying computer readable code, which when run in a processor of an electronic device, performs the above method.
The electronic device may be provided as a terminal, server or other form of device.
Fig. 11 shows a block diagram of an electronic device, according to an embodiment of the disclosure. Referring to fig. 11, an electronic device 1900 may be provided as a server or terminal device. Referring to FIG. 11, electronic device 1900 includes a processing component 1922 that further includes one or more processors and memory resources represented by memory 1932 for storing instructions, such as application programs, that can be executed by processing component 1922. The application programs stored in memory 1932 may include one or more modules each corresponding to a set of instructions. Further, processing component 1922 is configured to execute instructions to perform the methods described above.
The electronic device 1900 may also include a power component 1926 configured to perform power management of the electronic device 1900, a wired or wireless network interface 1950 configured to connect the electronic device 1900 to a network, andan input-output interface 1958. Electronic device 1900 may operate an operating system based on memory 1932, such as the Microsoft Server operating system (Windows Server) TM ) Apple Inc. developed graphical user interface based operating System (Mac OS X TM ) Multi-user multi-process computer operating system (Unix) TM ) Unix-like operating system (Linux) of free and open source code TM ) Unix-like operating system (FreeBSD) with open source code TM ) Or the like.
In an exemplary embodiment, a non-transitory computer readable storage medium is also provided, such as memory 1932, including computer program instructions executable by processing component 1922 of electronic device 1900 to perform the methods described above.
The present disclosure may be a system, method, and/or computer program product. The computer program product may include a computer readable storage medium having computer readable program instructions embodied thereon for causing a processor to implement aspects of the present disclosure.
The computer readable storage medium may be a tangible device that can hold and store instructions for use by an instruction execution device. The computer readable storage medium may be, for example, but not limited to, an electronic storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any suitable combination of the foregoing. More specific examples (a non-exhaustive list) of the computer-readable storage medium would include the following: portable computer disks, hard disks, random Access Memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), static Random Access Memory (SRAM), portable compact disk read-only memory (CD-ROM), digital Versatile Disks (DVD), memory sticks, floppy disks, mechanical coding devices, punch cards or in-groove structures such as punch cards or grooves having instructions stored thereon, and any suitable combination of the foregoing. Computer-readable storage media, as used herein, are not to be construed as transitory signals per se, such as radio waves or other freely propagating electromagnetic waves, electromagnetic waves propagating through waveguides or other transmission media (e.g., optical pulses through fiber optic cables), or electrical signals transmitted through wires.
The computer readable program instructions described herein may be downloaded from a computer readable storage medium to a respective computing/processing device or to an external computer or external storage device over a network, such as the internet, a local area network, a wide area network, and/or a wireless network. The network may include copper transmission cables, fiber optic transmissions, wireless transmissions, routers, firewalls, switches, gateway computers and/or edge servers. The network interface card or network interface in each computing/processing device receives computer readable program instructions from the network and forwards the computer readable program instructions for storage in a computer readable storage medium in the respective computing/processing device.
Computer program instructions for performing the operations of the present disclosure can be assembly instructions, instruction Set Architecture (ISA) instructions, machine-related instructions, microcode, firmware instructions, state setting data, or source or object code written in any combination of one or more programming languages, including an object oriented programming language such as Smalltalk, c++ or the like and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The computer readable program instructions may be executed entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer through any kind of network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or may be connected to an external computer (for example, through the Internet using an Internet service provider). In some embodiments, aspects of the present disclosure are implemented by personalizing electronic circuitry, such as programmable logic circuitry, field Programmable Gate Arrays (FPGAs), or Programmable Logic Arrays (PLAs), with state information of computer readable program instructions, which can execute the computer readable program instructions.
Various aspects of the present disclosure are described herein with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the disclosure. It will be understood that each block of the flowchart illustrations and/or block diagrams, and combinations of blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer-readable program instructions.
These computer readable program instructions may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions/acts specified in the flowchart and/or block diagram block or blocks. These computer readable program instructions may also be stored in a computer readable storage medium that can direct a computer, programmable data processing apparatus, and/or other devices to function in a particular manner, such that the computer readable medium having the instructions stored therein includes an article of manufacture including instructions which implement the function/act specified in the flowchart and/or block diagram block or blocks.
The computer readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other devices to cause a series of operational steps to be performed on the computer, other programmable apparatus or other devices to produce a computer implemented process such that the instructions which execute on the computer, other programmable apparatus or other devices implement the functions/acts specified in the flowchart and/or block diagram block or blocks.
The flowcharts and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments of the present disclosure. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of instructions, which comprises one or more executable instructions for implementing the specified logical function(s). In some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.
The computer program product may be realized in particular by means of hardware, software or a combination thereof. In an alternative embodiment, the computer program product is embodied as a computer storage medium, and in another alternative embodiment, the computer program product is embodied as a software product, such as a software development kit (Software Development Kit, SDK), or the like.
The foregoing description of various embodiments is intended to highlight differences between the various embodiments, which may be the same or similar to each other by reference, and is not repeated herein for the sake of brevity.
It will be appreciated by those skilled in the art that in the above-described method of the specific embodiments, the written order of steps is not meant to imply a strict order of execution but rather should be construed according to the function and possibly inherent logic of the steps.
If the technical scheme of the application relates to personal information, the product applying the technical scheme of the application clearly informs the personal information processing rule before processing the personal information, and obtains independent consent of the individual. If the technical scheme of the application relates to sensitive personal information, the product applying the technical scheme of the application obtains individual consent before processing the sensitive personal information, and simultaneously meets the requirement of 'explicit consent'. For example, a clear and remarkable mark is set at a personal information acquisition device such as a camera to inform that the personal information acquisition range is entered, personal information is acquired, and if the personal voluntarily enters the acquisition range, the personal information is considered as consent to be acquired; or on the device for processing the personal information, under the condition that obvious identification/information is utilized to inform the personal information processing rule, personal authorization is obtained by popup information or a person is requested to upload personal information and the like; the personal information processing rule may include information such as a personal information processor, a personal information processing purpose, a processing mode, and a type of personal information to be processed.
The foregoing description of the embodiments of the present disclosure has been presented for purposes of illustration and description, and is not intended to be exhaustive or limited to the embodiments disclosed. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the various embodiments described. The terminology used herein was chosen in order to best explain the principles of the embodiments, the practical application, or the improvement of technology in the marketplace, or to enable others of ordinary skill in the art to understand the embodiments disclosed herein.

Claims (12)

1. A data reading apparatus in image processing, comprising:
the device comprises an identification reading module, a storage module and a storage module, wherein the identification reading module is used for sending a first data reading request to a target memory, wherein the first data reading request is used for requesting to read a writing identification corresponding to a pixel block to be read stored in the target memory;
the judging module is used for judging whether the pixel block to be read is an effective pixel block or not according to the writing identification corresponding to the pixel block to be read returned by the target memory;
the pixel reading module is used for sending a second data reading request to the target memory when the pixel block to be read is an effective pixel block, wherein the second data reading request is used for requesting to read the pixel block to be read;
And the receiving module is used for receiving the pixel block to be read returned by the target memory.
2. The apparatus of claim 1, wherein the write identifier corresponding to the pixel block to be read includes a write identifier corresponding to each pixel point in the pixel block to be read;
the judging module is used for:
determining the pixel block to be read as an effective pixel block under the condition that at least one effective writing identifier exists in the writing identifiers corresponding to the pixel block to be read, wherein the pixel point corresponding to the effective writing identifier is effective pixel data in the pixel block to be read; or alternatively, the first and second heat exchangers may be,
and determining that the pixel block to be read is not an effective pixel block under the condition that the writing identification corresponding to each pixel point in the writing identification corresponding to the pixel block to be read is an invalid writing identification.
3. The apparatus of claim 2, wherein the apparatus further comprises:
and the optimization module is used for replacing the pixel value of the pixel point corresponding to the invalid writing mark in the read pixel block with a preset background pixel value under the condition that the writing mark corresponding to the read pixel block comprises the valid writing mark and the invalid writing mark.
4. A data writing apparatus in image processing, the apparatus being applied to a target memory, the target memory being divided into N pixel storage groups, wherein N is a positive integer of 2 or more, the apparatus comprising:
a pixel writing module for receiving a data parallel writing request, wherein the data parallel writing request is used for requesting 2 in a target image m Writing the pixel blocks into the target memory in parallel, wherein 2 m Is a positive integer of 2 or more and N or less;
a storage packet selection module for determining said 2 m A pixel storage group identifier corresponding to each pixel block in the pixel blocks, wherein the pixel storage group identifier is 2 m Adjacent pixel blocks in the pixel blocks correspond to different pixel storage group identifications;
an identification generation module for generating identification information according to the method 2 m In blocks of pixelsStoring group identifiers corresponding to each pixel block, and carrying out the process of 2 m Writing blocks of pixels in parallel to the target memory, and determining the 2 m And writing identification corresponding to each pixel block in the pixel blocks.
5. The apparatus of claim 4, wherein each pixel storage group comprises M pixel storage rows, wherein M is a positive integer greater than or equal to 2, and wherein the target memory comprises M x N size identification storage units;
The identification generation module is used for:
for said 2 m And determining a writing identification in the ith column and the jth row in the identification storage unit according to whether each pixel point in the pixel block is successfully written into the jth pixel storage row in the ith pixel storage group or not by any pixel block in the pixel blocks, wherein the writing identification in the ith column and the jth row comprises the writing identification corresponding to each pixel point in the pixel block.
6. The apparatus of claim 5, wherein the identity generation module is configured to:
for any pixel point in the pixel block, determining a writing identifier corresponding to the pixel point as an effective writing identifier when the pixel point is successfully written into the j-th pixel storage row in the i-th pixel storage group; or alternatively, the first and second heat exchangers may be,
and under the condition that the pixel point is not successfully written into the j-th pixel storage row in the i-th pixel storage group, determining a writing identification corresponding to the pixel point as an invalid writing identification.
7. A data reading apparatus in image processing, comprising:
an identifier reading module, configured to send a first data parallel reading request to a target memory, where the first data parallel reading request is used to request parallel reading of 2 stored in the target memory m Writing identification corresponding to the pixel blocks to be read, wherein,the target memory is divided into N pixel storage groups, the 2 m The pixel blocks to be read are stored in different pixel storage groups, N is a positive integer greater than or equal to 2, 2 m Is a positive integer of 2 or more and N or less;
a judging module, configured to return the 2 according to the target memory m Judging the writing identification corresponding to each pixel block to be read in the pixel blocks to be read, and judging the 2 m Whether the pixel blocks to be read comprise valid pixel blocks or not;
a pixel reading module for reading the pixel data at the position 2 m Sending a second data parallel read request to the target memory when the effective pixel block is included in the pixel block to be read, wherein the second data parallel read request is used for requesting the data of the data block 2 m The effective pixel blocks included in the pixel blocks to be read are read in parallel;
a receiving module, configured to receive the 2 returned by the target memory m And valid pixel blocks included in the pixel blocks to be read.
8. A data reading method in image processing, comprising:
a first data reading request is sent to a target memory, wherein the first data reading request is used for requesting to read a writing identifier corresponding to a pixel block to be read stored in the target memory;
Judging whether the pixel block to be read is an effective pixel block or not according to the writing identification corresponding to the pixel block to be read returned by the target memory;
sending a second data reading request to the target memory under the condition that the pixel block to be read is an effective pixel block, wherein the second data reading request is used for requesting to read the pixel block to be read;
and receiving the pixel block to be read returned by the target memory.
9. A data writing method in image processing, the method being applied to a target memory, the target memory being divided into N pixel storage groups, wherein N is a positive integer greater than or equal to 2, the method comprising:
receiving a data parallel write request, wherein the data parallel write request is used for requesting 2 in a target image m Writing the pixel blocks into the target memory in parallel, wherein 2 m Is a positive integer of 2 or more and N or less;
determining said 2 m A pixel storage group identifier corresponding to each pixel block in the pixel blocks, wherein the pixel storage group identifier is 2 m Adjacent pixel blocks in the pixel blocks correspond to different pixel storage group identifications;
according to said 2 m Storing group identifiers corresponding to each pixel block in the pixel blocks, and carrying out the process of 2 m Writing blocks of pixels in parallel to the target memory, and determining the 2 m And writing identification corresponding to each pixel block in the pixel blocks.
10. A data reading method in image processing, comprising:
sending a first data parallel reading request to a target memory, wherein the first data parallel reading request is used for requesting to read 2 stored in the target memory in parallel m Writing identification corresponding to each pixel block to be read, wherein the target memory is divided into N pixel storage groups, and the number of the pixel storage groups is 2 m The pixel blocks to be read are stored in different pixel storage groups, N is a positive integer greater than or equal to 2, 2 m Is a positive integer of 2 or more and N or less;
according to the 2 returned by the target memory m Judging the writing identification corresponding to each pixel block to be read in the pixel blocks to be read, and judging the 2 m Whether the pixel blocks to be read comprise valid pixel blocks or not;
at said 2 m Sending a second data parallel read request to the target memory when the effective pixel block is included in the pixel block to be read, wherein the second data parallel read request is used for requesting the data of the data block 2 m Effective pixels included in each pixel block to be read The blocks are read in parallel;
receiving the 2 returned by the target memory m And valid pixel blocks included in the pixel blocks to be read.
11. An electronic device, comprising:
a processor;
a memory for storing processor-executable instructions;
wherein the processor is configured to invoke the instructions stored in the memory to perform the method of any of claims 8 to 10.
12. A computer readable storage medium having stored thereon computer program instructions, which when executed by a processor, implement the method of any of claims 8 to 10.
CN202310305061.8A 2023-03-24 2023-03-24 Data reading and writing device and method in image processing and electronic equipment Active CN116009792B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202310305061.8A CN116009792B (en) 2023-03-24 2023-03-24 Data reading and writing device and method in image processing and electronic equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202310305061.8A CN116009792B (en) 2023-03-24 2023-03-24 Data reading and writing device and method in image processing and electronic equipment

Publications (2)

Publication Number Publication Date
CN116009792A true CN116009792A (en) 2023-04-25
CN116009792B CN116009792B (en) 2023-09-29

Family

ID=86025207

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202310305061.8A Active CN116009792B (en) 2023-03-24 2023-03-24 Data reading and writing device and method in image processing and electronic equipment

Country Status (1)

Country Link
CN (1) CN116009792B (en)

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2012032583A1 (en) * 2010-09-10 2012-03-15 富士通株式会社 Method of forming image data, method of writing image data, and image data processing circuit
US20170076460A1 (en) * 2015-09-10 2017-03-16 Kabushiki Kaisha Toshiba Image processing apparatus and image processing method
CN108235028A (en) * 2018-03-21 2018-06-29 广州华多网络科技有限公司 Video image decoding method and terminal based on hevc agreements
CN108846808A (en) * 2018-05-28 2018-11-20 郑州云海信息技术有限公司 A kind of method and device thereof of image procossing
CN113110802A (en) * 2021-04-16 2021-07-13 维沃移动通信有限公司 Image block processing method and device, electronic equipment and readable storage medium
CN114331817A (en) * 2021-12-27 2022-04-12 泰山信息科技有限公司 Image conversion method, system, device and computer readable storage medium
CN114374760A (en) * 2022-01-21 2022-04-19 惠州Tcl移动通信有限公司 Image testing method and device, computer equipment and computer readable storage medium

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2012032583A1 (en) * 2010-09-10 2012-03-15 富士通株式会社 Method of forming image data, method of writing image data, and image data processing circuit
US20170076460A1 (en) * 2015-09-10 2017-03-16 Kabushiki Kaisha Toshiba Image processing apparatus and image processing method
CN108235028A (en) * 2018-03-21 2018-06-29 广州华多网络科技有限公司 Video image decoding method and terminal based on hevc agreements
CN108846808A (en) * 2018-05-28 2018-11-20 郑州云海信息技术有限公司 A kind of method and device thereof of image procossing
CN113110802A (en) * 2021-04-16 2021-07-13 维沃移动通信有限公司 Image block processing method and device, electronic equipment and readable storage medium
CN114331817A (en) * 2021-12-27 2022-04-12 泰山信息科技有限公司 Image conversion method, system, device and computer readable storage medium
CN114374760A (en) * 2022-01-21 2022-04-19 惠州Tcl移动通信有限公司 Image testing method and device, computer equipment and computer readable storage medium

Also Published As

Publication number Publication date
CN116009792B (en) 2023-09-29

Similar Documents

Publication Publication Date Title
US10977761B2 (en) Digital watermark embedding method and extraction method, digital watermark embedding apparatus and extraction apparatus, and digital watermark system
US20200328984A1 (en) Method and apparatus for allocating resource
CN109829432B (en) Method and apparatus for generating information
CN105550345A (en) File operation method and apparatus
US11314451B2 (en) Method and apparatus for storing data
US11086668B2 (en) Method, electronic device and computer program product for processing task
US11809429B2 (en) Method for processing model parameters, and apparatus
CN111694792A (en) Identification generation method and device based on snowfly
CN113204345A (en) Page generation method and device, electronic equipment and storage medium
CN111459364A (en) Icon updating method and device and electronic equipment
CN113553123B (en) Data processing method, device, electronic equipment and storage medium
CN105260459A (en) Search method and apparatus
CN117130663B (en) Instruction reading method, L2 instruction cache, electronic equipment and storage medium
CN113329096B (en) Message transmission method and device, electronic equipment and storage medium
CN111966473B (en) Operation method and device of linear regression task and electronic equipment
CN116009792B (en) Data reading and writing device and method in image processing and electronic equipment
CN115481440B (en) Data processing method, device, electronic equipment and medium
CN111158907A (en) Data processing method and device, electronic equipment and storage medium
CN116033106B (en) Image processing method and device for multiple sampling and electronic equipment
CN116152043B (en) Memory management method and device based on image processing and electronic equipment
CN114428925A (en) Page rendering method and device, electronic equipment and computer readable medium
CN111338827A (en) Method and device for pasting table data and electronic equipment
CN116402674B (en) GPU command processing method and device, electronic equipment and storage medium
CN112711588A (en) Multi-table connection method and device
CN116360708B (en) Data writing method and device, electronic equipment and storage medium

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant