CN115989563A - Semiconductor device with a plurality of semiconductor chips - Google Patents

Semiconductor device with a plurality of semiconductor chips Download PDF

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CN115989563A
CN115989563A CN202280005677.7A CN202280005677A CN115989563A CN 115989563 A CN115989563 A CN 115989563A CN 202280005677 A CN202280005677 A CN 202280005677A CN 115989563 A CN115989563 A CN 115989563A
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peak
concentration
hydrogen
semiconductor substrate
region
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洼内源宜
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Fuji Electric Co Ltd
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Fuji Electric Co Ltd
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Abstract

Provided is a semiconductor device, which is provided with: a semiconductor substrate having bulk donors distributed throughout; a high concentration hydrogen peak provided on the semiconductor substrate and having a hydrogen dose of 3 × 10 15 /cm 2 The above; a high concentration region including a position overlapping with the high concentration hydrogen peak in a depth direction of the semiconductor substrate, and having a donor concentration higher than a bulk donor concentration; and a lifetime adjustment unit which is provided at a position overlapping the high concentration hydrogen peak in the depth direction and has a minimum carrier lifetime.

Description

Semiconductor device with a plurality of semiconductor chips
Technical Field
The present invention relates to a semiconductor device.
Background
Conventionally, there is known a technique of adjusting the lifetime of carriers by injecting protons into a semiconductor substrate to form a buffer region and helium into the semiconductor substrate (for example, see patent document 1).
Patent document 1: U.S. patent application publication No. 2014/217463
Disclosure of Invention
Technical problem
It is preferable to have a structure in which a high concentration region such as a buffer region can be easily formed and a lifetime adjustment portion.
Technical scheme
In order to solve the above problem, one embodiment of the present invention provides a semiconductor device. The semiconductor device may have a semiconductor substrate on which bulk donors are distributed. The semiconductor device may have a high-concentration hydrogen peak provided on the semiconductor substrate and having a hydrogen dose of 3 × 10 15 /cm 2 As described above. The semiconductor device may include a high concentration region including a position overlapping with the high concentration hydrogen peak in a depth direction of the semiconductor substrate, and the donor concentration may be higher than the bulk donor concentration. The semiconductor device may further include a lifetime adjustment unit provided at a position overlapping with the high-concentration hydrogen peak in the depth direction, and the carrier lifetime may exhibit an extremely small value.
The hydrogen dose of the high concentration hydrogen peak may be 1X 10 16 /cm 2 The above.
The high concentration hydrogen peak may have a hydrogen chemical concentration of 2X 10 18 /cm 3 As described above.
The carrier density distribution in the depth direction of the high concentration region may include a valley disposed at a position overlapping with the peak of the high concentration hydrogen, and a peak disposed adjacent to the valley.
There may be a plurality of high concentration hydrogen peaks at different positions in the depth direction.
The carrier density within the full width at half maximum in the depth direction of the high concentration hydrogen peak may have a valley or a meander (Kink).
The peak of the carrier density peak may be arranged at a position different from the peak of the high concentration hydrogen peak.
The semiconductor device may include a gate structure disposed on an upper surface of the semiconductor substrate. The high concentration hydrogen peak may have a lower tail whose hydrogen chemical concentration decreases toward the lower surface of the semiconductor substrate. The high concentration hydrogen peak may have an upper tail whose hydrogen chemical concentration decreases more sharply toward the upper surface of the semiconductor substrate than a lower tail.
The high-concentration hydrogen peak may be disposed in a region on the lower surface side of the semiconductor substrate.
The semiconductor device may include a groove portion provided on the upper surface of the semiconductor substrate. The semiconductor substrate has a critical depth position where an integrated value obtained by integrating the donor concentration from the lower end of the groove portion toward the lower surface of the semiconductor substrate reaches a critical integrated concentration of the semiconductor substrate. The peak of the high-concentration hydrogen peak may be arranged closer to the lower surface side of the semiconductor substrate than the critical depth position.
The vacancy density profile in the depth direction may have a vacancy density peak disposed so as to overlap with the high-concentration hydrogen peak in the depth direction. The vacancy density profile may have a lower flat portion disposed at a position closer to the lower surface side of the semiconductor substrate than the vacancy density peak. The vacancy density profile may have an upper flat portion that is disposed closer to the upper surface side of the semiconductor substrate than the vacancy density peak and has a lower density than the lower flat portion. The full width at half maximum in the depth direction of the vacancy density peak may be less than the full width at half maximum in the depth direction of the high concentration hydrogen peak.
The semiconductor device may include an upper surface side donor peak which is disposed at a position closer to the upper surface side of the semiconductor substrate than the high concentration hydrogen peak, and which exhibits a donor concentration peak. The semiconductor device may have a low-concentration hydrogen peak provided at a position overlapping with the donor peak on the upper surface side in the depth direction, and the dose of hydrogen is less than 3X 10 15 /cm 2
The carrier lifetime in the full width at half maximum in the depth direction of the low concentration hydrogen peak may not have a minimum value.
The ratio of the concentration of vacancies at the depth position at which the low-concentration hydrogen peak is provided to the concentration of the low-concentration hydrogen peak may be smaller than the ratio of the concentration of vacancies at the depth position at which the high-concentration hydrogen peak is provided to the concentration of the high-concentration hydrogen peak.
The range of the full width at half maximum of the high concentration hydrogen peak and the range of the full width at half maximum of the low concentration hydrogen peak may be separated from each other.
The semiconductor device may include a collector region provided in contact with the lower surface of the semiconductor substrate and having an acceptor concentration peak. The range of the full width at half maximum of the acceptor concentration peak and the range of the full width at half maximum of the high concentration hydrogen peak may be separated from each other.
The summary of the invention does not list all necessary features of the invention. In addition, sub-combinations of these feature groups can also be inventions.
Drawings
Fig. 1 is a cross-sectional view showing an example of a semiconductor device 100.
Fig. 2 shows an example of the distribution of the hydrogen chemical concentration, the carrier density, the donor concentration, the vacancy density, and the carrier lifetime in the depth direction at the positions shown by the line a-a of fig. 1.
Fig. 3 shows other examples of the distribution of carrier density, vacancy density, and carrier lifetime at the positions shown by the line a-a of fig. 1.
Fig. 4 shows the distributions of carrier density, vacancy density, and carrier lifetime of the comparative example.
Fig. 5 is an example of a plan view of the semiconductor device 100.
Fig. 6 is an enlarged view of the region E in fig. 5.
Fig. 7 is a view showing an example of a section b-b in fig. 6.
Fig. 8 shows an example of the distribution of the hydrogen chemical concentration, the carrier density, the vacancy density, and the carrier lifetime in the depth direction at the positions shown by the line c-c of fig. 7.
Fig. 9 shows other examples of the distribution of hydrogen chemical concentration, carrier density, vacancy density, and carrier lifetime at the line c-c.
Fig. 10 shows other distribution examples of the hydrogen chemical concentration, carrier density, vacancy density, and carrier lifetime at the line c-c.
Fig. 11 shows an example of the distribution in the depth direction of the hydrogen chemical concentration, carrier density, vacancy density, and carrier lifetime at the positions shown by the lines d-d in fig. 7.
Description of the symbols
30823060, 30...89, 30...60, 30...80 peak concentration of main peak, ......8230, 30823080 peak concentration of main peak, 30......60, 30...peak concentration of main peak, 308230 peak, ...peak, 3082308260 peak concentration of main peak, ...8260, .........8260, 30...8260, front end portion, 42 ......80, conductive portion, 823044, ...8260, ...8260, and 8260
Detailed Description
The present invention will be described below with reference to embodiments of the invention, but the following embodiments do not limit the invention according to the claims. All combinations of the features described in the embodiments are not necessarily essential to the means for solving the problems of the invention.
In this specification, one side in a direction parallel to the depth direction of the semiconductor substrate is referred to as "up", and the other side is referred to as "down". One of the two main surfaces of the substrate, layer, or other member is referred to as an upper surface, and the other surface is referred to as a lower surface. The directions of "up" and "down" are not limited to the direction of gravity or the direction when the semiconductor device is mounted.
In this specification, technical matters will be described using orthogonal coordinate axes of X, Y, and Z axes. The orthogonal coordinate axes merely specify the relative positions of the components, and are not limited to specific directions. For example, the Z axis does not necessarily indicate a height direction with respect to the ground. The + Z-axis direction and the-Z-axis direction are opposite directions to each other. When the positive and negative are not described, the Z-axis direction refers to a direction parallel to the + Z-axis and the-Z-axis.
In this specification, orthogonal axes parallel to the upper surface and the lower surface of the semiconductor substrate are referred to as an X axis and a Y axis. In addition, an axis perpendicular to the upper surface and the lower surface of the semiconductor substrate is set as a Z axis. In this specification, the Z-axis direction is sometimes referred to as a depth direction. In addition, in this specification, a direction parallel to the upper surface and the lower surface of the semiconductor substrate including the X axis and the Y axis is sometimes referred to as a horizontal direction. In the present specification, the term "upper surface side of the semiconductor substrate" refers to a region extending from the center of the semiconductor substrate in the depth direction to the upper surface. The term "lower surface side of the semiconductor substrate" refers to a region from the center of the semiconductor substrate in the depth direction to the lower surface.
In the present specification, the term "identical" or "equal" may include a case where an error due to a manufacturing variation or the like is included. The error is, for example, within 10%.
In this specification, the conductivity type of the doped region doped with impurities is described as P-type or N-type. In this specification, an impurity may be particularly referred to as an N-type donor or a P-type acceptor, and may be referred to as a dopant. In this specification, doping is to introduce a donor or an acceptor into a semiconductor substrate to form a semiconductor having an N-type conductivity or a semiconductor having a P-type conductivity.
In this specification, the doping concentration refers to the concentration of a donor or the concentration of an acceptor in a thermal equilibrium state. In the present specification, the net doping concentration is a net concentration obtained by adding the donor concentration as a positive ion concentration and the acceptor concentration as a negative ion concentration, including the polarity of the charge.As an example, if the donor concentration is set to N D An acceptor concentration is set to N A The net doping concentration at any location is N D -N A
The donor has a function of supplying electrons to the semiconductor. The acceptor has a function of receiving electrons from the semiconductor. The donor and acceptor are not limited to the impurities themselves. For example, a VOH defect in which vacancies (V), oxygen (O), and hydrogen (H) existing in a semiconductor are bonded functions as a donor for supplying electrons.
In the present specification, the term "P + type" or "N + type" means a higher doping concentration than P type or N type, and the term "P" or "N" means a lower doping concentration than P type or N type. In the present specification, the term "P + + type" or "N + + type" means that the doping concentration is higher than that of P + type or N + type.
In the present specification, the chemical concentration refers to the atomic density of an impurity measured independently of the state of electrical activation. The chemical concentration (atomic density) can be measured by Secondary Ion Mass Spectrometry (SIMS), for example. The net doping concentration can be measured by a voltage-capacitance method (CV method). In addition, the carrier density measured by the spreading resistance method (SR method) can be taken as the net doping concentration. The carrier density measured by the CV method or the SR method can be a value in a thermal equilibrium state. In the N-type region, the donor concentration is sufficiently higher than the acceptor concentration, and therefore the carrier density in this region may be set to the donor concentration. Similarly, in the P-type region, the carrier density in the region may be set to the acceptor concentration.
In addition, when the concentration profile of the donor, acceptor or net doping has a peak, the peak may be taken as the concentration of the donor, acceptor or net doping in the region. In the case where the concentration of the donor, acceptor, or net doping is substantially uniform, or the like, the average value of the concentrations of the donor, acceptor, or net doping in the region may be set as the concentration of the donor, acceptor, or net doping. In the present specification, the concentration per unit volume means the use of atoms/cm 3 Or/cm 3 . The unit is used for the concentration of donors or acceptors in a semiconductor substrateOr chemical concentration. The atoms flag may also be omitted. Unless otherwise stated, the unit system in this specification is the SI unit system. The length may be expressed in units of cm, but each calculation may be performed in terms of meters (m).
The carrier density measured by the SR method may also be lower than the concentration of donors or acceptors. In the range where current flows when the spreading resistance is measured, the carrier mobility of the semiconductor substrate may be lower than the value in the crystalline state. The decrease in carrier mobility is caused by scattering of carriers due to disorder (disorder) of the crystal structure caused by lattice defects or the like.
The concentration of the donor or acceptor calculated from the carrier density measured by the CV method or the SR method may be lower than the chemical concentration of the element representing the donor or acceptor. For example, in a silicon semiconductor, the donor concentration of phosphorus or arsenic which serves as a donor, or the acceptor concentration of boron (boron) which serves as an acceptor, is about 99% of the chemical concentration thereof. On the other hand, the donor concentration of hydrogen that becomes a donor in a silicon semiconductor is about 0.1% to 10% of the chemical concentration of hydrogen.
Fig. 1 is a cross-sectional view showing an example of a semiconductor device 100. The semiconductor device 100 includes a semiconductor substrate 10. The semiconductor substrate 10 is a substrate formed of a semiconductor material. As an example, the semiconductor substrate 10 is a silicon substrate.
At least one of a transistor element such as an Insulated Gate Bipolar Transistor (IGBT) and a diode element such as a Free Wheeling Diode (FWD) is formed on the semiconductor substrate 10. In fig. 1, electrodes of the transistor element and the diode element, and regions provided inside the semiconductor substrate 10 are omitted.
The N-type bulk donors in the semiconductor substrate 10 of this example are distributed over the entire body. The bulk donor is a donor formed from a dopant contained substantially uniformly in an ingot when the ingot serving as a base of the semiconductor substrate 10 is manufactured. The bulk donor in this example is an element other than hydrogen. The dopant of the bulk donor is, for example, an element of group V or VI, such as phosphorus, antimony, arsenic, selenium or sulfur, but is not limited thereto. The bulk donor in this example is phosphorus. The bulk donor is also contained in the P-type region. The semiconductor substrate 10 may be a wafer cut out from an ingot of a semiconductor, or may be a chip obtained by dividing a wafer into individual pieces. The ingot of the semiconductor can be produced by any of a czochralski single crystal production method (CZ method), a magnetron pulling method (MCZ method), and a float zone method (FZ method).
As an example, the chemical concentration of oxygen contained in the substrate manufactured by the MCZ method is 1X 10 17 ~7×10 17 atoms/cm 3 . As an example, the chemical concentration of oxygen contained in the substrate manufactured by the FZ method is 1X 10 15 ~5×10 16 atoms/cm 3 . The bulk donor concentration may use a chemical concentration of bulk donors distributed throughout the semiconductor substrate 10 and is a value between 90% and 100% of the chemical concentration. In the semiconductor substrate doped with dopants of V group and VI group such as phosphorus, the bulk donor concentration can be 1 × 10 11 /cm 3 Above and 3X 10 13 /cm 3 The following. The bulk donor concentration of the semiconductor substrate doped with the group V or VI dopant is preferably 1X 10 12 /cm 3 Above and 1 × 10 13 /cm 3 The following. In addition, an undoped substrate that does not substantially contain a bulk dopant such as phosphorus may be used as the semiconductor substrate 10. In this case, bulk donor concentration (N) of undoped substrate B0 ) For example, 1X 10 10 /cm 3 Above and 5X 10 12 /cm 3 The following. Bulk donor concentration (N) of undoped substrates B0 ) Preferably 1X 10 11 /cm 3 The above. Bulk donor concentration (N) of undoped substrate B0 ) Preferably 5X 10 12 /cm 3 The following.
The semiconductor substrate 10 has an upper surface 21 and a lower surface 23. The upper surface 21 and the lower surface 23 are two main surfaces of the semiconductor substrate 10. In the present specification, orthogonal axes in a plane parallel to the upper surface 21 and the lower surface 23 are defined as an X axis and a Y axis, and an axis perpendicular to the upper surface 21 and the lower surface 23 is defined as a Z axis. A gate structure of a transistor portion may be provided on the upper surface 21. The gate structure is a structure including a gate electrode (e.g., a gate conductive portion 44 described later) and a gate insulating film (e.g., a gate insulating film 42 described later).
In the semiconductor substrate 10, hydrogen ions are implanted from the lower surface 23 to a predetermined depth position Z1. The principal surface of the semiconductor substrate 10 into which hydrogen ions are implanted may be not only the lower surface 23 but also the upper surface 21. In this specification, the distance from the lower surface 23 in the Z-axis direction is sometimes referred to as a depth position. In this specification, the center position in the depth direction of the semiconductor substrate 10 is referred to as a depth position Zc. The depth position Z1 is a position at a distance Z1 from the lower surface 23 in the Z-axis direction. The depth position Z1 in this example is arranged on the lower surface 23 side of the semiconductor substrate 10 (the region between the depth position Zc and the lower surface 23). The implantation of hydrogen ions into the depth position Z1 means that the average distance (also referred to as a range) of the hydrogen ions passing through the inside of the semiconductor substrate 10 is Z1. The hydrogen ions are accelerated at an acceleration energy corresponding to the predetermined depth position Z1, and introduced into the inside of the semiconductor substrate 10.
A region where hydrogen ions pass through the inside of the semiconductor substrate 10 is defined as a pass-through region 106. In the example of fig. 1, the passing region 106 extends from the lower surface 23 of the semiconductor substrate 10 to the depth position Z1. A part of the hydrogen ions pass through the semiconductor substrate 10 to the upper surface 21 side of the depth position Z1. A region through which hydrogen ions of a predetermined concentration pass may be used as the passing region 106. For example, the predetermined concentration may be a value that is half the chemical concentration of hydrogen implanted at the depth position Z1. In this case, the passing region 106 includes a region of the half-value width of the hydrogen chemical concentration distribution on the upper surface 21 side than the depth position Z1. The hydrogen ions may be implanted into the entire surface of the semiconductor substrate 10 in the XY plane or may be implanted into only a part of the region. In this example, hydrogen ions are implanted into the entire surface of the semiconductor substrate 10.
In the semiconductor substrate 10, lattice defects mainly composed of vacancies such as monoatomic vacancies (V) and diatomic vacancies (VV) are formed in the passage region 106 through which hydrogen ions pass. Atoms adjacent to the vacancy have a dangling bond. Lattice defects may also include interstitial atoms, dislocations, and the like, and may also include donors and acceptors in a broad sense, but in the present specification, a lattice defect mainly composed of vacancies may be referred to as a vacancy-type lattice defect, a vacancy-type defect, or simply as a lattice defect. A crystal lattice defect mainly containing vacancies may function as a recombination center of carriers of electrons and holes. Further, since many lattice defects are formed by hydrogen ion implantation into the semiconductor substrate 10, the crystallinity of the semiconductor substrate 10 may be greatly disturbed. In the present specification, this disorder of crystallinity is sometimes referred to as disorder.
In addition, the entire semiconductor substrate 10 contains oxygen. The oxygen is introduced intentionally or unintentionally during the manufacture of the ingot of the semiconductor. In addition, by implanting hydrogen ions, hydrogen is contained in the passing region 106. In addition, the hydrogen ions are diffused in the passing region 106 by performing heat treatment (sometimes referred to as annealing in this specification) on the semiconductor substrate 10 after the hydrogen ions are implanted. In this example, hydrogen is distributed throughout the entire pass-through zone 106.
After hydrogen ions are implanted into the semiconductor substrate 10, hydrogen (H), vacancies (V), and oxygen (O) are combined inside the semiconductor substrate 10 to form VOH defects. Further, by annealing the semiconductor substrate 10, hydrogen is diffused, and formation of VOH defects is promoted. Further, by performing annealing after the formation of the passing region 106, hydrogen can be bonded to the vacancy, and therefore, hydrogen can be suppressed from being released from the lower surface 23 to the outside of the semiconductor substrate 10.
The VOH defect functions as a donor that donates electrons. In this specification, a VOH defect is sometimes simply referred to as a hydrogen donor or a donor. In the semiconductor substrate 10 of this example, hydrogen donors are formed in the through region 106. The doping concentration of the hydrogen donors at each location is lower than the chemical concentration of hydrogen at each location. The ratio of the chemical concentration of hydrogen to the doping concentration of the hydrogen donor (VOH defect) is a value of 0.1% to 30% (i.e., 0.001 or more and 0.3 or less). In this example, the ratio of the chemical concentration of hydrogen to the doping concentration of the hydrogen donor (VOH defect) is 1% to 5%. Note that, unless otherwise specified, in this specification, VOH defects having a distribution similar to the chemical concentration distribution of hydrogen and VOH defects having a distribution similar to the distribution of vacancy defects passing through the region 106 are both referred to as hydrogen donors or hydrogen as donors.
By forming hydrogen donors in the pass region 106 of the semiconductor substrate 10, the donor concentration in the pass region 106 can be made higher than the doping concentration of bulk donors (sometimes simply referred to as bulk donor concentration). This makes it possible to easily form a local N-type region. In addition, by increasing the range of the hydrogen ions, the passing region 106 can be increased in the Z-axis direction. In this case, a high concentration region in which the donor concentration is higher than the bulk donor can be formed over a wide range. In general, it is necessary to prepare a semiconductor substrate 10 having a predetermined bulk donor concentration according to the characteristics of an element to be formed on the semiconductor substrate 10, particularly, the rated voltage or the withstand voltage. In contrast, when the through region 106 is formed to be large, the donor concentration of the semiconductor substrate 10 can be adjusted by controlling the dose of hydrogen ions. Therefore, the semiconductor device 100 can be manufactured using a semiconductor substrate having a bulk donor concentration that does not correspond to the characteristics of the element or the like. The variation in the bulk donor concentration during the manufacture of the semiconductor substrate 10 is relatively large, but the dose of hydrogen ions can be controlled with relatively high accuracy. Therefore, the concentration of lattice defects generated by implanting hydrogen ions can be controlled with high accuracy, and the donor concentration in the pass region can be controlled with high accuracy.
The depth position Z1 may be disposed in a range of not more than half the thickness of the semiconductor substrate 10 with respect to the lower surface 23, or may be disposed in a range of not more than 1/4 of the thickness of the semiconductor substrate 10. The depth position Z1 may be disposed in a range of not more than half the thickness of the semiconductor substrate 10 with respect to the upper surface 21, or may be disposed in a range of not more than 1/4 of the thickness of the semiconductor substrate 10.
Immediately after the hydrogen ions are implanted, a large number of lattice defects are formed in the vicinity of the depth position Z1. On the other hand, a large amount of hydrogen exists in the vicinity of the depth position Z1. When the semiconductor substrate 10 is annealed, the lattice defects are combined with hydrogen to become hydrogen donors. Therefore, in general, almost all of the lattice defects near the depth position Z1 become hydrogen donors, and almost no lattice defects remain near the depth position Z1.
On the other hand, the following phenomenon was confirmed: if the dose of the hydrogen ions exceeds a certain value, it is considered that a large number of lattice defects remain in the vicinity of the depth position Z1 even if the semiconductor substrate 10 is annealed. This is presumably because, if the dose of hydrogen ions exceeds a certain value, the crystallinity of the semiconductor substrate 10 in the vicinity of the depth position Z1 is disturbed to such an extent that it cannot be recovered by annealing.
In the region where a large number of lattice defects remain, carriers are trapped by the lattice defects, and therefore the lifetime of the carriers becomes short. By adjusting the lifetime of carriers, characteristics such as the off time of the semiconductor device 100 can be adjusted. In this example, by setting the dose of hydrogen ions to the depth position Z1 to a certain value or more, the lifetime adjustment section 241 can be formed at the depth position Z1 and the high concentration region having a higher concentration than the bulk donor can be formed in the pass region 106 in a simple manufacturing process.
Fig. 2 shows an example of the distribution in the depth direction of the hydrogen chemical concentration, carrier density, donor concentration, vacancy density, and carrier lifetime at the position shown by the line a-a in fig. 1. The donor concentration of the high concentration region 107 in this example is the concentration of hydrogen donors. Fig. 2 shows the distributions after hydrogen ions are implanted into the depth position Z1 and annealed.
The horizontal axis of fig. 2 represents the depth position from the lower surface 23, and the vertical axis represents the chemical concentration or density per unit volume in a logarithmic axis. However, the vertical axis in the graph of the carrier lifetime represents time (seconds). The chemical concentrations in fig. 2 are measured, for example, by the SIMS method. The carrier density is measured by, for example, the SR method. In FIG. 2, the bulk donor concentration D is shown by a dotted line b . Bulk donor concentration D b May be uniform throughout the semiconductor substrate 10. The semiconductor substrate 10 of the present example is an MCZ substrate, for example.
A high concentration hydrogen peak 201 is provided at a depth position Z1 of the semiconductor substrate 10. The high-concentration hydrogen peak 201 is a peak of the hydrogen chemical concentration distribution in the depth direction. The high concentration hydrogen peak 201 has a peak 202, an upper tail 203, and a lower tail 204. The apex 202 is a point at which the hydrogen chemical concentration exhibits a maximum. The depth position of the vertex 202 is Z1. The lower tail 204 is a slope in which the hydrogen chemical concentration monotonically decreases from the apex 202 toward the lower surface 23 of the semiconductor substrate 10. The upper tail 203 is a slope in which the hydrogen chemical concentration monotonically decreases from the apex 202 toward the upper surface 21 of the semiconductor substrate 10. In this example, since hydrogen ions are implanted from the lower surface 23, a relatively large number of hydrogen ions exist between the apex 202 and the lower surface 23. The hydrogen chemical concentration of the upper tail 203 may decrease more sharply than the hydrogen chemical concentration of the lower tail 204.
In this example, the ratio is 1 × 10 16 ions/cm 2 The dose of (2) is implanted with hydrogen ions from the lower surface 23 to the depth position Z1. The dose of the impurity peak such as hydrogen may be a value obtained by integrating the chemical concentration of the impurity over the full width at half maximum in the depth direction of the peak. Alternatively, a value obtained by multiplying the peak concentration of the peak by the full width at half maximum may be used as the dose of the impurity peak such as hydrogen. On the other hand, in this peak, the width of the range in the depth direction at a concentration of 10% or more of the peak concentration is defined as 10% full width. The dose of the impurity peak of hydrogen or the like may be a value obtained by integrating the chemical concentration of the impurity in a range of 10% full width in the depth direction of the peak. In the example of fig. 2, a value obtained by integrating the hydrogen chemical concentration in the range of the full width at half maximum W201 of the high concentration hydrogen peak 201 may be used as the hydrogen dose of the high concentration hydrogen peak 201. In the example of fig. 2, the lower end position of the full width at half maximum W201 is Z1a, and the upper end position is Z1b.
Hydrogen donors are formed in the through region 106 by implanting hydrogen ions into the semiconductor substrate 10 and annealing. Thereby, a high concentration region 107 having a donor concentration higher than the bulk donor concentration Db is formed in the through region 106. The high concentration region 107 includes a position overlapping with the high concentration hydrogen peak 201 in the depth direction of the semiconductor substrate 10. That is, the high concentration region 107 includes at least a part of the range of the full width at half maximum W201 of the high concentration hydrogen peak 201. The high concentration region 107 may be provided from the lower surface 23 to the upper end position Z1b of the high concentration hydrogen peak 201. In the high concentration region 107, the donor concentration distribution may have a shape corresponding to the hydrogen chemical concentration distribution. For example, the donor concentration distribution may have a donor concentration peak 221 at a position overlapping with the high concentration hydrogen peak 201.
If hydrogen ions are implanted at the depth position Z1 at a high dose, a vacancy remains in the vicinity of the depth position Z1 even after annealing. The vacancy density profile of this example has a vacancy density peak 231 at depth position Z1. Vacancy density peak 231 has an apex 232. The vertex 232 is the point where the vacancy density shows a maximum.
The vacancy density peak 231 is disposed so as to overlap the high-concentration hydrogen peak 201. Peak overlap means that the peak of one peak is disposed within the full width at half maximum of the other peak. In this example, the peak 232 of the vacancy density peak 231 is located within the full width at half maximum W201 of the high-concentration hydrogen peak 201. The apex 232 may be disposed at the depth position Z1.
In the region where the vacancy density peak 231 is arranged, the frequency at which carriers are trapped by vacancies becomes high, and therefore the carrier lifetime becomes short. Thus, a lifetime adjustment unit 241 for minimizing the lifetime of carriers is provided at a position overlapping with the high-concentration hydrogen peak 201. The lifetime adjustment unit 241 may be provided at the depth position Z1.
The carrier density has the same distribution as the donor concentration. However, the carrier lifetime near the depth position Z1 is short, and the mobility of the carrier is smaller than that in the crystal. Therefore, the carrier density in the vicinity of the depth position Z1 is lower than the donor concentration. The carrier density distribution of this example has a trough 211 disposed at a position overlapping the high-concentration hydrogen peak 201, and a peak 212 and a peak 213 disposed adjacent to the trough 211. The valley 211 is a portion where the carrier density exhibits a minimum value, and the peaks 212 and 213 are portions where the carrier density exhibits a maximum value.
The trough 211, peak 212, and peak 213 in this example are disposed within the full width at half maximum W201 of the high-concentration hydrogen peak 201. The valley 211 may be located between the peak 212 and the peak 213. The peak 212 is disposed on the lower surface 23 side of the valley 211, and the peak 213 is disposed on the upper surface 21 side of the valley 211. The carrier density at the apex of peak 212 may be higher than the carrier density at the apex of peak 213.
When the carrier density distribution has a valley 211 in the range of the full width at half maximum W201 of the high concentration hydrogen peak 201, it can be estimated that the lifetime adjustment section 241 is provided at the position of the valley 211. Further, when the vacancy density peak 231 exists within the range of the full width at half maximum W201 of the high concentration hydrogen peak 201, it is also possible to estimate that the lifetime adjustment portion 241 is provided at the position of the vacancy density peak 231.
The donor concentration distribution of this example does not exhibit a minimum value at the position of the valley 211. The donor concentration may monotonically increase from the lower end position Z1a of the high concentration hydrogen peak 201 toward the depth position Z1. The monotonously increasing means that there is no region where the donor concentration decreases from the lower end position Z1a toward the depth position Z1.
The vacancy density profile has an upper tail 233 and a lower tail 234. The lower tail 234 is a slope in which the vacancy density decreases from the apex 232 toward the lower surface 23 of the semiconductor substrate 10. The upper tail 233 is a slope in which the vacancy density decreases from the apex 232 toward the upper surface 21 of the semiconductor substrate 10. The vacancy density of the upper tail 233 may decrease more sharply than the vacancy density of the lower tail 234.
In addition, the vacancy density profile has: a lower flat portion 236 disposed closer to the lower surface 23 of the semiconductor substrate 10 than the vacancy density peak 231; and an upper flat portion 235 disposed closer to the upper surface 21 of the semiconductor substrate 10 than the vacancy density peak 231. Each flat portion is a region in which the space density is substantially constant in the depth direction. The substantially constant state means, for example, a state in which the fluctuation range of the vacancy density is within ± 50%. The vacancy density of upper flat portion 235 may be lower than the vacancy density of lower flat portion 236. The average value of the vacancy density of the flat portion can be used. The full width at half maximum of the vacancy density profile (in this case, the full width at half maximum of the vacancy density peak 231) may be less than the full width at half maximum of the hydrogen chemical concentration profile (in this case, the full width at half maximum W201 of the high concentration hydrogen peak 201). The full width at half maximum of the carrier lifetime distribution may be less than the full width at half maximum of the hydrogen chemical concentration distribution.
In this example, the vacancy density of the region on the lower surface 23 side with respect to the depth position Z1 is higher than the vacancy density of the region on the upper surface 21 side with respect to the depth position Z1. When the high concentration region 107 is applied to a buffer region described later, a depletion layer spreads from the upper surface 21 side. By disposing the region having a high vacancy density on the lower surface 23 side, the depletion layer can be suppressed from expanding into the region having a high vacancy density, and the leakage current can be reduced.
Fig. 3 shows another example of the distribution of carrier density, vacancy density and carrier lifetime at the positions shown by the line a-a of fig. 1. In this example, 3 × 10 15 ions/cm 2 Is implanted with hydrogen from the lower surface 23 to the depth position Z1Ions. Other structures or manufacturing processes are the same as the example of fig. 2. The shapes of the hydrogen chemical concentration distribution and the donor concentration distribution are the same as the example of fig. 2. However, the peak values of the hydrogen chemical concentration and the donor concentration differ depending on the hydrogen dose. The shape of the donor concentration distribution in the vicinity of the depth position Z1 differs for the carrier density distribution shown in fig. 3. The donor concentration D in the vicinity of the depth position Z1 is indicated by a broken line in the graph of the carrier density distribution D Distribution of (2). The same applies to other figures.
In this example, the carrier density distribution also has a valley 211, a peak 212, and a peak 213 in the range of the full width at half maximum W201 of the high concentration hydrogen peak 201. Therefore, it is understood that the lifetime adjustment section 241, which shows a minimum carrier lifetime, and the vacancy density peak 231 are arranged at the position of the valley 211.
Instead of the valley 211, the carrier density distribution may have a meandering shape in the vicinity of the depth position Z1. The meandering is a portion in which a differential value obtained by differentiating the carrier density in the depth direction shows a minimum value.
The depth position of the peak 212 or the peak 213 in the carrier density distribution is different from the depth position Z1 of the apex 202 of the high-concentration hydrogen peak 201. That is, the carrier density near the depth position Z1 has a valley 211 due to the vacancy density peak 231, and the position of the peak of the carrier density changes. The depth position of the peak 212 or the peak 213 may be different from the depth position of the apex of the donor concentration peak 221. From this, it is understood that the lifetime adjuster 241 and the vacancy density peak 231 are also disposed in the vicinity of the depth position Z1.
In addition, the full width at half maximum centered on the peak 212 of the carrier density distribution may be larger than the full width at half maximum of the donor concentration peak 221. That is, the peak of the carrier density in the vicinity of the depth position Z1 can be broken due to the existence of the vacancy density peak 231. From this, it is understood that the lifetime adjuster 241 and the vacancy density peak 231 are arranged also in the vicinity of the depth position Z1. In addition, the carrier density at the apex of the peak 212 and the peak 213 may be lower than the donor concentration at the apex of the donor concentration peak 221.
Fig. 4 shows the distributions of carrier density, vacancy density, and carrier lifetime of the comparative example.In this example, the ratio is 1 × 10 15 ions/cm 2 The dose of (2) is implanted with hydrogen ions from the lower surface 23 to the depth position Z1. Other structures or manufacturing processes are the same as the example of fig. 2. The shapes of the hydrogen chemical concentration distribution and the donor concentration distribution are the same as those of the example of fig. 2, and are therefore omitted in fig. 4. However, the peak values of the hydrogen chemical concentration and the donor concentration differ depending on the hydrogen dose.
The carrier density distribution of this example has no valleys 211 or meanders in the range of the full width at half maximum W201 of the hydrogen peak. The carrier density distribution of this example is substantially equal to the donor concentration distribution. In addition, no significant peak of the vacancy density occurs at the depth position Z1, and the carrier lifetime also has no significant minimum. That is, in the dose of this example, the lifetime adjustment section 241 is not formed at the depth position Z1. This is presumably because the dose of hydrogen ions is small, and therefore the disorder of crystallinity of the semiconductor substrate 10 is of a degree that can be recovered by annealing. The vacancy density peak formed by the implantation of hydrogen ions is bonded to hydrogen by annealing, and mostly becomes a hydrogen donor.
As described in fig. 2 to 4, the dose of hydrogen ions in the high concentration hydrogen peak 201 is set to 3 × 10 15 ions/cm 2 Above and 3 × 10 16 ions/cm 2 Hereinafter, the high concentration region 107 and the lifetime adjustment section 241 can be formed in a common manufacturing process. The dosage of hydrogen ions of the high concentration hydrogen peak 201 may be 1 × 10 16 ions/cm 2 The above may be 3 × 10 16 ions/cm 2 As described above. In addition, the hydrogen chemical concentration H at the apex 202 of the high concentration hydrogen peak 201 p May be 2 x 10 18 atoms/cm 3 Above and 2X 10 19 atoms/cm 3 The following. Chemical concentration of hydrogen H p May be 7 × 10 18 atoms/cm 3 Above, it may be 2 × 10 19 atoms/cm 3 As described above.
Fig. 5 is an example of a plan view of the semiconductor device 100. Fig. 5 shows positions where the respective members are projected on the upper surface of the semiconductor substrate 10. In fig. 5, only a part of the semiconductor device 100 is shown, and the other part is omitted.
The semiconductor device 100 includes the semiconductor substrate 10 described with reference to fig. 1 to 4. The semiconductor substrate 10 has an edge 102 in a plan view. In the present specification, the term "in plan view" means a view from the upper surface side of the semiconductor substrate 10. The semiconductor substrate 10 of this example has two sets of end edges 102 facing each other in a plan view. In fig. 5, the X axis and the Y axis are parallel to one of the end edges 102. In addition, the Z axis is perpendicular to the upper surface of the semiconductor substrate 10.
The semiconductor substrate 10 is provided with an active portion 160. The active portion 160 is a region in which a main current flows in the depth direction between the upper surface and the lower surface of the semiconductor substrate 10 when the semiconductor device 100 is operated. An emitter is provided above the active portion 160, but is omitted in fig. 5.
At least one of transistor portion 70 including a transistor element such as an IGBT and diode portion 80 including a diode element such as a freewheeling diode (FWD) is provided in active portion 160. In the example of fig. 5, transistor portions 70 and diode portions 80 are alternately arranged along a predetermined arrangement direction (X-axis direction in this example) of the upper surface of semiconductor substrate 10. In another example, only one of transistor portion 70 and diode portion 80 may be provided in active portion 160.
In fig. 5, a region where transistor portion 70 is disposed is denoted by "I", and a region where diode portion 80 is disposed is denoted by "F". In this specification, a direction perpendicular to the arrangement direction in a plan view may be referred to as an extending direction (Y-axis direction in fig. 5). The transistor portion 70 and the diode portion 80 may have long sides in the extending direction, respectively. That is, the length of the transistor portion 70 in the Y-axis direction is larger than the width in the X-axis direction. Likewise, the diode portion 80 has a length in the Y-axis direction larger than a width in the X-axis direction. The extending direction of the transistor portion 70 and the diode portion 80 may be the same as the longitudinal direction of each groove portion described later.
The diode portion 80 has an N + -type cathode region in a region in contact with the lower surface of the semiconductor substrate 10. In this specification, a region where the cathode region is provided is referred to as a diode portion 80. That is, the diode portion 80 is a region overlapping with the cathode region in a plan view. A P + -type collector region may be provided on the lower surface of the semiconductor substrate 10 in a region other than the cathode region. In this specification, the diode portion 80 may include an extension region 81 extending from the diode portion 80 in the Y-axis direction to a gate wiring to be described later. A collector region is provided on the lower surface of the extension region 81.
Transistor portion 70 has a P + -type collector region in a region in contact with the lower surface of semiconductor substrate 10. In addition, in transistor portion 70, a gate structure having an N-type emitter region, a P-type base region, a gate conductive portion, and a gate insulating film is periodically arranged on the upper surface side of semiconductor substrate 10.
The semiconductor device 100 may have one or more pads above the semiconductor substrate 10. The semiconductor device 100 of this example has a gate pad 112. The semiconductor device 100 may have pads such as an anode pad, a cathode pad, and a current detection pad. Each pad is disposed in the vicinity of the end side 102. The vicinity of the edge 102 refers to a region between the edge 102 and the emitter in a plan view. When the semiconductor device 100 is mounted, each pad can be connected to an external circuit via a wire or the like.
A gate potential is applied to the gate pad 112. The gate pad 112 is electrically connected to the conductive portion of the gate trench portion of the active portion 160. The semiconductor device 100 includes a gate wiring connecting the gate pad 112 and the gate groove portion. In fig. 5, the gate wiring is hatched with diagonal lines.
The gate wiring of this example includes an outer peripheral gate wiring 130 and an active-side gate wiring 131. The peripheral gate line 130 is disposed between the active portion 160 and the edge 102 of the semiconductor substrate 10 in a plan view. The outer peripheral gate line 130 of this example surrounds the active portion 160 in a plan view. A region surrounded by outer peripheral gate wiring 130 in a plan view may be active portion 160. In addition, the outer peripheral gate wiring 130 is connected to the gate pad 112. The outer peripheral gate line 130 is disposed above the semiconductor substrate 10. The outer peripheral gate wiring 130 may be a metal wiring including aluminum or the like.
The active-side gate wiring 131 is provided in the active portion 160. By providing the source-side gate wiring 131 in the active portion 160, variations in wiring length from the gate pad 112 can be reduced for each region of the semiconductor substrate 10.
The active-side gate wiring 131 is connected to the gate trench portion of the active portion 160. The active-side gate wiring 131 is disposed above the semiconductor substrate 10. The active-side gate wiring 131 may be a wiring formed of a semiconductor such as polycrystalline silicon doped with impurities.
The active-side gate wiring 131 may be connected to the outer circumferential gate wiring 130. The active-side gate line 131 of the present example extends from one of the peripheral gate lines 130 to the other peripheral gate line 130 in the X-axis direction so as to cross the active portion 160 at substantially the center in the Y-axis direction. In the case where the active portion 160 is divided by the active-side gate wiring 131, the transistor portions 70 and the diode portions 80 may be alternately arranged in the X-axis direction in each of the divided regions.
The semiconductor device 100 may include a temperature sensing unit, not shown, which is a PN junction diode formed of polysilicon or the like, and/or a current detection unit, not shown, which simulates an operation of a transistor portion provided in the active portion 160.
The semiconductor device 100 of the present example includes an edge termination structure 90 between the active portion 160 and the edge 102. The edge termination structure 90 of this example is disposed between the peripheral gate line 130 and the edge 102. The edge termination structure 90 alleviates electric field concentration on the upper surface side of the semiconductor substrate 10. The edge termination structure 90 has a plurality of guard rings 92. The guard ring 92 is a P-type region in contact with the upper surface of the semiconductor substrate 10. The guard ring 92 may surround the active portion 160 in a plan view. The plurality of guard rings 92 are disposed at predetermined intervals between the peripheral gate wiring 130 and the edge 102. The outer guard ring 92 may surround the inner guard ring 92. The outer side is a side close to the edge 102, and the inner side is a side close to the outer gate wiring 130. By providing the plurality of guard rings 92, the depletion layer on the upper surface side of the active portion 160 can be extended outward, and the withstand voltage of the semiconductor device 100 can be improved. The edge termination structure 90 may further include at least one of a field plate provided in a ring shape so as to surround the active portion 160 and a surface electric field reducing portion.
Fig. 6 is an enlarged view of a region E in fig. 5. Region E is a region including transistor portion 70, diode portion 80, and active-side gate wiring 131. The semiconductor device 100 of this example includes a gate trench portion 40, a dummy trench portion 30, a well region 11, an emitter region 12, a base region 14, and a contact region 15, which are provided inside the upper surface side of a semiconductor substrate 10. Each of the gate trench portion 40 and the dummy trench portion 30 is an example of a trench portion. In addition, the semiconductor device 100 of this example includes an emitter electrode 52 and an active-side gate wiring 131, and the emitter electrode 52 is provided above the upper surface of the semiconductor substrate 10. The emitter 52 and the active-side gate wiring 131 are provided separately from each other.
An interlayer insulating film is provided between the emitter 52 and the active-side gate wiring 131 and the upper surface of the semiconductor substrate 10, but is omitted in fig. 6. In the interlayer insulating film of this example, the contact hole 54 is provided so as to penetrate the interlayer insulating film. In fig. 6, each contact hole 54 is hatched with oblique lines.
Emitter 52 is disposed over gate trench portion 40, dummy trench portion 30, well region 11, emitter region 12, base region 14, and contact region 15. Emitter 52 is in contact with emitter region 12, contact region 15, and base region 14 on the upper surface of semiconductor substrate 10 through contact hole 54. The emitter 52 is connected to the dummy conductive portion in the dummy groove portion 30 through a contact hole provided in the interlayer insulating film. The emitter 52 may be connected to the dummy conductive portion of the dummy groove portion 30 at the tip of the dummy groove portion 30 in the Y-axis direction.
The active-side gate wiring 131 is connected to the gate trench portion 40 through a contact hole provided in the interlayer insulating film. The active-side gate wiring 131 may be connected to the gate conductive portion of the gate trench portion 40 at the tip portion 41 of the gate trench portion 40 in the Y-axis direction. The active-side gate wiring 131 is not connected to the dummy conductive portion in the dummy groove portion 30.
The emitter 52 is formed of a material containing metal. In fig. 6, a range where the emitter 52 is provided is shown. For example, at least a part of the region of the emitter 52 is formed of aluminum or an aluminum-silicon alloy, a metal alloy such as AlSi, alSiCu, or the like. The emitter 52 may have a barrier metal formed of titanium, a titanium compound, or the like, under a region formed of aluminum or the like. Further, the contact hole may have a plug formed by embedding tungsten or the like so as to be in contact with a barrier metal, aluminum, or the like.
The well region 11 is provided to overlap the active-side gate wiring 131. The well region 11 is also provided so as to extend with a predetermined width in a range not overlapping with the active-side gate wiring 131. The well region 11 of this example is provided apart from the end of the contact hole 54 in the Y axis direction toward the active-side gate line 131. The well region 11 is a region of the second conductivity type having a doping concentration higher than that of the base region 14. The base region 14 in this example is P-type and the well region 11 is P + -type.
Each of transistor portion 70 and diode portion 80 has a plurality of groove portions arranged in the arrangement direction. In transistor portion 70 of the present example, one or more gate trench portions 40 and one or more dummy trench portions 30 are alternately provided along the array direction. In the diode portion 80 of this example, a plurality of dummy groove portions 30 are provided along the array direction. In the diode portion 80 of this example, the gate groove portion 40 is not provided.
The gate trench portion 40 of this example may have two straight portions 39 (portions of trenches having a straight line shape along the extending direction) extending along the extending direction perpendicular to the array direction and a tip portion 41 connecting the two straight portions 39. The extending direction in fig. 6 is the Y-axis direction.
At least a part of the distal end portion 41 is preferably curved in a plan view. By connecting the ends of the two straight portions 39 in the Y axis direction by the tip portion 41, the electric field concentration at the ends of the straight portions 39 can be relaxed.
In the transistor portion 70, the dummy trench portion 30 is provided between the respective straight portions 39 of the gate trench portion 40. One dummy groove portion 30 may be provided between the straight portions 39, or a plurality of dummy groove portions 30 may be provided. The dummy trench portion 30 may have a straight line shape extending in the extending direction, and may have a straight line portion 29 and a tip end portion 31 as in the gate trench portion 40. The semiconductor device 100 shown in fig. 6 includes both the dummy trench portions 30 having a straight shape without the front end portion 31 and the dummy trench portions 30 having the front end portion 31.
The diffusion depth of well region 11 may be deeper than the depths of gate trench portion 40 and dummy trench portion 30. Gate trench portion 40 and an end portion of dummy trench portion 30 in the Y axis direction are provided in well region 11 in a plan view. That is, the bottom portion of each trench portion in the depth direction is covered with the well region 11 at the end portion of each trench portion in the Y axis direction. This can alleviate the electric field concentration at the bottom of each groove.
In the arrangement direction, mesa portions are provided between the groove portions. The mesa portion is a region sandwiched by the groove portions in the semiconductor substrate 10. As an example, the upper end of the mesa portion is the upper surface of the semiconductor substrate 10. The depth position of the lower end of the mesa portion is the same as the depth position of the lower end of the groove portion. The mesa portion of this example is provided on the upper surface of the semiconductor substrate 10 so as to extend in the extending direction (Y-axis direction) along the trench. In this example, the transistor portion 70 is provided with the mesa portion 60, and the diode portion 80 is provided with the mesa portion 61. In the present specification, the term "mesa portion" refers to the mesa portion 60 and the mesa portion 61, respectively, when simply referred to as a mesa portion.
A base region 14 is provided at each mesa portion. Of the base regions 14 exposed on the upper surface of the semiconductor substrate 10 in the mesa portion, a region disposed closest to the active-side gate wiring 131 is set as a base region 14-e. In fig. 6, the base regions 14-e are shown as being arranged at one end portion in the extending direction of each mesa portion, but the base regions 14-e are also arranged at the other end portion of each mesa portion. At least one of the emitter region 12 of the first conductivity type and the contact region 15 of the second conductivity type may be provided in a region sandwiched by the base regions 14-e in a plan view in each mesa portion. The emitter region 12 is of the N + type in this example and the contact region 15 is of the P + type. The emitter region 12 and the contact region 15 may be disposed between the base region 14 and the upper surface of the semiconductor substrate 10 in the depth direction.
Mesa portion 60 of transistor portion 70 has emitter region 12 exposed on the upper surface of semiconductor substrate 10. The emitter region 12 is disposed in contact with the gate trench portion 40. The mesa portion 60 contacting the gate trench portion 40 may be provided with a contact region 15 exposed on the upper surface of the semiconductor substrate 10.
The contact region 15 and the emitter region 12 in the mesa portion 60 are respectively provided from one groove portion to the other groove portion in the X-axis direction. For example, the contact regions 15 and the emitter regions 12 of the mesa portion 60 are alternately arranged along the extending direction (Y-axis direction) of the trench portion.
In another example, the contact region 15 and the emitter region 12 of the mesa portion 60 may be provided in a stripe shape along the extending direction (Y-axis direction) of the trench portion. For example, the emitter region 12 is provided in a region in contact with the groove portion, and the contact region 15 is provided in a region sandwiched by the emitter region 12.
The emitter region 12 is not provided in the mesa portion 61 of the diode portion 80. Base regions 14 and contact regions 15 may be provided on the upper surface of mesa portion 61. In a region sandwiched by the base regions 14-e in the upper surface of the mesa portion 61, a contact region 15 may be provided so as to contact each base region 14-e. A base region 14 may be provided in a region sandwiched by the contact region 15 in the upper surface of the mesa portion 61. The base region 14 may be disposed over the entire region sandwiched by the contact regions 15.
Contact holes 54 are provided above the mesa portions. The contact hole 54 is disposed in a region sandwiched by the base regions 14-e. The contact hole 54 of this example is provided above each of the contact region 15, the base region 14, and the emitter region 12. The contact holes 54 are not provided in the regions corresponding to the base regions 14-e and the well region 11. The contact hole 54 may be disposed at the center in the arrangement direction (X-axis direction) of the mesa portions 60.
In the diode portion 80, an N + -type cathode region 82 is provided in a region adjacent to the lower surface of the semiconductor substrate 10. A P + -type collector region 22 may be provided on the lower surface of the semiconductor substrate 10 in a region where the cathode region 82 is not provided. In fig. 6, the boundary between the cathode region 82 and the collector region 22 is indicated by a dotted line.
The cathode region 82 is disposed apart from the well region 11 in the Y-axis direction. This ensures a distance between the cathode region 82 and the P-type region (well region 11) having a relatively high doping concentration and formed to a deep position, thereby improving the withstand voltage. The end portion of the cathode region 82 in the Y axis direction in this example is disposed farther from the well region 11 than the end portion of the contact hole 54 in the Y axis direction. In another example, the end of the cathode region 82 in the Y-axis direction may be disposed between the well 11 and the contact hole 54.
Fig. 7 is a view showing an example of a section b-b in fig. 6. The b-b cross-section is the XZ plane through the emitter region 12 and the cathode region 82. The semiconductor device 100 of this example has the semiconductor substrate 10, the interlayer insulating film 38, the emitter 52, and the collector 24 in this cross section. The interlayer insulating film 38 is provided on the upper surface of the semiconductor substrate 10. The interlayer insulating film 38 is a film including at least one layer of an insulating film such as silicate glass to which an impurity such as boron or phosphorus is added, a thermally oxidized film, and other insulating films. The interlayer insulating film 38 is provided with the contact hole 54 described in fig. 6. .
The emitter 52 is provided above the interlayer insulating film 38. The emitter 52 is in contact with the upper surface 21 of the semiconductor substrate 10 through the contact hole 54 of the interlayer insulating film 38. The collector electrode 24 is provided on the lower surface 23 of the semiconductor substrate 10. The emitter 52 and the collector 24 are formed of a metal material such as aluminum. In this specification, a direction (Z-axis direction) connecting the emitter 52 and the collector 24 is referred to as a depth direction.
The semiconductor substrate 10 has an N-type drift region 18. The doping concentration of the drift region 18 may coincide with the bulk donor concentration. In another example, the doping concentration of the drift region 18 may be higher than the bulk donor concentration. Drift regions 18 are provided in transistor portion 70 and diode portion 80, respectively.
In mesa portion 60 of transistor portion 70, N + -type emitter region 12 and P-type base region 14 are provided in this order from upper surface 21 side of semiconductor substrate 10. A drift region 18 is provided below the base region 14. The N + -type accumulation region 16 may be provided in the mesa portion 60. The accumulation region 16 is disposed between the base region 14 and the drift region 18.
The emitter region 12 is exposed on the upper surface 21 of the semiconductor substrate 10, and is provided in contact with the gate trench portion 40. The emitter region 12 may be in contact with the trench portions on both sides of the mesa portion 60. The doping concentration of the emitter region 12 is higher than the doping concentration of the drift region 18.
Base region 14 is disposed below emitter region 12. The base region 14 in this example is provided in contact with the emitter region 12. The base region 14 may be in contact with the groove portions on both sides of the mesa portion 60.
The accumulation region 16 is disposed below the base region 14. The accumulation region 16 is an N + -type region having a doping concentration higher than that of the drift region 18. By providing the accumulation region 16 with a high concentration between the drift region 18 and the base region 14, the carrier injection promotion effect (IE effect) can be enhanced, and the on voltage can be reduced. The accumulation region 16 may be provided so as to cover the entire lower surface of the base region 14 in each mesa portion 60.
A P-type base region 14 is provided on mesa portion 61 of diode portion 80 so as to be in contact with upper surface 21 of semiconductor substrate 10. A drift region 18 is provided below the base region 14. In the mesa portion 61, the accumulation region 16 may be provided below the base region 14.
In each of the transistor portion 70 and the diode portion 80, an N + -type buffer region 20 may be provided on the lower surface 23 side of the drift region 18. The doping concentration of the buffer region 20 is higher than the doping concentration of the drift region 18. The buffer region 20 has one or more donor concentration peaks having donor concentrations higher than that of the drift region 18. The buffer region 20 can function as a field stop layer for preventing a depletion layer spreading from the lower end of the base region 14 from reaching the P + -type collector region 22 and the N + -type cathode region 82.
In this example, the depth position Z1 illustrated in fig. 1 to 3 is included in the buffer 20 on the lower surface 23 side of the semiconductor substrate 10. That is, the high concentration hydrogen peak 201, the peak 212, the trough 211, the peak 213, the donor concentration peak 221, the vacancy density peak 231, and the lifetime adjustment section 241 are included in the buffer 20. As described above, the high-concentration hydrogen peak 201, the peak 212, the valley 211, the peak 213, the donor concentration peak 221, the vacancy density peak 231, and the lifetime adjustment section 241 may be provided on the entire XY plane of the semiconductor substrate 10 or may be provided on a part thereof. In this example, high-concentration hydrogen peak 201, peak 212, trough 211, peak 213, donor concentration peak 221, vacancy density peak 231, and lifetime adjustment unit 241 are provided in both transistor unit 70 and diode unit 80.
In the transistor portion 70, a P + -type collector region 22 is provided below the buffer region 20. The acceptor concentration of the collector region 22 is higher than that of the base region 14. Collector region 22 may include the same acceptor as base region 14 or may include a different acceptor. The acceptor of the collector region 22 is, for example, boron.
In the diode portion 80, an N + -type cathode region 82 is provided below the buffer region 20. The donor concentration of the cathode region 82 is higher than that of the drift region 18. The donor of the cathode region 82 is, for example, hydrogen or phosphorus. The elements serving as the donor and the acceptor in each region are not limited to the above examples. The collector region 22 and the cathode region 82 are exposed on the lower surface 23 of the semiconductor substrate 10 and connected to the collector electrode 24. The collector electrode 24 may contact the entire lower surface 23 of the semiconductor substrate 10. The emitter 52 and the collector 24 are formed of a metal material such as aluminum.
One or more gate groove portions 40 and one or more dummy groove portions 30 are provided on the upper surface 21 side of the semiconductor substrate 10. Each trench portion penetrates base region 14 from upper surface 21 of semiconductor substrate 10 to reach drift region 18. In a region where at least one of the emitter region 12, the contact region 15, and the accumulation region 16 is provided, each trench portion also penetrates the doped regions and reaches the drift region 18. The trench penetrating doped region is not limited to being manufactured in the order of forming the doped region and then forming the trench. The case where the doped region is formed between the trench portions after the trench portions are formed also includes the case where the trench portions penetrate the doped region.
As described above, in transistor portion 70, gate trench portion 40 and dummy trench portion 30 are provided. The diode portion 80 is provided with the dummy trench portion 30, and is not provided with the gate trench portion 40. In this example, the boundary between diode portion 80 and transistor portion 70 in the X-axis direction is the boundary between cathode region 82 and collector region 22.
The gate groove portion 40 includes a gate groove provided on the upper surface 21 of the semiconductor substrate 10, a gate insulating film 42, and a gate conductive portion 44. The gate trench portion 40 is an example of a gate structure. The gate insulating film 42 is provided so as to cover the inner wall of the gate trench. The gate insulating film 42 may be formed by oxidizing or nitriding a semiconductor of an inner wall of the gate trench. The gate conductive portion 44 is provided inside the gate trench at a position inside the gate insulating film 42. That is, the gate insulating film 42 insulates the gate conductive portion 44 from the semiconductor substrate 10. The gate conductive portion 44 is formed of a conductive material such as polysilicon.
The gate conductive portion 44 may be provided longer than the base region 14 in the depth direction. The gate groove portion 40 at the cross section is covered with the interlayer insulating film 38 on the upper surface 21 of the semiconductor substrate 10. The gate conductive portion 44 is electrically connected to the gate wiring. If a predetermined gate voltage is applied to the gate conductive portion 44, a channel formed of an inversion layer of electrons is formed in a surface layer of an interface in the base region 14 in contact with the gate groove portion 40.
The dummy trench portion 30 may have the same structure as the gate trench portion 40 in the cross section. The dummy groove portion 30 includes a dummy groove provided on the upper surface 21 of the semiconductor substrate 10, a dummy insulating film 32, and a dummy conductive portion 34. The dummy conductive portion 34 may be connected to an electrode different from the gate pad. For example, the dummy conductive portion 34 may be connected to a dummy pad, not shown, connected to an external circuit other than the gate pad, and may be controlled differently from the gate conductive portion 44. The dummy conductive portions 34 may be electrically connected to the emitter 52. The dummy insulating film 32 is provided so as to cover the inner wall of the dummy trench. The dummy conductive portion 34 is provided inside the dummy trench and inside the dummy insulating film 32. The dummy insulating film 32 insulates the dummy conductive portion 34 from the semiconductor substrate 10. The dummy conductive portion 34 may be formed of the same material as the gate conductive portion 44. The dummy conductive portion 34 is formed of a conductive material such as polysilicon. The dummy conductive portions 34 may have the same length in the depth direction as the gate conductive portions 44.
In the present example, gate groove portion 40 and dummy groove portion 30 are covered with interlayer insulating film 38 on upper surface 21 of semiconductor substrate 10. The bottom portions of the dummy trench portion 30 and the gate trench portion 40 may be curved surfaces (curved surfaces in cross section) which are convex downward.
Fig. 8 shows an example of the distribution of the hydrogen chemical concentration, the carrier density, the vacancy density, and the carrier lifetime in the depth direction at the positions shown by the line c-c of fig. 7. In this example, 1 × 10 at depth position Z1 16 ions/cm 2 The dose of (2) is implanted with hydrogen ions. The hydrogen chemical concentration profile, donor concentration profile, vacancy density profile, and carrier lifetime profile of the buffer 20 are the same as in the example of fig. 2. As shown in fig. 2, the buffer 20 of this example has a single donor concentration peak 221. The buffer 20 in another example may have a plurality of donor concentration peaks 221.
The carrier density distribution of this example has a donor concentration peak in the cathode region 82. The donor of the cathode region 82 may be a donor other than a hydrogen donor such as phosphorus. According to this example, the formation of the high-concentration buffer 20 and the formation of the lifetime adjustment section 241 can be performed in a common process.
Fig. 9 shows other examples of the distributions of the hydrogen chemical concentration, the carrier density, the vacancy density, and the carrier lifetime at the line c-c. In this example, high-concentration hydrogen peaks 201 are formed at a plurality of depth positions (depth position Z1 and depth position Z2 in fig. 9), respectively. I.e. at 3 × 10 15 ions/cm 2 The above dose implants hydrogen ions to each of the plurality of depth locations. The annealing of the semiconductor substrate 10 may be performed at once after the hydrogen ions are implanted into a plurality of depth positions, or may be performed every time the hydrogen ions are implanted into each depth position.
In this example, the life adjuster 241 is formed at both the depth position Z1 and the depth position Z2. According to this example, the plurality of life adjustment units 241 can be easily formed. The hydrogen dose may be the same for multiple depth locations or may be different. In this example, both of the high concentration hydrogen peaks 201-1 and 202-2 are disposed in the buffer zone 20. In another example, at least one high concentration hydrogen peak 201 may be provided in a region other than the buffer zone 20. For example, at least one high concentration hydrogen peak 201 may be disposed in a region on the upper surface 21 side of the semiconductor substrate 10. The high concentration hydrogen peak 201 disposed on the upper surface 21 side may be implanted with hydrogen ions from the upper surface 21 or may be implanted with hydrogen ions from the lower surface 23. In this case, the high concentration region 107 is formed from the high concentration hydrogen peak to the implantation surface of the hydrogen ions.
Fig. 10 shows other distribution examples of the hydrogen chemical concentration, carrier density, vacancy density, and carrier lifetime at the line c-c. Note that the donor concentration distribution is the same as the carrier density distribution except for the vicinity of the depth position Z1. The donor concentration D in the vicinity of the depth position Z1 is shown by a dotted line D The distribution of (c).
The semiconductor device 100 of this example has a low concentration hydrogen peak 207, which is disposed closer to the upper surface 21 of the semiconductor substrate 10 than the high concentration hydrogen peak 201. The low concentration hydrogen peak 207 has a peak 208 at the depth position Z3. ForThe dose of hydrogen ions at the depth position Z3 is less than 3X 10 15 ions/cm 2 . The dose of hydrogen ions for the depth position Z3 may be 1X 10 13 ions/cm 2 Above and 1X 10 15 ions/cm 2 The following.
Since hydrogen ions are implanted at the depth position Z3, an upper surface-side donor peak 215 having a donor concentration exhibiting peak is formed at the depth position Z3. In fig. 10, the upper surface side donor peak 215 is indicated by a solid line in the graph of the carrier density distribution. The carrier density distribution may have peaks of the same shape at the same positions as the upper surface side donor peak 215. The low-concentration hydrogen peak 207 is provided at a position overlapping with the upper-surface-side donor peak 215. The depth position of the apex 208 of the low concentration hydrogen peak 207 may coincide with the depth position of the apex 216 of the upper surface side donor peak 215.
Since the hydrogen dose to the depth position Z3 is low, almost all vacancy defects formed in the vicinity of the depth position Z3 are terminated with hydrogen and become hydrogen donors. Therefore, the vacancy density distribution does not have a distinct peak and the carrier lifetime distribution does not have a distinct minimum value within the full width at half maximum W207 in the depth direction of the low-concentration hydrogen peak 207.
The vacancy density profile may have a minor peak in the full width at half maximum W207 range. However, the vacancy density in the range of the full width at half maximum W207 is sufficiently small compared to the vacancy density peak 231 provided in the range of the full width at half maximum W201. For example, the vacancy density at the depth position Z1 is set to V 1 Let the density of vacancies at depth position Z3 be V 3 . Further, the chemical concentration of hydrogen at the peak 208 of the low concentration hydrogen peak 207 is set to H p3
The vacancy concentration V at depth position Z3 3 Concentration H from Low concentration Hydrogen Peak 207 p3 Ratio of (Z) 3 /H p3 ) Is set to R 3 . In addition, the vacancy concentration V at the depth position Z1 is determined 1 Concentration H from high concentration Hydrogen Peak 201 p1 Ratio of (Z) 1 /H p1 ) Is set to R 1 . Ratio R 3 Less than the ratio R 1 . Ratio R 3 Can be in the ratio R 1 1/10 or less of (1/100) or less of。
Further, it is preferable that the range of the full width at half maximum W201 of the high concentration hydrogen peak 201 and the range of the full width at half maximum W207 of the low concentration hydrogen peak 207 are separated from each other. That is, the lower end position Z3a of the full width at half maximum W207 is preferably arranged closer to the upper surface 21 than the upper end position Z1b of the full width at half maximum W201. This can suppress, for example, a large disturbance in crystallinity of the semiconductor substrate 10 at the depth position Z3 due to implantation of hydrogen ions into the depth position Z1. Therefore, at the depth position Z3, the lattice defect is easily terminated with hydrogen to form a hydrogen donor. The distance between the lower end position Z3a and the upper end position Z1b may be greater than half the full width at half maximum W201, or may be greater than the full width at half maximum W201.
According to this example, by implanting hydrogen ions at a plurality of depth positions, the long buffer region 20 can be formed in the depth direction. In addition, the life adjuster 241 can be easily formed in the buffer 20. Further, since upper surface side dominant peak 215 is provided at the upper surface 21 side than life adjuster 241, the depletion layer can be suppressed from reaching life adjuster 241.
The donor concentration at the peak 216 of the upper surface side donor peak 215 is lower than the donor concentration at the peak of the donor concentration peak 221. The donor concentration at the apex 216 may be greater than the donor concentration at the peak 212 and may be less than the donor concentration at the peak 212. The donor concentration at the apex 216 may be greater than the donor concentration at the peak 213 and may also be less than the donor concentration at the peak 213. The donor concentration at the peak 216 may be greater than the donor concentration at the valley 211 and may be less than the donor concentration at the valley 211.
In the present specification, an integrated value obtained by integrating the donor concentration from the lower end of gate groove portion 40 toward lower surface 23 of semiconductor substrate 10 is referred to as an integrated concentration. The semiconductor substrate 10 has a critical depth position where the integrated density reaches a critical integrated density. The critical integral concentration nc is represented by the following equation, for example.
nc=εs×Ec/q
Where ∈ s is a dielectric constant of a material forming the semiconductor substrate 10, q is an amount of electric charges, and Ec is an insulation breakdown electric field strength of the semiconductor substrate 10. For example, in the case where the semiconductor substrate 10 is a silicon substrateUnder the condition, ec is 1.8X 10 5 ~2.5×10 5 (V/cm), nc is 1.2X 10 12 ~1.6×10 12 (/cm 2 )。
When avalanche breakdown occurs by applying a forward bias voltage between collector 24 and emitter 52 and making the maximum value of the electric field strength reach the electric field strength of the insulation breakdown of semiconductor substrate 10, the value obtained by integrating the donor concentration from the lower end of gate trench portion 40 to a specific position of drift region 18 corresponds to the critical integration concentration when the specific position is depleted.
The apex 202 of the high-concentration hydrogen peak 201 is preferably arranged closer to the lower surface 23 of the semiconductor substrate 10 than the critical depth position. Thereby, even when avalanche breakdown occurs, the depletion layer can be suppressed from reaching the vacancy density peak 231, and leakage current can be suppressed. As shown in fig. 9, by providing the upper surface side donor peak 215, the critical depth position is easily arranged on the upper surface 21 side than the high concentration hydrogen peak 201.
Fig. 11 shows an example of the distribution in the depth direction of the hydrogen chemical concentration, the carrier density, the vacancy density, and the carrier lifetime at the positions shown by the d-d line of fig. 7. In this example, the collector region 22 is provided instead of the cathode region 82, as opposed to the example shown in fig. 8. The other distributions are the same as the example shown in fig. 8.
As shown in the graph of the carrier density distribution, the collector region 22 has an acceptor concentration peak. The full width at half maximum of the acceptor concentration peak was W22. Preferably, the full width at half maximum W22 of the collector region 22 and the full width at half maximum W201 of the high concentration hydrogen peak 201 are separated from each other. The distance between the full width at half maximum W22 and the full width at half maximum W201 may be equal to or more than half the full width at half maximum W201, or may be equal to or more than the full width at half maximum W201.
In this example, the hydrogen dose of the high concentration hydrogen peak 201 is large, and the donor concentration peak 221 tends to be large. By increasing the distance between the high concentration hydrogen peak 201 and the collector region 22, the influence of the donor concentration peak 221 on the concentration of the collector region 22 can be suppressed.
As shown in fig. 8, the full width at half maximum W82 of the cathode region 82 and the full width at half maximum W201 of the high concentration hydrogen peak 201 are preferably separated from each other. The distance between the full width at half maximum W82 and the full width at half maximum W201 may be equal to or more than half the full width at half maximum W201, or may be equal to or more than the full width at half maximum W201. The distance between the full width at half maximum W82 of the cathode region 82 and the full width at half maximum W201 of the high concentration hydrogen peak 201 may be smaller than the distance between the full width at half maximum W22 of the collector region 22 and the full width at half maximum W201 of the high concentration hydrogen peak 201, the same as the distance between the full width at half maximum W22 of the collector region 22 and the full width at half maximum W201 of the high concentration hydrogen peak 201, or larger than the distance between the full width at half maximum W22 of the collector region 22 and the full width at half maximum W201 of the high concentration hydrogen peak 201. The examples of fig. 9 and 10 are cross-sections taken along the line c-c of fig. 7, but may be cross-sections taken along the line d-d of fig. 7. In this case, the cathode region 82 in fig. 9 and 10 may be replaced with the collector region 22.
The present invention has been described above with reference to the embodiments, but the technical scope of the present invention is not limited to the scope described in the above embodiments. It will be apparent to those skilled in the art that various changes and modifications can be made to the above embodiments. It is apparent from the claims that the embodiments to which such changes and improvements are applied can be included in the technical scope of the present invention.
Note that the order of execution of the respective processes such as the operations, procedures, steps, and stages in the devices, systems, programs, and methods shown in the claims, the specification, and the drawings can be implemented in any order unless "earlier", "in 8230", "before", or the like is explicitly indicated, or the results of the preceding processes are not used in the subsequent processes. Even if the operation flows in the claims, the specification, and the drawings are described using "first", "second", and the like for convenience, the description does not necessarily mean that the operations are performed in this order.

Claims (17)

1. A semiconductor device is characterized by comprising:
a semiconductor substrate having bulk donors distributed throughout;
a high concentration hydrogen peak provided on the semiconductor substrate and having a hydrogen dose of 3 × 10 15 /cm 2 Above;
A high concentration region including a position overlapping with the high concentration hydrogen peak in a depth direction of the semiconductor substrate, and having a donor concentration higher than a bulk donor concentration; and
and a lifetime adjustment unit that is provided at a position overlapping the high-concentration hydrogen peak in the depth direction, and that exhibits a minimum carrier lifetime.
2. The semiconductor device according to claim 1,
the hydrogen dose of the high concentration hydrogen peak is 1 × 10 16 /cm 2 As described above.
3. The semiconductor device according to claim 1 or 2,
the high concentration hydrogen peak has a hydrogen chemical concentration of 2 × 10 18 /cm 3 The above.
4. The semiconductor device according to any one of claims 1 to 3,
the carrier density distribution in the depth direction of the high concentration region includes a valley and a peak, the valley is disposed at a position overlapping with the peak of the high concentration hydrogen, and the peak is disposed adjacent to the valley.
5. The semiconductor device according to any one of claims 1 to 4,
the hydrogen sensor includes a plurality of high-concentration hydrogen peaks at different positions in the depth direction.
6. The semiconductor device according to any one of claims 1 to 5,
the carrier density within the full width at half maximum of the depth direction of the high concentration hydrogen peak has a valley or a meander.
7. The semiconductor device according to any one of claims 1 to 6,
the peak of the carrier density peak is arranged at a position different from the peak of the high-concentration hydrogen peak.
8. The semiconductor device according to claim 1,
the semiconductor device further includes a gate structure disposed on an upper surface of the semiconductor substrate,
the high concentration hydrogen peak includes a lower tail whose hydrogen chemical concentration decreases toward a lower surface of the semiconductor substrate and an upper tail whose hydrogen chemical concentration decreases more sharply toward an upper surface of the semiconductor substrate than the lower tail.
9. The semiconductor device according to claim 8,
the high-concentration hydrogen peak is disposed in a region on the lower surface side of the semiconductor substrate.
10. The semiconductor device according to claim 8 or 9,
the semiconductor device further includes a groove portion provided on an upper surface of the semiconductor substrate,
the semiconductor substrate has a critical depth position where an integrated value obtained by integrating a donor concentration from a lower end of the groove portion toward a lower surface of the semiconductor substrate reaches a critical integrated concentration of the semiconductor substrate,
the peak of the high-concentration hydrogen peak is disposed closer to the lower surface side of the semiconductor substrate than the critical depth position.
11. The semiconductor device according to any one of claims 8 to 10,
the depth-direction vacancy density profile has:
a vacancy density peak disposed at a position overlapping with the high-concentration hydrogen peak in the depth direction;
a lower flat portion disposed on a lower surface side of the semiconductor substrate with respect to the vacancy density peak; and
and an upper flat portion disposed closer to the upper surface side of the semiconductor substrate than the vacancy density peak, the upper flat portion having a lower density than the lower flat portion.
12. The semiconductor device according to claim 11,
the full width at half maximum in the depth direction of the vacancy density peak is less than the full width at half maximum in the depth direction of the high concentration hydrogen peak.
13. The semiconductor device according to any one of claims 8 to 12, further comprising:
an upper surface side donor peak which is arranged at a position closer to the upper surface side of the semiconductor substrate than the high concentration hydrogen peak and which has a donor concentration peak;
a low concentration hydrogen peak provided at a position overlapping with the upper surface side donor peak in the depth direction and having a hydrogen dose of less than 3 × 10 15 /cm 2
14. The semiconductor device according to claim 13,
the carrier lifetime in the full width at half maximum in the depth direction of the low-concentration hydrogen peak does not have a minimum value.
15. The semiconductor device according to claim 13 or 14,
the ratio of the concentration of vacancies at the depth position at which the low-concentration hydrogen peak is provided to the concentration of the low-concentration hydrogen peak is smaller than the ratio of the concentration of vacancies at the depth position at which the high-concentration hydrogen peak is provided to the concentration of the high-concentration hydrogen peak.
16. The semiconductor device according to any one of claims 13 to 15,
the range of the full width at half maximum of the high concentration hydrogen peak and the range of the full width at half maximum of the low concentration hydrogen peak are separated from each other.
17. The semiconductor device according to any one of claims 8 to 16,
the semiconductor device further includes a collector region provided in contact with the lower surface of the semiconductor substrate and having an acceptor concentration peak,
the range of the full width at half maximum of the acceptor concentration peak and the range of the full width at half maximum of the high concentration hydrogen peak are separated from each other.
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