CN115988901A - Display substrate and manufacturing method thereof - Google Patents

Display substrate and manufacturing method thereof Download PDF

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Publication number
CN115988901A
CN115988901A CN202310008837.XA CN202310008837A CN115988901A CN 115988901 A CN115988901 A CN 115988901A CN 202310008837 A CN202310008837 A CN 202310008837A CN 115988901 A CN115988901 A CN 115988901A
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China
Prior art keywords
sub
substrate
pixel
layer
insulating layer
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CN202310008837.XA
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Chinese (zh)
Inventor
余忠祥
余洪涛
张云颢
邹建明
苏冬冬
李如泉
杨宗顺
杨超
李世鹏
袁皓杰
杨雄
朱学良
吴双鸿
陈小川
单庆山
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BOE Technology Group Co Ltd
Yunnan Chuangshijie Optoelectronics Technology Co Ltd
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BOE Technology Group Co Ltd
Yunnan Chuangshijie Optoelectronics Technology Co Ltd
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Priority to CN202310008837.XA priority Critical patent/CN115988901A/en
Publication of CN115988901A publication Critical patent/CN115988901A/en
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Abstract

The present disclosure provides a display substrate and a method for manufacturing the same, the display substrate having a plurality of pixel units distributed in an array, each pixel unit including at least two sub-pixels; the display substrate includes: a substrate base plate; and a pixel circuit layer on the substrate; the light-emitting device layer is positioned on one side of the pixel circuit layer, which is far away from the substrate, and comprises a plurality of light-emitting devices distributed in an array manner, at least one light-emitting device is arranged in each sub-pixel and electrically connected with the pixel circuit layer, and each light-emitting device comprises a reflecting electrode, a light-emitting layer and a transparent electrode which are arranged in a stacking manner; the plurality of pixel units comprise a first pixel unit and a second pixel unit, the internal reflection electrode of the first pixel unit is concave towards the direction of the substrate, and the internal reflection electrode of the second pixel unit is convex towards the direction away from the substrate. The display substrate and the manufacturing method thereof provided by the embodiment of the disclosure can meet the requirements of high brightness and large viewing angle performance.

Description

Display substrate and manufacturing method thereof
Technical Field
The invention relates to the technical field of display, in particular to a display substrate and a manufacturing method thereof.
Background
In recent years, silicon-based OLED microdisplays have been widely used in the VR/AR field as near-eye displays. With the development of the technology, it is difficult to meet the performance requirements of the industry display products for high brightness and large viewing angle in the related art.
Disclosure of Invention
The embodiment of the disclosure provides a display substrate and a manufacturing method thereof, which can meet the requirements of high brightness and large viewing angle performance.
The technical scheme provided by the embodiment of the disclosure is as follows:
in a first aspect, an embodiment of the present disclosure provides a display substrate having a plurality of pixel units distributed in an array, where each pixel unit includes at least two sub-pixels; the display substrate includes:
a substrate base plate; and
a pixel circuit layer located over the substrate base plate;
the light-emitting device layer is positioned on one side, away from the substrate, of the pixel circuit layer and comprises a plurality of light-emitting devices distributed in an array mode, at least one light-emitting device is arranged in each sub-pixel and electrically connected with the pixel circuit layer, and each light-emitting device comprises a reflecting electrode, a light-emitting layer and a transparent electrode which are arranged in a stacked mode; wherein
The pixel units comprise a first pixel unit and a second pixel unit, the reflecting electrode in the first pixel unit is concave towards the direction of the substrate base plate, and the reflecting electrode in the second pixel unit is convex towards the direction deviating from the substrate base plate.
Illustratively, the reflective electrode is an anode and the transparent electrode is a cathode.
Illustratively, in a plurality of pixel units, the first pixel unit and the second pixel unit are distributed in a staggered manner.
Illustratively, the display substrate further comprises:
the first insulating layer is positioned on one side, away from the substrate base plate, of the pixel circuit layer, the pattern of the first insulating layer comprises a plurality of first through holes distributed in an array mode, and at least one first through hole corresponds to one sub-pixel; and
the first conducting layer is located on one side, away from the substrate, of the first insulating layer, the first insulating layer and the first conducting layer are located between the pixel circuit layer and the light-emitting device layer, the pattern of the first conducting layer comprises a plurality of overlapping electrodes distributed in an array, at least one of the overlapping electrodes corresponds to one of the sub-pixels, the overlapping electrode in the same sub-pixel is overlapped with an orthographic projection of the first via hole on the substrate, the orthographic projection area of the overlapping electrode on the substrate is larger than that of the corresponding first via hole on the substrate, the overlapping electrode is electrically connected to the pixel circuit layer through the corresponding first via hole, and the reflecting electrode and one of the transparent electrodes are electrically connected to the overlapping electrode so that the light-emitting device is electrically connected to the pixel circuit layer.
Illustratively, the display substrate further comprises: the second insulating layer is positioned between the pixel circuit layer and the light-emitting device and comprises a plurality of first sub-regions and a plurality of second sub-regions, at least one first sub-region corresponds to one first pixel unit, at least one second sub-region corresponds to one second pixel unit, a plurality of concave patterns which are concave towards the direction of the substrate base plate are arranged on the surface of one side of the first sub-region, which is far away from the substrate base plate, at least one concave pattern corresponds to one sub-pixel, a plurality of convex patterns which are convex towards the direction of the substrate base plate are arranged on the surface of one side of the second sub-region, which is far away from the substrate base plate, and at least one convex pattern corresponds to one sub-pixel; wherein the reflective electrode, the light emitting layer and the transparent electrode in the light emitting device are stacked to the side of the corresponding concave pattern and the convex pattern, which is away from the substrate base plate.
Illustratively, in the first sub-region, a second via hole is provided on each of the concave patterns, and one of the reflective electrode and the transparent electrode is electrically connected to the landing electrode via the second via hole;
in the second sub-area, an orthographic projection of each of the lap electrodes on the substrate base plate is at least partially uncovered by the convex patterns to form an exposed area, and one of the reflective electrode and the transparent electrode is lapped to the exposed area; or, a third via hole is formed on each convex pattern, and one of the reflective electrode and the transparent electrode is electrically connected to the overlapping electrode through the third via hole.
Illustratively, the second insulating layer further has a first blocking opening between the adjacent first and second sub-regions, and the light emitting device adjacent to the pixel unit is disconnected at the first blocking opening.
Illustratively, the sidewall of the first partition opening has a first lateral recess thereon, and the first lateral recess is used for disconnecting at least one film layer in the light emitting device adjacent to the pixel unit.
Illustratively, the display substrate further comprises: from being close to substrate base plate one side is to keeping away from substrate base plate one side third insulating layer and the fourth insulating layer that piles up in proper order, the third insulating layer with the material of fourth insulating layer is different, just the third insulating layer is including being located adjacent first figure between the concave surface pattern is adjacent with being located adjacent second figure between the convex surface pattern, be equipped with the second on the first figure and cut off the opening, it is sunken to be equipped with the second side on the second cuts off the open-ended lateral wall, be equipped with the third on the second figure and cut off the opening, it is sunken to be equipped with the third side on the third cuts off the open-ended lateral wall.
In a second aspect, embodiments of the present disclosure provide a method of manufacturing a display substrate, the method including:
providing a substrate base plate;
forming a pixel circuit layer on the substrate base plate;
the light-emitting device structure comprises a substrate, a pixel circuit layer, a plurality of sub-pixels and a plurality of pixel units, wherein the pixel circuit layer is provided with a plurality of light-emitting devices on one side, which deviates from the substrate, of the substrate, the light-emitting devices are electrically connected with the pixel circuit layer, each sub-pixel is internally provided with at least one light-emitting device, each light-emitting device comprises a reflecting electrode, a light-emitting layer and a transparent electrode which are stacked, the pixel units comprise a first pixel unit and a second pixel unit, the reflecting electrodes in the first pixel units are concave towards the direction of the substrate, and the reflecting electrodes in the second pixel units are convex towards the direction deviating from the direction of the substrate.
Illustratively, after the forming of the pixel circuit layer on the substrate base plate and before the forming of the holes of the plurality of light-emitting devices on the side of the pixel circuit layer away from the substrate base plate, the method further comprises:
forming a first insulating layer on one side of the pixel circuit layer, which is far away from the substrate base plate, and performing patterning treatment on the first insulating layer, so that the pattern of the first insulating layer comprises a plurality of first via holes distributed in an array manner, wherein at least one first via hole corresponds to one sub-pixel;
forming a first conductive layer on one side of the pixel circuit layer, which is far away from the substrate base plate, and performing patterning processing on the first conductive layer to enable the pattern of the first conductive layer to comprise a plurality of lapping electrodes distributed in an array manner, wherein at least one lapping electrode corresponds to one sub-pixel, the lapping electrode in the same sub-pixel is superposed with the orthographic projection of the first via hole on the substrate base plate, the orthographic projection area of the lapping electrode on the substrate base plate is larger than the orthographic projection area of the corresponding first via hole on the substrate base plate, and the lapping electrode is electrically connected onto the pixel circuit layer through the corresponding first via hole.
Illustratively, after the forming of the first conductive layer on the side of the pixel circuit layer facing away from the substrate base plate and before the forming of the plurality of light emitting devices on the side of the pixel circuit layer facing away from the substrate base plate, the method further comprises:
forming a second insulating layer on one side of the pixel circuit layer, which is far away from the substrate base plate;
patterning the second insulating layer to obtain a plurality of first sub-regions and a plurality of second sub-regions, wherein one first sub-region corresponds to one first pixel unit, one second sub-region corresponds to one second pixel unit, the first sub-region forms a plurality of concave patterns which are concave towards the direction of the substrate base plate on the surface of one side which deviates from the substrate base plate, each concave pattern corresponds to one sub-pixel, the second sub-region forms a plurality of convex patterns which are convex towards the direction which deviates from the substrate base plate on the surface of one side which deviates from the substrate base plate, each convex pattern corresponds to one sub-pixel, and a first partition opening is formed between the adjacent first sub-region and the second sub-region.
For example, the patterning the second insulating layer to obtain a plurality of first sub-regions and a plurality of second sub-regions specifically includes:
patterning the second insulating layer by adopting a first composition process to form the first sub-region;
and patterning the second insulating layer by adopting a second patterning process to form the second sub-region.
For example, after the patterning the second insulating layer to obtain a plurality of first sub-regions and a plurality of second sub-regions, before at least one film layer in a plurality of light emitting devices is formed on a side of the pixel circuit layer facing away from the substrate, the method further includes:
and a drilling and carving mode is adopted, and a first lateral recess is formed in the side wall of the first partition opening.
Illustratively, after the first conductive layer is formed on the side of the pixel circuit layer facing away from the substrate, and before the at least one film layer of the plurality of light emitting devices is formed on the side of the pixel circuit layer facing away from the substrate, the method further includes:
sequentially forming a third insulating layer and a fourth insulating layer on the second insulating layer, wherein the third insulating layer and the fourth insulating layer are made of different materials, the third insulating layer comprises a first pattern positioned between the adjacent concave patterns and a second pattern positioned between the adjacent convex patterns, the first pattern is provided with a second partition opening, and the second pattern is provided with a third partition opening;
and forming a second lateral recess on the side wall of the second partition opening and forming a third lateral recess on the side wall of the third partition opening in a drilling and engraving mode.
The beneficial effects brought by the embodiment of the disclosure are as follows:
the display substrate and the manufacturing method thereof provided by the embodiment of the disclosure, the reflective electrode of the light emitting device in a part of the pixel units in the display substrate adopts a concave surface structure, and the reflective electrode of the light emitting device in a part of the pixel units adopts a convex surface structure, so that the reflective electrode of the concave surface structure is matched with the reflective electrode of the convex surface structure, and the reflective projection area can be effectively increased under the condition that the pixel area of the sub-pixel of the concave surface reflective surface is not changed, so as to improve the light emitting efficiency and the light emitting collimation of the light emitting device; and the convex reflecting electrode sub-pixel can realize anode astigmatism under the condition of not changing the pixel area, thereby ensuring the visual angle. Therefore, the display substrate provided by the embodiment of the disclosure can improve the area utilization rate of the reflective electrode, and meet the requirements of the product on high brightness, low power consumption and large viewing angle.
Drawings
Fig. 1 is a schematic diagram illustrating a pixel arrangement structure of a display substrate according to some embodiments of the present disclosure;
FIG. 2 illustrates a cross-sectional view of a display substrate provided in some embodiments of the present disclosure;
FIG. 3 is a schematic diagram of a method of fabricating a display substrate according to some embodiments of the present disclosure during a step of forming a landing electrode;
fig. 4 is a schematic view illustrating a manufacturing method of a display substrate provided in some embodiments of the present disclosure during a step of forming a second insulating layer;
FIG. 5 is a schematic view of a method of fabricating a display substrate provided in some embodiments of the present disclosure while forming a pattern of a first photoresist;
fig. 6 is a schematic view illustrating a method of manufacturing a display substrate according to some embodiments of the present disclosure when a concave pattern is formed on a second insulating layer;
FIG. 7 illustrates a schematic view of a second photoresist formed by the method for manufacturing a display substrate according to some embodiments of the present disclosure;
fig. 8 is a schematic view illustrating a convex mirror structure pattern formed on a second photoresist according to a method for manufacturing a display substrate according to some embodiments of the present disclosure;
fig. 9 is a schematic view illustrating a method of manufacturing a display substrate according to some embodiments of the present disclosure to form a protrusion pattern on a second insulating layer;
fig. 10 is a schematic view illustrating a method of manufacturing a display substrate according to some embodiments of the present disclosure to form a first lateral recess;
fig. 11 illustrates a schematic view of forming a second lateral recess and a third lateral recess by a method of manufacturing a display substrate provided in some embodiments of the present disclosure;
fig. 12 is an electron microscope (SEM) view of a concave reflective electrode and a convex reflective electrode on a display substrate according to some embodiments of the present disclosure, wherein (a) shows an external view of the concave reflective electrode, (b) shows a cross-sectional view of the concave reflective electrode, (c) shows an external view of the convex reflective electrode, and (d) shows a cross-sectional view of the convex reflective electrode;
FIG. 13 shows a cross-sectional view along F-F' in FIG. 1;
FIG. 14 shows a cross-sectional view taken along line E-E' in FIG. 1.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present disclosure more apparent, the technical solutions of the embodiments of the present disclosure will be described clearly and completely with reference to the drawings of the embodiments of the present disclosure. It is to be understood that the described embodiments are only a few embodiments of the present disclosure, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the described embodiments of the disclosure without inventive step, are within the scope of protection of the disclosure.
Unless otherwise defined, technical or scientific terms used herein shall have the ordinary meaning as understood by one of ordinary skill in the art to which this disclosure belongs. The use of "first," "second," and the like in this disclosure is not intended to indicate any order, quantity, or importance, but rather is used to distinguish one element from another. Also, the use of the terms "a," "an," or "the" and similar referents do not denote a limitation of quantity, but rather denote the presence of at least one. The word "comprising" or "comprises", and the like, means that the element or item preceding the word comprises the element or item listed after the word and its equivalent, but does not exclude other elements or items. The terms "connected" or "coupled" and the like are not restricted to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "upper", "lower", "left", "right", and the like are used merely to indicate relative positional relationships, and when the absolute position of the object being described is changed, the relative positional relationships may also be changed accordingly.
Before a detailed description of the display substrate and the method of manufacturing the same provided by the embodiments of the present disclosure, it is necessary to make the following description of the related art:
in the related art, silicon-based OLED microdisplays are widely used in VR/AR as near-eye displays, and have high requirements for brightness and viewing angle. The inventor of the present disclosure finds that Micro-OLED Micro displays generally adopt an Al thin film as a reflective electrode layer, but the reflectivity of such materials is usually about 70-88%, and the conventional reflective electrode structure is mostly of a planar type, which is difficult to meet the performance requirements of industrial products for high brightness and low power consumption. Therefore, in order to meet the requirements of high brightness and large viewing angle, the embodiment of the disclosure provides a display substrate and a manufacturing method thereof.
As shown in fig. 1, the display substrate provided by the embodiment of the present disclosure has a plurality of pixel units distributed in an array, where each pixel unit includes at least two sub-pixels. For example, in the embodiment shown in the figure, each pixel unit may include three subpixels of RGB.
As shown in fig. 2, 13 and 14, a display substrate provided by an embodiment of the present disclosure includes:
a base substrate 100;
a pixel circuit layer 200 on the substrate base plate 100; and
a light emitting device layer located on a side of the pixel circuit layer 200 facing away from the substrate 100, the light emitting device layer including a plurality of light emitting devices 300 distributed in an array, at least one light emitting device 300 being disposed in each sub-pixel, the light emitting devices 300 being electrically connected to the pixel circuit layer 200, the light emitting devices 300 including a reflective electrode 310, a light emitting layer 320 and a transparent electrode 330 which are stacked; wherein
The pixel units include a first pixel unit P1 and a second pixel unit P2, the reflective electrode 310 in the first pixel unit P1 is concave towards the direction of the substrate 100, that is, the reflective electrode 310 of the first pixel unit P1 is a concave reflective electrode, and the reflective electrode 310 in the second pixel unit P2 is convex towards the direction away from the substrate 100, that is, the reflective electrode 310 of the second pixel unit P2 is a convex reflective electrode.
In the above scheme, the reflective electrode 310 of the light emitting device 300 in a part of the pixel units in the display substrate adopts a concave surface structure, and the reflective electrode 310 of the light emitting device 300 in a part of the pixel units adopts a convex surface structure, so that the reflective electrode 310 of the concave surface structure is matched with the reflective electrode 310 of the convex surface structure, and the reflective projection area of the sub-pixel of the concave surface reflector can be effectively increased under the condition that the pixel area is not changed, so as to improve the light emitting efficiency and the light emitting collimation of the light emitting device 300; and the convex reflecting electrode 310 sub-pixel can realize anode astigmatism under the condition that the pixel area is not changed, thereby ensuring the visual angle. Therefore, the display substrate provided by the embodiment of the disclosure can improve the area utilization rate of the reflective electrode 310, so that the reflective area of the reflective electrode 310 can be increased to 130% -180%, and the requirements of the product on high brightness, low power consumption and large viewing angle are met.
In some embodiments, the reflective electrode 310 may serve as an anode and the transparent electrode 330 may serve as a cathode. It should be noted that, in the embodiment shown in fig. 2, the reflective electrode 310 may be stacked to a side of the transparent electrode 330 near the pixel circuit layer 200. In other embodiments not shown, the reflective electrode 310 can also be stacked on the transparent electrode 330 at a side away from the pixel circuit layer 200.
In addition, in some exemplary embodiments, as shown in fig. 1, in a plurality of pixel units, the first pixel unit P1 and the second pixel unit P2 are distributed in an interlaced manner. That is, in any two adjacent pixel units, the reflective electrode 310 in one pixel unit is concave, and the reflective electrode 310 in the other pixel unit is convex.
In the above embodiment, the reflective electrode 310 of one pixel unit has a concave shape, which may mean that the reflective electrodes 310 corresponding to all sub-pixels in the pixel unit have a concave shape; the reflective electrode 310 of one pixel unit is convex, which may mean that the reflective electrodes 310 corresponding to all sub-pixels in the pixel unit are convex. It is understood that, in practical applications, the reflective electrode 310 of at least one sub-pixel in a pixel unit may be concave or convex.
Further, as an exemplary embodiment, as shown in fig. 2, the display substrate further includes:
a first insulating layer 400 located on a side of the pixel circuit layer 200 facing away from the substrate 100, wherein a pattern of the first insulating layer 400 includes a plurality of first vias 410 distributed in an array, and at least one of the first vias 410 corresponds to one of the sub-pixels; and
a first conductive layer located on a side of the first insulating layer 400 facing away from the substrate 100, the first insulating layer 400 and the first conductive layer both being located between the pixel circuit layer 200 and the light emitting device 300 layer, a pattern of the first conductive layer includes a plurality of overlapping electrodes 510 distributed in an array, at least one of the overlapping electrodes 510 corresponds to one of the sub-pixels, the overlapping electrode 510 within the same sub-pixel coincides with an orthographic projection of the first via 410 on the substrate 100, and an orthographic projection area of the overlapping electrode 510 on the substrate 100 is larger than an orthographic projection area of the corresponding first via 410 on the substrate 100, the overlapping electrode 510 is electrically connected to the pixel circuit layer 200 through the corresponding first via 410, and one of the reflective electrode 310 and the transparent electrode 330 is electrically connected to the overlapping electrode 510, so that the light emitting device 300 is electrically connected to the pixel circuit layer 200.
In the above scheme, the pixel circuit layer 200 may include various signal traces such as a thin film transistor, a data line, a gate line, and the like, and the pixel circuit layer 200 is used for driving the light emitting device 300 and electrically connected to the light emitting device 300. For example, the source electrode of the thin film transistor is connected to the reflective electrode 310 or the transparent electrode 330. The first insulating layer 400 is disposed between the pixel circuit layer 200 and the light emitting device 300, and is electrically connected through the first via hole 410 disposed on the first insulating layer 400, and if the pixel circuit layer 200 is directly connected to the light emitting device 300 through the first via hole 410, since the first via hole 410 cannot be made large in size, when the reflective electrode 310 is concave or convex, especially when the reflective electrode 310 is concave, the requirement on the position accuracy of the reflective electrode 310 and the first via hole 410 is high, and if there is a process deviation between the two positions, it is difficult to ensure that the reflective electrode 310 is smoothly connected to the thin film transistor through the first via hole 410. Therefore, with the above-mentioned scheme, a first conductive layer is stacked on the first insulating layer 400, and the landing electrode 510 is formed through the first conductive layer, and the area of the landing electrode 510 is larger than that of the first via 410, which is equivalent to enlarging the area of the first via 410, so that the position accuracy requirement of the first via 410 and the reflective electrode 310 is reduced, the process accuracy requirement is reduced, and the reflective electrode 310 is guaranteed to be landed on the pixel circuit layer 200.
It is understood that the above are only examples, and in practical applications, if the size of the first via 410 is large enough and the process precision can meet the requirement, the first conductive layer may not be disposed, and the light emitting device 300 may be directly connected to the pixel circuit layer 200 through the first via 410.
Further, in some exemplary embodiments, as shown in fig. 2, the display substrate further includes: a second insulating layer 600 located between the pixel circuit layer 200 and the light emitting device 300, where the second insulating layer 600 includes a plurality of first sub-regions a and a plurality of second sub-regions B, at least one of the first sub-regions a corresponds to one of the first pixel units P1, at least one of the second sub-regions B corresponds to one of the second pixel units P2, the first sub-region a is provided with a plurality of concave patterns 610 (see fig. 9) recessed toward the substrate 100 on a side surface facing away from the substrate 100, at least one of the concave patterns 610 corresponds to one of the sub-pixels, the second sub-region B is provided with a plurality of convex patterns 620 (see fig. 9) protruding toward the side facing away from the substrate 100 on a side surface facing away from the substrate 100, and at least one of the convex patterns 620 corresponds to one of the sub-pixels; wherein the reflective electrode 310, the light emitting layer 320 and the transparent electrode 330 in the light emitting device 300 are stacked to a side of the concave pattern 610 and the convex pattern 620 facing away from the substrate 100.
By adopting the above scheme, the concave and convex shapes of the reflective electrode 310 are defined by the second insulating layer 600, the second insulating layer 600 is patterned to form the concave pattern 610 and the convex pattern 620, and then the reflective electrode 310 is stacked on the concave pattern 610 and the convex pattern 620 along with the shape, so that the reflective electrode 310 in the concave and convex shapes can be formed. It is understood that the concave and convex structures of the reflective electrode 310 can be realized in other manners in practical applications.
In addition, as some exemplary embodiments, as shown in fig. 2, in the first sub-region a, a second via hole 630 is provided on each of the concave patterns 610, and one of the reflective electrode 310 and the transparent electrode 330 is electrically connected to the landing electrode 510 via the second via hole 630; in the second sub-region B, an orthographic projection of each of the overlapping electrodes 510 on the base substrate 100 is at least partially uncovered by the convex pattern 620 to form an exposed region 510a, and one of the reflective electrode 310 and the transparent electrode 330 overlaps the exposed region 510a.
As other exemplary embodiments, in the first sub-area a, a second via hole 630 is provided on each of the concave patterns 610, and one of the reflective electrode 310 and the transparent electrode 330 is electrically connected to the landing electrode 510 via the second via hole 630; in the second sub-region B, a third via hole may be formed on each of the convex patterns 620, and one of the reflective electrode 310 and the transparent electrode 330 is electrically connected to the landing electrode 510 through the third via hole.
In the above two exemplary embodiments, the bonding manner between the light emitting device 300 and the bonding electrode 510 can be realized.
As some exemplary embodiments, as shown in fig. 2, the second insulating layer 600 further has a first blocking opening 640 between the adjacent first and second sub-regions a and B, and at least one film layer of the light emitting device 300 adjacent to the pixel unit is disconnected at the first blocking opening 640.
The first blocking openings 640 have a small size and may not be disconnected at the first blocking openings 640 and may be independent of each other when the film layers in the light emitting device 300 are stacked, and in order to further ensure that the light emitting devices 300 between the adjacent pixel units are independent of each other, as an exemplary embodiment, the first blocking openings 640 have first lateral recesses 640a on sidewalls thereof, and the first lateral recesses 640a are used to disconnect at least one of the film layers in the light emitting devices 300 of the adjacent pixel units. Wherein the first lateral groove may be implemented using an undercut (undercut) process.
Further, as an exemplary embodiment, as shown in fig. 2, the display substrate further includes: the third insulating layer 700 and the fourth insulating layer 800 are sequentially stacked from a side close to the substrate base plate 100 to a side far away from the substrate base plate 100, the third insulating layer 700 and the fourth insulating layer 800 are made of different materials, the third insulating layer 700 and the fourth insulating layer 800 include a first pattern 710 located between adjacent concave patterns 610 and a second pattern 720 located between adjacent convex patterns 620 (see fig. 11), a second partition opening 710a is arranged on the first pattern 710, a second lateral recess 710b is arranged on a sidewall of the second partition opening 710a, a third partition opening 720a is arranged on the second pattern 720, and a third lateral recess 720b is arranged on a sidewall of the third partition opening 720 a. By adopting the scheme, the light-emitting devices 300 among different sub-pixels in the same pixel unit can be ensured to be independent. The third insulating layer 700 may be made of one of silicon oxide and silicon nitride, and the fourth insulating layer 800 may be made of the other of silicon oxide and silicon nitride.
In the above-described embodiment, two different material layers of the third insulating layer 700 and the fourth insulating layer 800 are stacked, because: the formation of the second lateral recess 710b and the third lateral recess 720b may be achieved by using an undercut (undercut) process, and the premise of the undercut process is that the two adjacent stacked film layers need to be made of different materials, so that the purpose of laterally etching the insulating layer located on the lower layer can be achieved, and therefore two insulating layers, i.e., the third insulating layer 700 and the fourth insulating layer 800, are stacked to facilitate the formation of the second lateral recess 710b and the third lateral recess 720b.
It should be understood that, in other embodiments not shown in the drawings, a fifth insulating layer may be directly stacked on the second insulating layer 600, and the fifth insulating layer may be made of a material different from that of the second insulating layer 600, so that, due to the material difference between the fifth insulating layer and the second insulating layer 600, a lateral recess may be directly formed on the second insulating layer 600 in a region between adjacent concave patterns and a region between adjacent convex patterns 620 by using a drilling and etching process, so as to ensure that at least one layer of the light emitting device 300 is disconnected.
It should be noted that at least one film layer of the light emitting device 300 is disconnected by the first lateral recess 640a, the second lateral recess 710b and the third lateral recess 720b, and specifically, the light emitting device 300 may further include a Charge Generation Layer (CGL), an electron transport layer, a hole transport layer, etc., and the disconnected film layer may be, but is not limited to, a charge generation layer.
Fig. 12 is an electron microscope (SEM) view of a convex reflective electrode and a concave reflective electrode in a display substrate according to some embodiments of the present disclosure. Wherein (a) is an external view of the concave reflective electrode, and (b) is a cross-sectional view of the concave reflective electrode; (c) An external view of the convex reflective electrode is shown, and (d) a cross-sectional view of the convex reflective electrode is shown.
In a second aspect, embodiments of the present disclosure further provide a method for manufacturing a display substrate, where the method is used to manufacture the display substrate provided by the embodiments of the present disclosure, and the method includes:
step S01, providing a substrate 100;
step S02, forming a pixel circuit layer 200 on the base substrate 100;
step S03, forming a plurality of light emitting devices 300 on a side of the pixel circuit layer 200 away from the substrate 100, wherein the light emitting devices 300 are electrically connected to the pixel circuit layer 200, at least one light emitting device 300 is disposed in each sub-pixel, the light emitting device 300 includes a reflective electrode 310, a light emitting layer 320 and a transparent electrode 330, which are stacked, the plurality of pixel units include a first pixel unit P1 and a second pixel unit P2, the reflective electrode 310 in the first pixel unit P1 is concave towards the substrate 100, and the reflective electrode 310 in the second pixel unit P2 is convex towards the substrate 100.
Obviously, the manufacturing method of the display substrate provided in the embodiment of the present disclosure also has the beneficial effects brought by the display substrate provided in the embodiment of the present disclosure, and details are not repeated herein.
For example, after the step S02 and before the step S03, the method further includes:
step S02A, forming a first insulating layer 400 on a side of the pixel circuit layer 200 away from the substrate 100, and performing patterning on the first insulating layer 400, so that a pattern of the first insulating layer 400 includes a plurality of first vias 410 distributed in an array, where at least one first via 410 corresponds to one sub-pixel;
step S02B, as shown in fig. 3, a first conductive layer is formed on a side of the pixel circuit layer 200 away from the substrate 100, and patterning is performed on the first conductive layer, so that a pattern of the first conductive layer includes a plurality of overlapping electrodes 510 distributed in an array, where at least one of the overlapping electrodes 510 corresponds to one of the sub-pixels, an orthogonal projection of the overlapping electrode 510 and the first via 410 in the same sub-pixel on the substrate 100 is overlapped, an orthogonal projection area of the overlapping electrode 510 on the substrate 100 is larger than an orthogonal projection area of the corresponding first via 410 on the substrate 100, and the overlapping electrode 510 is electrically connected to the pixel circuit layer 200 through the corresponding first via 410.
After step S02B and before step S03, the method further includes:
step S02C, as shown in fig. 4, forming a second insulating layer 600 on a side of the pixel circuit layer 200 away from the substrate 100;
step S02D, as shown in fig. 9, performing patterning processing on the second insulating layer 600 to obtain a plurality of first sub-regions a and a plurality of second sub-regions B, where one of the first sub-regions a corresponds to one of the first pixel units P1, one of the second sub-regions B corresponds to one of the second pixel units P2, a plurality of concave patterns 610 that are concave toward the direction of the substrate 100 are formed on a surface of a side that is away from the substrate 100 of the first sub-region a, each concave pattern 610 corresponds to one of the sub-pixels, a plurality of convex patterns 620 that are convex toward the direction that is away from the substrate 100 are formed on a surface of a side that is away from the substrate 100 of the second sub-region B, each convex pattern 620 corresponds to one of the sub-pixels, and a first partition opening 640 is formed between the first sub-region a and the second sub-region B that are adjacent to each other.
Illustratively, step S02D specifically includes:
as shown in fig. 5 and 6, a first patterning process is performed on the second insulating layer 600 to form the first sub-region a;
as shown in fig. 7 and 8, a second patterning process is performed on the second insulating layer 600 to form the second sub-region B.
Specifically, the first patterning process may include processes such as glue spreading, exposure, development, etching, and the like, for example, in order to realize the concave pattern 610 on the second insulating layer 600, a gray-scale mask may be used in the exposure process, a pattern of the first photoresist 650 obtained is shown in fig. 5, and a structure of the second insulating layer 600 obtained after the etching process is shown in fig. 6.
The second patterning process may be implemented by applying glue, exposing, developing, etching, or the like, and illustratively, the convex pattern 620 on the second insulating layer 600 may be implemented by combining a lens reflex technique and an etching process. The lens reflex technique is a technique that can bake a cylindrical prism to form a convex mirror structure. Specifically, as shown in fig. 7, in the photoresist coating process, a second photoresist 660 is coated on the second insulating layer 600, wherein the second photoresist 600 corresponds to a first photoresist pattern 661 having a prism structure at a position corresponding to the first pixel unit P1, such that the first photoresist pattern 661 corresponds to the first pixel unit P1
The concave graphics in the unit P1 are protected; the second photoresist pattern 662 of the second photoresist 600 corresponding to one columnar prism structure at the position of each sub-pixel 5 in the second pixel unit P2 is baked, so that the second photoresist pattern 662 is formed into a hemispherical structure as shown in fig. 8 by the columnar prism structure; as shown in fig. 9, in the etching process, the second photoresist 660 is etched, so that a convex pattern 620 is formed on the second insulating layer 600.
Illustratively, after the step S02D and before the step S03 of forming at least one film layer, the method 0 further includes:
step S02E, as shown in fig. 10, a first lateral recess 640a is formed on a sidewall of the first partition opening 640 by a drilling and etching method.
Illustratively, as shown in fig. 11, after the step S02B and before the step S03 of forming at least one film layer, the method further includes:
step S02F, sequentially forming a third insulating layer 700 and a fourth insulating layer 800 on the second insulating layer 600, where the third insulating layer 700 and the fourth insulating layer 800 are made of different materials, the third insulating layer 700 includes a first pattern 710 located between adjacent concave patterns and a second pattern 720 located between adjacent convex patterns 620, the first pattern 710 is provided with a second isolation opening 710a, and the second pattern 720 is provided with a third isolation opening 720a;
and 0, forming a second lateral recess 710b on the sidewall of the second partition opening 710a and forming a third lateral recess 720b on the sidewall of the third partition opening 720a by using a drilling and etching method.
By adopting the scheme, the light-emitting devices 300 among different sub-pixels in the same pixel unit can be ensured to be independent. The third insulating layer 700 may be made of one of silicon oxide and silicon nitride, and the fourth insulating layer 800 may be made of the other of silicon oxide and silicon nitride.
It should be noted that, in the above solution, two different material layers of the third insulating layer 700 and the fourth insulating layer 800 are stacked, because: the formation of the second lateral recess 710b and the third lateral recess 720b may be achieved by an undercut (undercut) process, and the premise of the undercut process is that the two adjacent stacked film layers need different materials, so that the purpose of performing lateral etching on the insulating layer located on the lower layer can be achieved, and therefore two insulating layers, i.e., the third insulating layer 700 and the fourth insulating layer 800, are stacked to facilitate the formation of the second lateral recess 710b and the third lateral recess 720b.
It should be understood that in other embodiments, which are not illustrated, a fifth insulating layer may be directly stacked on the second insulating layer 600, and the fifth insulating layer may be made of a material different from that of the second insulating layer 600, so that, due to the material difference between the fifth insulating layer and the second insulating layer 600, a lateral recess may be directly formed on the second insulating layer 600 in a region between adjacent concave patterns and a region between adjacent convex patterns 620 by using a drilling and etching process, so as to ensure that at least one layer of the light emitting device 300 is disconnected.
It is further noted that at least one film layer of the light emitting device 300 is disconnected by the first lateral recess 640a, the second lateral recess 710b and the third lateral recess 720b, and particularly, the light emitting device 300 may further include a Charge Generation Layer (CGL), an electron transport layer, a hole transport layer, etc., which may be, but is not limited to, a charge generation layer.
The following points need to be explained:
(1) The drawings of the embodiments of the disclosure only relate to the structures related to the embodiments of the disclosure, and other structures can refer to the common design.
(2) For purposes of clarity, the thickness of layers or regions in the figures used to describe embodiments of the present disclosure are exaggerated or reduced, i.e., the figures are not drawn on a true scale. It will be understood that when an element such as a layer, film, region or substrate is referred to as being "on" or "under" another element, it can be "directly on" or "under" the other element or intervening elements may be present.
(3) Without conflict, embodiments of the present disclosure and features of the embodiments may be combined with each other to arrive at new embodiments.
The above is only a specific embodiment of the present disclosure, but the scope of the present disclosure is not limited thereto, and the scope of the present disclosure should be determined by the scope of the claims.

Claims (15)

1. A display substrate is provided with a plurality of pixel units distributed in an array, wherein each pixel unit comprises at least two sub-pixels; characterized in that, the display substrate includes:
a base substrate; and
a pixel circuit layer located over the substrate base plate;
the light-emitting device layer is positioned on one side, away from the substrate, of the pixel circuit layer and comprises a plurality of light-emitting devices distributed in an array mode, at least one light-emitting device is arranged in each sub-pixel and electrically connected with the pixel circuit layer, and each light-emitting device comprises a reflecting electrode, a light-emitting layer and a transparent electrode which are arranged in a stacked mode; wherein
The pixel units comprise a first pixel unit and a second pixel unit, the reflecting electrode in the first pixel unit is concave towards the direction of the substrate base plate, and the reflecting electrode in the second pixel unit is convex towards the direction deviating from the substrate base plate.
2. The display substrate of claim 1,
the reflecting electrode is an anode, and the transparent electrode is a cathode.
3. The display substrate of claim 1,
in the pixel units, the first pixel units and the second pixel units are distributed in a staggered mode.
4. The display substrate of claim 1,
the display substrate further includes:
the first insulating layer is positioned on one side, away from the substrate base plate, of the pixel circuit layer, the pattern of the first insulating layer comprises a plurality of first through holes distributed in an array mode, and at least one first through hole corresponds to one sub-pixel; and
the first conducting layer is located on one side, away from the substrate, of the first insulating layer, the first insulating layer and the first conducting layer are located between the pixel circuit layer and the light-emitting device layer, the pattern of the first conducting layer comprises a plurality of overlapping electrodes distributed in an array, at least one of the overlapping electrodes corresponds to one of the sub-pixels, the overlapping electrode in the same sub-pixel is overlapped with an orthographic projection of the first via hole on the substrate, the orthographic projection area of the overlapping electrode on the substrate is larger than that of the corresponding first via hole on the substrate, the overlapping electrode is electrically connected to the pixel circuit layer through the corresponding first via hole, and the reflecting electrode and one of the transparent electrodes are electrically connected to the overlapping electrode so that the light-emitting device is electrically connected to the pixel circuit layer.
5. The display substrate according to any one of claims 1 to 4,
the display substrate further includes: the second insulating layer is positioned between the pixel circuit layer and the light-emitting device and comprises a plurality of first sub-regions and a plurality of second sub-regions, at least one first sub-region corresponds to one first pixel unit, at least one second sub-region corresponds to one second pixel unit, a plurality of concave patterns which are concave towards the direction of the substrate base plate are arranged on the surface of one side of the first sub-region, which is far away from the substrate base plate, at least one concave pattern corresponds to one sub-pixel, a plurality of convex patterns which are convex towards the direction of the substrate base plate are arranged on the surface of one side of the second sub-region, which is far away from the substrate base plate, and at least one convex pattern corresponds to one sub-pixel; wherein the reflective electrode, the light-emitting layer and the transparent electrode in the light-emitting device are stacked to the side, away from the substrate, of the corresponding concave pattern and the convex pattern.
6. The display substrate according to claim 5, wherein when the display substrate is the display substrate according to claim 4,
on the first sub-region, each of the concave patterns is provided with a second via hole, and one of the reflective electrode and the transparent electrode is electrically connected to the landing electrode through the second via hole;
in the second sub-area, an orthographic projection of each of the lap electrodes on the substrate base plate is at least partially uncovered by the convex patterns to form an exposed area, and one of the reflective electrode and the transparent electrode is lapped to the exposed area; or, each convex pattern is provided with a third via hole, and one of the reflective electrode and the transparent electrode is electrically connected to the overlapping electrode through the third via hole.
7. The display substrate of claim 5,
the second insulating layer further has a first blocking opening between the adjacent first and second sub-regions, at which the light emitting device of the adjacent pixel unit is disconnected.
8. The display substrate according to claim 7,
the side wall of the first partition opening is provided with a first lateral recess, and the first lateral recess is used for disconnecting at least one film layer in the light-emitting device of the adjacent pixel unit.
9. The display substrate of claim 5,
the display substrate further includes: the second side is sunken to the second side that is equipped with on the second wall open-ended lateral wall, be equipped with the third on the second figure and cut off the opening, the third cuts off and is equipped with the third lateral recess on the open-ended lateral wall.
10. A method for manufacturing a display substrate, which is applied to the display substrate according to any one of claims 1 to 9, the method comprising:
providing a substrate base plate;
forming a pixel circuit layer on the substrate base plate;
the light-emitting device structure comprises a substrate, a pixel circuit layer, a plurality of sub-pixels and a plurality of pixel units, wherein the pixel circuit layer is provided with a plurality of light-emitting devices on one side, which deviates from the substrate, of the substrate, the light-emitting devices are electrically connected with the pixel circuit layer, each sub-pixel is internally provided with at least one light-emitting device, each light-emitting device comprises a reflecting electrode, a light-emitting layer and a transparent electrode which are stacked, the pixel units comprise a first pixel unit and a second pixel unit, the reflecting electrodes in the first pixel units are concave towards the direction of the substrate, and the reflecting electrodes in the second pixel units are convex towards the direction deviating from the direction of the substrate.
11. The method of claim 10, wherein after forming the pixel circuit layer on the substrate base plate, and before forming the cavities of the plurality of light emitting devices on the side of the pixel circuit layer facing away from the substrate base plate, the method further comprises:
forming a first insulating layer on one side of the pixel circuit layer, which is far away from the substrate base plate, and performing patterning treatment on the first insulating layer, so that the pattern of the first insulating layer comprises a plurality of first via holes distributed in an array manner, wherein at least one first via hole corresponds to one sub-pixel;
forming a first conducting layer on one side, away from the substrate, of the pixel circuit layer, and patterning the first conducting layer to enable the pattern of the first conducting layer to include a plurality of overlapping electrodes distributed in an array manner, wherein at least one of the overlapping electrodes corresponds to one of the sub-pixels, the overlapping electrode in the same sub-pixel coincides with the orthographic projection of the first via hole on the substrate, the orthographic projection area of the overlapping electrode on the substrate is larger than the orthographic projection area of the corresponding first via hole on the substrate, and the overlapping electrode is electrically connected to the pixel circuit layer through the corresponding first via hole.
12. The method of claim 11, wherein after forming the first conductive layer on the side of the pixel circuit layer facing away from the substrate base and before forming the plurality of light emitting devices on the side of the pixel circuit layer facing away from the substrate base, the method further comprises:
forming a second insulating layer on one side of the pixel circuit layer, which is far away from the substrate base plate;
patterning the second insulating layer to obtain a plurality of first sub-regions and a plurality of second sub-regions, wherein one of the first sub-regions corresponds to one of the first pixel units, one of the second sub-regions corresponds to one of the second pixel units, the first sub-regions forms a plurality of concave patterns which are concave towards the direction of the substrate base plate on the surface of the side which is far away from the substrate base plate, each concave pattern corresponds to one of the sub-pixels, the second sub-regions forms a plurality of convex patterns which are convex towards the direction which is far away from the substrate base plate on the surface of the side which is far away from the substrate base plate, each convex pattern corresponds to one of the sub-pixels, and a first partition opening is formed between the adjacent first sub-regions and the adjacent second sub-regions.
13. The method of claim 12,
the patterning of the second insulating layer to obtain a plurality of first sub-regions and a plurality of second sub-regions specifically includes:
patterning the second insulating layer by adopting a first composition process to form the first sub-region;
and patterning the second insulating layer by adopting a second-time composition process to form the second sub-area.
14. The method of claim 12,
after the patterning the second insulating layer to obtain a plurality of first sub-regions and a plurality of second sub-regions, before at least one film layer of a plurality of light emitting devices is formed on a side of the pixel circuit layer away from the substrate, the method further includes:
and a drilling and carving mode is adopted, and a first lateral recess is formed in the side wall of the first partition opening.
15. The method of claim 12,
the method further comprises, after forming the first conductive layer on the side of the pixel circuit layer facing away from the substrate base plate and before forming at least one film layer of a plurality of light emitting devices on the side of the pixel circuit layer facing away from the substrate base plate:
sequentially forming a third insulating layer and a fourth insulating layer on the second insulating layer, wherein the third insulating layer and the fourth insulating layer are made of different materials, the third insulating layer comprises a first pattern positioned between the adjacent concave patterns and a second pattern positioned between the adjacent convex patterns, the first pattern is provided with a second partition opening, and the second pattern is provided with a third partition opening;
and forming a second lateral recess on the side wall of the second partition opening and forming a third lateral recess on the side wall of the third partition opening in a drilling and carving mode.
CN202310008837.XA 2023-01-04 2023-01-04 Display substrate and manufacturing method thereof Pending CN115988901A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202310008837.XA CN115988901A (en) 2023-01-04 2023-01-04 Display substrate and manufacturing method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202310008837.XA CN115988901A (en) 2023-01-04 2023-01-04 Display substrate and manufacturing method thereof

Publications (1)

Publication Number Publication Date
CN115988901A true CN115988901A (en) 2023-04-18

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