CN115980545A - Integrated circuit testing method for preventing testing resource interference - Google Patents
Integrated circuit testing method for preventing testing resource interference Download PDFInfo
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- CN115980545A CN115980545A CN202211553178.XA CN202211553178A CN115980545A CN 115980545 A CN115980545 A CN 115980545A CN 202211553178 A CN202211553178 A CN 202211553178A CN 115980545 A CN115980545 A CN 115980545A
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Abstract
The invention discloses an integrated circuit test method for preventing test resource interference, which comprises the following steps: s1, preparing test equipment: the device comprises a detection probe, a data input module, a central processing system, an alarm, a wire, an air box, a detection table, a grounding wire, a temperature controller, an insulating film, an insulating adhesive tape, a jig and a shielding cover; s2, mounting and adjusting test equipment: and (3) installing a detection table: the detection platform is placed on an external horizontal plane, the detection platform is guaranteed not to shake, the ground wire is utilized to connect the detection platform and the ground, the method utilizes the shielding cover, external signals can be shielded when detection is conducted, it is guaranteed that test resources are not interfered, through the detection probe and the central processing system, current, voltage and resistance data of the integrated circuit can be rapidly detected, the integrated circuit can be rapidly tested by using the data input system and the alarm, the labor intensity of detection is reduced, and the testing efficiency is improved.
Description
Technical Field
The invention relates to an integrated circuit testing method, relates to the technical field of integrated circuit testing, and particularly relates to an integrated circuit testing method for preventing testing resource interference.
Background
An integrated circuit is a microelectronic device or component. The transistor, resistance, capacitance and inductance elements and wiring required in a circuit are interconnected by a certain process, manufactured on a small or a plurality of small semiconductor chips or medium substrates, and then packaged in a tube shell to form a microstructure with the required circuit function; all the elements are structurally integrated, so that the electronic elements are greatly miniaturized, low in power consumption, intelligent and high in reliability.
The integrated circuit has the advantages of small volume, light weight, few lead wires and welding points, long service life, high reliability, good performance and the like, and is low in cost and convenient for large-scale production, thereby not only being widely applied to industrial and civil electronic equipment such as radio recorders, televisions, computers and the like, but also being widely applied to military affairs, communication, remote control and the like. The integrated circuit is used for assembling electronic equipment, the assembling density of the integrated circuit can be improved by dozens of times to thousands of times compared with a transistor, the stable working time of the equipment can also be greatly improved, and the current, the voltage and the resistance of the integrated circuit need to be tested in the production process of the integrated circuit.
The existing integrated circuit testing method has the defects that: 1. when the integrated circuit is tested, the integrated circuit is not shielded and protected, so that the integrated circuit is easily interfered by the outside during detection, and the detection result is influenced; 2. need artifically to carry out contrastive analysis to data when the inspection for the intensity of labour who detects is big, and the efficiency that detects is lower.
Disclosure of Invention
The technical problem to be solved by the present invention is to provide a method for testing an integrated circuit that prevents interference of test resources, and the purpose of the method is to solve the problems mentioned in the background art.
In order to solve the technical problems, the technical scheme adopted by the invention is as follows:
an integrated circuit testing method for preventing test resource interference, characterized in that: the method comprises the following steps:
s1, preparing test equipment: the device comprises a detection probe, a safety indicator lamp, a data input module, a data comparison module, a central processing system, an alarm, a lead, an air box, a detection table, a grounding wire, a temperature controller, an insulating film, an insulating adhesive tape, a jig and a shielding cover;
(1) And (3) installing a detection table: placing the detection table on an external horizontal plane to ensure that the detection table does not shake, and connecting the detection table with the ground by using a ground wire;
(2) Adjusting an air box: starting the air box, and adjusting the internal temperature of the air box to 22-26 ℃ through a temperature controller;
s2, connecting a test system: the input end of the central processing system is connected with a data input module, the connecting end of the central processing system is connected with a detection probe, the connecting end of the detection probe is provided with a safety indicator lamp, the output end of the central processing system is provided with a data comparison module, and the connecting end of the data comparison module is provided with an alarm;
s3, integrated circuit processing:
(1) Placing an integrated circuit to be detected in an air box for blowing, and removing dust and moisture of the integrated circuit by using the air box, wherein the blowing time is 20-30min;
(2) Taking out the integrated circuit after dust removal and moisture removal from the air box, coating the device on the integrated circuit through an insulating film, and simultaneously exposing the test point of the integrated circuit;
s4, interference prevention treatment: placing the integrated circuit on a detection table, fixing the integrated circuit through a jig, covering the integrated circuit through a shielding cover, perforating an insulating tape, and attaching the perforated insulating tape to a test point of the integrated circuit;
s5, testing the integrated circuit: inputting the calculated theoretical data of the current, the voltage and the resistance of the test point of the integrated circuit into a central processing system through a data input module, connecting a detection probe with the test point of the integrated circuit board after the integrated circuit is electrified, observing whether a safety indicator lamp is lightened, starting to detect the integrated circuit after the safety indicator lamp is lightened, and recording the detected current, the detected voltage and the resistance data of the test point into the central processing system;
s6, data comparison and judgment: the input test point current, voltage and resistance data and the test obtained data are matched through a data comparison module at the output end of the central processing system, and the error is not more than +/-0.05%;
and S7, when the error between the test data and the input data is large, starting an alarm to indicate that the integrated circuit has a fault.
Preferably, the diameter of the detection probe of the step S1 is 0.1-0.4mm, the detection probe is connected with the central processing system through a lead, the cross section of the lead is less than 2.5 square millimeters, and the length of the lead is less than 40cm.
Preferably, the insulating film of the step S3 is a transparent film, and the thickness of the insulating film is 0.05-0.12mm.
Preferably, the shielding cover in the step S4 is of a net structure, the shielding cover is formed by weaving brass wires and red copper wires, and the bottom of the shielding cover is connected with the integrated circuit through an insulating frame.
Preferably, the thickness of the insulating tape in the step S4 is 1.2-2.0mm, and the size of the opening of the insulating tape is matched with the size of the detection point of the integrated circuit.
Due to the adoption of the technical scheme, compared with the prior art, the invention has the technical progress that:
the method adopts the ground wire, can play a role in electrostatic protection on the integrated circuit during detection, can remove dust and moisture on the detected integrated circuit by utilizing the air box, prevent the detection from being interfered by external substances, can control the internal temperature of the air box, ensure that the integrated circuit cannot influence the test due to the temperature, can play a role in protecting the shell and pins of the integrated circuit by utilizing the insulating film, can shield external signals during detection by utilizing the shielding cover, and ensure that test resources are not interfered.
Drawings
FIG. 1 is a schematic diagram of a connection structure of a test system according to the present invention.
Detailed Description
The present invention will be described in further detail with reference to the following examples:
the first embodiment is as follows:
as shown in FIG. 1, the present invention provides a method for testing an integrated circuit to prevent test resource interference, the method comprising the steps of:
s1, preparing test equipment: the device comprises a detection probe, a safety indicator lamp, a data input module, a data comparison module, a central processing system, an alarm, a lead, a bellows, a detection table, a grounding wire, a temperature controller, an insulating film, an insulating tape, a jig and a shielding cover;
(1) And (3) installing a detection table: placing the detection table on an external horizontal plane to ensure that the detection table does not shake, and connecting the detection table with the ground by using a ground wire;
(2) Adjusting an air box: starting the air box, and adjusting the internal temperature of the air box to 22-26 ℃ through a temperature controller;
s2, connecting a test system: the input end of the central processing system is connected with a data input module, the connecting end of the central processing system is connected with a detection probe, the connecting end of the detection probe is provided with a safety indicator lamp, the output end of the central processing system is provided with a data comparison module, and the connecting end of the data comparison module is provided with an alarm;
s3, integrated circuit processing:
(1) Placing an integrated circuit to be detected in an air box for blowing, and removing dust and moisture of the integrated circuit by using the air box, wherein the blowing time is 25min;
(2) Taking out the integrated circuit after dust removal and moisture removal from the air box, coating the device on the integrated circuit through an insulating film, and simultaneously exposing the test point of the integrated circuit;
s4, interference prevention processing: placing an integrated circuit on a detection table, fixing the integrated circuit through a jig, covering the integrated circuit through a shielding cover, perforating an insulating tape, and attaching the perforated insulating tape to a test point of the integrated circuit;
s5, testing the integrated circuit: inputting the calculated theoretical data of the current, the voltage and the resistance of the integrated circuit test point into a central processing system through a data input module, connecting a detection probe with the test point of the integrated circuit board after the integrated circuit is electrified, observing whether a safety indicator lamp is lighted, starting to detect the integrated circuit after the safety indicator lamp is lighted, and recording the detected current, the detected voltage and the detected resistance data of the test point into the central processing system;
s6, data comparison and judgment: the input test point current, voltage and resistance data and the test obtained data are matched through a data comparison module at the output end of the central processing system, and the error is not more than +/-0.05%;
and S7, when the error between the test data and the input data is large, starting an alarm to indicate that the integrated circuit has a fault.
Further, the diameter of the detection probe in the step S1 is 0.1-0.4mm, the detection probe is connected with the central processing system through a lead, the cross section of the lead is less than 2.5 square millimeters, and the length of the lead is less than 40cm.
Further, the insulating film of the step S3 is a transparent film, and the thickness of the insulating film is 0.05mm.
Furthermore, the shielding cover in the step S4 is of a net structure, the shielding cover is formed by weaving brass wires and red copper wires, and the bottom of the shielding cover is connected with the integrated circuit through an insulating frame.
Further, the thickness of the insulating tape in the step S4 is 1.2mm, and the size of the opening of the insulating tape is matched with the size of the detection point of the integrated circuit.
Example two:
as shown in fig. 1, the present invention provides an integrated circuit testing method for preventing test resource interference, which includes the following steps:
s1, preparing test equipment: the device comprises a detection probe, a safety indicator lamp, a data input module, a data comparison module, a central processing system, an alarm, a lead, a bellows, a detection table, a grounding wire, a temperature controller, an insulating film, an insulating tape, a jig and a shielding cover;
(1) And (3) installing a detection table: placing the detection table on an external horizontal plane to ensure that the detection table does not shake, and connecting the detection table with the ground by using a ground wire;
(2) Adjusting an air box: starting the air box, and adjusting the internal temperature of the air box to 22-26 ℃ through a temperature controller;
s2, connecting a test system: the input end of the central processing system is connected with a data input module, the connecting end of the central processing system is connected with a detection probe, the connecting end of the detection probe is provided with a safety indicator lamp, the output end of the central processing system is provided with a data comparison module, and the connecting end of the data comparison module is provided with an alarm;
s3, integrated circuit processing:
(1) Placing an integrated circuit to be detected in an air box for blowing, and performing dust removal and moisture removal on the integrated circuit by using the air box, wherein the blowing time is 25min;
(2) Taking out the integrated circuit after dust removal and moisture removal from the air box, coating the device on the integrated circuit through an insulating film, and simultaneously exposing the test point of the integrated circuit;
s4, interference prevention processing: placing an integrated circuit on a detection table, fixing the integrated circuit through a jig, covering the integrated circuit through a shielding cover, perforating an insulating tape, and attaching the perforated insulating tape to a test point of the integrated circuit;
s5, testing the integrated circuit: inputting the calculated theoretical data of the current, the voltage and the resistance of the integrated circuit test point into a central processing system through a data input module, connecting a detection probe with the test point of the integrated circuit board after the integrated circuit is electrified, observing whether a safety indicator lamp is lighted, starting to detect the integrated circuit after the safety indicator lamp is lighted, and recording the detected current, the detected voltage and the detected resistance data of the test point into the central processing system;
s6, data comparison and judgment: the input test point current, voltage and resistance data and the test obtained data are matched through a data comparison module at the output end of the central processing system, and the error is not more than +/-0.05%;
and S7, when the error between the test data and the input data is large, starting an alarm to indicate that the integrated circuit has a fault.
Further, the diameter of the detection probe in the step S1 is 0.1-0.4mm, the detection probe is connected with the central processing system through a lead, the cross section of the lead is less than 2.5 square millimeters, and the length of the lead is less than 40cm.
Further, the insulating film of the step S3 is a transparent film, and the thickness of the insulating film is 0.12mm.
Furthermore, the shielding cover in the step S4 is of a net structure, the shielding cover is formed by weaving brass wires and red copper wires, and the bottom of the shielding cover is connected with the integrated circuit through an insulating frame.
Further, the thickness of the insulating tape in the step S4 is 2.0mm, and the size of the opening of the insulating tape is matched with the size of the detection point of the integrated circuit.
Example three:
as shown in fig. 1, the present invention provides an integrated circuit testing method for preventing test resource interference, which includes the following steps:
s1, preparing test equipment: the device comprises a detection probe, a safety indicator lamp, a data input module, a data comparison module, a central processing system, an alarm, a lead, an air box, a detection table, a grounding wire, a temperature controller, an insulating film, an insulating adhesive tape, a jig and a shielding cover;
(1) And (3) installing a detection table: placing the detection table on an external horizontal plane to ensure that the detection table does not shake, and connecting the detection table with the ground by using a ground wire;
(2) Adjusting an air box: starting the air box, and adjusting the internal temperature of the air box to 22-26 ℃ through a temperature controller;
s2, connecting a test system: the input end of the central processing system is connected with a data input module, the connecting end of the central processing system is connected with a detection probe, the connecting end of the detection probe is provided with a safety indicator lamp, the output end of the central processing system is provided with a data comparison module, and the connecting end of the data comparison module is provided with an alarm;
s3, integrated circuit processing:
(1) Placing an integrated circuit to be detected in an air box for blowing, and removing dust and moisture of the integrated circuit by using the air box, wherein the blowing time is 25min;
(2) Taking out the integrated circuit after dust removal and moisture removal from the air box, coating the device on the integrated circuit through an insulating film, and simultaneously exposing the test point of the integrated circuit;
s4, interference prevention processing: placing an integrated circuit on a detection table, fixing the integrated circuit through a jig, covering the integrated circuit through a shielding cover, perforating an insulating tape, and attaching the perforated insulating tape to a test point of the integrated circuit;
s5, testing the integrated circuit: inputting the calculated theoretical data of the current, the voltage and the resistance of the integrated circuit test point into a central processing system through a data input module, connecting a detection probe with the test point of the integrated circuit board after the integrated circuit is electrified, observing whether a safety indicator lamp is lighted, starting to detect the integrated circuit after the safety indicator lamp is lighted, and recording the detected current, the detected voltage and the detected resistance data of the test point into the central processing system;
s6, data comparison and judgment: the input test point current, voltage and resistance data and the test obtained data are matched through a data comparison module at the output end of the central processing system, and the error is not more than +/-0.05%;
and S7, when the error between the test data and the input data is large, starting an alarm to indicate that the integrated circuit has a fault.
Further, the diameter of the detection probe in the step S1 is 0.1-0.4mm, the detection probe is connected with the central processing system through a lead, the cross section of the lead is less than 2.5 square millimeters, and the length of the lead is less than 40cm.
Further, the insulating film of the step S3 is a transparent film, and the thickness of the insulating film is 0.09mm.
Furthermore, the shielding cover of the S4 substep is of a net structure, the shielding cover is formed by weaving brass wires and red copper wires, and the bottom of the shielding cover is connected with the integrated circuit through an insulating frame.
Furthermore, the thickness of the insulating tape in the step S4 is 1.6mm, and the size of the opening of the insulating tape is matched with the size of the detection point of the integrated circuit.
The method adopts the ground wire, can play a role in electrostatic protection on the integrated circuit during detection, can remove dust and moisture on the detected integrated circuit by utilizing the air box, prevent the detection from being interfered by external substances, can control the internal temperature of the air box, ensure that the integrated circuit cannot influence the test due to the temperature, can play a role in protecting the shell and pins of the integrated circuit by utilizing the insulating film, can shield external signals during detection by utilizing the shielding cover, and ensure that test resources are not interfered.
The present invention has been described in general terms in the foregoing, but it will be apparent to those skilled in the art that modifications and improvements can be made thereto based on the present invention. Therefore, modifications or improvements are within the scope of the invention without departing from the spirit of the inventive concept.
Claims (5)
1. An integrated circuit testing method for preventing test resource interference, characterized in that: the method comprises the following steps:
s1, preparing test equipment: the device comprises a detection probe, a safety indicator lamp, a data input module, a data comparison module, a central processing system, an alarm, a lead, an air box, a detection table, a grounding wire, a temperature controller, an insulating film, an insulating adhesive tape, a jig and a shielding cover;
(1) And (3) installing a detection table: placing the detection table on an external horizontal plane to ensure that the detection table does not shake, and connecting the detection table with the ground by using a ground wire;
(2) Adjusting an air box: starting the air box, and adjusting the internal temperature of the air box to 22-26 ℃ through a temperature controller;
s2, connecting a test system: the input end of the central processing system is connected with a data input module, the connecting end of the central processing system is connected with a detection probe, the connecting end of the detection probe is provided with a safety indicator lamp, the output end of the central processing system is provided with a data comparison module, and the connecting end of the data comparison module is provided with an alarm;
s3, integrated circuit processing:
(1) Placing an integrated circuit to be detected in an air box for blowing, and removing dust and moisture of the integrated circuit by using the air box, wherein the blowing time is 20-30min;
(2) Taking out the integrated circuit after dust removal and moisture removal from the air box, coating the device on the integrated circuit through an insulating film, and exposing the test point of the integrated circuit;
s4, interference prevention treatment: placing the integrated circuit on a detection table, fixing the integrated circuit through a jig, covering the integrated circuit through a shielding cover, perforating an insulating tape, and attaching the perforated insulating tape to a test point of the integrated circuit;
s5, testing the integrated circuit: inputting the calculated theoretical data of the current, the voltage and the resistance of the integrated circuit test point into a central processing system through a data input module, connecting a detection probe with the test point of the integrated circuit board after the integrated circuit is electrified, observing whether a safety indicator lamp is lighted, starting to detect the integrated circuit after the safety indicator lamp is lighted, and recording the detected current, the detected voltage and the detected resistance data of the test point into the central processing system;
s6, data comparison and judgment: the input test point current, voltage and resistance data and the test obtained data are matched through a data comparison module at the output end of the central processing system, and the error is not more than +/-0.05%;
and S7, when the error between the test data and the input data is large, starting an alarm to indicate that the integrated circuit has a fault.
2. The method of claim 1, wherein the testing resources are selected from the group consisting of: the diameter of the detection probe in the S1 substep is 0.1-0.4mm, and the detection probe is connected with the central processing system through a wire, the cross section of the wire is less than 2.5 square millimeters, and the length is less than 40cm.
3. The method of claim 1, wherein the testing resources are selected from the group consisting of: and the insulating film obtained in the step S3 is a transparent film, and the thickness of the insulating film is 0.05-0.12mm.
4. The method of claim 1, wherein the testing resources are configured to perform the following steps: and the shielding cover in the S4 step is of a net structure, the shielding cover is formed by weaving brass wires and red copper wires, and the bottom of the shielding cover is connected with the integrated circuit through an insulating frame.
5. The method of claim 1, wherein the testing resources are configured to perform the following steps: and in the step S4, the thickness of the insulating tape is 1.2-2.0mm, and the size of the opening of the insulating tape is matched with that of the detection point of the integrated circuit.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202211553178.XA CN115980545A (en) | 2022-12-05 | 2022-12-05 | Integrated circuit testing method for preventing testing resource interference |
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| CN202211553178.XA CN115980545A (en) | 2022-12-05 | 2022-12-05 | Integrated circuit testing method for preventing testing resource interference |
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| CN115980545A true CN115980545A (en) | 2023-04-18 |
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| CN202211553178.XA Pending CN115980545A (en) | 2022-12-05 | 2022-12-05 | Integrated circuit testing method for preventing testing resource interference |
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