CN115951772A - Power supply protection method and device of central processing unit and central processing unit - Google Patents
Power supply protection method and device of central processing unit and central processing unit Download PDFInfo
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Abstract
The invention provides a power supply protection method and a power supply protection device of a central processing unit and the central processing unit, wherein the method comprises the following steps: receiving load current output by an electronic fuse chip; and under the condition that the load current is determined to be greater than or equal to the current threshold, sending a closing control signal to the electronic fuse chip so that the electronic fuse chip cuts off the output current of the central processing unit according to the closing control signal and then transmits the residual load current to a rear-end capacitor for discharging and supplying. The power supply protection method and device of the central processing unit and the central processing unit provided by the invention can be used for limiting the current of the power level chip when the central processing unit is in a high-pressure working environment, so that the phenomenon that the service life of the chip is greatly reduced due to frequent output voltage cutoff in the prior art is avoided, the over-current protection effect is optimized, and the fault rate of the whole machine is reduced.
Description
Technical Field
The invention relates to the technical field of servers, in particular to a power supply protection method and device of a central processing unit and the central processing unit.
Background
With the iteration of a Central Processing Unit (CPU) technology, the relevant Power supply current of a server is larger and larger, the Power supply pressure of a corresponding CPU Power supply chip is also larger, and the risk of damage to a Power Stage (Power Stage) chip of a Power supply regulator (VR) of the CPU is increased when the server is under a working condition of a maximum pressure for a long time.
The cost is increased by only increasing the Power Stage chip Power specification. Therefore, under the condition that the Power specification and the cost are not increased, the protection of a server CPU Power supply under large current is limited to abnormal working states such as overcurrent protection and short-circuit protection at present, and under the condition that the server is in high-load working for a long time, the CPU load current is overlarge, the overcurrent protection is usually executed in a mode of cutting off the CPU load current, the overcurrent protection effect is poor, the service life of a Power Stage chip is greatly shortened or damaged easily, and the server is crashed, the chip is burnt and even the risk of burning the board is caused.
Disclosure of Invention
The invention provides a power supply protection method and a power supply protection device of a central processing unit and the central processing unit, which are used for solving the defect of poor over-current protection effect caused by frequent interruption of a load current of the central processing unit in the prior art.
The invention provides a power supply protection method of a central processing unit, which comprises the following steps:
receiving a load current output by an electronic fuse chip;
under the condition that the load current is determined to be greater than or equal to the current threshold, sending a closing control signal to the electronic fuse chip so that the electronic fuse chip can cut off the output current of the central processing unit according to the closing control signal and then transmit the residual load current to a rear-end capacitor for discharging and supplying;
the current value output by the rear-end capacitor is smaller than the current threshold, and the current threshold is determined according to the capacity value of the rear-end capacitor.
According to the power protection method of the central processing unit provided by the invention, before receiving the load current output by the electronic fuse chip, the method further comprises the following steps:
determining a voltage reduction interval and voltage reduction duration based on the voltage test waveform output by the rear-end capacitor;
determining the current threshold based on the voltage reduction interval, the voltage reduction duration and the capacity value of the back-end capacitor, and writing the current threshold;
the voltage test waveform is a test voltage output by the rear-end capacitor when the continuous discharge is carried out in the process that the dynamic load current of the central processing unit is increased to the rated maximum value; the voltage reduction interval is composed of a first test voltage and a second test voltage, and the voltage reduction duration is the duration corresponding to the process that the dynamic load current of the central processing unit of the rear-end capacitor is reduced to the rated maximum value by the second test voltage to the first test voltage.
According to the power protection method of the central processing unit provided by the invention, after the writing of the current threshold, the method further comprises the following steps:
acquiring a target voltage based on a voltage verification waveform output by the rear-end capacitor;
determining the current threshold as a verification pass if it is determined that the target voltage is greater than or equal to a first test voltage;
the voltage verification waveform is verification voltage output by the rear-end capacitor when the continuous discharge is carried out in the process that the dynamic load current of the central processing unit is increased to the rated maximum value; the target voltage is the verification voltage read after the voltage verification waveform is at the second test voltage and after the voltage reduction duration.
According to the power protection method of the central processing unit provided by the invention, after the voltage verification waveform output by the rear-end capacitor is obtained, the method further comprises the following steps:
obtaining a minimum verification voltage based on the voltage verification waveform;
in the event that it is determined that the minimum verify voltage is greater than or equal to a voltage threshold, determining the current threshold as verify pass.
According to the power protection method of the central processing unit provided by the invention, after receiving the load current output by the electronic fuse chip, the method further comprises the following steps:
and under the condition that the load current is determined to be smaller than the current threshold, sending an adjustment control signal to the electronic fuse chip so that the electronic fuse chip can discharge and supply according to the adjustment control signal.
According to the power protection method of the central processing unit provided by the invention, the closing control signal is a pulse width modulation signal.
The invention also provides a power supply protection device of the central processing unit, which comprises:
the current monitoring module is used for receiving the load current output by the electronic fuse chip;
the overcurrent protection module is used for sending a closing control signal to the electronic fuse chip under the condition that the load current is determined to be greater than or equal to a current threshold so that the electronic fuse chip can cut off the output current of the central processing unit according to the closing control signal and then transmit the residual load current to the rear-end capacitor for discharging and supplying;
and the current value output by the rear-end capacitor is smaller than the current threshold, and the current threshold is determined according to the capacity value of the rear-end capacitor.
The invention also provides a central processing unit, which comprises an electronic fuse chip and a control chip, wherein the control chip is used for executing the power supply protection method of any one of the central processing units;
the electronic fuse chip is used for outputting load current to the control chip based on the output current of the central processing unit body;
the control chip is used for sending a closing control signal to the electronic fuse chip under the condition that the load current is determined to be greater than or equal to a current threshold so that the electronic fuse chip can cut off the output current of the central processing unit according to the closing control signal and then transmit the residual load current to the rear-end capacitor for discharging and supplying;
and the current value output by the rear-end capacitor is smaller than the current threshold, and the current threshold is determined according to the capacity value of the rear-end capacitor.
The invention also provides an electronic device, which comprises a memory, a processor and a computer program which is stored on the memory and can run on the processor, wherein when the processor executes the program, the power protection method of the central processing unit is realized.
The present invention also provides a non-transitory computer-readable storage medium having stored thereon a computer program which, when executed by a processor, implements a power protection method for a central processing unit as described in any of the above.
The method and the device for protecting the power supply of the central processing unit and the central processing unit provided by the invention have the advantages that based on the real-time collection of the load current output by the electronic fuse chip, when the load current is monitored to be larger than or equal to the current threshold, the input current of the electronic fuse chip is turned off by utilizing the closing control signal, and the current output capacity of the power supply is limited in a manner of transmitting the residual load current inside to the rear-end capacitor for discharging and supplying. The current limiting circuit can limit the current of the power level chip when the CPU is in a high-pressure working environment, thereby avoiding the phenomenon that the service life of the chip is greatly reduced due to frequent turn-off of output voltage in the prior art, optimizing the over-current protection effect and reducing the fault rate of the whole machine.
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In order to more clearly illustrate the technical solutions of the present invention or the prior art, the drawings needed for the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and those skilled in the art can also obtain other drawings according to the drawings without creative efforts.
Fig. 1 is a schematic flow chart of a power protection method for a central processing unit according to the present invention;
FIG. 2 is a second schematic flow chart of the power protection method for a CPU according to the present invention;
fig. 3 is a schematic structural diagram of a power protection device for a central processing unit according to the present invention;
FIG. 4 is a schematic structural diagram of a CPU provided in the present invention;
fig. 5 is a schematic structural diagram of an electronic device provided in the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention clearer, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings, and it is obvious that the described embodiments are some, but not all embodiments of the present invention. All other embodiments, which can be obtained by a person skilled in the art without inventive step based on the embodiments of the present invention, are within the scope of protection of the present invention.
The terms "first," "second," and the like in this application are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It will be appreciated that the data so used may be interchanged under appropriate circumstances such that embodiments of the application are capable of operation in sequences other than those illustrated or described herein, and that the terms "first," "second," etc. are generally used in a generic sense and do not limit the number of terms, e.g., a first term can be one or more than one.
It is to be understood that the terminology used in the description of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used in this application, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.
The terms "comprises" and "comprising" indicate the presence of the described features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
Fig. 1 is a schematic flow diagram of a power protection method for a central processing unit according to the present invention. As shown in fig. 1, a method for protecting a power supply of a central processing unit according to an embodiment of the present invention includes: and step 101, receiving a load current output by the electronic fuse chip.
It should be noted that the execution main body of the power protection method for a central processing unit provided in the embodiment of the present invention is a power protection device for a central processing unit.
Before step 101, in a high-load working environment, the server may increase an inductive current of a Central Processing Unit (CPU) in which the Power protection device of the CPU is located, so that a Power Stage (Power Stage) chip and an Electronic Fuse (EFUSE) chip built in the Power Stage chip in a CPU motherboard increase discharge, and output a larger load current to an integrated circuit on which the Power protection device of the CPU operates.
Specifically, in step 101, the power protection device of the central processing unit monitors the EFUSE chip in real time, and reads the currently output load current.
And 102, under the condition that the load current is determined to be greater than or equal to the current threshold, sending a closing control signal to the electronic fuse chip so that the electronic fuse chip can cut off the output current of the central processing unit according to the closing control signal and then transmit the rest load current to a rear-end capacitor for discharging and supplying.
The current value output by the rear-end capacitor is smaller than the current threshold, and the current threshold is determined according to the capacity value of the rear-end capacitor.
It should be noted that the current threshold refers to a threshold set for the load current output by the EFUSE chip. The current threshold may be the maximum average discharge current of the back-end capacitor allowed by the CPU board, so that the output voltage (or current) is continuously reduced after the discharge of the back-end capacitor, and a preliminary current limiting is performed. When the discharge capacity of the rear-end capacitor reaches a certain value, the output Voltage enters Under-Voltage Protection (UVP), and the power chip triggers and turns off the output Voltage.
Specifically, in step 102, the power protection device of the central processing unit compares the load current collected in real time with a pre-designed current threshold:
if the load current is greater than or equal to the current threshold, that is, it indicates that the workload of the CPU is close to saturation, it is necessary to issue a shutdown control signal to the EFUSE chip to actively limit the current output capability of the EFUSE chip.
The EFUSE chip receives and responds to the closing control signal, the output current of the central processing unit is cut off, the internal residual load current is transmitted to the rear-end capacitor only through the EFUSE chip, the rear-end capacitor is triggered to discharge and supply, the final output voltage is continuously reduced by the discharge of the rear-end capacitor, and therefore the output load current of the EFUSE chip is always lower than a current threshold.
If the load current is smaller than the current threshold, that is, the workload of the CPU is not saturated, the EFUSE chip does not need to be switched on and off, and the EFUSE chip can be operated with the current output capability.
Fig. 2 is a second schematic flow chart of the power protection method of the cpu provided in the present invention. As shown in fig. 2, an embodiment of the present invention provides a specific implementation of a power protection method for a central processing unit:
when the server is in a long-time high-load working condition, the load current of the CPU can be increased, under the influence of the load current, the Power Stage chip in the CPU mainboard and the built-in EFUSE chip increase discharge, when the current value output by the EFUSE chip is increased to a preset current threshold, the EFUSE chip is controlled to be closed, an input energy source is cut off, and only the energy stored in the EFUSE chip is transmitted to a rear-end capacitor to discharge so as to reduce the output voltage. Until the discharge capacity of the capacitor reaches a certain value, the output voltage triggers the under-voltage protection, and the power supply chip can turn off the output voltage to realize the current-limiting function.
The embodiment of the invention is based on real-time acquisition of the load current output by the electronic fuse chip, when the load current is monitored to be greater than or equal to the current threshold, the input current of the electronic fuse chip is turned off by utilizing the closing control signal, and the current output capacity of the power supply is limited by transmitting the residual load current inside to the rear-end capacitor for discharging and supplying. The power level chip can be subjected to current limiting under the condition that the CPU is in a high-pressure working environment, the phenomenon that the service life of the chip is greatly reduced due to frequent switching-off of output voltage in the prior art is avoided, the over-current protection effect is optimized, and the fault rate of the whole machine is reduced.
On the basis of any one of the above embodiments, before receiving the load current output by the electronic fuse chip, the method further includes: and determining a voltage reduction interval and voltage reduction duration time based on the voltage test waveform output by the rear-end capacitor.
The voltage test waveform is the test voltage output by the rear-end capacitor when the continuous discharge is carried out in the process that the dynamic load current of the central processing unit is increased to the rated maximum value. The voltage reduction interval is composed of a first test voltage and a second test voltage, and the voltage reduction duration is the duration corresponding to the process that the dynamic load current of the central processing unit of the rear-end capacitor is reduced to the rated maximum value by the second test voltage to the first test voltage.
Before step 101, the power protection device of the CPU needs to simulate the operation of the server in a high load environment by pulling the dynamic load current of the CPU to a rated maximum value, and capture a voltage test waveform.
The voltage test waveform is the distribution condition of the test voltage output by the rear-end capacitor along with the change of time when the voltage drop test is performed on the rear-end capacitor.
Specifically, the power protection device of the central processing unit analyzes a partial waveform of the voltage test waveform in which the rear-end capacitor continuously discharges at a high level at which the load current is the rated maximum value, and when the test voltage value output by the rear-end capacitor drops to the second test voltage at a certain moment, the time required for continuing to drop to the first test voltage is taken as the voltage drop duration.
The start point and the end point (namely the first test voltage and the second test voltage) corresponding to the voltage reduction interval are defined for voltage reduction test according to the industry standard.
And determining the current threshold based on the voltage reduction interval, the voltage reduction duration and the capacity value of the rear-end capacitor, and writing the current threshold.
Specifically, the power protection device of the central processing unit converts the test voltage output by the rear-end capacitor from the second test voltage to the first test voltage for a duration by using a known capacitor calculation formula and a known current calculation formula, uses the current released based on the capacitance value of the rear-end capacitor as a current threshold, and writes the current threshold into an integrated circuit on which the power protection device of the central processing unit operates.
The current threshold calculation process is not specifically limited in the embodiments of the present invention. Illustratively, taking the second test voltage involved in the voltage drop test as 1.591 volts (Volt, V) and the first test voltage as 1.58V as an example, according to industry standards, the current threshold is calculated as follows:
in order to simulate the operation of a server in a high-load environment, the dynamic load current of a CPU is increased from 108 amperes (Ampere, A) to a rated maximum value 550A, and the voltage reduction duration is determined to be 300 nanoseconds (ns) according to a partial voltage test waveform corresponding to the fact that the voltage output by a back-end capacitor at the high level of 550A is reduced from 1.591V to 1.58V.
The known capacitance calculation formula is:
C＝Q/V
wherein, C is the capacity value of the back-end capacitor, Q is the charge quantity of the back-end capacitor, and V is the voltage value output by the back-end capacitor.
And the current calculation formula is:
I＝Q/T
wherein, I is the current value output by the rear-end capacitor, Q is the charge quantity of the rear-end capacitor, and T is the voltage reduction duration.
Then, in the process that the voltage output by the back-end capacitor is reduced from 1.591V to 1.58V, the average discharge current of the back-end capacitor is:
I＝C(1.591V-1.58V)/300ns
therefore, when the voltage of 300ns after the voltage drops to 1.591V is larger than 1.58V, knowing the back end capacitance capacity C of the CPU mainboard, the maximum average discharge current I of the back end capacitance allowed by the mainboard can be calculated.
Thus, the theoretical current threshold I of the motherboard L The calculation formula of (c) is:
I L ＝550A-I
according to the embodiment of the invention, based on the voltage test waveform captured by performing the voltage reduction test on the rear-end capacitor, the corresponding voltage reduction duration in the voltage reduction interval is determined, and the current threshold is obtained by converting the voltage reduction interval, the voltage reduction duration and the capacity value of the rear-end capacitor. And then when the load current is monitored to be larger than or equal to the current threshold, the current output capacity of the power supply is limited by utilizing the closing control signal. The method can pre-calculate a proper current threshold in a simulation environment that the CPU works under high pressure so as to limit the current of the power level chip in practical application, avoid the phenomenon that the service life of the chip is greatly reduced due to frequent switching-off of output voltage in the prior art, and optimize the over-current protection effect.
On the basis of any of the above embodiments, after the writing the current threshold, the method further includes: and acquiring a target voltage based on the voltage verification waveform output by the rear-end capacitor.
The voltage verification waveform is verification voltage output by the rear-end capacitor when the continuous discharge is carried out in the process that the dynamic load current of the central processing unit is increased to the rated maximum value. The target voltage is a verification voltage read after the voltage verification waveform is at the second test voltage and after the voltage reduction duration.
It should be noted that, after the power supply protection device of the central processing unit calculates the current threshold, the current threshold needs to be verified, and similarly, the working process of the server in the high-load environment is simulated by pulling the dynamic load current of the CPU to the rated maximum value, and a voltage verification waveform is captured.
The voltage verification waveform is the distribution condition of the verification voltage output by the rear-end capacitor along with the change of time when the voltage drop test is performed on the rear-end capacitor under a given current threshold.
Specifically, the power protection device of the central processing unit analyzes a partial waveform of the voltage verification waveform in which the rear-end capacitor continuously discharges at a high level at which the load current is the rated maximum value, and when the verification voltage value output by the rear-end capacitor is reduced to a second test voltage at a certain moment, the verification voltage value correspondingly read after the voltage reduction duration is taken as a target voltage.
And determining the current threshold as verification passing under the condition that the target voltage is determined to be greater than or equal to a first test voltage.
Specifically, the power protection device of the central processing unit compares the target voltage with a first test voltage:
if the target voltage is greater than or equal to the first test voltage, that is, the current threshold set at present meets the step-down test standard, the current threshold is determined to be verified, and a subsequent power supply protection method can be executed by using the current threshold.
If the target voltage is less than the first test voltage, namely, the current threshold set at present is not satisfied with the step-down test standard, the current threshold is judged to be failed in verification, the current threshold written originally is erased in an integrated circuit depended on by a power supply protection device of the central processing unit, and the current threshold recalculated is utilized for updating until the new current threshold passes verification and then the subsequent power supply protection method is continuously executed.
According to the embodiment of the invention, based on the voltage verification waveform captured when the calculated current threshold is verified, the target voltage corresponding to the voltage reduction duration after the second test voltage is applied is determined, and whether the current threshold passes the verification is judged by judging whether the target voltage is greater than or equal to the first test voltage. And then when the load current is monitored to be larger than or equal to the current threshold, the current output capacity of the power supply is limited by utilizing the closing control signal. The method can be used for verifying after calculating a proper current threshold in a simulation environment that the CPU works under high pressure so as to limit the current of the power level chip in practical application, thereby avoiding the phenomenon that the service life of the chip is greatly reduced due to frequent switching-off of output voltage in the prior art and optimizing the over-current protection effect.
On the basis of any of the above embodiments, after obtaining the voltage verification waveform output by the back-end capacitor, the method further includes: based on the voltage verification waveform, a minimum verification voltage is obtained.
Specifically, the power protection device of the central processing unit may further perform another verification method, which reads the corresponding minimum verification voltage from the verification waveform using one or more sets of voltages.
Determining the current threshold as verification pass if it is determined that the minimum verification voltage is greater than or equal to a voltage threshold.
Specifically, the power protection device of the central processing unit compares the minimum verification voltage with a voltage threshold:
if the minimum verification voltage is greater than or equal to the voltage threshold, that is, the current threshold set at present meets the step-down test standard, the current threshold is determined to be verified, and a subsequent power supply protection method can be executed by using the current threshold.
If the minimum verification voltage is smaller than the voltage threshold, namely the current threshold set at present does not meet the step-down test standard, the current threshold is judged to be failed in verification, the current threshold written in originally is erased in an integrated circuit depended on by a power supply protection device of the central processing unit, the current threshold calculated again is used for updating, and the subsequent power supply protection method is continuously executed until the new current threshold passes verification.
The verification method adopted by the power supply protection device of the central processing unit in the embodiment of the invention is not particularly limited.
Preferably, the power protection device of the central processing unit performs verification by using both the target voltage and the minimum verification voltage, and the specific implementation process thereof is as follows:
writing the calculated current threshold into an integrated circuit on which a power supply protection device of the central processing unit operates, pulling and loading the dynamic current of the central processing unit from 108A to 550A by using a 10% duty ratio and a slope of 1081A/us, and reading a target voltage corresponding to 300ns after the high-level voltage of the current is reduced to 1.591V, so as to judge whether the target voltage is greater than 1.58V.
In addition, phase-cut current is pulled to I by measuring VCCIN phase-cut current from second phase to first phase L * (1-5%) dynamic current (5% is the current threshold I allowed by the recommendation L Current detection error) of the voltage waveform, and capturing the voltage verification waveform 1000 times, and reading whether the minimum verification voltage is greater than 1.83-I L *(1-5％)*VCCIN_RLL。
Where VCCIN _ RLL is a load line (LoadLine) standard set for VCCIN.
If the tests meet the requirements and a margin of more than 5mv is left, the current threshold is set properly, and if the measured minimum verification voltage is lower than the required voltage threshold, the current threshold is increased properly until the requirements are met.
The embodiment of the invention reads the minimum verification voltage based on the voltage verification waveform captured when verifying the calculated current threshold, and judges whether the current threshold passes the verification by judging whether the minimum verification voltage meets the condition that the minimum verification voltage is larger than or equal to the voltage threshold. And further, when the load current is monitored to be larger than or equal to the current threshold, the current output capacity of the power supply is limited by utilizing the closing control signal. The method can be used for verifying after calculating a proper current threshold in a simulation environment that a CPU works under high pressure so as to limit the current of a power level chip in practical application, avoid the phenomenon that the service life of the chip is greatly reduced due to frequent switching-off of output voltage in the prior art, and optimize the over-current protection effect.
On the basis of any of the above embodiments, when it is determined that the load current is smaller than the current threshold, an adjustment control signal is sent to the electronic fuse chip, so that the electronic fuse chip performs discharge supply according to the adjustment control signal.
Specifically, after step 101, if the load current of the power protection device of the central processing unit is smaller than the current threshold, that is, it indicates that the workload of the CPU is not saturated, the power protection device only needs to issue an adjustment control signal to the EFUSE chip to actively perform adaptive adjustment on the current output capability of the EFUSE chip.
The EFUSE chip receives and responds to the adjustment control signal, and carries out discharging supply according to the power demand indicated in the adjustment control signal, so that the final output voltage is matched with the power demand.
The embodiment of the invention is based on real-time acquisition of the load current output by the electronic fuse chip, and when the load current is monitored to be smaller than the current threshold, the output current of the electronic fuse chip is matched with the power consumption requirement by utilizing the adjustment control signal. The load state of the CPU can be monitored through the current threshold, so that the output current can be adaptively adjusted according to the power consumption requirement when the load is not saturated, and the operation energy efficiency of the whole machine is reduced.
On the basis of any of the above embodiments, the turn-off control signal is a pulse width modulation signal.
Specifically, the shutdown control signal generated by the power protection device of the cpu when it is determined that the load current is greater than or equal to the current threshold is a control signal encoded by using a Pulse Width Modulation (PWM) technique.
The embodiment of the invention converts the analog signal into the digital signal by using the pulse width modulation technology, controls the switch of the electronic fuse chip by the closing control signal after the digital-to-analog conversion, can minimize the current harmonic distortion rate and maximize the voltage utilization rate in the control process, and further improves the execution efficiency of power protection.
Fig. 3 is a schematic structural diagram of a power protection device for a central processing unit according to the present invention. On the basis of any of the above embodiments, as shown in fig. 3, the apparatus includes a current monitoring module 310 and an over-current protection module 320, wherein:
and a current monitoring module 310 for receiving the load current output by the electronic fuse chip.
The overvoltage protection module 320 is configured to send a closing control signal to the electronic fuse chip when it is determined that the load current is greater than or equal to the current threshold, so that the electronic fuse chip cuts off the output current of the central processing unit according to the closing control signal, and then transmits the remaining load current to the rear-end capacitor for discharge supply.
And the current value output by the rear-end capacitor is smaller than the current threshold, and the current threshold is determined according to the capacity value of the rear-end capacitor.
Specifically, the current monitoring module 310 and the over-current protection module 320 are electrically connected in sequence.
The current monitoring module 310 monitors the EFUSE chip in real time and reads the currently output load current.
The over-current protection module 320 compares the load current collected in real time with a pre-designed current threshold:
if the load current is greater than or equal to the current threshold, that is, the workload of the CPU is close to saturation, a shutdown control signal needs to be issued to the EFUSE chip to actively limit the current output capability thereof.
The EFUSE chip receives and responds to a closing control signal, the output current of the central processing unit is cut off, the internal residual load current is transmitted to the rear-end capacitor only by the EFUSE chip, the rear-end capacitor is triggered to discharge and supply, the final output voltage is continuously reduced by the discharge of the rear-end capacitor, and therefore the output load current of the EFUSE chip is always lower than a current threshold.
Optionally, the apparatus further comprises a test waveform grabbing module and a current threshold calculation module, wherein:
and the test waveform grabbing module is used for determining a voltage reduction interval and voltage reduction duration based on the voltage test waveform output by the rear-end capacitor.
And the current threshold calculation module is used for determining the current threshold based on the voltage reduction interval, the voltage reduction duration and the capacity value of the back-end capacitor, and writing the current threshold.
The voltage test waveform is the test voltage output by the rear-end capacitor when the continuous discharge is carried out in the process that the dynamic load current of the central processing unit is increased to the rated maximum value. The voltage reduction interval is composed of a first test voltage and a second test voltage, and the voltage reduction duration is the duration corresponding to the process that the dynamic load current of the central processing unit of the rear-end capacitor is reduced to the rated maximum value by the second test voltage to the first test voltage.
Optionally, the apparatus further comprises a first verification waveform grabbing module and a first verification module, wherein:
and the first verification waveform grabbing module is used for acquiring a target voltage based on the voltage verification waveform output by the rear-end capacitor.
The first verification module is used for judging that the current threshold passes verification under the condition that the target voltage is determined to be larger than or equal to a first test voltage.
The voltage verification waveform is verification voltage output by the rear-end capacitor when the continuous discharge is carried out in the process that the dynamic load current of the central processing unit is increased to the rated maximum value. The target voltage is the verification voltage read after the voltage verification waveform is at the second test voltage and after the voltage reduction duration.
Optionally, the apparatus further comprises a second verification waveform grabbing module and a second verification module, wherein:
and the second verification waveform grabbing module is used for acquiring the minimum verification voltage based on the voltage verification waveform.
A second verification module to determine that the current threshold passes verification if the minimum verification voltage is determined to be greater than or equal to a voltage threshold.
Optionally, the apparatus further comprises a current adjustment module, wherein:
and the current adjusting module is used for sending an adjusting control signal to the electronic fuse chip under the condition that the load current is determined to be smaller than the current threshold so as to supply the electronic fuse chip with discharge according to the adjusting control signal.
Optionally, the close control signal is a pulse width modulation signal.
The power protection device for a central processing unit according to the embodiments of the present invention is used to implement the power protection method for a central processing unit according to the embodiments of the present invention, and the implementation manner of the power protection device for a central processing unit is consistent with the implementation manner of the power protection method for a central processing unit according to the present invention, and the same beneficial effects can be achieved, and details are not described herein again.
The embodiment of the invention is based on real-time acquisition of the load current output by the electronic fuse chip, when the load current is monitored to be greater than or equal to the current threshold, the input current of the electronic fuse chip is turned off by utilizing the closing control signal, and the current output capacity of the power supply is limited in a manner of transmitting the residual load current inside to the rear-end capacitor for discharging and supplying. The current limiting circuit can limit the current of the power level chip when the CPU is in a high-pressure working environment, thereby avoiding the phenomenon that the service life of the chip is greatly reduced due to frequent turn-off of output voltage in the prior art, optimizing the over-current protection effect and reducing the fault rate of the whole machine.
Fig. 4 is a schematic structural diagram of a cpu provided in the present invention. On the basis of any of the above embodiments, as shown in fig. 4, the central processing unit provided in the embodiment of the present invention includes an electronic fuse chip 410 and a control chip 420, where the control chip 420 is used for executing a power protection method of the central processing unit.
The electronic fuse chip 410 is configured to output a load current to the control chip 420 based on an output current of the central processing unit.
The control chip 420 is configured to send a closing control signal to the electronic fuse chip 410 when it is determined that the load current is greater than or equal to a current threshold, so that after the electronic fuse chip 410 cuts off an output current of the central processing unit according to the closing control signal, the remaining load current is transmitted to the rear-end capacitor for discharge supply;
the current value output by the rear-end capacitor is smaller than the current threshold, and the current threshold is determined according to the capacity value of the rear-end capacitor.
Specifically, the central processing unit is provided with a control chip 420 for controlling the on/off of the electronic fuse chip 410, in addition to the body thereof.
In a high-load working environment, the server increases an inductive current of a Central Processing Unit (CPU) in which the Power protection device of the CPU is located, so that a Power Stage (Power Stage) chip and an Electronic Fuse (EFUSE) chip 410 built in the Power Stage chip in a CPU motherboard increase discharge, and output a larger load current to a control chip 420 on which the Power protection device of the CPU operates.
The control chip 420 compares the load current collected in real time with a pre-designed current threshold:
if the load current is greater than or equal to the current threshold, that is, the workload of the CPU is close to saturation, a shutdown control signal needs to be issued to the EFUSE chip 410 to actively limit the current output capability thereof.
The EFUSE chip 410 receives and responds to the closing control signal, the output current of the central processing unit is turned off, only the EFUSE chip 410 transmits the internal residual load current to the rear-end capacitor, the rear-end capacitor is triggered to discharge and supply, so that the final output voltage and the rear-end capacitor discharge and continuously decrease, and the output load current of the EFUSE chip 410 is always lower than the current threshold.
It is understood that the control chip in the embodiment of the present invention may also perform power protection on the electronic fuse chip embedded in other components.
The embodiment of the invention is based on real-time acquisition of the load current output by the electronic fuse chip, when the load current is monitored to be greater than or equal to the current threshold, the input current of the electronic fuse chip is turned off by utilizing the closing control signal, and the current output capacity of the power supply is limited by transmitting the residual load current inside to the rear-end capacitor for discharging and supplying. The power level chip can be subjected to current limiting under the condition that the CPU is in a high-pressure working environment, the phenomenon that the service life of the chip is greatly reduced due to frequent switching-off of output voltage in the prior art is avoided, the over-current protection effect is optimized, and the fault rate of the whole machine is reduced.
Fig. 5 illustrates a physical structure diagram of an electronic device, which may include, as shown in fig. 5: a processor (processor) 510, a communication Interface (Communications Interface) 520, a memory (memory) 530 and a communication bus 540, wherein the processor 510, the communication Interface 520 and the memory 530 communicate with each other via the communication bus 540. The processor 510 may call logic instructions in the memory 530 to perform a method of power protection for a central processor, the method comprising: receiving a load current output by an electronic fuse chip; under the condition that the load current is determined to be larger than or equal to the current threshold, sending a closing control signal to the electronic fuse chip so that the electronic fuse chip can cut off the output current of the central processing unit according to the closing control signal and then transmit the residual load current to a rear-end capacitor for discharging and supplying; and the current value output by the rear-end capacitor is smaller than the current threshold, and the current threshold is determined according to the capacity value of the rear-end capacitor.
In addition, the logic instructions in the memory 530 may be implemented in the form of software functional units and stored in a computer readable storage medium when the logic instructions are sold or used as a stand-alone product. Based on such understanding, the technical solution of the present invention or a part thereof which substantially contributes to the prior art may be embodied in the form of a software product, which is stored in a storage medium and includes several instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes.
In another aspect, the present invention also provides a computer program product, the computer program product including a computer program, the computer program being storable on a non-transitory computer readable storage medium, wherein when the computer program is executed by a processor, the computer is capable of executing the power protection method for a central processing unit provided by the above methods, the method including: receiving load current output by an electronic fuse chip; under the condition that the load current is determined to be greater than or equal to the current threshold, sending a closing control signal to the electronic fuse chip so that the electronic fuse chip can cut off the output current of the central processing unit according to the closing control signal and then transmit the residual load current to a rear-end capacitor for discharging and supplying; and the current value output by the rear-end capacitor is smaller than the current threshold, and the current threshold is determined according to the capacity value of the rear-end capacitor.
In still another aspect, the present invention also provides a non-transitory computer-readable storage medium having stored thereon a computer program, which when executed by a processor, implements a power protection method for a central processing unit provided by the above methods, the method including: receiving load current output by an electronic fuse chip; under the condition that the load current is determined to be greater than or equal to the current threshold, sending a closing control signal to the electronic fuse chip so that the electronic fuse chip can cut off the output current of the central processing unit according to the closing control signal and then transmit the residual load current to a rear-end capacitor for discharging and supplying; the current value output by the rear-end capacitor is smaller than the current threshold, and the current threshold is determined according to the capacity value of the rear-end capacitor.
The above-described embodiments of the apparatus are merely illustrative, and the units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one position, or may be distributed on multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of the present embodiment. One of ordinary skill in the art can understand and implement it without inventive effort.
Through the above description of the embodiments, those skilled in the art will clearly understand that each embodiment may be implemented by software plus a necessary general hardware platform, and may also be implemented by hardware. With this understanding in mind, the above-described technical solutions may be embodied in the form of a software product, which can be stored in a computer-readable storage medium such as ROM/RAM, magnetic disk, optical disk, etc., and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute the methods described in the embodiments or some parts of the embodiments.
Finally, it should be noted that: the above examples are only intended to illustrate the technical solution of the present invention, but not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.
Claims (10)
1. A power protection method of a central processing unit is characterized by comprising the following steps:
receiving a load current output by an electronic fuse chip;
under the condition that the load current is determined to be greater than or equal to the current threshold, sending a closing control signal to the electronic fuse chip so that the electronic fuse chip can cut off the output current of the central processing unit according to the closing control signal and then transmit the residual load current to a rear-end capacitor for discharging and supplying;
and the current value output by the rear-end capacitor is smaller than the current threshold, and the current threshold is determined according to the capacity value of the rear-end capacitor.
2. The power protection method of claim 1, further comprising, before receiving the load current output by the electronic fuse chip:
determining a voltage reduction interval and voltage reduction duration based on the voltage test waveform output by the rear-end capacitor;
determining the current threshold based on the voltage reduction interval, the voltage reduction duration and the capacity value of the back-end capacitor, and writing the current threshold;
the voltage test waveform is a test voltage output by the rear-end capacitor when the continuous discharge is carried out in the process that the dynamic load current of the central processing unit is increased to the rated maximum value; the voltage reduction interval is composed of a first test voltage and a second test voltage, and the voltage reduction duration is the duration corresponding to the process that the dynamic load current of the central processing unit of the rear-end capacitor is reduced to the rated maximum value by the second test voltage to the first test voltage.
3. The method of claim 2, further comprising, after said writing said current threshold:
acquiring a target voltage based on a voltage verification waveform output by the rear-end capacitor;
determining the current threshold as a verification pass if it is determined that the target voltage is greater than or equal to a first test voltage;
the voltage verification waveform is verification voltage output by the rear-end capacitor when the continuous discharge is carried out in the process that the dynamic load current of the central processing unit is increased to the rated maximum value; the target voltage is the verification voltage read after the voltage verification waveform is at the second test voltage and after the voltage reduction duration.
4. The method according to claim 3, further comprising, after obtaining the voltage verification waveform outputted by the back-end capacitor:
obtaining a minimum verification voltage based on the voltage verification waveform;
determining the current threshold as verification pass if it is determined that the minimum verification voltage is greater than or equal to a voltage threshold.
5. The power protection method of claim 1, further comprising, after receiving the load current output by the electronic fuse chip:
and under the condition that the load current is determined to be smaller than the current threshold, sending an adjustment control signal to the electronic fuse chip so that the electronic fuse chip can discharge and supply according to the adjustment control signal.
6. The power protection method of claim 1, wherein the shutdown control signal is a pulse width modulation signal.
7. A power supply protection device of a central processing unit, comprising:
the current monitoring module is used for receiving the load current output by the electronic fuse chip;
the overcurrent protection module is used for sending a closing control signal to the electronic fuse chip under the condition that the load current is determined to be greater than or equal to a current threshold so that the electronic fuse chip can cut off the output current of the central processing unit according to the closing control signal and then transmit the residual load current to the rear-end capacitor for discharging and supplying;
and the current value output by the rear-end capacitor is smaller than the current threshold, and the current threshold is determined according to the capacity value of the rear-end capacitor.
8. A central processing unit comprising an electronic fuse chip and a control chip, wherein the control chip is configured to perform the power protection method of the central processing unit according to any one of claims 1 to 6;
the electronic fuse chip is used for outputting load current to the control chip based on the output current of the central processing unit body;
the control chip is used for sending a closing control signal to the electronic fuse chip under the condition that the load current is determined to be greater than or equal to a current threshold so that the electronic fuse chip can cut off the output current of the central processing unit according to the closing control signal and then transmit the residual load current to the rear-end capacitor for discharging and supplying;
and the current value output by the rear-end capacitor is smaller than the current threshold, and the current threshold is determined according to the capacity value of the rear-end capacitor.
9. An electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, wherein the processor implements the power protection method of the cpu according to any one of claims 1 to 6 when executing the program.
10. A non-transitory computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the power protection method of the cpu according to any one of claims 1 to 6.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211711074.7A CN115951772A (en) | 2022-12-29 | 2022-12-29 | Power supply protection method and device of central processing unit and central processing unit |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202211711074.7A CN115951772A (en) | 2022-12-29 | 2022-12-29 | Power supply protection method and device of central processing unit and central processing unit |
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| CN202211711074.7A Pending CN115951772A (en) | 2022-12-29 | 2022-12-29 | Power supply protection method and device of central processing unit and central processing unit |
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