CN115941179A - Method for realizing password conversion on ASIC chip - Google Patents
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Abstract
The invention relates to the technical field of password transformation, in particular to a method for realizing password transformation on an ASIC chip. The method comprises the steps of establishing a password change overall process, storing password transformation rules, constructing a password transformation model, realizing a password rule command transformation function according to the password transformation model and realizing a plurality of rule command continuous transformation functions by using a multi-stage production line. The invention effectively reduces the huge difference between the password transmission speed and the calculation speed by using the rule transformation; under the condition of the same calculated amount, the bandwidth occupied by password input is greatly reduced, and the communication pressure in the working process of the chip can be effectively relieved; meanwhile, the flexibility of the password dictionary is improved, and the success rate of password decoding can be obviously improved.
Description
Technical Field
The invention relates to the technical field of password transformation, in particular to a method for realizing password transformation on an ASIC chip.
Background
Password cracking is an important group branch of password cracking, most encryption keys are obtained by directly or indirectly calculating passwords at present, an ASIC chip is used for realizing the password cracking function, and the password cracking device has a series of advantages of high integration level, high cracking speed, low power consumption and the like; but the method is limited by the limitations of chip area, power consumption, design complexity and the like, and the problems of insufficient flexibility of using the password, overlarge difference between the password transmission speed and the calculation speed and the like exist in the chip.
In the software level, input passwords are subjected to programmable rule transformation, and assuming that the number of rules is N, each input password can generate N new passwords which have the same basic information but play an important role in actual password deciphering: the password decoding rate is effectively improved under the condition of increasing a certain amount of calculation.
The rule transformation function is realized on the ASIC password decoding chip, so that the difference between the password transmission speed and the calculation speed is relieved; secondly, the flexibility of password deciphering application is expanded; and thirdly, the bandwidth required by password transmission is reduced, and if N rules are transmitted, the actually generated password quantity is N times of the password transmission quantity.
Disclosure of Invention
The present invention is directed to a method for implementing password transformation on an ASIC chip to solve the problems set forth in the background art.
To achieve the above object, there is provided a method for implementing password transformation on an ASIC chip, comprising the steps of:
s1, formulating a password change overall process;
s2, storing password transformation rules;
s3, constructing a password transformation model;
s4, a password rule command conversion function is realized according to the password conversion model;
and S5, realizing a continuous transformation function of a plurality of rule commands by using a multistage assembly line.
As a further improvement of the technical solution, the process establishing method in S1 includes the following steps:
s1.1, inputting the number of rules, and storing the input rules;
s1.2, inputting an initial password, and changing the password according to an input rule;
s1.3, judging whether the password is processed or not, and generating a conversion password after the initial password is processed;
and S1.4, judging whether the rule is changed completely, forming a new rule after the rule is changed completely, and changing the initial password according to the new rule.
As a further improvement of the technical solution, the storage method for storing the password transformation rule in S2 is as follows:
s2.1, making a corresponding rule;
and S2.2, the chip formulates a corresponding register for storing a corresponding rule.
As a further improvement of the technical solution, the method for constructing the password transformation model in S3 comprises the following steps:
s3.1, defining a password transformation command;
and S3.2, combining the password transformation command to generate a new rule.
As a further improvement of the present technical solution, the step of defining the password transformation command definition rule in S3.1 is as follows:
s3.1.1, naming the command for interface conversion;
s3.1.2, formulating a corresponding password conversion command format;
s3.1.3, making a corresponding input password;
and S3.1.4, formulating a corresponding output password.
As a further improvement of the technical solution, the implementation method for implementing the password rule command transformation function according to the password transformation model in S4 includes the following steps:
s4.1, determining a corresponding logic module according to each rule;
s4.2, storing the input password and the output password into a register, and storing the rule into another register;
and S4.3, determining the upper limit of the number of the commands supported by each rule according to the requirement.
As a further improvement of the technical solution, the logic module in S4.1 includes command selection logic, password end additional character logic, password end character deletion logic, password first insertion character logic, password first character deletion logic, letter case change logic, designated character replacement logic, and password overall repetition logic.
As a further improvement of the technical solution, the method for continuously transforming the rule command in S5 includes the following steps:
s5.1, determining rule transformation quantity according to a command combination mode;
and S5.2, removing the rules with poor effects according to the instruction use effect, and adding new rules.
Compared with the prior art, the invention has the beneficial effects that:
1. in the method for realizing the password conversion on the ASIC chip, the great difference between the password transmission speed and the calculation speed is effectively reduced by using the rule conversion; under the condition of the same calculated amount, the bandwidth occupied by password input is greatly reduced, and the communication pressure in the working process of the chip can be effectively relieved; meanwhile, the flexibility of the password dictionary is improved, and the success rate of password decoding can be obviously improved.
2. In the method for realizing password conversion on the ASIC chip, corresponding rules are formulated, and the input rules are specially stored by using a register in the chip, and are used for password conversion, and can be updated at any time according to scheduling requirements, so that the flexibility requirement is met; all passwords can be kept unchanged before processing is completed, and the requirement for reducing password transmission bandwidth is met.
Drawings
FIG. 1 is a flowchart illustrating the overall steps of the present invention;
FIG. 2 is a flow chart of a method of flow formulation of the present invention;
FIG. 3 is a flow chart of a storage method of the present invention;
FIG. 4 is a flow chart of a method of constructing a password transformation model of the present invention;
FIG. 5 is a flow chart of the define rule steps of the present invention;
FIG. 6 is a flow chart of an implementation of the present invention;
FIG. 7 is a flowchart of the method steps of the rule command continuous transformation of the present invention;
FIG. 8 is an overall flow chart of password conversion according to the present invention.
Detailed description of the preferred embodiments
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 1-8, a method for implementing password transformation on an ASIC chip is provided, which includes the following steps:
s1, formulating a password change overall process;
s2, storing password transformation rules;
s3, constructing a password transformation model;
s4, realizing a password rule command conversion function according to a password conversion model;
and S5, realizing a continuous conversion function of a plurality of rule commands by using a multi-stage pipeline.
When the method is used, firstly, a password change overall flow is formulated, batch rule conversion processing is carried out on batch passwords through password conversion, new passwords are generated and provided for a calculation core to use, a group of rules (assuming N numbers) are input into a chip, the group of conversion is completed for each input password, namely N new passwords are generated, password conversion rules are stored, a group of rules (assuming M numbers) are input into the chip before the password is changed, M rules are converted for each password, namely M x N new instructions are generated, meanwhile, M rules are stored through the chip, a password conversion model is constructed, the password conversion is a process of generating new passwords by changing the input password once or for many times through programmable commands, common password conversion commands are defined in advance, the rules can be directly called in the formulation process, the password rule command conversion function is realized according to the password conversion model, each rule command corresponds to one logic module, a multi-level pipeline is used for realizing a plurality of rule command continuous conversion functions, the logic of circuit design can be simplified, the complex functions can be realized, and the running frequency of the circuit is improved.
The invention effectively reduces the huge difference between the password transmission speed and the calculation speed by using the rule transformation; under the condition of the same calculated amount, the bandwidth occupied by password input is greatly reduced, and the communication pressure in the working process of the chip can be effectively relieved; meanwhile, the flexibility of the password dictionary is improved, and the success rate of password decoding can be obviously improved.
In addition, the flow making method in the S1 comprises the following steps:
s1.1, inputting the number of rules, and storing the input rules;
s1.2, inputting an initial password, and changing the password according to an input rule;
s1.3, judging whether the password is processed or not, and generating a conversion password after the initial password is processed;
and S1.4, judging whether the rule is changed completely, forming a new rule after the rule is changed completely, and changing the initial password according to the new rule.
When the method is used specifically, firstly, the number of rules is set, initial passwords are input, a rule change is carried out on each initial password, then whether the password is processed or not is judged, after the password is processed, a new password is output, then the rules are changed, and the rules are changed on the initial passwords until all the passwords complete all the rule changes.
Further, the storage method for storing the password transformation rule in S2 is as follows:
s2.1, making a corresponding rule;
and S2.2, the chip formulates a corresponding register for storing a corresponding rule.
When the intelligent password input device is used specifically, the input rules are specially stored in the register in the chip, and the rules are used for password conversion and can be updated at any time according to the scheduling requirement, so that the flexibility requirement is met; all passwords can be kept unchanged before processing is completed, and the requirement for reducing password transmission bandwidth is met.
Still further, the step of S3 constructing the password transformation model is as follows:
s3.1, defining a password transformation command;
and S3.2, combining the password transformation command to generate a new rule.
The password transformation is a process of generating a new password by changing an input password once or for many times through a programmable command, a group of commonly used and good-effect password transformation commands are defined by combining practical experience, the commonly used password transformation commands are stored, a rule can be directly called by only inputting a single password transformation command or a plurality of password transformation commands in the programming process at the later stage, in order to realize more complex rule transformation, a plurality of commands form a rule, all commands are sequentially executed in the executing process, and finally a transformation result is output, such as a command: the $ a $ b $ c $ d $ e realizes the function of converting the additional character "abcde" after the password is input, and the model can realize complex rule conversion due to the flexible and various combination of command quantity and rules.
Specifically, the step of defining the password transformation command definition rule in S3.1 is as follows:
s3.1.1, naming the command for interface conversion;
s3.1.2, formulating a corresponding password conversion command format;
s3.1.3, making a corresponding input password;
and S3.1.4, formulating a corresponding output password.
In the process of defining the password transformation command, firstly, distinguishing each password transformation command, establishing a corresponding password transformation command format for the password transformation command, matching each password transformation command with one password transformation command format, inputting the password transformation command format to call the matched password transformation command, then determining an input password and an output password according to the password transformation command, and storing and calling.
In addition, the implementation method for implementing the password rule command transformation function according to the password transformation model in the S4 comprises the following steps:
s4.1, determining a corresponding logic module according to each rule;
s4.2, storing the input password and the output password into a register, and storing the rule into another register;
and S4.3, determining the upper limit of the number of the commands supported by each rule according to the requirement.
In ASIC design, each rule command corresponds to a logic module, and an input password and an output password are stored in a register; the rules are stored in a set of registers, and the upper limit of the number of commands supported by each rule is determined as needed.
Further, the logic modules in S4.1 include command selection logic, password end additional character logic, password end character deletion logic, password first insertion character logic, password first character deletion logic, letter case change logic, designated character replacement logic, and password integral repetition logic. Wherein:
command selection logic: selecting a corresponding logic module according to the command (: [ ] ^ ultsd) by using a multiplexer (1 in 10);
password tail additional character logic: shifting the character to be appended (using a shift register) according to the length of the input password, then using a logic OR gate to realize that a specified character is appended to the data tail, and discarding the tail character when the result length reaches the upper limit;
delete password tail character logic: according to the length of the input password, deleting the tail characters of the decoration data by using a logic AND gate;
password prefix insertion character logic: using a shift register to realize the insertion of characters at the head of the password, and discarding the last character when the result length exceeds the limit;
delete password first character logic: implementing a delete password first character command using a shift register;
alternate letter case logic: for each input character, firstly judging whether the character is a Latin letter, and then carrying out case change according to a command;
replace designated character logic: judging whether each input character is a character needing to be replaced, if so, replacing the character with a new character, and using a comparator and a selector;
password ensemble repetition logic: the use of shift registers and logical OR gates enables the overall repetition of the password, discarding the extra characters when the result length exceeds a limit.
The password transformation command comparison is shown in the following table:
| command | Format | Example | Entering a password | Outputting a password |
| Keeping passwords unchanged | : | : | Abc1#Db | Abc1#Db |
| Additional characters at the end of password | $ character | $a | Abc1#Db | Abc1#Dba |
| Deleting password tail characters | ] | ] | Abc1#Db | Abc1#D |
| Password prefix insertion character | Lambda character | Lambda character | Abc1#Db | aAbc1#Db |
| Deleting the first character of the password | [ | [ | Abc1#Db | bc1#Db |
| All letters become large | u | u | Abc1#Db | ABC1#DB |
| All letters become small | l | l | Abc1#Db | abc1#db |
| All letter case interconversion | t | t | Abc1#Db | aBC1#dB |
| Replacing designated characters | s old character new character | sbX | Abc1#Db | AXc1#DX |
| Password ensemble repetition | d | d | Abc1#DbAbc1#DbAbc1#Db |
Password transformation command comparison table
Still further, the step of the rule command continuous transformation method in S5 is as follows:
s5.1, determining rule transformation quantity according to a command combination mode;
and S5.2, removing the rules with poor effects according to the instruction use effect, and adding new rules.
After the pipeline is full, a new password can be generated in each clock cycle, at least 300 clock cycles are needed for inputting a password externally, in order to realize more complicated rule transformation, a multi-stage pipeline is used in ASIC password rule transformation design, each stage of pipeline can execute a rule command, when a 6-stage pipeline is used, 6 commands can be executed, namely each rule is formed by combining 6 commands at most, in the method, 6 command combinations are provided, 10 commands are provided, wherein the insertion and replacement commands imply more transformation conditions (different characters are inserted, and the combination of the replaced and replaced characters), and the implemented password transformation rule exceeds 2 78 And the input rules are programmable, so that new rules can be continuously added and the rules with poor effect can be deleted in the application process, and the method is convenient and flexible.
The foregoing shows and describes the general principles, essential features, and advantages of the invention. It will be understood by those skilled in the art that the present invention is not limited to the embodiments described above, and the preferred embodiments of the present invention are described in the above embodiments and the description, and are not intended to limit the present invention. The scope of the invention is defined by the appended claims and equivalents thereof.
Claims (6)
1. A method for implementing password transformation on an ASIC chip, comprising the steps of:
s1, formulating a password change overall process;
s2, storing password transformation rules;
s3, constructing a password transformation model;
s4, realizing a password rule command conversion function according to a password conversion model;
s5, a multi-stage assembly line is used for realizing a continuous conversion function of a plurality of rule commands;
the process making method in the S1 comprises the following steps:
s1.1, inputting the number of rules, and storing the input rules;
s1.2, inputting an initial password, and changing the password according to an input rule;
s1.3, judging whether the password is processed or not, and generating a conversion password after the initial password is processed;
s1.4, judging whether the rule is changed completely, forming a new rule after the change is completed, and changing the initial password according to the new rule;
the storage method for storing the password transformation rule in the S2 comprises the following steps:
s2.1, making a corresponding rule;
and S2.2, the chip formulates a corresponding register for storing a corresponding rule.
2. The method of implementing password transformation on an ASIC chip of claim 1, wherein: the S3 password transformation model construction method comprises the following steps:
s3.1, defining a password transformation command;
and S3.2, combining the password transformation command to generate a new rule.
3. The method for implementing password transformation on ASIC chip of claim 2, wherein: the step of defining the password transformation command definition rule in the S3.1 comprises the following steps:
s3.1.1, naming the command for interface conversion;
s3.1.2, formulating a corresponding password conversion command format;
s3.1.3, making a corresponding input password;
and S3.1.4, formulating a corresponding output password.
4. The method of implementing password transformation on an ASIC chip of claim 1, wherein: the implementation method for implementing the command conversion function of the password rule according to the password conversion model in the S4 comprises the following steps:
s4.1, determining a corresponding logic module according to each rule;
s4.2, storing the input password and the output password to a register, and storing the rule to another register;
and S4.3, determining the upper limit of the number of the commands supported by each rule according to the requirement.
5. The method of implementing password transformation on ASIC chip of claim 4, wherein: the logic modules in the S4.1 comprise command selection logic, password tail additional character logic, password tail character deletion logic, password head character insertion logic, password first character deletion logic, letter case changing logic, designated character replacement logic and password integral repetition logic.
6. The method for implementing password transformation on ASIC chip of claim 1, wherein: the method for continuously transforming the rule command in the S5 comprises the following steps:
s5.1, determining rule transformation quantity according to a command combination mode;
and S5.2, removing the rules with poor effects according to the instruction use effect, and adding new rules.
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Denomination of invention: A Method for Implementing Password Transformation on ASIC Chips Effective date of registration: 20231008 Granted publication date: 20230516 Pledgee: Ji'nan finance Company limited by guarantee Pledgor: Shandong Rongan Intelligent Technology Co.,Ltd. Registration number: Y2023980060284 |