CN115940931A - High-precision interval response circuit - Google Patents
High-precision interval response circuit Download PDFInfo
- Publication number
- CN115940931A CN115940931A CN202211642127.4A CN202211642127A CN115940931A CN 115940931 A CN115940931 A CN 115940931A CN 202211642127 A CN202211642127 A CN 202211642127A CN 115940931 A CN115940931 A CN 115940931A
- Authority
- CN
- China
- Prior art keywords
- resistor
- operational amplifier
- circuit
- voltage
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
Landscapes
- Amplifiers (AREA)
Abstract
The high-precision interval response circuit comprises 3 parts of an interval setting circuit, a comparison and summation circuit and a result output circuit, wherein the interval setting circuit sets an upper limit voltage U by using resistance voltage division and an operational amplifier following function 1 And a lower limit voltage U 2 ，U 1 >U 2 (ii) a Comparison and summation circuit for comparing input voltage V in And upper limit voltage U 1 Lower limit voltage U 2 The output of the voltage comparison result is realized by utilizing an integrating circuit and a proportional amplifying circuit; the result output circuit can amplify the power of the signal type voltage transmitted by the preceding stage circuit, so that the preceding stage circuit has current driving capability and voltage holding capability not lower than 2 ms; when the input DC voltage V in Exceeds a preset upper limit voltage U 1 Or below the lower limit voltage U 2 When the circuit outputs a high-order voltage with driving capability, the value of the high-order voltage is approximately equal to the power supply voltage; when inputtingDC voltage V in Is located at U 1 And U 2 Within the range, the circuit output is zero. The invention has high precision, high speed and strong environmental adaptability.
Description
Technical Field
The invention belongs to the technical field of electronic circuits, and particularly relates to a high-precision interval response circuit which is suitable for judging and responding a direct-current voltage value in a certain range interval.
Background
In some electronic circuit applications, it is desirable that the circuit makes a judgment and a response to a dc voltage value within a certain range, so as to realize functions of driving a subsequent circuit or reporting status information to a computer, such as an airbag, a temperature alarm, and the like. In the prior art, a digital circuit is generally adopted to realize the function of interval voltage response, and the defects of low precision, low speed and weak environmental adaptability exist. There is therefore a need for improvements.
Disclosure of Invention
The technical problems solved by the invention are as follows: the invention provides a high-precision interval response circuit, which utilizes a pure analog circuit to realize the interval voltage response function and has the characteristics of high precision, high speed and strong environmental adaptability compared with the prior art.
In order to achieve the purpose, the invention adopts the technical scheme that:
a high-precision interval response circuit comprises 3 parts, namely an interval setting circuit, a comparison and summation circuit and a result output circuit, wherein the interval setting circuit utilizes resistance voltage division and an operational amplifier following function to set an upper limit voltage U 1 And a lower limit voltage U 2 ，U 1 >U 2 (ii) a Comparison and summation circuit for comparing input voltage V in And upper limit voltage U 1 Lower limit voltage U 2 The output of the voltage comparison result is realized by utilizing an integrating circuit and a proportional amplifying circuit; the result output circuit can amplify the power of the signal type voltage transmitted by the preceding stage circuit, so that the preceding stage circuit has current driving capability and voltage holding capability not lower than 2 ms;
when a DC voltage V is input in Exceeds a preset upper limit voltage U 1 Or below the lower limit voltage U 2 When the circuit outputs a high-order voltage with driving capability, the value of the high-order voltage is approximately equal to the power supply voltage; when the input DC voltage V in Is located at U 1 And U 2 Within the range, the circuit output is zero.
In a further limitation of the foregoing aspect, the interval setting circuit includes a resistor R1, a resistor R2, a resistor R3, a resistor R4, an operational amplifier A1, and an operational amplifier A2; wherein, the resistor R1, the resistor R2, the resistor R3 and the resistor R4 are sequentially connected in series with the power supply V cc Between the ground and the ground; the positive input end of the operational amplifier A1 is connected with the high potential end of the resistor R2, and the negative input end is connected with the output end; the positive input end of the operational amplifier A2 is connected with the high potential end of the resistor R4, and the negative input end is connected with the output end.
Further limiting to the above solution, the comparison and summation circuit includes a resistor R5, a resistor R6, a resistor R7, a resistor R8, a resistor R9, a resistor R10, a resistor R11, a resistor R12, a capacitor C1, a capacitor C2, an operational amplifier A3, an operational amplifier A4, and an operational amplifier A5; one end of the resistor R5 is connected with the input Vin, and the other end of the resistor R5 is connected with the positive input end of the operational amplifier A3; one end of the resistor R6 is connected with the output end of the operational amplifier A1, and the other end of the resistor R is connected with the reverse input end of the operational amplifier A3; one end of the resistor R7 is connected with the output end of the operational amplifier A2, and the other end of the resistor R is connected with the positive input end of the operational amplifier A4; one end of the resistor R8 is connected with the input Vin, and the other end of the resistor R8 is connected with the reverse input end of the operational amplifier A4; one end of the capacitor C1 is connected with the reverse input end of the operational amplifier A3, and the other end of the capacitor C1 is connected with the output end of the operational amplifier A3; one end of the capacitor C2 is connected with the reverse input end of the operational amplifier A4, and the other end of the capacitor C2 is connected with the output end of the operational amplifier A4; one end of the resistor R9 is connected with the output end of the operational amplifier A3, and the other end of the resistor R is connected with the positive input end of the operational amplifier A5; one end of the resistor R10 is connected with the output end of the operational amplifier A4, and the other end of the resistor R is connected with the positive input end of the operational amplifier A5; one end of the resistor R11 is connected with the reverse input end of the operational amplifier A5, and the other end of the resistor R is connected with the ground; one end of the resistor R12 is connected with the inverting input end of the operational amplifier A5, and the other end is connected with the output end of the operational amplifier A5.
To go upIn a further limitation of the above scheme, the result output circuit part comprises a capacitor C3, a resistor R13, a resistor R14, a resistor R15, a resistor R16, a resistor R17, an N-MOS transistor Q1 and a P-MOS transistor Q2; the resistor R13 is connected in series between the output end of the operational amplifier A5 and the grid electrode of the N-MOS tube Q1; the resistor R14 is connected between the grid of the N-MOS tube Q1 and the ground in series; the resistor R16 is connected between the source electrode of the N-MOS tube Q1 and the ground in series; the drain electrode of the N-MOS tube Q1 is connected with the grid electrode of the P-MOS tube Q2; the resistor R15 is connected in series with the grid of the P-MOS tube Q2 and the power supply V cc To (c) to (d); the source electrode of the P-MOS tube Q2 is connected with a power supply V cc (ii) a One end of the capacitor C3 is connected with the drain electrode of the P-MOS tube Q2, and the other end of the capacitor C3 is connected with the ground; one end of the resistor R17 is connected with the drain electrode of the P-MOS tube Q2, the other end of the resistor R is connected with the ground, and the drain electrode of the P-MOS tube Q2 is the output end of the circuit.
Preferably, the resistor R1, the resistor R2, the resistor R3 and the resistor R4 are all low-temperature drift resistors, and the temperature drift coefficients of the resistances of the resistor R1, the resistor R2, the resistor R3 and the resistor R4 are less than 30 ppm/DEG C.
Compared with the prior art, the invention has the advantages that:
1. the scheme utilizes a pure analog circuit to realize the function of judging and responding the direct current voltage value within a certain range interval when the direct current voltage V is input in Exceeds a preset upper limit voltage U 1 Or below the lower limit voltage U 2 Hour (U) 1 >U 2 ) The circuit outputs a high-order voltage with driving capability, and the value of the high-order voltage is approximately equal to the power supply voltage; when a DC voltage V is input in Is located at U 1 And U 2 When the current is within the range, the circuit output is zero; the circuit response precision is higher than 1mV, and compared with other schemes for realizing functions by using a digital circuit in the prior art, the circuit has the advantages of high precision, high speed and strong environmental adaptability;
2. the design principle of the scheme is simple and clear, the structure is simple, domestic devices can be selected for use for components, and the limitation of imported devices is eliminated.
Drawings
Fig. 1 is a schematic circuit diagram of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 1, an embodiment of the present invention is described in detail.
Example 1: a high-precision interval response circuit comprises 3 parts, namely an interval setting circuit, a comparison and summation circuit and a result output circuit.
The interval setting circuit sets the upper limit voltage U by using the resistance voltage division and the operational amplifier following function 1 And a lower limit voltage U 2 ，U 1 >U 2 (ii) a Comparison and summation circuit for comparing input voltage V in And upper limit voltage U 1 Lower limit voltage U 2 The output of the voltage comparison result is realized by utilizing an integrating circuit and a proportional amplifying circuit; the result output circuit performs power amplification on the signal type voltage transmitted by the preceding stage circuit, so that the preceding stage circuit has current driving capability and voltage holding capability not less than 2 ms;
when a DC voltage V is input in Exceeds a preset upper limit voltage U 1 Or below the lower limit voltage U 2 When the circuit outputs a high-order voltage with driving capability, the value of the high-order voltage is approximately equal to the power supply voltage; when the input DC voltage V in Is located at U 1 And U 2 Within the range, the circuit output is zero. The circuit response precision is higher than 1mV.
Example 2:
the interval setting circuit comprises a resistor R1, a resistor R2, a resistor R3, a resistor R4, an operational amplifier A1 and an operational amplifier A2; wherein, the resistor R1, the resistor R2, the resistor R3 and the resistor R4 are sequentially connected in series with the power supply V cc Between the ground and the ground; the positive input end of the operational amplifier A1 is connected with the high potential end of the resistor R2, and the negative input end is connected with the output end; the positive input end of the operational amplifier A2 is connected with the high potential end of the resistor R4, and the negative input end is connected with the high potential end of the resistor R4The input end is connected with the output end.
The comparison and summation circuit comprises a resistor R5, a resistor R6, a resistor R7, a resistor R8, a resistor R9, a resistor R10, a resistor R11, a resistor R12, a capacitor C1, a capacitor C2, an operational amplifier A3, an operational amplifier A4 and an operational amplifier A5; one end of the resistor R5 is connected with the input Vin, and the other end of the resistor R5 is connected with the positive input end of the operational amplifier A3; one end of the resistor R6 is connected with the output end of the operational amplifier A1, and the other end of the resistor R6 is connected with the reverse input end of the operational amplifier A3; one end of the resistor R7 is connected with the output end of the operational amplifier A2, and the other end of the resistor R is connected with the positive input end of the operational amplifier A4; one end of the resistor R8 is connected with the input Vin, and the other end of the resistor R8 is connected with the reverse input end of the operational amplifier A4; one end of the capacitor C1 is connected with the reverse input end of the operational amplifier A3, and the other end of the capacitor C1 is connected with the output end of the operational amplifier A3; one end of the capacitor C2 is connected with the reverse input end of the operational amplifier A4, and the other end of the capacitor C2 is connected with the output end of the operational amplifier A4; one end of the resistor R9 is connected with the output end of the operational amplifier A3, and the other end of the resistor R is connected with the positive input end of the operational amplifier A5; one end of the resistor R10 is connected with the output end of the operational amplifier A4, and the other end of the resistor R is connected with the positive input end of the operational amplifier A5; one end of the resistor R11 is connected with the reverse input end of the operational amplifier A5, and the other end of the resistor R is connected with the ground; one end of the resistor R12 is connected with the inverting input end of the operational amplifier A5, and the other end is connected with the output end of the operational amplifier A5.
The result output circuit comprises a capacitor C3, a resistor R13, a resistor R14, a resistor R15, a resistor R16, a resistor R17, an N-MOS transistor Q1 and a P-MOS transistor Q2; the resistor R13 is connected in series between the output end of the operational amplifier A5 and the grid electrode of the N-MOS tube Q1; the resistor R14 is connected between the grid of the N-MOS tube Q1 and the ground in series; the resistor R16 is connected between the source electrode of the N-MOS tube Q1 and the ground in series; the drain electrode of the N-MOS tube Q1 is connected with the grid electrode of the P-MOS tube Q2; the resistor R15 is connected in series with the grid of the P-MOS tube Q2 and the power supply V cc To (c) to (d); the source electrode of the P-MOS tube Q2 is connected with a power supply V cc (ii) a One end of the capacitor C3 is connected with the drain electrode of the P-MOS tube Q2, and the other end of the capacitor C3 is connected with the ground; what is needed isOne end of the resistor R17 is connected with the drain electrode of the P-MOS tube Q2, and the other end of the resistor R is connected with the ground; the drain electrode of the P-MOS tube Q2 is the output end of the circuit.
The resistor R1, the resistor R2, the resistor R3 and the resistor R4 are all low-temperature drift resistors, and the temperature drift coefficients of the resistances of the resistor R1, the resistor R2, the resistor R3 and the resistor R4 are less than 30 ppm/DEG C, so that the basic stability of the voltage value of the preset voltage when the ambient temperature changes is ensured.
The specific values are calculated as follows:
the power supply voltage was 15V.
U 1 ＝V cc ·(R2+R3+R4)/(R1+R2+R3+R4)
U 2 ＝V cc ·R4/(R1+R2+R3+R4)
R1, R2, R3 and R4 with different resistance values are selected to adjust the upper limit voltage U 1 And a lower limit voltage U 2 The setting is performed. Taking R1=100k Ω, R2=10k Ω, R3=20k Ω, R1=10k Ω, then:
U 1 ＝4V
U 2 ＝1V
let R5= R6= R7= R8=10k Ω, C1= C2=1nF.
When the input voltage V in >U 1 According to the principle of virtual short, the voltage of the inverting input end of the operational amplifier A3 is larger than U 1 The integrating circuit formed by it works in forward direction to saturate the output of operational amplifier A3 to a value of about 13.5V, and the voltage at the inverting input of operational amplifier A4 is equal to U 2 The integrating circuit composed of the two circuits works in reverse, so that the output of the operational amplifier A4 tends to be 0V. Taking R9= R10= R11=10k Ω and R12=15k Ω, the forward input terminal voltage of the operational amplifier A5 is about 6.75V, the proportional amplification factor is (R11 + R12)/R11 =2.5, and the output of the operational amplifier A5 is saturated, and its value is about 13.5V.
When the input voltage V in <U 2 According to the principle of virtual short, the voltage at the inverting input of the operational amplifier A4 is equal to U 2 The integrating circuit composed of it works in forward direction to saturate the output of the operational amplifier A4, its value is about 13.5V, the reverse input end voltage of the operational amplifier A3 is less than U 1 The integrating circuit composed of the two circuits works in reverse, so that the output of the operational amplifier A3 tends to be 0V. Then, the voltage at the forward input terminal of the operational amplifier A5 is about 6.75V, and the output of the operational amplifier A5 is saturated and has a value of about 13.5V.
When the input voltage U is 1 >V in >U 2 According to the principle of virtual short, the voltage of the inverting input end of the operational amplifier A3 is less than U 1 The integrating circuit composed of the circuit works reversely, so that the output of the operational amplifier A3 tends to 0V, and the voltage of the reverse input end of the operational amplifier A4 is equal to U 2 The integrating circuit composed of the operational amplifier A4 works reversely, so that the output of the operational amplifier A4 tends to be 0V. Then, the voltage at the positive input terminal of the operational amplifier A5 goes to 0V, and the output of the operational amplifier A5 goes to 0V.
The conduction condition of the N-MOS tube Q1 is V G1 -V S1 >4, and V G2 ＝V A5 R14/(R13 + R14), and the conduction condition of the PMOS transistor Q2 is V S2 -V G2 >4, and V G3 ≈V G2 And 4, after comprehensive consideration, determining that R13 is 15k omega, R14 is 10k omega, R15 is 100k omega, and R16 is 5k omega.
After the P-MOS tube Q2 is conducted, the voltage applied between the resistor R17, the capacitor C3 and the ground is about V cc The output of the final circuit is then about V cc Since the current allowed to pass through the MOS transistor is large, the voltage has driving capability. Let R17=50k Ω, C3=2.2 μ F, and by using Mulitisim simulation, it can be seen that the circuit can still provide a voltage of 14.8V or more after 2ms, proving that its output holding capability is not less than 2ms for the subsequent circuit with 50k Ω equivalent resistance. The capacitance C3 can be increased to improve the output holding capability of the circuit, but the response speed of the circuit is influenced, and comprehensive consideration is needed in practical application.
In addition, the positions of the upper and lower integrating circuits are changed, so that the circuit can be in U 1 >V in >U 2 Time-out high voltage at V in >U 1 Or V in <U 2 The function of outputting 0.
The invention realizes the function of interval voltage response by utilizing a pure analog circuit, and has the characteristics of high precision, high speed and strong environmental adaptability compared with the prior art.
It will be evident to those skilled in the art that the invention is not limited to the details of the foregoing illustrative embodiments, and that the present invention may be embodied in other specific forms without departing from the spirit or essential attributes thereof. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein, and any reference signs in the claims are not to be construed as limiting the claims.
Furthermore, it should be understood that although the present description refers to embodiments, not every embodiment may contain only a single embodiment, and such description is for clarity only, and those skilled in the art should integrate the description, and the embodiments may be combined as appropriate to form other embodiments understood by those skilled in the art.
Claims (5)
1. A high-precision interval response circuit is characterized in that: the circuit comprises 3 parts of an interval setting circuit, a comparison and summation circuit and a result output circuit, wherein the interval setting circuit sets an upper limit voltage U by using resistance voltage division and an operational amplifier following function 1 And a lower limit voltage U 2 ，U 1 >U 2 (ii) a Comparison and summation circuit for comparing input voltage V in And upper limit voltage U 1 Lower limit voltage U 2 The output of the voltage comparison result is realized by utilizing an integrating circuit and a proportional amplifying circuit; the result output circuit performs power amplification on the signal type voltage transmitted by the preceding stage circuit, so that the preceding stage circuit has current driving capability and voltage holding capability not less than 2 ms;
when a DC voltage V is input in Exceeds a preset upper limit voltage U 1 Or below the lower limit voltage U 2 When the circuit outputs a high-order voltage with driving capability, the value of the high-order voltage is approximately equal to the power supply voltage; when inputting direct currentPressure V in Is located at U 1 And U 2 Within the range, the circuit output is zero.
2. A high accuracy range response circuit according to claim 1, wherein: the interval setting circuit comprises a resistor R1, a resistor R2, a resistor R3, a resistor R4, an operational amplifier A1 and an operational amplifier A2; wherein, the resistor R1, the resistor R2, the resistor R3 and the resistor R4 are sequentially connected in series with the power supply V cc The ground; the positive input end of the operational amplifier A1 is connected with the high potential end of the resistor R2, and the negative input end is connected with the output end; the positive input end of the operational amplifier A2 is connected with the high potential end of the resistor R4, and the negative input end is connected with the output end.
3. A high accuracy range response circuit according to claim 2, wherein: the comparison and summation circuit comprises a resistor R5, a resistor R6, a resistor R7, a resistor R8, a resistor R9, a resistor R10, a resistor R11, a resistor R12, a capacitor C1, a capacitor C2, an operational amplifier A3, an operational amplifier A4 and an operational amplifier A5; one end of the resistor R5 is connected with the input Vin, and the other end of the resistor R5 is connected with the positive input end of the operational amplifier A3; one end of the resistor R6 is connected with the output end of the operational amplifier A1, and the other end of the resistor R6 is connected with the reverse input end of the operational amplifier A3; one end of the resistor R7 is connected with the output end of the operational amplifier A2, and the other end of the resistor R is connected with the positive input end of the operational amplifier A4; one end of the resistor R8 is connected with the input Vin, and the other end of the resistor R8 is connected with the reverse input end of the operational amplifier A4; one end of the capacitor C1 is connected with the reverse input end of the operational amplifier A3, and the other end of the capacitor C1 is connected with the output end of the operational amplifier A3; one end of the capacitor C2 is connected with the reverse input end of the operational amplifier A4, and the other end of the capacitor C2 is connected with the output end of the operational amplifier A4; one end of the resistor R9 is connected with the output end of the operational amplifier A3, and the other end of the resistor R is connected with the positive input end of the operational amplifier A5; one end of the resistor R10 is connected with the output end of the operational amplifier A4, and the other end of the resistor R is connected with the positive input end of the operational amplifier A5; one end of the resistor R11 is connected with the reverse input end of the operational amplifier A5, and the other end of the resistor R is connected with the ground; one end of the resistor R12 is connected with the inverting input end of the operational amplifier A5, and the other end is connected with the output end of the operational amplifier A5.
4. A high accuracy range response circuit according to claim 3, wherein: the result output circuit comprises a capacitor C3, a resistor R13, a resistor R14, a resistor R15, a resistor R16, a resistor R17, an N-MOS transistor Q1 and a P-MOS transistor Q2; the resistor R13 is connected in series between the output end of the operational amplifier A5 and the grid electrode of the N-MOS tube Q1; the resistor R14 is connected between the grid of the N-MOS tube Q1 and the ground in series; the resistor R16 is connected between the source electrode of the N-MOS tube Q1 and the ground in series; the drain electrode of the N-MOS tube Q1 is connected with the grid electrode of the P-MOS tube Q2; the resistor R15 is connected in series with the grid of the P-MOS tube Q2 and the power supply V cc To (c) to (d); the source electrode of the P-MOS tube Q2 is connected with a power supply V cc (ii) a One end of the capacitor C3 is connected with the drain electrode of the P-MOS tube Q2, and the other end of the capacitor C3 is connected with the ground; one end of the resistor R17 is connected with the drain electrode of the P-MOS tube Q2, and the other end of the resistor R is connected with the ground; and the drain electrode of the P-MOS tube Q2 is the output end of the circuit.
5. A high precision interval response circuit according to claim 4, wherein: the resistor R1, the resistor R2, the resistor R3 and the resistor R4 are all low-temperature drift resistors, and the temperature drift coefficients of the resistances of the resistor R1, the resistor R2, the resistor R3 and the resistor R4 are less than 30 ppm/DEG C.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211642127.4A CN115940931A (en) | 2022-12-20 | 2022-12-20 | High-precision interval response circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211642127.4A CN115940931A (en) | 2022-12-20 | 2022-12-20 | High-precision interval response circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN115940931A true CN115940931A (en) | 2023-04-07 |
Family
ID=86699054
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202211642127.4A Pending CN115940931A (en) | 2022-12-20 | 2022-12-20 | High-precision interval response circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN115940931A (en) |
-
2022
- 2022-12-20 CN CN202211642127.4A patent/CN115940931A/en active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN102981545B (en) | Band gap reference voltage circuit with high-order curvature compensation | |
| EP1145425A1 (en) | Amplifier | |
| CN108762367B (en) | Mixed adjustment type temperature compensation band gap reference circuit | |
| CN111665897B (en) | Voltage stabilizing power supply circuit with negative temperature coefficient | |
| CN107425845B (en) | Superposition operation circuit and floating voltage digital-to-analog conversion circuit | |
| CN117792093B (en) | Slope compensation and comparator circuit | |
| CN113504806A (en) | Current reference circuit, chip and electronic equipment | |
| CN115940931A (en) | High-precision interval response circuit | |
| CN116978428A (en) | Equivalent circuit of nonlinear memristor | |
| CN115357087B (en) | Band gap reference circuit | |
| CN111551864A (en) | High-precision bidirectional current detection circuit applied to battery charging and discharging and method thereof | |
| CN103744463B (en) | The variable reference power supply of dutycycle can be detected | |
| CN107342757B (en) | Power-on reset circuit based on improved band-gap reference structure | |
| CN115638888A (en) | Low-power consumption temperature sensor applied to MEMS clock | |
| CN209070402U (en) | A kind of floating voltage sample circuit | |
| US4211939A (en) | Operational amplifier with switching error elimination | |
| CN106253891B (en) | High-precision current-voltage conversion module for converting 4-20 mA into +/-10V | |
| CN216721291U (en) | PMOS tube switch control circuit with leakage protection | |
| CN112055294B (en) | Capacitive MEMS chip driving circuit, capacitive MEMS sensor and intelligent electronic equipment | |
| CN207457125U (en) | A kind of improvement circuit of toxic gas sensor detection circuit | |
| CN115840487A (en) | Voltage generation circuit with adjustable differential mode range and common mode level | |
| CN207115228U (en) | A kind of servo drive control feedback circuit | |
| CN117991860A (en) | Band gap reference voltage source based on chopper technique | |
| JPS5879317A (en) | Limiter circuit | |
| CN111475993A (en) | Memristor simulation model |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |