CN115939041A - Ultra-thin wafer cutting method based on laser-induced thermal decomposition precutting - Google Patents
Ultra-thin wafer cutting method based on laser-induced thermal decomposition precutting Download PDFInfo
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- CN115939041A CN115939041A CN202211679231.0A CN202211679231A CN115939041A CN 115939041 A CN115939041 A CN 115939041A CN 202211679231 A CN202211679231 A CN 202211679231A CN 115939041 A CN115939041 A CN 115939041A
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Abstract
The invention discloses an ultrathin wafer cutting method based on laser-induced thermal decomposition precutting, which is characterized in that before an ultrathin wafer is ground, a first groove is cut on the surface of a substrate by utilizing a laser-induced thermal decomposition precutting technology, metal objects and a dielectric layer on the surface of the wafer are removed, and the phenomenon of layering caused during later cutting is effectively prevented; then, performing half-cutting to form a second groove, and cutting to the middle position close to the substrate; then, film is pasted on the surface of the chip for protection, then half cutting is carried out on the back surface of the wafer through IR light transmission contraposition, the silicon wafer is half cut but not cut, and the integral structure of the wafer is kept; and grinding and thinning are carried out after cutting is finished, and then film expanding treatment is carried out to split the chip. The invention solves the problem of back bounce or back hidden crack caused by overlarge surface stress in the process of thinning and cutting the existing silicon wafer with the thickness of less than 100 mu m, and greatly improves the packaging yield.
Description
[ technical field ] A method for producing a semiconductor device
The invention belongs to the technical field of chip packaging, and particularly relates to a laser-induced thermal decomposition precutting-based ultrathin wafer cutting method.
[ background of the invention ]
With the development of the manufacturing technology node of the integrated circuit chip, the chip manufacturing technology following moore's law is gradually approaching to the physical limit, and accordingly, the cost performance of the chip is increasingly poor.
Ultra-thin wafer processing of semiconductors has become more popular and thinner for integrated circuit sub-28 nm processing. The chip and the chip can realize interconnection of multilayer circuits and stacking of multiple circuit layers, facing the process procedure below 28nm, in order to reduce the problems of coupling and digital crosstalk between the chips, a low-k (low dielectric) material needs to be added in the manufacturing of the IC chip, but the adhesion between the low-k material and the silicon substrate is low, the phenomena of film separation, breaking and the like are easy to occur when the traditional cutting method is used, the complexity and difficulty of wafer cutting are further increased, and the problem of abnormal cutting is obviously more complicated.
In the traditional process, a silicon substrate surface is thinned by using grinding equipment, and then a wafer pattern surface is cut along a cutting channel by using a diamond cutter, so that chips are separated from a wafer independently to form single chips. However, as the thickness of the wafer becomes thinner and thinner, the wafer has a very large warpage stress and is prone to stress deformation after being ground for a wafer below 100um, and since the wafer is too thin, a large risk of cracking exists during film pasting before cutting. In addition, when a diamond cutter is used for cutting, when a hard metal blade passes through the silicon-based composite material under the condition that the rotation speed and the cutting speed of a main shaft of the cutting machine are fixed, metal chips in a cutting channel generate large heat, the metal chips are wrapped on the diamond blade, the feeding speed is too high, the cutting deviation and the risk of cutter breakage are inevitably caused, the yield of chips is easily reduced, and the interlayer layering phenomenon of the metal layers is easily caused when an ultrathin low-dielectric-constant wafer is cut; therefore, the mechanical cutting method is no longer suitable for silicon-based materials, glass and third-generation semiconductor materials below 100 um.
In the prior art, patent publication No. CN115020339A discloses a method for cutting a wafer, which processes the wafer by cutting first and then thinning, and specifically includes:
1) Arranging a cutting channel on the front surface of the wafer;
2) Cutting the wafer along the cutting path according to the preset cutting thickness by adopting laser;
3) Sticking a fixed film on the front surface of the wafer;
4) Thinning the back of the wafer until the thickness of the wafer is consistent with the target thickness;
5) And adhering a scribing film on the thinned surface, and stripping the fixed film on the front surface of the wafer to obtain a plurality of chips to finish cutting.
The cutting method is a single cutting mode, a target thickness is cut by laser at one time, then grinding is carried out for thinning, when a chip is very thin, after the chip is ground to the target thickness, scribing film pasting is carried out, the wafer needs to be taken, and a large risk of cracking exists in the process of taking and the subsequent film pasting; after grinding, on one hand, the single chips are not connected, the integrity of the wafer is kept only by the upper protective adhesive film, and the adhesive film is made of a flexible material, so that the whole polished wafer is poor in smoothness, the chips are easy to extrude and rub, and particularly the edge collapse phenomenon occurs at the corner, so that the chips are poor; on the other hand, for a chip with a very thin thickness, the chip with the target thickness after grinding is very thin, and the internal stress is large, so that subsequent film pasting and even film expanding operations cannot be performed.
Therefore, there is a need to provide a new ultra-thin wafer dicing method based on laser-induced thermal decomposition pre-cutting to solve the above problems.
[ summary of the invention ]
The invention mainly aims to provide a laser-induced thermal decomposition precutting-based ultrathin wafer cutting method, which solves the problems of back bounce or back hidden crack caused by overlarge surface stress in the conventional thinning and cutting process of silicon wafers with the thickness of less than 100 microns and greatly improves the packaging yield.
The invention realizes the purpose through the following technical scheme: an ultrathin wafer cutting method based on laser-induced thermal decomposition precutting, wherein the wafer comprises a substrate layer and a plurality of chips arranged on the substrate layer in an array mode, and the cutting method comprises the following steps:
s1, adhering a first adhesive film to the back of a wafer;
s2, pre-cutting the front surface of the wafer according to a set cutting path by utilizing a laser-induced thermal decomposition technology, and forming a first groove on the substrate layer;
s3, performing first half-cutting treatment on the groove bottom of the first groove along the set cutting path to a first depth, and forming a second groove at the groove bottom of the first groove; the first depth is less than or equal to half of the thickness of the substrate layer;
s4, adhering a second adhesive film on the front surface of the wafer to cover the chip;
s5, tearing off the first adhesive film;
s6, aligning the back surface of the wafer to the second groove, performing second half-cutting treatment along the set cutting path, and cutting to a second depth, wherein the sum of the first depth and the second depth is smaller than the total thickness of the substrate layer;
s7, thinning the back of the wafer;
s8, pasting a third adhesive film on the thinned surface;
s9, tearing off the second adhesive film;
and S10, carrying out film expansion treatment on the wafer to realize chip separation.
Compared with the prior art, the laser-induced thermal decomposition precutting ultrathin wafer cutting method has the beneficial effects that: before the ultra-thin wafer is ground, a first groove is cut on the surface of the substrate by utilizing a laser induced thermal decomposition pre-cutting technology, metal objects and a dielectric layer on the surface of the wafer are removed, and the phenomenon of layering caused by cutting in the later stage is effectively prevented; then, performing half cutting to form a second groove, and cutting to a middle position close to the substrate; film-pasting protection is carried out on the surfaces of the chips, half-cutting is carried out on the back surface of the wafer through IR light transmission contraposition, the silicon wafer is half-cut but not cut through, and two adjacent chips are connected together through a connecting section on the substrate layer to keep the overall structure of the wafer; grinding and thinning are carried out after cutting is finished, and the thinned wafer still keeps an integral structure, so that the risk of cracking in the process of integrally picking up and pasting the film on the wafer is reduced; sticking a blue film on the bottom of the substrate after thinning, designing the subsequent film expanding treatment into a cutting process, and utilizing the film expanding process to crack and break the connecting section to realize chip separation; the cutting method solves the problem of back bounce or back hidden crack caused by overlarge surface stress in the existing silicon wafer thinning and cutting process below 100 mu m, and greatly improves the packaging yield.
[ description of the drawings ]
FIG. 1 is a schematic structural diagram of an embodiment of the present invention;
FIG. 2 is a flow chart of a fabrication process according to an embodiment of the present invention;
FIGS. 3a-3k are schematic views illustrating structural changes in the fabrication process of a wafer package according to an embodiment of the invention;
the figures in the drawings represent:
100-a wafer;
1-a substrate layer; 2-chip;
10-a first adhesive film; 20-a first groove; 30-a second groove; 40-a second adhesive film; 50-a third groove; 60-a connecting segment; 70-a third adhesive film; 80-a film expanding machine.
[ detailed description ] embodiments
In the following description, for purposes of explanation and not limitation, specific details are set forth, such as particular system structures, techniques, etc. in order to provide a thorough understanding of the embodiments of the present application. It will be apparent, however, to one skilled in the art that the present application may be practiced in other embodiments that depart from these specific details. In other instances, detailed descriptions of well-known systems, devices, circuits, and methods are omitted so as not to obscure the description of the present application with unnecessary detail.
The technical solutions provided in the present application are explained in detail below with reference to specific examples.
Referring to fig. 1, fig. 1 is a schematic structural diagram of a wafer 100 to be cut according to the present embodiment, where the wafer 100 includes a substrate layer 1 and a plurality of chips 2 arranged on the substrate layer 1 in an array, and the wafer 100 has a front surface and a back surface that are arranged oppositely.
Referring to fig. 2, the present embodiment is a laser induced thermal decomposition precutting ultra-thin wafer dicing method, which includes the following steps:
s1, a first adhesive film 10 is adhered to the back surface of the wafer 100, as shown in fig. 3 a.
S2, performing precutting on the front side of the wafer 100 according to a set cutting path by utilizing laser-induced pyrolysis, and forming a first groove 20 on the substrate layer 1; the cross section of the first groove 20 is in a trapezoidal structure with a wide upper part and a narrow lower part; the depth of the first groove 20 is 5-25 um as shown in fig. 3 b.
In step S2, the metal and the dielectric layer (such as silicon nitride, silicon oxide, or silicon oxynitride stack) are thermally decomposed on the surface of the wafer by using laser with a predetermined wavelength, and the metal and the dielectric layer are removed, so that the depth of the first groove 20 should extend to the bottom of the dielectric layer of the wafer 100.
S3, performing first half-cutting treatment on the groove bottom of the first groove 20 along the set cutting path to a first depth, and forming a second groove 30 at the groove bottom of the first groove 20; the first depth is the distance from the upper surface of the substrate layer 1 to the bottom of the second groove 30; the first depth is less than or equal to half the thickness of the substrate layer 1; the width of the second groove 30 is less than or equal to the width of the groove bottom of the first groove 20, as shown in fig. 3 c.
In step S3, the first half-cutting process may be laser cutting or cutting with a mechanical cutter. Because the first groove 20 exists, a condition is provided for cutting by adopting a mechanical cutter in the first half-cutting treatment, and the diamond cutter can extend into the first groove 20, so that the risk of edge breakage, layering and other phenomena is reduced.
Through the molding of the second groove 30, the wafer cutting stress can be released, so that the risk of cracking caused by stress during subsequent film pasting is reduced.
And S4, adhering a second adhesive film 40 on the front surface of the wafer 100 to cover the chip 2 and protect the chip from being scratched, as shown in FIG. 3 d.
S5, the first adhesive film 10 on the back surface of the wafer is torn off, as shown in FIG. 3 e.
And S6, carrying out second half-cutting treatment on the back surface of the wafer 100 along the set cutting path in an alignment manner with the second groove 30, cutting to a second depth, and forming a third groove 50 on the lower surface of the substrate layer 1, wherein the sum of the first depth and the second depth is smaller than the total thickness of the substrate layer 1.
In the step S5, the wafer is cut but not cut, so that the substrate layers 1 at the bottoms of two adjacent chips 2 are connected together through a connecting segment 60, and the integrity of the wafer 100 is ensured.
The second half-cut process may be laser cutting or cutting with a mechanical knife, as shown in fig. 3 f. During the second half-cut process, the back surface of the wafer can be aligned by the transmitted light so that the cutting laser or the cutting tool can be precisely aligned with the second groove 30 and perform the cutting operation along the set cutting path.
S7, thinning the back of the wafer 100: and grinding the back surface of the substrate layer 1 to reduce thickness, and grinding the back surface to 80-100 um from the initial thickness, as shown in figure 3 g.
And S8, adhering a third adhesive film 70 on the thinned surface of the back surface of the wafer for protection, as shown in FIG. 3 h.
S9, the second adhesive film 40 on the chip 2 is removed to expose the chip 2, as shown in fig. 3 i.
And S10, performing film expanding treatment on the wafer 100 by using a film expanding machine 80, as shown in FIG. 3j, disconnecting the connecting sections 60 between the substrate layers 1 at the bottoms of two adjacent chips 2, and realizing separation of a single chip, as shown in FIG. 3 k. Applying up-down high-frequency vibration acting force to the bottom of the wafer substrate through a film expanding machine, so that the connecting section 60 is broken by top crack, and chip crack is realized; meanwhile, the gap between two adjacent chips 2 can be increased, and subsequent grain removing operation is facilitated.
The embodiment of the invention provides a laser-induced thermal decomposition precutting-based ultrathin wafer cutting method, which effectively reduces the occurrence of abnormal back bounce or back hidden crack caused by overlarge wafer surface stress during cutting, thereby improving the yield of packaged products.
What has been described above are merely some embodiments of the present invention. It will be apparent to those skilled in the art that various changes and modifications can be made without departing from the inventive concept thereof, and these changes and modifications can be made without departing from the spirit and scope of the invention.
Claims (8)
1. A cutting method of an ultrathin wafer based on laser-induced thermal decomposition precutting is disclosed, wherein the wafer comprises a substrate layer and a plurality of chips arranged on the substrate layer in an array mode, and the cutting method is characterized in that: the cutting method comprises the following steps:
s1, adhering a first adhesive film to the back of a wafer;
s2, pre-cutting the front surface of the wafer according to a set cutting path by utilizing a laser-induced thermal decomposition technology, and forming a first groove on the substrate layer;
s3, performing first half-cutting treatment on the groove bottom of the first groove along the set cutting path to a first depth, and forming a second groove on the groove bottom of the first groove, wherein the first depth is less than or equal to half of the thickness of the substrate layer;
s4, adhering a second adhesive film to the front surface of the wafer to cover the chip;
s5, tearing off the first adhesive film;
s6, aligning the back surface of the wafer to the second groove, performing second half-cutting treatment along the set cutting path, and cutting to a second depth, wherein the sum of the first depth and the second depth is smaller than the total thickness of the substrate layer;
s7, thinning the back of the wafer;
s8, pasting a third adhesive film on the thinned surface;
s9, tearing off the second adhesive film;
and S10, carrying out film expansion treatment on the wafer to realize chip separation.
2. The laser-induced thermal decomposition precut ultra-thin wafer dicing method of claim 1, wherein: the cross section of the first groove is of a trapezoidal structure with a wide upper part and a narrow lower part.
3. The method for cutting ultrathin wafer based on laser-induced thermal decomposition precutting as claimed in claim 1 or 2, wherein: of said first recess the depth is 5-25 um.
4. The method for cutting ultrathin wafer based on laser-induced thermal decomposition precutting as claimed in claim 1 or 2, wherein: the depth of the first groove is extended to the bottom of the medium layer of the wafer.
5. The laser-induced thermal decomposition precut ultra-thin wafer dicing method of claim 1, wherein: the first depth is a distance from an upper surface of the substrate layer to a bottom of the second groove.
6. The laser-induced thermal decomposition precut-based ultra thin wafer dicing method of claim 1 or 5, wherein: the width of the second groove is smaller than or equal to the width of the groove bottom of the first groove.
7. The laser-induced thermal decomposition precut ultra-thin wafer dicing method of claim 1, wherein: and after the step S6 is finished, the substrate layers at the bottoms of two adjacent chips are connected together through a connecting section.
8. The laser-induced thermal decomposition precut ultra thin wafer dicing method of claim 1, wherein: the cutting in the step S3 and the step S6 is a laser cutting or a mechanical cutter cutting.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202211679231.0A CN115939041A (en) | 2022-12-26 | 2022-12-26 | Ultra-thin wafer cutting method based on laser-induced thermal decomposition precutting |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117727694A (en) * | 2024-02-07 | 2024-03-19 | 立芯精密智造(昆山)有限公司 | Wafer cutting method |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117727694A (en) * | 2024-02-07 | 2024-03-19 | 立芯精密智造(昆山)有限公司 | Wafer cutting method |
| CN117727694B (en) * | 2024-02-07 | 2024-04-26 | 立芯精密智造(昆山)有限公司 | Wafer cutting method |
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