CN115938937A - Semiconductor structure and preparation method thereof - Google Patents
Semiconductor structure and preparation method thereof Download PDFInfo
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Abstract
The invention provides a semiconductor structure and a preparation method thereof, wherein the preparation method of the semiconductor structure comprises the steps of etching a metal layer to form a patterned metal layer, cleaning and hydroxylating the patterned metal layer by adopting plasma of mixed gas, and performing an atomic layer deposition process by using the assistance of the plasma, so that a compact aluminum oxide layer can be formed on the side wall of the patterned metal layer, the galvanic corrosion problem of the metal layer in the subsequent wet cleaning process can be avoided, holes can be prevented from being formed on the side wall of the metal layer, and the reliability of the semiconductor structure is improved.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to a semiconductor structure and a preparation method thereof.
Background
In the existing preparation method of the semiconductor structure, wet cleaning is needed after the AlCu metal layer is etched, and during the wet cleaning, due to the existence of Cu, galvanic corrosion of Al can be accelerated, so that holes are formed on the side wall of the AlCu metal layer, and further, the problem of failure of electric mobility test (EM) of the semiconductor structure and reduction of reliability are caused.
Although the sidewalls of the AlCu metal layer of the prior art may be due to the O-containing 2 The ashing process of (1) forms Al 2 O 3 Thin film, but the Al 2 O 3 The film is not dense, and is easy to damage in the subsequent wet cleaning process, and the AlCu metal layer can not be well protected, so that galvanic corrosion still occurs in the subsequent wet cleaning process on the AlCu metal layer, and side wall holes are caused.
Disclosure of Invention
The invention aims to provide a semiconductor structure and a preparation method thereof, which are used for avoiding galvanic corrosion of a metal layer in a wet cleaning process, preventing the side wall of the metal layer from generating holes and improving the reliability of the semiconductor structure.
In order to achieve the above objects and other related objects, the present invention provides a method for fabricating a semiconductor structure, comprising the steps of:
providing a substrate, and sequentially forming a metal layer and a patterned photoresist layer on the substrate, wherein the metal layer is made of AlCu;
etching the metal layer by taking the patterned photoresist layer as a mask to form a patterned metal layer;
cleaning and hydroxylating the patterned metal layer by using plasma of mixed gas;
forming an aluminum oxide layer on sidewalls of the patterned metal layer using a plasma-assisted atomic layer deposition process;
and carrying out wet cleaning on the structure after the aluminum oxide layer is formed.
Optionally, in the method for manufacturing a semiconductor structure, the plasma of the mixed gas includes a plasma of a mixed gas composed of carbon tetrafluoride, water vapor, and oxygen.
Optionally, in the method for manufacturing a semiconductor structure, a process temperature of the plasma-assisted atomic layer deposition process is not higher than 50 ℃.
Optionally, in the method for manufacturing a semiconductor structure, the reaction raw materials of the plasma-assisted atomic layer deposition process include a precursor and an oxidant, the precursor includes TMA, and the oxidant includes H 2 O and O 2 At least one of (a).
Optionally, in the method for manufacturing a semiconductor structure, the step of forming an aluminum oxide layer on the sidewall of the patterned metal layer by using a plasma-assisted atomic layer deposition process includes: and generating plasma by using a microwave ECR (electron cyclotron resonance) device, and performing atomic layer deposition under the plasma condition to form the aluminum oxide layer.
Optionally, in the method for manufacturing the semiconductor structure, the thickness of the aluminum oxide layer is 1nm to 10nm.
Optionally, in the method for manufacturing a semiconductor structure, the base includes a substrate and a barrier layer located on the substrate, the metal layer is located on the barrier layer, and after the step of forming the aluminum oxide layer, the method for manufacturing a semiconductor structure further includes: and etching the barrier layer by taking the patterned metal layer and the aluminum oxide layer as masks to form the patterned barrier layer.
Optionally, in the method for manufacturing a semiconductor structure, the step of etching the metal layer with the patterned photoresist layer as a mask, the step of cleaning and hydroxylating the patterned metal layer with the plasma of the mixed gas, the step of forming an aluminum oxide layer on the sidewall of the patterned metal layer with the plasma-assisted atomic layer deposition process, and the step of etching the barrier layer with the patterned metal layer and the aluminum oxide layer as masks are all completed in the same dry etching machine.
Optionally, in the method for manufacturing a semiconductor structure, after the step of forming the patterned barrier layer, the method for manufacturing a semiconductor structure further includes: and removing the patterned photoresist layer by adopting an ashing process.
In order to achieve the above objects and other related objects, the present invention also provides a semiconductor structure prepared by the above method.
Compared with the prior art, the technical scheme of the invention has the following beneficial effects:
according to the invention, after the metal layer is etched to form the patterned metal layer, the patterned metal layer is cleaned and hydroxylated by adopting the plasma of the mixed gas, and the atomic layer deposition process is carried out by the aid of the plasma, so that a compact aluminum oxide layer can be formed on the side wall of the patterned metal layer, the galvanic corrosion problem of the metal layer in the wet cleaning process can be avoided, and further, the holes on the side wall of the metal layer can be avoided, and the electrical property and the reliability of the semiconductor structure can be improved.
In addition, the invention utilizes microwave ECR equipment to generate plasma, and carries out atomic layer deposition of the alumina layer under the condition of the plasma, and the existence of the plasma ensures that the invention can form the alumina layer under the low-temperature environment, the process is simple and easy to implement, and the application range of the material of the substrate can be expanded, so that the material of the substrate is not limited by the temperature.
In addition, the etching step of the metal layer, the cleaning and hydroxylation step of the metal layer, the deposition process of the aluminum oxide layer and the etching step of the barrier layer can be finished in the same dry etching machine, extra equipment is not required to be added, and the process cost can be reduced.
Drawings
FIG. 1 is a schematic diagram of a product structure formed according to step S03 in a method for fabricating a semiconductor structure according to the prior art;
fig. 2 is a schematic diagram of a product structure formed according to step S04 in a method for manufacturing a semiconductor structure in the prior art;
fig. 3 is a schematic diagram of a structure of a product formed according to step S05 in a method for manufacturing a semiconductor structure in the prior art;
FIG. 4 is a TEM image of a product after wet cleaning in a method for manufacturing a semiconductor structure according to the prior art;
FIG. 5 is an SEM image of a product after wet cleaning in a prior art method for fabricating a semiconductor structure;
FIG. 6 is a flow chart of a method of fabricating a semiconductor structure according to an embodiment of the present invention;
fig. 7 is a schematic structural diagram of a product formed according to step S2 in a method for manufacturing a semiconductor structure according to an embodiment of the present invention;
fig. 8 is a schematic structural diagram of a product formed according to step S3 in a method for manufacturing a semiconductor structure according to an embodiment of the present invention;
fig. 9 is a schematic structural diagram of a product formed according to step S4 in a method for manufacturing a semiconductor structure according to an embodiment of the present invention;
fig. 10 is a schematic structural diagram of a product formed after etching a barrier layer in a manufacturing method of a semiconductor structure according to an embodiment of the present invention;
FIG. 11 is a schematic diagram illustrating a product structure formed after ashing a patterned photoresist layer in a method for fabricating a semiconductor structure according to an embodiment of the present invention;
fig. 12 is a schematic structural diagram of a product formed according to step S5 in a method for manufacturing a semiconductor structure according to an embodiment of the present invention;
fig. 13 is a schematic structural diagram of a product formed according to step S2 in another method for manufacturing a semiconductor structure according to an embodiment of the present invention;
fig. 14 is a schematic structural diagram of a product formed according to step S3 in another method for manufacturing a semiconductor structure according to an embodiment of the present invention;
fig. 15 is a schematic structural diagram of a product formed according to step S4 in another method for manufacturing a semiconductor structure according to an embodiment of the present invention;
fig. 16 is a schematic structural diagram of a product formed after etching a barrier layer in another method for manufacturing a semiconductor structure according to an embodiment of the present invention;
FIG. 17 is a schematic diagram illustrating a product structure formed after ashing a patterned photoresist layer in another method for fabricating a semiconductor structure according to an embodiment of the invention;
fig. 18 is a schematic structural diagram of a product formed according to step S5 in another method for manufacturing a semiconductor structure according to an embodiment of the present invention;
wherein in FIGS. 1-5:
101-TaN barrier layer, 102-copper aluminum metal layer, 103-patterned photoresist layer, 104-by-product, 105-aluminum oxide film, 106-hole;
in FIGS. 6 to 12:
11-barrier layer, 111-patterned barrier layer, 12-patterned metal layer, 13-patterned photoresist layer, 14-byproduct, 15-aluminum oxide layer, 16-non-dense thin film;
in FIGS. 13 to 18:
21-barrier layer, 211-patterned barrier layer, 22-patterned metal layer, 23-patterned photoresist layer, 24-by-product, 25-alumina layer, 26-non-dense thin film, 27-metal anti-reflective layer.
Detailed Description
The semiconductor structure and the method for fabricating the same according to the present invention will be described in detail with reference to the accompanying drawings and specific embodiments. The advantages and features of the present invention will become more apparent from the following description. It is to be noted that the drawings are in a very simplified form and are not to precise scale, which is provided for the purpose of facilitating and clearly illustrating embodiments of the present invention.
Referring to fig. 1 to 3, a method for fabricating a semiconductor structure includes the following steps:
step S01: providing a substrate, wherein the substrate comprises a TaN barrier layer 101, and a copper-aluminum metal layer 102 is formed on the TaN barrier layer 101;
step S02: forming a photoresist layer on the upper surface of the copper-aluminum metal layer 102, and photoetching the photoresist layer to form a patterned photoresist layer 103;
step S03: etching the copper-aluminum metal layer 102 and the TaN barrier layer 101 by taking the patterned photoresist layer 103 as a mask;
step S04: ashing to remove the patterned photoresist layer 103;
step S05: and carrying out wet cleaning on the semiconductor structure after the patterned photoresist layer 103 is removed.
Referring to fig. 1, step S01 is performed to provide a substrate, the top layer of the substrate is a TaN barrier layer 101, and a copper-aluminum metal layer 102 is formed on the TaN barrier layer 101. The copper content of the copper-aluminum metal layer 102 is 5%.
Continuing to refer to fig. 1, step S02 is performed to prepare a patterned photoresist layer 103 on the upper surface of the copper-aluminum metal layer 102.
Continuing to refer to fig. 1, step S03 is performed to etch the copper-aluminum metal layer 102, wherein the etching reagent includes BCl 3 And Cl 2 . Due to the presence of the etching gas, the sidewalls of the copper aluminum metal layer 102 may be reacted by the etching gas to form byproducts 104, such as chlorine-containing polymers, during the etching process.
Referring to fig. 2, step S04 is performed to remove the patterned photoresist layer 103 through an ashing process. Generally with a gas containing O 2 The patterned photoresist layer 103 is processed by an ashing process. Due to O 2 In the ashing process of the patterned photoresist layer 103, the sidewalls of the copper-aluminum metal layer 102 and the exposed upper surface of the copper-aluminum metal layer 102 after the removal of the patterned photoresist 03 will react with O 2 React to form aluminum oxide (Al) 2 O 3 ) A film 105. However, the alumina thin film 105 formed by this method is not dense.
Referring to fig. 3, step S05 is performed to perform a wet cleaning on the semiconductor structure after the patterned photoresist layer 103 is removed, so as to remove the byproducts 104. The solution adopted by the wet cleaning comprises H 2 O 2 And HCl, since the alumina film 105 is not dense, the solution of the wet cleaning will penetrate the non-dense alumina film 105 to contact the copper aluminum metal layer 102, and Al will be corroded to form pores 106, as shown in FIGS. 4 and 5. Moreover, the alumina film 105 is not dense and is also susceptible to corrosion damage during wet cleaning. The existence of the hole 106 on the sidewall of the copper-aluminum metal layer 102 may affect the electrical performance, yield and reliability of the semiconductor structure, and also affect the test of the electrical mobility, resulting in the failure of the electrical mobility test.
In order to solve the problem that holes appear on the side wall of the etched metal layer in the wet cleaning process, the invention provides a preparation method of a semiconductor structure, and referring to fig. 6, the preparation method of the semiconductor structure comprises the following steps:
step S1: providing a substrate, and sequentially forming a metal layer and a patterned photoresist layer on the substrate, wherein the metal layer is made of AlCu;
step S2: etching the metal layer by taking the patterned photoresist layer as a mask to form a patterned metal layer;
and step S3: cleaning and hydroxylating the patterned metal layer by using plasma of mixed gas;
and step S4: forming an aluminum oxide layer on sidewalls of the patterned metal layer using a plasma-assisted atomic layer deposition process;
step S5: and carrying out wet cleaning on the structure after the aluminum oxide layer is formed.
In step S1, the substrate includes a barrier layer. In some embodiments, the base may include a substrate and a structural layer on the substrate, wherein the structural layer includes at least a barrier layer; the substrate may be a silicon substrate, a sapphire substrate, or a GaAs substrate, but is not limited thereto. The barrier layer is preferably located on top of the substrate, and the metal layer is located on the barrier layer. The material of the barrier layer is preferably TaN, but not limited thereto. The material of the metal layer is preferably aluminum copper (AlCu), and the content of copper is preferably not more than 5%. The formation process of the metal layer and other structural layers may be MOCVD (metal organic chemical vapor deposition), ALD (atomic layer deposition), and the like, but is not limited thereto.
In some embodiments, other structural layers, such as a metal anti-reflective layer, may also be formed between the metal layer and the patterned photoresist layer. The material of the metal anti-reflection layer is preferably TiN, but is not limited thereto.
In step S2, the etching method for etching the metal layer by using the patterned photoresist layer as a mask is selected as dry etching, and further, the etching gas for dry etching includes BCl 3 And Cl 2 But is not limited thereto. In other embodiments, the dry etch etching gas includes BCl in addition to 3 And Cl 2 Besides, it can also be used as bagDraw N 2 And an inert gas, preferably Ar, but not limited thereto. For example, the etching gas for dry etching comprises BCl 3 、Cl 2 、N 2 And Ar. This embodiment may monitor the extent of the etch by an endpoint detector.
In the process of etching the metal layer, the etching gas comprises BCl 3 And Cl 2 And BCl 3 And Cl 2 It reacts with the exposed sidewalls of the metal layer after etching to form by-products, such as chlorine-containing polymers.
In step S3, the plasma of the mixed gas is preferably carbon tetrafluoride (CF) 4 ) Water vapor (H) 2 O) and oxygen (O) 2 ) A plasma of a composite gas of the composition, but is not limited thereto. The carbon tetrafluoride and the oxygen can remove the chlorine-containing polymer, and the water vapor can form hydroxyl groups on the surface of the metal layer, particularly on the sidewalls of the metal layer exposed after the removal of the chlorine-containing polymer.
In step S4, the reaction raw materials in the step of forming the aluminum oxide layer on the sidewalls of the patterned metal layer using the plasma-assisted atomic layer deposition process include a precursor and an oxidant, and the precursor is preferably TMA (trimethylaluminum), but is not limited thereto. The oxidizing agent is preferably H 2 O and O 2 But is not limited thereto. This example used TMA and oxidizer cycling to form the aluminum oxide layer.
In the embodiment, the plasma is generated by the microwave ECR (electron cyclotron resonance) device, and the active radicals are generated under the action of the plasma energy, so that the ALD (atomic layer deposition) process can be performed at room temperature without additionally heating the reaction chamber, thereby expanding the application range of the substrate material and preventing the substrate material from being limited by temperature. The atomic layer deposition temperature described in this example is preferably not higher than 50 c, for example 25 c, due to the presence of the plasma.
In this embodiment, a dense aluminum oxide layer is formed by ALD, and in order to avoid the solution of subsequent wet cleaning from contacting the side wall of the metal layer, and protect the side wall of the metal layer from galvanic corrosion, and at the same time, not affect the performance of the final product, the thickness of the aluminum oxide layer in this embodiment is preferably 1nm to 10nm.
After step S4 and before step S5, the method for manufacturing a semiconductor structure further includes: and etching the barrier layer by taking the patterned metal layer and the aluminum oxide layer as masks. The etching method in the step is selected as dry etching, and further, the etching gas of the dry etching is preferably BCl 3 And Cl 2 But is not limited thereto. In other embodiments, the dry etch etching gas includes BCl in addition to 3 And Cl 2 May also include N 2 And an inert gas, preferably Ar, but not limited thereto. For example, the etching gas for dry etching comprises BCl 3 、Cl 2 、N 2 And Ar.
Before step S5, and after the step of etching the barrier layer by using the patterned metal layer and the aluminum oxide layer as masks, the method for manufacturing a semiconductor structure further includes: and removing the patterned photoresist layer by adopting an ashing process. The ashing process is typically O-containing 2 The ashing temperature is preferably 200 ℃ to 300 ℃, for example 250 ℃. After removing the patterned photoresist, an upper surface of the metal layer is exposed, the O 2 Reacting with the exposed upper surface of the metal layer may form an uncompacted film, in particular an uncompacted aluminum oxide film.
In step S5, the semiconductor structure is subjected to wet cleaning. The solution for wet cleaning may be an acidic solution or an alkaline solution, in this embodiment, the solution for wet cleaning is preferably an acidic solution, and further the solution for wet cleaning preferably includes H 2 O 2 And HCl. Due to CO 2 The galvanic corrosion can be inhibited, therefore, the embodiment can also inject CO into the solution for wet cleaning 2 . The wet cleaning solution can remove impurities and byproducts generated in the atomic layer deposition process,Impurities and byproducts present during etching of the barrier layer and impurities and byproducts present during the ashing process, such as non-dense films present during the ashing process. Because the side wall of the patterned metal layer has the compact alumina layer, the solution cleaned by the wet method can not contact with the side wall of the patterned metal layer, so the side wall of the patterned metal layer can not react, galvanic corrosion can not occur, side wall holes can not be generated, and the electrical property and the reliability of the semiconductor structure can be improved.
The step of etching the metal layer with the patterned photoresist layer as a mask, the step of cleaning and hydroxylating the patterned metal layer with the plasma of the mixed gas, the step of forming the aluminum oxide layer on the side wall of the patterned metal layer by using the plasma-assisted atomic layer deposition process, and the step of etching the barrier layer with the patterned metal layer and the aluminum oxide layer as masks can be completed in the same dry etching machine. The existing dry etching machine has four chambers, wherein two chambers are in-situ chambers provided with microwave ECR, and the other two chambers are main etching chambers. The step of etching the metal layer with the patterned photoresist layer as a mask and the step of etching the barrier layer with the patterned metal layer and the alumina layer as masks may be completed in the main etching chamber, and the step of cleaning and hydroxylating the patterned metal layer with plasma of a mixed gas and the step of forming the alumina layer on the sidewall of the patterned metal layer with the plasma-assisted atomic layer deposition process may be completed in the in-situ chamber having the microwave ECR built therein. Since the dry etching machine is of the existing structure, the details are not repeated herein.
The etching step of the metal layer, the cleaning and hydroxylation step of the metal layer, the deposition step of the alumina layer and the etching step of the barrier layer can be finished in the same dry etching machine table without adding extra equipment, so that the cost can be saved, and the operation is easy to finish.
FIGS. 7-12 are schematic views showing the structures involved in the corresponding steps of the method for fabricating a semiconductor structure, in this embodiment, a metal layer and a patterned photoresist layer are sequentially formed on a barrier layer, and the reaction materials in the atomic layer deposition step are TMA and H 2 O（g）。
Referring to fig. 7, step S1 is performed to provide a substrate, a barrier layer 11 is formed on top of the substrate, and a metal layer and a patterned photoresist layer 13 are sequentially formed on the barrier layer 11. The material of the barrier layer 11 is preferably TaN, but not limited thereto. The material of the metal layer is preferably AlCu, but is not limited thereto.
Continuing to refer to fig. 7, step S2 is performed to etch the metal layer by using the patterned photoresist layer 13 as a mask, so as to form a patterned metal layer 12. The etching method for etching the metal layer by using the patterned photoresist layer 13 as a mask is selected from dry etching, and further, the etching gas for the dry etching comprises BCl 3 And Cl 2 In other embodiments, the etching gas for dry etching may further include N2 and an inert gas, preferably, ar, but not limited thereto. For example, the etching gas for dry etching comprises BCl 3 、Cl 2 、N 2 And Ar. Due to the inclusion of BCl in the etching gas 3 And Cl 2 Thus, during etching, the sidewalls of the patterned metal layer 12 may be reacted by the etching gas to form by-products 14, such as chlorine-containing polymers.
Referring to fig. 8, step S3 is performed to clean and hydroxylate the patterned metal layer 12 using a plasma of mixed gases. In this embodiment, the plasma of the mixed gas includes a plasma of a mixed gas of carbon tetrafluoride, water vapor, and oxygen. The carbon tetrafluoride and oxygen can remove the by-product 14, and the water vapor can form a hydroxyl group (-OH) on the surface of the patterned metal layer 12, and particularly, can form a hydroxyl group on the sidewall of the patterned metal layer 12 exposed after the by-product 14 is removed.
Referring to FIG. 9, executionStep S4, forming an aluminum oxide layer 15 on the sidewall of the patterned metal layer 12 by using a plasma-assisted atomic layer deposition process. In this embodiment, the reaction raw materials for atomic layer deposition include a precursor, preferably TMA (trimethylaluminum), and an oxidizing agent, preferably water vapor. In this embodiment, TMA and water vapor are used for cyclic treatment to form the alumina layer 15, i.e. TMA-Ar (argon) -H using trimethylaluminum as monomer 2 The atomic layer deposition of the aluminum oxide layer 15 is achieved by means of a plasma method in the form of alternating pulses of O (g) -Ar.
In the embodiment, the plasma is generated by the microwave ECR (electron cyclotron resonance) device, and the active radicals are generated under the action of the plasma energy, so that the ALD (atomic layer deposition) process can be performed at room temperature without additionally heating the reaction chamber, thereby expanding the range of use of the substrate material and preventing the substrate material from being limited by temperature. The atomic layer deposition temperature described in this example is preferably not higher than 50 c, for example 25 c, due to the presence of the plasma.
In this embodiment, the dense aluminum oxide layer 15 is formed by ALD, and in order to avoid a contact between a solution for subsequent wet cleaning and a sidewall of the metal layer, protect the sidewall of the metal layer from galvanic corrosion, and not affect the performance of a final product, the thickness of the aluminum oxide layer 15 in this embodiment is preferably 1nm to 10nm.
The mechanism of forming the aluminum oxide layer 15 by the TMA and water vapor circulation treatment is as follows: TMA pulse duration forms AlCH under the action of plasma energy 3 - Active radical, H 2 O pulse time to form hydroxyl active group, and then Al through chemical reaction 2 O 3 。
The specific process of forming the aluminum oxide layer 15 by the TMA and water vapor circulation treatment comprises the following steps:
step S411: TMA is introduced into the metal layer with the hydroxyl group formed on the surface of the side wall in the step S3, so that the TMA and the hydroxyl group react to generate CH 4 And AlOAl (CH) 3 ） 2 - ；
Step S412: after TMA is introduced for a period of time, inert gas is introduced, preferably Ar;
step S413: after a period of inert gas introduction, H is introduced 2 O (g), said H 2 O (g) and AlOAl (CH) 3 ） 2 - React to form Al 2 O 3 And CH 4 ；
Step S414: after a period of time with steam, a further period of time with inert gas is passed.
The dense alumina layer 15 can be obtained by sequentially repeating the steps S411 to S414. It is understood that the TMA, inert gas and water vapor may be passed through for a period of time according to the process requirements.
In this example, TMA-Ar-H was introduced to circulate sequentially 2 O (g) -Ar for atomic layer deposition of the alumina layer 15 and by controlling TMA and H in each cycle 2 The time of O (g) is used to control the thickness of the alumina layer 15. The aluminum oxide layer 15 formed by atomic deposition is a dense thin film layer in this embodiment.
Referring to fig. 10, after step S4 and before step S5, the method for fabricating a semiconductor structure further includes: and etching the barrier layer 11 by using the patterned metal layer 12 and the aluminum oxide layer 15 as masks to form a patterned barrier layer 111. The etching method in this step is selected as dry etching, and further, the etching gas of the dry etching is preferably BCl 3 And Cl 2 But is not limited thereto. In other embodiments, the dry etch etching gas includes BCl in addition to 3 And Cl 2 May also include N 2 And an inert gas, preferably Ar, but not limited thereto. For example, the etching gas for dry etching comprises BCl 3 、Cl 2 、N 2 And Ar.
Referring to fig. 11, before step S5, and after the step of etching the barrier layer 11 by using the patterned metal layer 12 and the aluminum oxide layer 15 as a mask, the method for manufacturing a semiconductor structure further includes: the patterned photoresist layer 13 is removed using an ashing process. The above-mentionedThe ashing process is typically O-containing 2 The ashing temperature is preferably 200 ℃ to 300 ℃, for example, 250 ℃. After removing the patterned photoresist 13, the upper surface of the patterned metal layer 12 is exposed, the O 2 Reacting with the exposed upper surface of the patterned metal layer 12 forms a non-dense film 16, specifically a non-dense aluminum oxide film.
Referring to fig. 12, step S5 is performed to perform a wet cleaning on the semiconductor structure. The solution for wet cleaning may be an acidic solution or an alkaline solution, in this embodiment, the solution for wet cleaning is preferably an acidic solution, and further the solution for wet cleaning preferably includes H 2 O 2 And HCl. Due to CO 2 Can be used for galvanic corrosion, therefore, the embodiment can also introduce CO into the solution for wet cleaning 2 . The solution for wet cleaning can remove impurities and byproducts generated during atomic layer deposition, impurities and byproducts generated during etching of the barrier layer 11, and impurities and byproducts generated during ashing process, such as the non-dense thin film 16 generated during ashing process. Because the dense alumina layer 15 exists on the side wall of the patterned metal layer 12, the solution cleaned by the wet method cannot contact with the side wall of the patterned metal layer 12, and therefore, the side wall of the patterned metal layer 12 does not react, galvanic corrosion does not occur, and further side wall holes do not occur, so that the electromigration test is facilitated, the electrical performance and the reliability of the semiconductor structure can be improved, and the service life of the semiconductor structure can be prolonged.
FIGS. 13-18 are schematic structural diagrams showing steps involved in another method for fabricating a semiconductor structure, in this embodiment, a metal layer, a metal anti-reflection layer 27 and a patterned photoresist layer 23 are sequentially formed on a barrier layer 21, and the atomic layer deposition step uses TMA and O as reaction materials 2 。
Referring to fig. 13, step S1 is performed to provide a substrate with a barrier layer 21 on top, and a metal layer, a metal anti-reflection layer 27 and a patterned photoresist layer 23 are sequentially formed on the barrier layer 21. The material of the barrier layer 21 is preferably TaN, the material of the metal layer is preferably AlCu, and the material of the metal antireflection layer 27 is preferably TiN.
Continuing to refer to fig. 13, step S2 is performed to etch the metal layer by using the patterned photoresist layer 23 as a mask, so as to form a patterned metal layer 22. Due to the existence of the metal anti-reflection layer 27, the metal anti-reflection layer 27 needs to be etched before the metal layer is etched, so as to form the patterned metal anti-reflection layer 27. In this embodiment, the process conditions for etching the metal antireflection layer and the metal layer are preferably the same. The etching is preferably dry etching, and etching gas for the dry etching comprises BCl 3 And Cl 2 In other embodiments, the etching gas for dry etching may further include N 2 And an inert gas, preferably Ar, but not limited thereto. For example, the etching gas for dry etching comprises BCl 3 、Cl 2 、N 2 And Ar. Due to the inclusion of BCl in the etching gas 3 And Cl 2 Thus, during etching, the sidewalls of the metal layer may be reacted by the etching gas to form by-products 24, such as chlorine-containing polymers.
Referring to fig. 14, step S3 is performed to clean and hydroxylate the patterned metal layer 22 using a plasma of mixed gases. In this embodiment, the plasma of the mixed gas includes a plasma of a mixed gas of carbon tetrafluoride, water vapor and oxygen, the carbon tetrafluoride and the oxygen being capable of removing the by-products 24, the water vapor being capable of forming hydroxyl groups (-OH) on the surface of the patterned metal layer 22, and particularly, being capable of forming hydroxyl groups on the sidewalls of the patterned metal layer 22 exposed after the removal of the chlorine-containing polymer.
Referring to fig. 15, step S4 is performed to form an aluminum oxide layer 25 on the sidewalls of the patterned metal layer 22 by using a plasma-assisted atomic layer deposition process. The temperature of the atomic layer deposition is not higher than 50 ℃, for example, the temperature of the atomic layer deposition is 25 ℃. The reaction raw material for atomic layer deposition comprises a precursorAnd an oxidant, wherein the precursor is TMA (trimethylaluminum). The oxidant is O 2 . TMA and O are used in the present embodiment 2 The aluminum oxide layer 25 is formed by a cyclic treatment, i.e. using TMA-Ar-O with trimethylaluminum as a monomer 2 The atomic layer deposition of the alumina layer 25 is carried out by means of a plasma method, in the form of alternating pulses of-Ar. In the embodiment, the microwave ECR apparatus generates plasma, and active radicals are generated under the action of plasma energy, so that the ALD process can be performed at room temperature without additionally heating the reaction chamber, thereby expanding the range of use of the substrate material and preventing the substrate material from being limited by temperature.
The mechanism of forming the aluminum oxide layer 25 by the TMA and oxygen cycling treatment is as follows: under the action of plasma energy, TMA pulse time forms AlCH3 - Active radical, O 2 The pulse time forms O atom active group, and then Al is formed by chemical reaction 2 O 3 。
The TMA and oxygen circulating treatment process specifically comprises the following steps:
step S421: TMA is introduced into the metal layer with the hydroxyl group formed on the surface of the side wall in the step S3, and the TMA reacts with the hydroxyl group to generate CH 4 And AlOAl (CH) 3 ） 2 - ；
Step S422: after a period of TMA introduction, inert gas, such as Ar gas, is introduced;
step S423: after a period of inert gas introduction, oxygen is introduced, which reacts with AlOAl (CH) 3 ） 2 - React to form Al 2 O 3 、CO 2 And H 2 O；
Step S424: after a period of oxygen gas introduction, inert gas, such as Ar gas, is again passed through for a period of time.
In this example, TMA-Ar-O was introduced to circulate sequentially 2 Ar for atomic layer deposition of an alumina layer 25 and by controlling TMA and O in each cycle 2 The thickness of the alumina layer 25 is controlled. The aluminum oxide layer 25 formed by atomic deposition is a dense thin film layer.
Referring to FIG. 16, at step S4Thereafter, and before step S5, the method for manufacturing a semiconductor structure further includes: and etching the barrier layer 21 by using the patterned metal layer 22 and the aluminum oxide layer 25 as a mask to form a patterned barrier layer 211. The etching method in this step is dry etching, and further, the etching gas of the dry etching is preferably BCl 3 And Cl 2 But is not limited thereto. In other embodiments, the dry etch etching gas includes BCl in addition to 3 And Cl 2 May also include N 2 And an inert gas, preferably Ar, but not limited thereto. For example, the etching gas for dry etching comprises BCl 3 、Cl 2 、N 2 And Ar.
Referring to fig. 17, before step S5, and after the step of etching the barrier layer 21 by using the patterned metal layer 22 and the aluminum oxide layer 25 as masks, the method for manufacturing a semiconductor structure further includes: the patterned photoresist layer 23 is removed using an ashing process. The ashing process is typically O-containing 2 The ashing temperature is preferably 200 ℃ to 300 ℃, for example, 250 ℃. After removing the patterned photoresist 23, the upper surface of the patterned metal layer 22 is exposed, the O 2 Reaction with the exposed upper surface of the patterned metal layer 22 forms an uncompacted thin film 26, specifically an uncompacted aluminum oxide thin film.
Referring to fig. 18, step S5 is performed to perform a wet cleaning on the semiconductor structure. The solution for wet cleaning may be an acidic solution or an alkaline solution, in this embodiment, the solution for wet cleaning is preferably an acidic solution, and further the solution for wet cleaning preferably includes H 2 O 2 And HCl. Due to CO 2 Can be used for galvanic corrosion, therefore, the embodiment can also be used for introducing CO into the solution for wet cleaning 2 . The solution for wet cleaning can remove impurities and byproducts generated during atomic layer deposition, impurities and byproducts generated during etching of the barrier layer 21, and impurities and byproducts generated during ashing process, such as impurities and byproducts generated during ashing processA dense film 26. Because the side wall of the patterned metal layer 22 has the dense alumina layer 25, the solution cleaned by the wet method cannot contact with the side wall of the patterned metal layer 22, so that the side wall of the patterned metal layer 22 does not react, galvanic corrosion does not occur, and further side wall holes do not occur, which is beneficial to the electromigration rate test, can improve the electrical performance and reliability, and further can prolong the service life of the semiconductor structure.
In summary, according to the preparation method of the semiconductor structure of the present invention, after the metal layer is etched to form the patterned metal layer, the patterned metal layer is cleaned and hydroxylated by using the plasma of the mixed gas, and the atomic layer deposition process is performed with the assistance of the plasma, so that a dense aluminum oxide layer can be formed on the sidewall of the patterned metal layer, the galvanic corrosion problem of the metal layer during the wet cleaning process can be prevented, the occurrence of the holes on the sidewall of the metal layer is avoided, the electrical performance and reliability of the semiconductor structure are improved, and the service life of the semiconductor structure is prolonged.
Secondly, the invention utilizes microwave ECR equipment to generate plasma, and carries out atomic layer deposition of the alumina layer under the condition of the plasma, and the existence of the plasma ensures that the invention can form the alumina layer under the low-temperature environment, the process is simple and easy, and the application range of the material of the substrate can be expanded, so that the material of the substrate is not limited by the temperature.
In addition, the etching step of the metal layer, the cleaning and hydroxylation step of the metal layer, the atomic layer deposition process and the etching step of the barrier layer can be completed in the same dry etching machine, and extra equipment does not need to be added.
In addition, the invention also provides a semiconductor structure prepared by the semiconductor structure preparation method. The semiconductor structure has high reliability and excellent electrical performance because the side wall of the metal layer in the semiconductor structure has no hole.
It is to be understood that while the present invention has been described in conjunction with the preferred embodiments thereof, it is not intended to limit the invention to those embodiments. It will be apparent to those skilled in the art that many changes and modifications can be made, or equivalents employed, to the presently disclosed embodiments without departing from the intended scope of the invention. Therefore, any simple modification, equivalent change and modification made to the above embodiments according to the technical essence of the present invention are still within the scope of the protection of the technical solution of the present invention, unless the contents of the technical solution of the present invention are departed.
It is to be further understood that the present invention is not limited to the particular methodology, compounds, materials, manufacturing techniques, uses, and applications described herein, as such may, of course, vary. It is also to be understood that the terminology used herein is for the purpose of describing particular embodiments only, and is not intended to limit the scope of the present invention. It must be noted that, as used herein and in the appended claims, the singular forms "a," "an," and "the" include plural referents unless the context clearly dictates otherwise. Thus, for example, reference to "a step" means a reference to one or more steps and may include sub-steps. All conjunctions used should be understood in the broadest sense. Thus, the word "or" should be understood to have the definition of a logical "or" rather than the definition of a logical "exclusive or" unless the context clearly dictates otherwise. Structures described herein are to be understood as also referring to functional equivalents of such structures. Language that can be construed as approximate should be understood as such unless the context clearly dictates otherwise.
Claims (10)
1. A method for fabricating a semiconductor structure, comprising:
providing a substrate, and sequentially forming a metal layer and a patterned photoresist layer on the substrate, wherein the metal layer is made of AlCu;
etching the metal layer by taking the patterned photoresist layer as a mask to form a patterned metal layer;
cleaning and hydroxylating the patterned metal layer by using plasma of mixed gas;
forming an aluminum oxide layer on sidewalls of the patterned metal layer using a plasma-assisted atomic layer deposition process;
and carrying out wet cleaning on the structure after the aluminum oxide layer is formed.
2. The method of claim 1, wherein the plasma of the mixed gas comprises a plasma of a mixed gas consisting of carbon tetrafluoride, water vapor, and oxygen.
3. The method of claim 1, wherein the process temperature of the plasma-assisted atomic layer deposition process is not greater than 50 ℃.
4. The method of claim 1, wherein the reactive materials of the plasma-assisted atomic layer deposition process comprise a precursor comprising TMA and an oxidant comprising H 2 O and O 2 At least one of (1).
5. The method of claim 4, wherein the forming an aluminum oxide layer on the sidewalls of the patterned metal layer using a plasma-assisted atomic layer deposition process comprises: and generating plasma by using a microwave ECR (electron cyclotron resonance) device, and performing atomic layer deposition under the plasma condition to form the aluminum oxide layer.
6. The method of claim 1, wherein the aluminum oxide layer has a thickness of 1nm to 10nm.
7. The method of fabricating a semiconductor structure according to claim 1, wherein the base comprises a substrate and a barrier layer on the substrate, the metal layer is on the barrier layer, and after the step of forming the aluminum oxide layer, the method further comprises: and etching the barrier layer by taking the patterned metal layer and the aluminum oxide layer as masks to form the patterned barrier layer.
8. The method according to claim 7, wherein the etching the metal layer using the patterned photoresist layer as a mask, the cleaning and hydroxylating the patterned metal layer using a plasma of a mixed gas, the forming an aluminum oxide layer on sidewalls of the patterned metal layer using a plasma-assisted atomic layer deposition process, and the etching the barrier layer using the patterned metal layer and the aluminum oxide layer as masks are all performed in a same dry etching machine.
9. The method of fabricating a semiconductor structure according to claim 7, wherein after the step of forming the patterned barrier layer, the method of fabricating a semiconductor structure further comprises: and removing the patterned photoresist layer by adopting an ashing process.
10. A semiconductor structure prepared by the method of any one of claims 1~9.
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1270415A (en) * | 1998-09-15 | 2000-10-18 | 西门子公司 | Etching technology for reducing corrosion of metal patterns of coated layer on substrate |
| US20050032374A1 (en) * | 2003-05-07 | 2005-02-10 | Stmicroelectronics S.R.L. | Process for defining a chalcogenide material layer, in particular in a process for manufacturing phase change memory cells |
| CN102339782A (en) * | 2010-07-16 | 2012-02-01 | 中芯国际集成电路制造(上海)有限公司 | Production method of shallow channel isolation region |
| CN106558531A (en) * | 2015-09-25 | 2017-04-05 | 中芯国际集成电路制造(上海)有限公司 | Semiconductor structure and its manufacture method |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1270415A (en) * | 1998-09-15 | 2000-10-18 | 西门子公司 | Etching technology for reducing corrosion of metal patterns of coated layer on substrate |
| US20050032374A1 (en) * | 2003-05-07 | 2005-02-10 | Stmicroelectronics S.R.L. | Process for defining a chalcogenide material layer, in particular in a process for manufacturing phase change memory cells |
| CN102339782A (en) * | 2010-07-16 | 2012-02-01 | 中芯国际集成电路制造(上海)有限公司 | Production method of shallow channel isolation region |
| CN106558531A (en) * | 2015-09-25 | 2017-04-05 | 中芯国际集成电路制造(上海)有限公司 | Semiconductor structure and its manufacture method |
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