CN115934613A

CN115934613A - bus system

Info

Publication number: CN115934613A
Application number: CN202210971219.0A
Authority: CN
Inventors: S·瓦尔克; F·朗
Original assignee: Robert Bosch GmbH
Current assignee: Robert Bosch GmbH
Priority date: 2021-08-12
Filing date: 2022-08-12
Publication date: 2023-04-07
Also published as: DE102021208828A1

Abstract

The invention relates to a bus system having a first bus subscriber (N1), at least one second bus subscriber (N2), bus lines (10) and terminating resistors (20), wherein the bus system is based on differential signaling, wherein the terminating resistors are connected between the lines of the bus lines, wherein the terminating resistors have a line spacing from the first bus subscriber which is smaller than the line spacing from all further bus subscribers. The second bus subscriber is provided for stepwise matching of an impedance of the second bus subscriber during signal transmission of the second bus subscriber, thereby avoiding undesired line reflections, wherein the stepwise matching of the impedance is performed each time a transition from a predefined first differential voltage to a predefined second differential voltage is generated by a second bus subscriber on the bus line.

Description

Bus system

Technical Field

The present invention relates to a bus system and in particular to a bus system with a readily terminated (terminierten) bus line.

Background

Known from the prior art are bus systems, such as CAN bus systems, in which in principle identical bus subscribers (for example, controllers of a vehicle, etc.) control the respective bus access by means of an arbitration program and in which two terminating resistors are arranged in each case for different bus subscribers

To avoid line reflections (leitsunfleflexionen).

Furthermore, so-called SIC transceivers are known from the field of CAN bus systems, which ensure that during the transmission process of a CAN bus subscriber, by means of a step-by-step impedance matching, unintentional line reflections on the bus lines are suppressed in a strong manner, so that correspondingly higher transmission rates are achieved on such bus systems.

In addition to this, there are the following communication systems: the communication system is based on a bus system or a master/slave system based on a point-to-point connection, wherein the master node centrally controls the data exchange between the respective communication subscribers in that it presets a predefined transmission time period for the respective slave node for the respective data transmission.

Disclosure of Invention

The invention relates to a bus system having a first bus subscriber and at least one second bus subscriber, which are also referred to as network nodes. In addition, the bus system has a bus line with a first line and a second line, and a terminating resistor.

The bus system is, for example, the following bus system: the bus system is based on bus systems known from the prior art or on bus systems different from these (e.g. newly developed) or on a combination of these. Furthermore, the bus system is based on differential signaling between the respective bus subscribers via a first line of the bus lines (which transmits a high signal, for example) and a second line (which transmits a low signal, for example).

The terminating resistor is connected between a first line and a second line of the bus line at a predefined location, wherein the line spacing between a first bus subscriber and the predefined location (i.e. the length of the electrical connection formed by the bus line and/or an electrical line different from the bus line) is smaller than the line spacing between the predefined location and all further bus subscribers. The terminating resistor is dimensioned in such a way that it can establish the differential voltage required for the signal transmission by means of the current generated by the transmitting bus user on the bus line, which differential voltage is evaluated accordingly by the receiving bus user at this point in time.

The second bus subscriber is provided to match the impedance of the second bus subscriber (and thus the impedance present on the bus line) step by step during the signal transmission of the second bus subscriber, in order to avoid undesired line reflections. According to the invention, the impedance is matched step by step whenever a transition from a predefined first differential voltage to a predefined second differential voltage is produced by a second bus subscriber on the bus line. The first differential voltage and the second differential voltage represent logic states (e.g., "0" and "1") for data transmission, respectively.

Furthermore, the step-wise matching of the impedances sets a transition from a first impedance to a second impedance at a predefined first point in time, wherein the first impedance is smaller than the second impedance. In addition to this, the step-wise matching of the impedances sets a transition from the second impedance to a third impedance at a second point in time following the first point in time, wherein the second impedance is smaller than the third impedance.

It should generally be noted that the first and second points in time are preferably selected such that not only the minimum required suppression of line reflections is achieved, but also a reliable reception of the data bits to be transmitted in each case in the respective receiver. This reliable reception is particularly important when access control is performed on the bus system by means of an arbitration procedure, since it requires the value of the third impedance to be reached for the duration of a data bit on the bus system. Preferably, the reaching of the value of the third impedance is accomplished after approximately one-fourth of the duration of a data bit, but is not thereby limited to these and other specific value specifications in this specification (Wertangabe).

The bus system according to the invention provides, by means of the above-described configuration, mainly the following advantages: despite the use of only one terminating resistor (thus, for example, leading to advantages in the design of the respective bus users, which are explained in more detail in the following description), a higher transmission rate between the respective bus users is achieved than in the case of a similar bus system: the bus system likewise uses only a single terminating resistor, but does not provide for a step-by-step impedance matching by the transmitting bus subscriber.

Preferred embodiments of the invention are shown below.

Preferably, the first impedance (e.g. <50 Ω) is lower than the wave resistance of the bus line, which is for example in the range of 100 Ω. It is further preferred that the second impedance (e.g. 75 Ω to 125 Ω) lies in the range of the wave resistance of the bus line, taking into account a predefined maximum allowed deviation from the wave resistance of the bus line. It is also preferred that the third impedance (e.g. >25k omega) is higher than the wave resistance of the bus line. It should be noted that values or value ranges different from the above-mentioned values or value ranges may be used for the respective impedances.

In a particularly advantageous embodiment of the invention, the terminating resistor is associated with a structural unit of the first bus subscriber and is arranged in particular in a housing of the first bus subscriber (for example on a circuit board of the first bus subscriber). Alternatively or additionally, the line spacing between the second bus user and the position of the terminating resistor on the bus line corresponds to at least ten times the line spacing between the first bus user and the position of the terminating resistor. The line spacing between the first bus subscriber and the terminating resistor, which is produced, for example, by the arrangement of the conductor circuits and/or the wiring in the housing of the first bus subscriber, preferably corresponds to a maximum line spacing of up to 15cm, preferably up to 10cm and particularly preferably up to 5cm, but is not limited to such a spacing.

The first bus users advantageously use a data transmission rate of up to 500kbit/s, preferably up to 1Mbit/s, while the second bus users advantageously use a data transmission rate of up to 2Mbit/s, preferably up to 5Mbit/s, and particularly preferably up to 8 Mbit/s. Such an asymmetrical transmission rate between the first bus subscriber and the further bus subscriber is produced by: the further bus subscribers use the above-described step-by-step impedance matching during the respective transmission process, as a result of which correspondingly fewer line reflections occur and a higher transmission rate can therefore be achieved.

In a particularly advantageous embodiment of the invention, the bus system according to the invention additionally has at least one third bus user, wherein the third bus user is designed identically to the second bus user and/or is provided for carrying out data communication with the first bus user and/or the second bus user. Alternatively or additionally, the second bus user and the third bus user are sensors (e.g. radar sensors, ultrasonic sensors, lidar sensors, etc.). The same configuration of the second bus user and the third bus user is achieved in particular by: the bus system according to the invention requires only one terminating resistor, which is arranged in the region of or within the first bus subscriber. The need for a further terminating resistor in the second or third bus subscriber is accordingly eliminated. The second and third bus users, and in particular also the third, fourth and possibly further bus users, can thus be designed as common parts, whereby, for example, costs and/or logistical expenditure during production and/or installation can be reduced.

It is further preferred that the bus system is a master/slave bus system in which the first bus subscriber is a bus master which controls bus accesses via the respective further bus subscribers and in which the further bus subscribers are each a bus slave. Such a master/slave bus system mainly offers the following advantages: no separate bus controller/oscillator is required in the bus slaves, since the bus master presets a central clock for all bus slaves. Accordingly, the bus slave can be produced more cost-effectively and/or more simply. Alternatively, the bus system is a bus system of: in this bus system, bus accesses by the respective (preferably equal) bus users are controlled by means of an arbitration program. Accordingly, such a bus system is also referred to as a "multi-master system".

The data transmission rate of the bus master in the master/slave bus system is determined to be smaller than the data transmission rate of the corresponding bus slave. In particular, if the second, third and possibly further bus users are designed as identical sensors and the first bus user is intended as a central receiver for the respective measurement data of these sensors, the lower possible transmission rate from the bus master to the bus slaves is not or hardly important, since in such an arrangement, it is primarily only necessary to transmit the measurement data from the bus slaves designed as sensors to the bus master by means of a high transmission rate, whereas in the opposite transmission direction, for example, only control signals are transmitted from the first bus user to the further bus users, which only require a low transmission rate.

In a further advantageous embodiment of the invention, the bus system is a CAN bus system in which at least bus subscribers different from the first bus subscriber have CAN SIC transceivers for impedance matching in stages. Alternatively, a CAN-XL transceiver in SIC mode CAN be used, which then behaves like a CAN-SIC transceiver. Such a CAN bus system is based, for example, on the conventional CAN protocol or the CAN-FD ("flexible data rate") protocol or the CAN-XL protocol.

The supply of electrical energy to the respective bus users is advantageously effected via a bus line, and preferably all further bus users are supplied with energy via a first bus user on the bus line. This enables a cost-saving and/or simplified design and/or simplified production for bus subscribers different from the first bus subscriber, since these bus subscribers do not need to provide separate energy supply components, for example voltage regulators or the like.

In a preferred embodiment, the bus system according to the invention is a bus system of a vehicle. Such a bus system can be used, for example, for a sensor assembly, for example, an assembly of a plurality of radar sensors or ultrasonic sensors, which are arranged, for example, in the region of a front bumper and/or a rear bumper of a vehicle.

Drawings

Embodiments of the present invention are described in detail below with reference to the attached drawings. Shown here are:

fig. 1 shows a schematic overview of an embodiment of a bus system according to the invention; and

fig. 2 shows an overview of an exemplary signal profile for data transmission by means of a second bus subscriber according to the invention.

Detailed Description

Fig. 1 shows a schematic overview of an embodiment of a bus system according to the invention, which comprises a first bus subscriber N1, a second bus subscriber N2, a third bus subscriber N3, a fourth bus subscriber N4 and a fifth bus subscriber N5. The respective bus subscribers N1, N2, N3, N4, N5 are electrically connected to one another by means of a bus line 10 and are provided in this way for carrying out a differential signal transmission via a first line 12 and a second line 14 of the bus line 10.

The bus system is designed as a master/slave bus system in which a first bus subscriber N1 is designed as a bus master and further bus subscribers N2, N3, N4, N5 are designed as bus slaves, the bus accesses of which are respectively coordinated by the bus master. The further bus users N2, N3, N4, N5 are each identically designed ultrasonic sensors of the vehicle, while the first bus user N1 is a central component of the surroundings detection system of the vehicle, to which the measurement signals of the respective ultrasonic sensors are transmitted for central evaluation.

A terminating resistor 20, which has a resistance value of 60 Ω in this case, is arranged at a predefined location 30 in the immediate vicinity of the first bus subscriber N1 on the bus line 10 (with a line spacing of, for example, 5 cm). The further bus subscribers N2, N3, N4, N5 and the terminating resistor 20 each have a line spacing of more than 1 m.

The first bus subscriber N1 is supplied with electrical energy via a supply voltage connection VDD and a ground connection GND, and supplies this electrical energy via a bus line 10 to the further bus subscribers N2, N3, N4, N5.

The further bus users N2, N3, N4, N5 each have a SIC transceiver (not shown) via which they are each provided to match the respective impedance step by step during the transmission process, so that undesired line reflections are avoided.

In this way, the first bus subscriber N1 is set up for transmitting data at a maximum transmission rate of 1Mbit/s over the bus system, while the further bus subscribers N2, N3, N4, N5 are each set up for transmitting data at a maximum transmission rate of 2Mbit/s over the bus system.

Fig. 2 shows an overview of an exemplary signal profile for data transmission by means of the second bus subscriber N2 according to the invention. The signal curve a represents the change of state from logic "0" to logic "1" in the transmitting second bus user N2, which is required for the data transmission.

In accordance with this logic state change, the second bus subscriber N2, which is transmitting via the bus line 10, makes a transition from the first differential voltage VDIFF1, representing a logic "0", at a height of 2V to the second differential voltage VDIFF2, representing a logic "1", at a height of 0V. This change in differential voltage is characterized by signal curve B.

In order to avoid line reflections, impedance matching is carried out by the second bus subscriber N2 at the time T1 during the transmission process from a first impedance Z1 of 50 Ω height to a second impedance Z2 of 100 Ω height, the second impedance Z2 corresponding to the wave resistance of the bus line 10.

At time T2, the additional impedance matching to a third impedance Z3 of a height of 30k Ω is carried out via the second bus subscriber N2, which is selected such that a limited line reflection can no longer be expected as a result of the transmission process via the second bus subscriber N2.

Claims

1. A bus system, the bus system having:

the first bus subscriber (N1),

at least one second bus user (N2),

a bus line (10) having a first line (12) and a second line (14), an

A termination resistor (20) for terminating the current,

wherein the content of the first and second substances,

the bus system is based on differential signal transmission between the respective bus subscribers (N1, N2) via a first line (12) and a second line (14) of the bus line (10),

the terminal resistor (20)

-between a first line (12) and a second line (14) connected to the bus line (10) at a predefined location (30), wherein the line spacing between the first bus subscriber (N1) and the predefined location (30) is smaller than the line spacing between the predefined location (30) and all further bus subscribers (N2), and

-a differential voltage is provided for establishing a signal transmission by means of a current generated by the transmitting bus users (N1, N2) on the bus line (10),

the second bus subscriber (N2) is provided for the purpose of matching the impedance of the second bus subscriber (N2) in stages during the transmission of the signal of the second bus subscriber (N2) in order to avoid undesired line reflections,

-performing a step-wise matching of the impedance each time a transition from a predefined first differential voltage (VDIFF 1) to a predefined second differential voltage (VDIFF 2) is generated by a second bus user (N2) on the bus line (10),

-setting a transition from a first impedance (Z1) to a second impedance (Z2) at a predefined first point in time (T1) for a stepwise matching of the impedances, wherein the first impedance (Z1) is lower than the second impedance (Z2), and

-the step-wise matching of the impedances sets a transition from the second impedance (Z2) to a third impedance (Z3) at a second point in time (T2) following the first point in time (T1), wherein the second impedance (Z2) is lower than the third impedance (Z3).

2. The bus system as set forth in claim 1,

the first impedance (Z1) is lower than the wave resistance of the bus line (10),

the second impedance (Z2) lies in the range of the wave resistance of the bus line (10) taking into account a predefined maximum permissible deviation from the wave resistance of the bus line (10), and

the third impedance (Z3) is higher than the wave resistance of the bus line (10).

3. Bus system according to one of the preceding claims,

the terminating resistor (20) is associated with a structural unit of the first bus subscriber (N1) and is arranged in particular in a housing of the first bus subscriber (N1), and/or

The line spacing between the second bus user (N2) and the position of the terminating resistor (20) corresponds to at least ten times the line spacing between the first bus user (N1) and the position of the terminating resistor (20).

4. Bus system according to one of the preceding claims,

said first bus subscriber (N1) uses a data transmission rate of up to 500kbit/s and preferably up to 1Mbit/s,

the second bus user (N2) uses a data transmission rate of up to 2Mbit/s, preferably up to 5Mbit/s and particularly preferably up to 8 Mbit/s.

5. Bus system according to one of the preceding claims, further having at least one third bus subscriber (N3), wherein,

the third bus user (N3) is designed to be identical to the second bus user (N2) and/or is provided for carrying out data communication with the first bus user (N1) and/or the second bus user (N2) and/or

The second bus user (N2) and the third bus user (N3) are sensors.

6. Bus system according to one of the preceding claims,

the bus system is a master/slave bus system in which the first bus user (N1) is a bus master which controls bus accesses by the respective bus user (N2, N3) and all further bus users (N2, N3) are each a bus slave or a bus slave

The bus system is as follows: in the bus system, bus access by the respective bus users (N1, N2, N3) is controlled by means of an arbitration program.

7. A bus system according to claim 6, wherein the data transfer rate of a bus master within the master/slave bus system is lower than the data transfer rate of the corresponding bus slave.

8. Bus system according to one of the preceding claims, wherein the bus system is a CAN bus system and at least bus users (N2, N3) different from the first bus user (N1) have CAN-SIC transceivers and/or CAN-XL transceivers in SIC mode for matching the impedances step by step.

9. Bus system according to one of the preceding claims, wherein the supply of electrical energy to the respective bus subscriber takes place via the bus line (10), and in particular is provided via a first bus subscriber (N1) on the bus line (10).

10. A bus system according to any one of the preceding claims, wherein the bus system is a bus system of a vehicle.