CN115933306B - Optical proximity correction method - Google Patents

Optical proximity correction method Download PDF

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CN115933306B
CN115933306B CN202310220405.5A CN202310220405A CN115933306B CN 115933306 B CN115933306 B CN 115933306B CN 202310220405 A CN202310220405 A CN 202310220405A CN 115933306 B CN115933306 B CN 115933306B
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pattern
main
patterns
optical proximity
proximity correction
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CN115933306A (en
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王康
罗招龙
苏正龙
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Nexchip Semiconductor Corp
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Nexchip Semiconductor Corp
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Abstract

The invention provides an optical proximity correction method, which is characterized in that a first pattern group is formed by screening out main patterns with the distance between the tail end lines of all metal layer patterns and hole structure patterns covered by the metal layer patterns larger than a preset value from all the main patterns; then, screening out main graph groups of which the line end spacing between two graphs corresponding to all adjacent two main graphs after optical proximity correction is in a first preset range from all the main graphs to form a second graph group; then, a main graph group overlapped with the first graph group is screened out from the second graph group to form a third graph group; and finally, adjusting the length of the outgrowth of the tail end line iteration of each main pattern in the third pattern group, so that the metal layer pattern in each exposed main pattern completely covers the hole structure pattern. The method provided by the invention can simultaneously consider the photoetching process window and the OPC convergence degree, can avoid the circuit connection problem and improve the product yield.

Description

Optical proximity correction method
Technical Field
The invention relates to the technical field of semiconductor manufacturing, in particular to an optical proximity correction method.
Background
Model-based optical proximity correction (MB-OPC) is widely used from the 90nm technology node. However, as nodes advance step by step, the layout becomes more and more complex. In the OPC correction process, the situation that a conflict is formed between a process window and the OPC convergence degree is unavoidable. At present, OPC convergence is sacrificed to ensure that the photoresist on the wafer is not bridged. The method specifically comprises the steps of setting the minimum value of the line width CD or the space of the graph after OPC correction as X, so as to avoid the problem that the bridging of the graph on the photoresist on the wafer is caused by the fact that the line width CD or the space of the graph after OPC correction is smaller than X. However, this method has some defects, especially for the metal layer, the problem of poor overlay accuracy of the upper and lower layers is easy to occur, and the metal layer may not completely cover the contact hole or the through hole, which results in circuit connection problem and affects the product yield.
Disclosure of Invention
The invention aims to provide an optical proximity correction method so as to improve the OPC convergence of a layout while guaranteeing the process window of the layout, avoid the problem of circuit connection and improve the product yield.
To achieve the above and other related objects, the present invention provides an optical proximity correction method, comprising the steps of:
determining a test layout corresponding to a prefabricated layout, wherein the test layout comprises a plurality of main patterns, and each main pattern comprises a metal layer pattern and a hole structure pattern covered by the metal layer pattern;
screening out main patterns with the distances between the tail end lines of all the metal layer patterns and the hole structure patterns covered by the metal layer patterns larger than a preset value from all the main patterns to form a first pattern group;
screening out main pattern groups of which the line end intervals between two patterns corresponding to all adjacent two main patterns after optical proximity correction are positioned in a first preset range from all the main patterns to form a second pattern group;
screening out a main graph group overlapped with the first graph group from the second graph group to form a third graph group;
and adjusting the length of the outgrowth of the tail end line iteration of each main pattern in the third pattern group, so that the metal layer patterns in each exposed main pattern completely cover the hole structure patterns.
Optionally, in the optical proximity correction method, the step of screening out, from all the main patterns, a main pattern group in which a line-end distance between two patterns after optical proximity correction corresponding to all two adjacent main patterns is located within a first preset range includes:
performing optical proximity correction on all the main patterns to obtain patterns after the optical proximity correction;
screening out all the graph groups after optical proximity correction, wherein the line end spacing between every two adjacent graphs after optical proximity correction is located in the first preset range, from the graphs after optical proximity correction;
and determining a corresponding main graph group according to the screened graph group subjected to the optical proximity correction.
Optionally, in the optical proximity correction method, the step of screening out, from all the main patterns, a main pattern group in which a line-end distance between two patterns after optical proximity correction corresponding to all two adjacent main patterns is located within a first preset range includes:
determining a second layout rule value corresponding to the main pattern and conforming to the layout design rule of the adjacent main pattern, acquiring a second preset range according to the second layout rule value, and screening out a main pattern group with line end distances between all adjacent two main patterns within the second preset range so as to ensure that the line end distances between two patterns after optical proximity correction corresponding to all adjacent two main patterns in the main pattern group are within a first preset range.
Optionally, in the optical proximity correction method, the second preset range is the second layout rule value to the second layout rule value+n, and the range of N is 1/4 of the second layout rule value to 1/3 of the second layout rule value.
Optionally, in the optical proximity correction method, the first preset range is a mask rule value to a mask rule value+m, the m range is 1nm to 2nm, and the mask rule value is determined according to a layout mask design rule corresponding to the main pattern.
Optionally, in the optical proximity correction method, the preset value range is 1.5 times of a first layout rule value to 2 times of a first layout rule value, and the first layout rule value is determined according to a layout design rule corresponding to the metal layer pattern and the hole structure pattern in the main pattern.
Optionally, in the optical proximity correction method, the step of adjusting the length of the outgrowth when the end line of each main pattern in the third pattern group iterates includes:
and carrying out optical proximity correction on the line edge of each main pattern in the third pattern group by using model-based optical proximity correction software, and adjusting the length of outward growth during iteration of the tail end line of the main pattern in the optical proximity correction process so that the metal layer pattern in each exposed main pattern completely covers the hole structure pattern.
Optionally, in the optical proximity correction method, in the step of screening out a main pattern group overlapping with the first pattern group from the second pattern group, the overlapping main pattern is confirmed; and in the step of adjusting the length of the outgrowth of the tail end line iteration of each main pattern in the third pattern group, limiting the length of the outgrowth of the tail end line iteration of the overlapped main patterns, so that the metal layer patterns in each main pattern after exposure completely cover the hole structure patterns.
Optionally, in the optical proximity correction method, the length of the outgrowth is 5 nm-10 nm when the terminal line of the overlapped main pattern iterates.
Optionally, in the optical proximity correction method, the hole structure pattern includes a contact hole pattern and/or a via hole pattern.
Compared with the prior art, the technical scheme of the invention has the following beneficial effects:
the invention provides an optical proximity correction method, which is characterized in that a first pattern group is formed by screening out main patterns with the distance between the tail end lines of all metal layer patterns and hole structure patterns covered by the metal layer patterns larger than a preset value from all the main patterns; then, screening out main graph groups of which the line end spacing between two graphs corresponding to all adjacent two main graphs after optical proximity correction is in a first preset range from all the main graphs to form a second graph group; then, a main graph group overlapped with the first graph group is screened out from the second graph group to form a third graph group; finally, the length of the outgrowth of the tail end line of each main pattern in the third pattern group during iteration is adjusted, so that the metal layer pattern in each main pattern after exposure completely covers the hole structure pattern, the OPC convergence degree and the process window of the corrected main pattern are ensured to meet the design requirements, meanwhile, the circuit connection problem caused by the fact that the metal layer does not completely cover the hole structure is solved, and the overlay precision and the product yield are improved.
Drawings
FIG. 1 is a graph after optical proximity correction;
FIG. 2 is a schematic diagram of a structure in which the line-end spacing between two adjacent optical proximity corrected patterns is less than X;
FIG. 3 is a scanning electron microscope image of a pattern of photoresist obtained after exposing a wafer according to the pattern of FIG. 2;
FIG. 4 is a schematic diagram of a structure in which the line-end spacing between two adjacent optical proximity corrected patterns is not less than X;
FIG. 5 is a scanning electron microscope image of a pattern of photoresist obtained after exposing a wafer according to the pattern of FIG. 4;
FIG. 6 is a schematic diagram of a structure simulating an exposed photoresist pattern;
FIG. 7 is a flow chart of an optical proximity correction method according to an embodiment of the invention;
FIG. 8 is a schematic diagram of the structure of the end line of the metal layer pattern of the selected two main patterns according to an embodiment of the present invention;
FIG. 9 is a schematic structural diagram of a main pattern in which the distance between the end line of the metal layer pattern and the hole structure pattern covered by the metal layer pattern is larger than a preset value;
FIG. 10 is a schematic diagram of a structure of two selected adjacent optical proximity correction patterns according to an embodiment of the present invention;
FIG. 11 is a schematic diagram of a structure for determining two adjacent main patterns and the end lines of the two main patterns according to the two adjacent corrected patterns selected in FIG. 10;
FIG. 12 is a schematic diagram of the structure of two main patterns selected in another embodiment of the present invention;
FIG. 13 is a schematic diagram of a structure of a selected overlaid master pattern in an embodiment of the invention;
FIG. 14 is a schematic view of the structure of limiting the out-growth during an end line iteration in an embodiment of the invention;
in fig. 1 to 6:
01-a test layout, 0111-a first metal layer pattern, 0112-a first hole structure pattern, 0121-a second metal layer pattern, 0122-a second hole structure pattern, 02-a photoresist pattern, 021-a first photoresist pattern, 022-a second photoresist pattern, 03-an optical proximity corrected pattern, 031-a first optical proximity corrected pattern, 032-a second optical proximity corrected pattern, 04-photoresist;
in fig. 7 to 14:
11-metal layer patterns, 12-hole structure patterns, 20-photoresist patterns and 30-patterns after optical proximity correction.
Detailed Description
Specific embodiments of the present invention will be described in more detail below with reference to the drawings. The advantages and features of the present invention will become more apparent from the following description. It should be noted that the drawings are in a very simplified form and are all to a non-precise scale, merely for convenience and clarity in aiding in the description of embodiments of the invention.
As described in the background, the technology for correcting the layout to avoid the optical proximity effect is currently optical proximity correction (OpticalProximity Correction, OPC) technology. After the model-based optical proximity correction method is widely applied, the general optical proximity effect can be well compensated, so that the pattern on the chip can be finally close to the size and shape of the target pattern as much as possible. The OPC correction method based on the model is to simulate the photoetching patterns of different patterns under specific conditions so as to compensate the pattern distortion caused by the optical proximity effect, and continuously correct and simulate the patterns to obtain the corrected patterns which can be closest to the target patterns.
The model-based OPC correction method uses an optical model and a photoresist model to calculate an exposed pattern. Referring to fig. 1, the model-based optical proximity correction software first identifies edges of the test layout 01, allowing each edge to move freely. In general, there will be a plurality of lattice points on the edges of the test layout 01, and free movement of each edge is realized through the lattice points. The software simulates the edges of the exposed photoresist pattern 02 and compares them with the test layout 01, the difference between them being called edge placement error (edge placement error, EPE). The EPE is an index for measuring correction quality, and small edge placement errors mean that the exposed pattern is close to the test pattern (i.e. the target pattern), and the OPC convergence is better.
However, as nodes advance step by step, the layout becomes more and more complex. The conflict between the process window and the OPC convergence degree is inevitably encountered in the optical proximity correction process. For example, as shown in fig. 2 to 5, when s (line width CD or pitch) < X of the pattern 03 after the optical proximity correction, the photoresist 04 on the wafer has a bridging problem. And when s (line width CD or space) of the graph 03 after the optical proximity correction is more than or equal to X, the photoresist 04 on the wafer is not bridged. The graph 03 after the optical proximity correction is a graph obtained by performing the optical proximity correction on the test layout 01.
At present, OPC convergence is sacrificed to ensure that the photoresist on the wafer is not bridged. The specific method is as follows: and setting the minimum value of the line width CD or the spacing of the patterns after the optical proximity correction as X so as to avoid the problem that the patterns on the photoresist on the wafer are bridged due to the fact that the line width CD or the spacing of the patterns after the optical proximity correction is smaller than X. However, this approach has some drawbacks, particularly with respect to the metal layer. Referring to fig. 6, fig. 6 illustrates a first metal layer pattern 0111, a first hole structure pattern 0112 covered by the first metal layer pattern 0111, a second metal layer pattern 0121, and a second hole structure pattern 0122 covered by the second metal layer pattern 0121. The line end distance s of the first optical proximity corrected pattern 031 obtained after the optical proximity correction is performed on the first metal layer pattern 0111 and the second optical proximity corrected pattern 0121 is equal to X, the optical proximity corrected pattern is used as a mask pattern to perform software simulation so as to simulate an exposed photoresist pattern, and it can be found that the EPE between the edges of the exposed photoresist pattern and the metal layer pattern simulated by the software is very large. The first post-exposure photoresist pattern 021 simulated by the first post-optical proximity correction pattern 031 software and the second post-exposure second photoresist pattern 022 simulated by the second post-optical proximity correction pattern 032 software in fig. 6, the EPE between the second metal layer pattern 0121 and the edge of the second post-exposure photoresist pattern 022 simulated by the software generally reaches about-19 nm, and the second post-exposure photoresist pattern 022 simulated by the software does not completely cover the second hole structure pattern 0122, i.e. the prepared metal layer may not completely cover the contact hole or the through hole, the problem of poor alignment precision of the upper layer and the lower layer easily occurs, which leads to the problem of circuit connection and influences the product yield.
Therefore, the invention provides an optical proximity correction method, which can improve the OPC convergence of the layout while guaranteeing the process window of the layout, avoid the circuit connection problem, and finally improve the product yield and promote the development progress.
Referring to fig. 7, the optical proximity correction method provided by the present invention includes the following steps:
determining a test layout corresponding to a prefabricated layout, wherein the test layout comprises a plurality of main patterns, and each main pattern comprises a metal layer pattern and a hole structure pattern covered by the metal layer pattern;
screening out main patterns with the distances between the tail end lines of all the metal layer patterns and the hole structure patterns covered by the metal layer patterns larger than a preset value from all the main patterns to form a first pattern group;
screening out main pattern groups of which the line end intervals between two patterns corresponding to all adjacent two main patterns after optical proximity correction are positioned in a first preset range from all the main patterns to form a second pattern group;
screening out a main graph group overlapped with the first graph group from the second graph group to form a third graph group;
and adjusting the length of the outgrowth of the tail end line iteration of each main pattern in the third pattern group, so that the metal layer patterns in each exposed main pattern completely cover the hole structure patterns.
The order of execution of the steps of forming the first pattern group and the steps of forming the second pattern group of the present invention may vary. For example, in this embodiment, the step of forming the first pattern group may be performed first, and then the step of forming the second pattern group may be performed. In other embodiments the step of forming the second pattern group may be performed first and then the step of forming the first pattern group may be performed, although there may be a step of forming the second pattern group and a step of forming the first pattern group performed simultaneously.
In the step of determining a test layout corresponding to the prefabricated layout, the test layout may include a plurality of main patterns, and each of the main patterns includes a metal layer pattern and a hole structure pattern covered by the metal layer pattern. The hole structure pattern may include a contact hole pattern and/or a via hole pattern. In this embodiment, the corresponding test layout can be determined according to the prefabricated layout, so as to verify whether the photolithography process window and the OPC convergence degree of each main pattern in the prefabricated layout meet the design requirements at the same time through the subsequent steps, and if not, OPC correction can be performed in time, thereby effectively improving the product yield and advancing the development progress.
In the step of screening the first pattern group from all the main patterns, the distance between the tail end line of the metal layer pattern of the main pattern in the first pattern group and the hole structure pattern covered by the metal layer pattern needs to be larger than the preset value Y. The preset value Y can be obtained according to the first layout rule value. In general, when designing a test layout, a hole structure pattern and a metal layer pattern in the test layout need to satisfy a certain design rule, for example, distance settings between patterns, between patterns and lines, and between lines need to be within a design rule range. The design rule values for the test layout may be provided by the manufacturer. The first layout rule value in this embodiment is determined according to a layout design rule corresponding to the metal layer pattern and the hole structure pattern in the main pattern, and specifically, the first layout rule value is a minimum distance value to be satisfied between the hole structure pattern and a terminal line of the metal layer pattern during the test layout design, and the minimum distance value can be provided by a manufacturer.
The range of the preset value Y can be 1.5 times of the first layout rule value to 2 times of the first layout rule value. The optimum value of the preset value Y may be different due to the different exposure conditions. Therefore, the optimum preset value Y under a certain exposure condition can be determined by a plurality of experiments. For example, when designing a test layout, setting the distance between the hole structure pattern and the terminal line of the metal layer pattern to be 1.5 times of a first layout rule value; then optical proximity correction and software simulation are carried out on the designed test layout, and a simulated photoresist pattern after exposure is obtained; and finally judging whether the photoresist pattern just completely covers the hole structure pattern. If the coverage is just complete, the optimal value of the preset value Y is a first layout rule value which is 1.5 times; and if the pattern is not completely covered, changing the distance between the hole structure pattern and the tail end line of the metal layer pattern into a first layout rule value which is 1.6 times, then carrying out optical proximity correction and software simulation on the designed test layout again, obtaining the simulated photoresist pattern after exposure again, and judging whether the obtained simulated photoresist pattern just completely covers the hole structure pattern again. If the coverage is just complete, the optimal value of the preset value Y is 1.6 times of the first layout rule value. And if the pattern is not covered, changing the distance between the hole structure pattern and the tail end line of the metal layer pattern into a first layout rule value which is 1.7 times and 1.8 times, and repeating the process until the simulated exposed photoresist pattern just completely covers the hole structure pattern. The optical proximity correction and the parameter setting of the software simulation in each test process are completely the same, the difference is only the distance between the hole structure pattern in the test layout and the tail end line of the metal layer pattern, and the optimal preset value Y under the exposure condition is obtained by continuously changing the distance setting.
In this embodiment, when the distance between the terminal line of the metal layer pattern and the hole structure pattern covered by the metal layer pattern is greater than the preset value Y, the photoresist pattern obtained by performing software exposure simulation on the metal layer pattern may completely cover the hole structure pattern; otherwise, the photoresist pattern obtained after the metal layer pattern is subjected to software exposure simulation cannot completely cover the hole structure pattern.
In this embodiment, the main patterns with the distance between the terminal lines of all the metal layer patterns and the hole structure patterns covered by the metal layer patterns being greater than the preset value Y are selected from all the main patterns, so as to form a first pattern group.
The embodiment can firstly confirm and select all main patterns, and confirm and select the terminal line of the metal layer pattern of all main patterns, the terminal line of the metal layer pattern is regarded as the terminal line of the main pattern; and then screening out main patterns with the distance between the tail end line of the metal layer pattern and the hole structure pattern covered by the metal layer pattern larger than the preset value Y from all the main patterns to form the first pattern group. For example, fig. 8 shows two adjacent metal layer patterns 11 of the main patterns, and the end lines a and b of the metal layer patterns of the two main patterns and the two main patterns are confirmed to be selected. Fig. 9 shows that the distance S1 between the end line a and the hole pattern 12 is greater than the preset value Y, and the distance S2 between the end line b and the hole pattern 12 is less than the preset value Y, so that the main pattern corresponding to the end line a (the thick line in fig. 9 indicates only that it is confirmed to be selected or screened out) is screened out.
In the step of screening the second pattern group from all the main patterns, the second pattern group comprises a plurality of main pattern groups formed by two adjacent main patterns, and the line end distance between two patterns after optical proximity correction corresponding to the two adjacent main patterns is positioned in the first preset range. The first preset range is set according to a mask rule value, and the mask rule value is determined according to a layout mask design rule corresponding to the main graph. The mask manufacturer sets a mask rule value for each type of layout according to the exposure and development conditions of the actual layout, namely, the minimum spacing or the minimum line width CD of the layout under the guarantee of a photoetching process window. Therefore, in the process of OPC correction of the test layout corresponding to the prefabricated layout, the line end distance between two adjacent main patterns in the test layout which is required to be corrected is not smaller than the mask rule value.
In this embodiment, the mask rule value may be obtained according to multiple tests. For example, under the same exposure system condition, the CD value of the mask plate is changed for multiple times, namely, the line end distance between two patterns after optical proximity correction corresponding to two adjacent main patterns is changed for multiple times, then software simulation is carried out, the simulated exposed photoresist patterns are obtained, and whether the obtained photoresist patterns have a bridging problem is judged. And when the obtained photoresist pattern has no bridging problem, the CD value of the mask corresponding to the photoresist pattern is the mask rule value.
Fig. 10 to 11 show a method of screening out the second pattern group. The method specifically comprises the following steps:
performing optical proximity correction on all the main patterns to obtain patterns after the optical proximity correction;
screening out all the graph groups after optical proximity correction, wherein the line end spacing between every two adjacent graphs after optical proximity correction is located in the first preset range, from the graphs after optical proximity correction;
and determining a corresponding main graph group according to the screened graph group subjected to the optical proximity correction.
In the step of performing optical proximity correction on all the main patterns, in this embodiment, the optical proximity correction is performed on the main patterns of the test layout according to the mask rule values, so as to obtain patterns after the optical proximity correction. Because the optical proximity correction is performed according to the mask rule value, the line end distance between all the adjacent two patterns subjected to the optical proximity correction is not smaller than the mask rule value, so that the process window of the corrected main pattern can be ensured to meet the design requirement.
The first preset range in this embodiment is set according to the mask rule value, where the first preset range is preferably mask rule value-mask rule value+m, and m is preferably 1 nm-2 nm. When the line-end distance between two patterns after optical proximity correction corresponding to two adjacent main patterns is within the first preset range, and the distance between the tail end line of the metal layer pattern and the hole structure pattern covered by the metal layer pattern is not greater than the main pattern with the preset value Y in the two adjacent main patterns, the photoresist pattern after exposure of the main pattern (namely, the distance between the tail end line of the metal layer pattern and the hole structure pattern covered by the metal layer pattern is not greater than the main pattern with the preset value Y) simulated by software cannot completely cover the hole structure pattern. The invention can solve the problem that the exposed photoresist pattern cannot completely cover the hole structure pattern through the subsequent steps.
And screening out the graph group after the optical proximity correction after the step of carrying out the optical proximity correction on all the main graphs. In this embodiment, corrected pattern groups in which the line-end distances between all adjacent two corrected patterns are within the first preset range are selected. For example, fig. 10 shows a set of two adjacent optical proximity corrected patterns 30, and if the distance S3 between the end line c and the end line d of the two adjacent optical proximity corrected patterns 30 is within the first preset range, the set of two adjacent optical proximity corrected patterns 30 are simultaneously selected.
After the step of screening out the graph group after the optical proximity correction, determining a corresponding main graph group according to the screened graph group after the correction. For example, in fig. 11, two adjacent main patterns corresponding to each other may be determined according to the two selected adjacent corrected patterns 30, and the end lines of the two main patterns are a1 and b1.
Fig. 12 shows another method of screening out the second group of graphics. The method of the embodiment may not perform the optical proximity correction process, and may directly screen the second pattern group. The method specifically comprises the following steps:
determining a second layout rule value corresponding to the main pattern and conforming to the layout design rule of the adjacent main pattern, acquiring a second preset range according to the second layout rule value, and screening out a main pattern group with line end distances between all adjacent two main patterns within the second preset range so as to ensure that the line end distances between two patterns after optical proximity correction corresponding to all adjacent two main patterns in the main pattern group are within a first preset range. For example, in fig. 12, the distance S4 between the end lines a1 and b1 of two adjacent main patterns is within a second preset range, and the two main patterns are selected.
The second layout rule value in this embodiment is a minimum distance value (min rule) that needs to be satisfied between the end lines of the adjacent metal layer patterns when the test layout is designed, where the minimum distance value is provided by a manufacturer. The second preset range is the second layout rule value to the second layout rule value plus N, and N is preferably a second layout rule value of 1/4 to a second layout rule value of 1/3. The inventor researches find that only if the line-end distance between two adjacent main patterns is within the second preset range, the CD value of the mask (the line-end distance between the patterns after the optical proximity correction of the two main patterns) can be within the first preset range after the optical proximity correction of the two main patterns. Therefore, in this embodiment, the line-end spacing between all the adjacent two main patterns is located in the main pattern group in the second preset range, so that the line-end spacing between two patterns after optical proximity correction corresponding to all the adjacent two main patterns in the main pattern group can be ensured to be located in the first preset range.
And screening out a main graph group overlapped with the first graph group from the second graph group, wherein in the step of forming a third graph group, at least one main graph of two adjacent main graphs in each screened main graph group and the main graph of the first graph group are the same main graph.
And in the step of adjusting the length of the outgrowth of the tail end line iteration of each main pattern in the third pattern group, performing optical proximity correction on the line edge of each main pattern in the third pattern group by using optical proximity correction software based on a model, and enabling the exposed metal layer pattern in each main pattern to completely cover the hole structure pattern by adjusting the length of the outgrowth of the tail end line iteration of the main pattern in the optical proximity correction process.
In this embodiment, the optical proximity correction is performed on the main pattern in the third pattern group according to the mask rule value, so as to obtain an optical proximity corrected pattern. In this embodiment, the optical proximity correction is performed on each main pattern in the third pattern group according to the mask rule value, so that the line end distances between all adjacent two patterns after the optical proximity correction are finally obtained and are not smaller than the mask rule value, thereby ensuring that the process window of the corrected main pattern meets the design requirement.
In this embodiment, in the step of screening out the main pattern group overlapping with the first pattern group from the second pattern group, it is also necessary to confirm the overlapping main pattern, and at the same time, it is also possible to confirm the end line e of the metal layer pattern in the overlapping main pattern, where the distance between the metal layer pattern and the hole structure pattern is greater than the preset value Y, and in the step of adjusting the length of the end line of each main pattern in the third pattern group that grows outwards during iteration, the length of the end line e that grows outwards during iteration is limited, so that the metal layer pattern in each main pattern after exposure completely covers the hole structure pattern. For example, referring to fig. 13 and 14, it is confirmed that the end line e of the metal layer pattern having a distance from the hole structure pattern greater than the preset value Y in the overlapped main pattern is located, and the length of the end line e that grows outwards during iteration is limited, so that the exposed photoresist pattern 20 of the main pattern adjacent to the end line e, which is simulated by software, can completely cover the hole structure pattern 12, and the photoresist pattern 20 is the exposed metal layer pattern. In this embodiment, the length of the tail line e of the overlapped main pattern grown outwards during iteration is preferably 5nm to 10nm. Because the optical proximity correction is required to be performed on each main pattern in the third pattern group according to the mask rule value, the line-end spacing between all adjacent two patterns after the optical proximity correction is finally obtained to be within the first preset range. That is, in the optical proximity correction process, it is required to ensure that the distance between the end line e and the end line of the adjacent main pattern is within the first preset range, so when the length of the main pattern adjacent to the end line e is reduced during iteration, the length of the main pattern adjacent to the end line e during iteration is increased, so that the exposed pattern simulated by the main pattern software adjacent to the end line e can completely cover the hole structure pattern, that is, the exposed metal layer pattern can completely cover the hole structure pattern, the problem of circuit connection caused by the fact that the metal layer pattern does not completely cover the hole structure pattern can be solved, and the main pattern EPE adjacent to the end line e can be reduced, for example, the EPE in fig. 14 is 0, so that the OPC convergence degree meets the design requirement, and further, the overlay accuracy and the product yield can be improved.
The present embodiment can determine the optimal value of the outgrowth at the iteration of the end line e through a plurality of experiments. For example, in the optical proximity correction process, the length of the end line e which grows outwards in an iterative mode is set to be 10nm, after the optical proximity correction is completed, a simulated exposed photoresist pattern is obtained through software simulation, and whether the exposed photoresist pattern simulated by the main pattern adjacent to the end line e completely covers the hole structure pattern is judged. If yes, the optimal value of the length of the outgrowth in the iteration of the tail end line e is 10nm; otherwise, readjusting the length of the outgrowth of the iterative terminal line e, for example, adjusting to 8nm, then after finishing optical proximity correction, simulating by software, and judging again whether the simulated exposed photoresist pattern of the main pattern adjacent to the terminal line e completely covers the hole structure pattern, and sequentially cycling until the simulated exposed photoresist pattern of the main pattern adjacent to the terminal line e just completely covers the hole structure pattern.
The optical proximity correction method can ensure that the adjusted main patterns not only meet the design requirement of a photoetching process window, but also ensure that the metal layer patterns in each main pattern after exposure completely cover the hole structure patterns, ensure that the OPC convergence degree of the corrected main patterns accords with the design requirement, and solve the circuit connection problem caused by the fact that the metal layer patterns do not completely cover the hole structure patterns, thereby improving the alignment precision and the product yield. The optical proximity correction method can provide good guarantee for the accuracy of the follow-up OPC correction, can also reduce the time of LRC inspection, accelerate the T/O speed and promote the development progress.
In addition, it will be understood that while the invention has been described in terms of preferred embodiments, the above embodiments are not intended to limit the invention. Many possible variations and modifications of the disclosed technology can be made by anyone skilled in the art without departing from the scope of the technology, or the technology can be modified to be equivalent. Therefore, any simple modification, equivalent variation and modification of the above embodiments according to the technical substance of the present invention still fall within the scope of the technical solution of the present invention.
It is also to be understood that this invention is not limited to the particular methodology, compounds, materials, manufacturing techniques, uses, and applications described herein, as such may vary. It should also be understood that the terminology described herein is for the purpose of describing particular embodiments only, and is not intended to limit the scope of the present invention. It must be noted that, as used herein and in the appended claims, the singular forms "a," "an," and "the" include plural referents unless the context clearly dictates otherwise. Thus, for example, reference to "a step" means a reference to one or more steps, and may include sub-steps. All conjunctions used should be understood in the broadest sense. Thus, the word "or" should be understood as having the definition of a logical "or" rather than a logical exclusive or "unless the context clearly indicates the contrary. Structures described herein will be understood to also refer to the functional equivalents of such structures. Language that may be construed as approximate should be construed unless the context clearly indicates the contrary.

Claims (8)

1. An optical proximity correction method is characterized by comprising the following steps:
determining a test layout corresponding to a prefabricated layout, wherein the test layout comprises a plurality of main patterns, and each main pattern comprises a metal layer pattern and a hole structure pattern covered by the metal layer pattern;
screening out main patterns with the distances between the tail end lines of all the metal layer patterns and the hole structure patterns covered by the metal layer patterns larger than a preset value from all the main patterns to form a first pattern group, wherein the range of the preset value is 1.5 times of a first layout rule value to 2 times of a first layout rule value, and the first layout rule value is determined according to the layout rule corresponding to the metal layer patterns and the hole structure patterns in the main patterns;
screening out main pattern groups of which the line end distances between two patterns corresponding to all adjacent two main patterns after optical proximity correction are located in a first preset range from all the main patterns to form a second pattern group, wherein the first preset range is a mask rule value-a mask rule value +m, the range of m is 1 nm-2 nm, and the mask rule value is determined according to a layout mask design rule corresponding to the main patterns;
screening out a main graph group overlapped with the first graph group from the second graph group to form a third graph group;
and adjusting the length of the outgrowth of the tail end line iteration of each main pattern in the third pattern group, so that the metal layer patterns in each exposed main pattern completely cover the hole structure patterns.
2. The optical proximity correction method as set forth in claim 1, wherein the step of screening out a main pattern group having a line-end spacing between two optical proximity corrected patterns corresponding to all adjacent two of the main patterns within a first preset range from all the main patterns comprises:
performing optical proximity correction on all the main patterns to obtain patterns after the optical proximity correction;
screening out all the graph groups after optical proximity correction, wherein the line end spacing between every two adjacent graphs after optical proximity correction is located in the first preset range, from the graphs after optical proximity correction;
and determining a corresponding main graph group according to the screened graph group subjected to the optical proximity correction.
3. The optical proximity correction method as set forth in claim 1, wherein the step of screening out a main pattern group having a line-end spacing between two optical proximity corrected patterns corresponding to all adjacent two of the main patterns within a first preset range from all the main patterns comprises:
determining a second layout rule value corresponding to the main pattern and conforming to the layout design rule of the adjacent main pattern, acquiring a second preset range according to the second layout rule value, and screening out a main pattern group with line end distances between all adjacent two main patterns within the second preset range so as to ensure that the line end distances between two patterns after optical proximity correction corresponding to all adjacent two main patterns in the main pattern group are within a first preset range.
4. The optical proximity correction method according to claim 3, wherein the second preset range is the second layout rule value to the second layout rule value +n, and N ranges from the second layout rule value of 1/4 to the second layout rule value of 1/3.
5. The optical proximity correction method of claim 1 wherein the step of adjusting the length of the outgrowth at the iteration of the end line of each main pattern in the third pattern group comprises:
and carrying out optical proximity correction on the line edge of each main pattern in the third pattern group by using model-based optical proximity correction software, and adjusting the length of outward growth during iteration of the tail end line of the main pattern in the optical proximity correction process so that the metal layer pattern in each exposed main pattern completely covers the hole structure pattern.
6. The optical proximity correction method according to claim 1, wherein in the step of screening out a main pattern group overlapping with the first pattern group from the second pattern group, overlapping main patterns are confirmed; and in the step of adjusting the length of the outgrowth of the tail end line iteration of each main pattern in the third pattern group, limiting the length of the outgrowth of the tail end line iteration of the overlapped main patterns, so that the metal layer patterns in each main pattern after exposure completely cover the hole structure patterns.
7. The optical proximity correction method of claim 6, wherein the length of the outgrowth of the end line of the overlapped main pattern is 5nm to 10nm in iteration.
8. The optical proximity correction method of claim 1, wherein the hole structure pattern comprises a contact hole pattern and/or a via hole pattern.
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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114460806A (en) * 2022-01-28 2022-05-10 上海华力集成电路制造有限公司 OPC correction method
WO2022110902A1 (en) * 2020-11-30 2022-06-02 无锡华润上华科技有限公司 Optical proximity correction method, mask, and readable storage medium
CN114609858A (en) * 2022-05-11 2022-06-10 合肥晶合集成电路股份有限公司 Optical proximity correction method and device and electronic equipment

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102855360A (en) * 2012-09-11 2013-01-02 中国科学院微电子研究所 Optimization design method of nano-process metal layer layout
CN105226007B (en) * 2014-06-13 2018-10-16 中芯国际集成电路制造(上海)有限公司 The production method of metal interconnection structure
CN105137711B (en) * 2015-08-11 2019-08-20 上海华力微电子有限公司 The detection method of position is bridged in metal hard mask integration etching
US10262099B2 (en) * 2017-02-28 2019-04-16 Globalfoundries Inc. Methodology for model-based self-aligned via awareness in optical proximity correction
CN109494185B (en) * 2018-10-31 2021-12-07 上海华力微电子有限公司 Optical proximity correction method for optimizing connection performance of through hole layer
US11036911B2 (en) * 2019-09-26 2021-06-15 Taiwan Semiconductor Manufacturing Co., Ltd. Charging prevention method and structure
CN111025841B (en) * 2019-12-30 2023-07-25 上海集成电路研发中心有限公司 Method for optimizing optical proximity correction process window of metal wire
CN115657417A (en) * 2022-10-31 2023-01-31 上海华力微电子有限公司 Target layout optimization method

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2022110902A1 (en) * 2020-11-30 2022-06-02 无锡华润上华科技有限公司 Optical proximity correction method, mask, and readable storage medium
CN114460806A (en) * 2022-01-28 2022-05-10 上海华力集成电路制造有限公司 OPC correction method
CN114609858A (en) * 2022-05-11 2022-06-10 合肥晶合集成电路股份有限公司 Optical proximity correction method and device and electronic equipment

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