CN115909929A - Method for reducing electrical measurement misjudgment rate of display panel and electrical measurement equipment - Google Patents

Method for reducing electrical measurement misjudgment rate of display panel and electrical measurement equipment Download PDF

Info

Publication number
CN115909929A
CN115909929A CN202211573392.1A CN202211573392A CN115909929A CN 115909929 A CN115909929 A CN 115909929A CN 202211573392 A CN202211573392 A CN 202211573392A CN 115909929 A CN115909929 A CN 115909929A
Authority
CN
China
Prior art keywords
test pad
test
group
display panel
data line
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202211573392.1A
Other languages
Chinese (zh)
Inventor
伍小丰
张东琪
付浩
杜超
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Truly Renshou High end Display Technology Ltd
Original Assignee
Truly Renshou High end Display Technology Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Truly Renshou High end Display Technology Ltd filed Critical Truly Renshou High end Display Technology Ltd
Priority to CN202211573392.1A priority Critical patent/CN115909929A/en
Publication of CN115909929A publication Critical patent/CN115909929A/en
Pending legal-status Critical Current

Links

Images

Landscapes

  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

The invention discloses a method for reducing the electrical measurement misjudgment rate of a display panel and electrical measurement equipment, wherein the method comprises the following steps: setting a first group of test PADs and a second group of test PADs in the electrical measuring equipment; arranging the first group of test PADs and the second group of test PADs at intervals, and respectively connecting the first group of test PADs and the second group of test PADs with data lines in a display panel to be tested in a one-to-one correspondence manner; the positive polarity and negative polarity driving timing is alternately output to the respective data lines in units of frames. Through the test PAD who increases electricity measuring equipment to test PAD and the data line one-to-one that corresponds, and interval output positive polarity, negative polarity time sequence, avoid the appearance of the adjacent condition of data line that the polarity is the same, prevent when the electricity is surveyed, cross striation and shutter phenomenon that electricity measuring equipment misjudgement appears have solved because electricity measuring equipment is carrying out electricity time measuring to display panel, because the time sequence reason, lead to display panel to be judged by the mistake and intercept for NG article, lead to the yield to reduce, the problem that the productivity reduces.

Description

Method for reducing electrical measurement misjudgment rate of display panel and electrical measurement equipment
Technical Field
The invention relates to the technical field of display panel testing, in particular to a method for reducing the electrical measurement misjudgment rate of a display panel and electrical measurement equipment.
Background
The display panel is usually subjected to an electrical test process before shipment, thereby preventing some defective products from flowing into a rear stage. However, the existing equipment and the time sequence have the condition of misjudgment in the actual electrical measurement process, that is, the OK product is mistakenly judged as NG product interception due to the time sequence electrical measurement method, so that the conditions of yield reduction, capacity reduction and the like are caused.
As shown in fig. 1, the conventional electrical measurement device usually includes three PADs of R, G, and B to form a voltage source of a data line, and it is obvious that, referring to the electrical measurement driving timing sequence in fig. 2, positive, negative, positive, and negative positive cycles occur, and two positive data lines are in an adjacent state, so that in the actual electrical measurement operation process, a blind window phenomenon occurs on a display screen to be measured, but in fact, when the display screen is viewed in a state that a driving IC chip is bound to a rear module process, the display screen is a normal OK product. Due to poor time sequence setting, electrical testing personnel misjudge the defective products, and the product yield is reduced.
Chinese patent CN111261089B discloses a display device and an electronic apparatus, in which a control unit is disposed between a driving chip and an electrostatic test point, and when an electrostatic test is performed, the control unit is disconnected from the driving chip under the control of a first control signal and a second control signal to form a protection circuit of the driving chip.
Disclosure of Invention
In the prior art, when the display panel is electrically tested, the display panel is mistakenly judged as an NG product to be intercepted due to time sequence, so that the yield is reduced and the capacity is reduced.
Aiming at the problems, the method and the electrical measurement equipment for reducing the electrical measurement misjudgment rate of the display panel are provided, the test PAD of the electrical measurement equipment is added, the test PAD is connected with the corresponding data lines one by one, and positive polarity and negative polarity time sequences are output at intervals, so that the adjacent condition of the data lines with the same polarity is avoided, the phenomena of cross stripes and shutters caused by misjudgment of the electrical measurement equipment during electrical measurement are prevented, and the problems that the yield is reduced and the productivity is reduced due to the fact that the display panel is mistakenly judged to be an NG product to intercept due to the time sequences when the electrical measurement equipment performs electrical measurement on the display panel are solved.
In a first aspect, a method for reducing an electrical measurement misjudgment rate of a display panel includes:
step 100, setting a first group of test PADs and a second group of test PADs in the electrical measurement equipment;
200, arranging the first group of test PADs and the second group of test PADs at intervals, and respectively connecting the first group of test PADs and the second group of test PADs with data lines in a display panel to be tested in a one-to-one correspondence manner;
step 300, alternately outputting positive polarity and negative polarity driving timing sequences to the data lines by taking a frame as a unit.
In a first possible implementation manner, the number of the data lines is 6, the first group of test PADs includes a first R test PAD, a first G test PAD, and a first B test PAD, and the second group of test PADs includes a second R test PAD, a second G test PAD, and a second B test PAD.
With reference to the first possible implementation manner and the second possible implementation manner of the present invention, in a second possible implementation manner, the step 200 includes:
step 210, connecting the first R test PAD, the first G test PAD, the first B test PAD, the second R test PAD, the second G test PAD, and the second B test PAD to a first data line, a second data line, a third data line, a fourth data line, a fifth data line, and a sixth data line in the display panel to be tested in sequence;
step 220, the electrical measurement device outputs a first driving timing sequence, a second driving timing sequence, a third driving timing sequence, a fourth driving timing sequence, a fifth driving timing sequence and a sixth driving timing sequence to the first data line, the second data line, the third data line, the fourth data line, the fifth data line and the sixth data line respectively in a frame unit.
With reference to the second possible implementation manner of the present invention, in a third possible implementation manner, the step 300 includes:
step 310, outputting a positive timing sequence to the first R test PAD, the first B test PAD and the second G test PAD in an odd frame;
and step 320, outputting a negative polarity timing sequence to the first G test PAD, the second R test PAD and the second B test PAD in an even frame.
With reference to the second possible implementation manner of the present invention, in a fourth possible implementation manner, the step 300 further includes:
step 330, outputting a negative polarity timing sequence to the first R test PAD, the first B test PAD, and the second G test PAD in an odd frame;
and 340, outputting a positive timing sequence to the first G test PAD, the second R test PAD and the second B test PAD in an even frame.
In a second aspect, a display panel electrical measurement apparatus, using the method of the first aspect, includes:
a control circuit;
a first group of test PADs and a second group of test PADs;
the first group of test PADs and the second group of test PADs are respectively electrically connected with the control circuit;
the first group of test PADs and the second group of test PADs are arranged at intervals and are used for being respectively connected with the data lines in the display panel to be tested in a one-to-one corresponding mode;
the control circuit controls the first group of test PADs and the second group of test PADs to output positive polarity and negative polarity driving time sequences to the data lines at intervals by taking a frame as a unit.
In a first possible implementation manner of the electrical measurement apparatus for a display panel according to the second aspect of the present invention, the number of the data lines is 6, the first group of test PADs includes a first R test PAD, a first G test PAD, and a first B test PAD, and the second group of test PADs includes a second R test PAD, a second G test PAD, and a second B test PAD.
With reference to the first possible implementation manner of the second aspect, in a second possible implementation manner, the first R test PAD, the first G test PAD, the first B test PAD, the second R test PAD, the second G test PAD, and the second B test PAD are sequentially connected to a first data line, a second data line, a third data line, a fourth data line, a fifth data line, and a sixth data line in the display panel to be tested.
With reference to the second possible implementation manner of the second aspect, in a third possible implementation manner, the control circuit controls the first R test PAD, the first B test PAD, and the second G test PAD to output positive polarity timing in odd frames, and the control circuit controls the first G test PAD, the second R test PAD, and the second B test PAD to output negative polarity timing in even frames.
With reference to the second possible implementation manner of the second aspect, in a fourth possible implementation manner, the control circuit controls the first R test PAD, the first B test PAD, and the second G test PAD to output negative polarity timing in odd frames, and the control circuit controls the first G test PAD, the second R test PAD, and the second B test PAD to output positive polarity timing in even frames.
By adding the test PADs of the electrical measurement equipment, connecting the test PADs with the corresponding data lines one by one, and outputting the positive polarity time sequence and the negative polarity time sequence at intervals, the method and the electrical measurement equipment avoid the occurrence of the adjacent condition of the data lines with the same polarity, prevent the electrical measurement equipment from misjudging the cross striations and the louver phenomenon during the electrical measurement, and solve the problems that the display panel is mistakenly judged as an NG product to be intercepted due to the time sequence when the electrical measurement equipment performs the electrical measurement on the display panel, the yield is reduced, and the productivity is reduced.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings required to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the description below are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a schematic diagram of the connection of an electrical measurement device to a display panel in the prior art;
FIG. 2 is a schematic diagram of the drive timing of a prior art electrical measurement apparatus;
FIG. 3 is a schematic view of the electrical measuring device of the present invention in connection with a display panel;
FIG. 4 is a schematic diagram of the driving timing of the electrical measuring device in the present invention;
FIG. 5 is a first schematic diagram illustrating a method for reducing an electrical measurement error rate of a display panel according to the present invention;
FIG. 6 is a second schematic diagram illustrating a method for reducing the electrical error rate of the display panel according to the present invention;
FIG. 7 is a third schematic diagram illustrating a method for reducing an electrical measurement error rate of a display panel according to the present invention;
FIG. 8 is a fourth schematic diagram illustrating a method for reducing an electrical measurement error rate of a display panel according to the present invention;
FIG. 9 is a schematic circuit diagram of an electrical testing apparatus for a display panel according to the present invention;
Detailed Description
The technical solutions in the present invention will be described clearly and completely with reference to the accompanying drawings, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Other embodiments, which can be obtained by persons skilled in the art based on the embodiments of the present invention without creative efforts, shall fall within the protection scope of the present invention.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used in the description of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.
In the prior art, when the display panel is electrically tested, the display panel is mistakenly judged as an NG product to be intercepted due to time sequence, so that the yield is reduced, and the productivity is reduced.
Aiming at the problems, a method for reducing the electrical measurement misjudgment rate of the display panel and electrical measurement equipment are provided.
1. Method embodiment
Example 1
Preferably, as shown in fig. 5, fig. 5 is a first schematic diagram of a method for reducing an electrical measurement error rate of a display panel according to the present invention; a method for reducing the electrical measurement misjudgment rate of a display panel comprises the steps of 100, arranging a first group of test PADs 20 and a second group of test PADs 30 in electrical measurement equipment; 200, arranging the first group of test PADs 20 and the second group of test PADs 30 at intervals, and respectively connecting the first group of test PADs and the second group of test PADs with data lines in a display panel to be tested one by one; step 300, alternately outputting positive polarity and negative polarity driving timing to the respective data lines in units of frames.
The number of the data lines is 6, the first group of test PADs 20 includes a first R test PAD (RO), a first G test PAD (GO), and a first B test PAD (BO), and the second group of test PADs 30 includes a second R test PAD (RE), a second G test PAD (GE), and a second B test PAD (BE).
In general, since the electrical measurement device only has three test PADs of R, G, and B, if there are 6 data lines, each test PAD needs to be connected to two data lines, as shown in fig. 1, according to the driving timing sequence in fig. 2, a cycle with positive, negative, positive and negative polarities occurs, and the two positive data lines are in an adjacent state, so that in the actual electrical measurement operation process, the display screen to be measured has a blind window phenomenon, but is actually an OK product.
This requires that each test PAD is connected to a corresponding data line, so that even if there is a driving timing sequence that is the same, the adjacent condition of the data lines with the same polarity can be avoided as long as the positive polarity and the negative polarity driving timing sequences are input at intervals. Through the test PAD who increases electricity measuring equipment to test PAD and the data line one-to-one that corresponds, and interval output positive polarity, negative polarity time sequence, avoid the appearance of the adjacent condition of data line that the polarity is the same, prevent when the electricity is surveyed, cross striation and shutter phenomenon that electricity measuring equipment misjudgement appears have solved because electricity measuring equipment is carrying out electricity time measuring to display panel, because the time sequence reason, lead to display panel to be judged by the mistake and intercept for NG article, lead to the yield to reduce, the problem that the productivity reduces.
Example 2
Preferably, as shown in fig. 6, fig. 6 is a second schematic diagram of a method for reducing the electrical measurement misjudgment rate of the display panel in the present invention; step 200 comprises: step 210, connecting a first R test PAD (RO), a first G test PAD (GO), a first B test PAD (BO), a second R test PAD (RE), a second G test PAD (GE) and a second B test PAD (BE) in sequence with a first data line, a second data line, a third data line, a fourth data line, a fifth data line and a sixth data line in a display panel to BE tested; step 220, the electrical measurement device outputs a first driving timing sequence, a second driving timing sequence, a third driving timing sequence, a fourth driving timing sequence, a fifth driving timing sequence and a sixth driving timing sequence to the first data line, the second data line, the third data line, the fourth data line, the fifth data line and the sixth data line respectively in a frame unit.
In the present embodiment, as shown in fig. 3 and 4, fig. 3 is a schematic diagram of the connection of the electrical measuring device of the present invention and the display panel, and fig. 4 is a schematic diagram of the driving timing sequence of the electrical measuring device of the present invention;
the first driving timing, the third driving timing, and the fifth driving timing may be set to the same driving timing, and the second driving timing, the fourth driving timing, and the sixth driving timing may be set to the same driving timing. Two kinds of driving programs are output at intervals, and the condition that the polarities of adjacent data are the same is avoided.
Example 3
Preferably, as shown in fig. 7, fig. 7 is a third schematic diagram of the method for reducing the electrical measurement misjudgment rate of the display panel according to the present invention; step 300 comprises: step 310, outputting a positive timing sequence to the first R test PAD (RO), the first B test PAD (BO) and the second G test PAD (GE) in the odd frames; and step 320, outputting the negative polarity timing sequence of the first G test PAD (GO), the second R test PAD (RE) and the second B test PAD (BE) in the even frame.
In this embodiment, the first R test PAD (RO), the first G test PAD (GO), the first B test PAD (BO), the second R test PAD (RE), the second G test PAD (GE), and the second B test PAD (BE) respectively correspond to and output a first driving timing, a second driving timing, a third driving timing, a fourth driving timing, a fifth driving timing, and a sixth driving timing, the first driving timing, the third driving timing, and the fifth driving timing are the same driving timing, the second driving timing, the fourth driving timing, and the sixth driving timing are the same driving timing, the first driving timing, the third driving timing, and the fifth driving timing output a positive polarity timing at an odd number frame, and the second driving timing, the fourth driving timing, and the sixth driving timing output a negative polarity timing at an even number frame.
In some embodiments, preferably, as shown in fig. 8, fig. 8 is a fourth schematic diagram of a method for reducing an electrical measurement error rate of a display panel according to the present invention; step 300 further comprises: step 330, outputting a negative polarity sequence to the first R test PAD (RO), the first B test PAD (BO) and the second G test PAD (GE) in the odd frame; step 340, outputting the positive polarity timing sequence to the first G test PAD (GO), the second R test PAD (RE), and the second B test PAD (BE) in the even frame.
2. Electrical test apparatus embodiments
A display panel electrical measuring apparatus, as shown in fig. 9, fig. 9 is a circuit schematic diagram of a display panel electrical measuring apparatus of the present invention; the method of the first aspect is employed, comprising a control circuit 10, a first set of test PADs 20 and a second set of test PADs 30; the first group of test PADs 20 and the second group of test PADs 30 are respectively electrically connected with the control circuit 10; the first group of test PADs 20 and the second group of test PADs 30 are arranged at intervals and are used for being respectively connected with the data lines in the display panel to be tested one by one; wherein the first group of test PADs 20 comprises a first R test PAD (RO), a first G test PAD (GO), a first B test PAD (BO), and the second group of test PADs 30 comprises a second R test PAD (RE), a second G test PAD (GE), a second B test PAD (BE); the control circuit 10 controls the first group of test PADs 20 and the second group of test PADs 30 to alternately output positive polarity and negative polarity driving timings to the respective data lines in units of frames.
Preferably, the first R test PAD (RO), the first G test PAD (GO), the first B test PAD (BO), the second R test PAD (RE), the second G test PAD (GE) and the second B test PAD (BE) are sequentially connected with a first data line, a second data line, a third data line, a fourth data line, a fifth data line and a sixth data line in the display panel to BE tested.
Preferably, the control circuit 10 controls the first R test PAD (RO), the first B test PAD (BO), and the second G test PAD (GE) to output the positive polarity timing at the odd frame, and the control circuit 10 controls the first G test PAD (GO), the second R test PAD (RE), and the second B test PAD (BE) to output the negative polarity timing at the even frame. In the embodiment, a first R test PAD (RO), a first G test PAD (GO), a first B test PAD (BO), a second R test PAD (RE), a second G test PAD (GE), and a second B test PAD (BE) are respectively corresponding to and output a first driving timing, a second driving timing, a third driving timing, a fourth driving timing, a fifth driving timing, and a sixth driving timing, the first driving timing, the third driving timing, and the fifth driving timing are the same driving timing, the second driving timing, the fourth driving timing, and the sixth driving timing are the same driving timing, the first driving timing, the third driving timing, and the fifth driving timing output a positive polarity timing at odd frames, and the second driving timing, the fourth driving timing, and the sixth driving timing output a negative polarity timing at even frames.
Preferably, the control circuit 10 controls the first R test PAD (RO), the first B test PAD (BO), and the second G test PAD (GE) to output the negative polarity timing at the odd frame, and the control circuit 10 controls the first G test PAD (GO), the second R test PAD (RE), and the second B test PAD (BE) to output the positive polarity timing at the even frame.
According to the method for reducing the electrical measurement misjudgment rate of the display panel and the electrical measurement equipment, the test PADs of the electrical measurement equipment are added, the test PADs are connected with the corresponding data lines one by one, and the positive polarity time sequence and the negative polarity time sequence are output at intervals, so that the adjacent condition of the data lines with the same polarity is avoided, the phenomena of cross stripes and shutters caused by misjudgment of the electrical measurement equipment during electrical measurement are prevented, and the problems that the display panel is intercepted as an NG product due to time sequence when the electrical measurement equipment performs electrical measurement on the display panel, the yield is reduced, and the productivity is reduced are solved.
The present invention is not limited to the above embodiments, and any modifications, equivalent substitutions, improvements, etc. within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims (10)

1. A method for reducing the electrical measurement misjudgment rate of a display panel is characterized by comprising the following steps:
step 100, setting a first group of test PADs and a second group of test PADs in the electrical measurement equipment;
200, arranging the first group of test PADs and the second group of test PADs at intervals, and respectively connecting the first group of test PADs and the second group of test PADs with data lines in a display panel to be tested in a one-to-one correspondence manner;
step 300, outputting positive polarity and negative polarity driving timing sequences to the data lines at intervals by taking a frame as a unit.
2. The method of claim 1, wherein the number of the data lines is 6, the first group of test PADs comprises a first R test PAD, a first G test PAD and a first B test PAD, and the second group of test PADs comprises a second R test PAD, a second G test PAD and a second B test PAD.
3. The method for reducing the electrical measurement false positive rate of the display panel according to claim 2, wherein the step 200 comprises:
step 210, connecting the first R test PAD, the first G test PAD, the first B test PAD, the second R test PAD, the second G test PAD, and the second B test PAD to a first data line, a second data line, a third data line, a fourth data line, a fifth data line, and a sixth data line in the display panel to be tested in sequence;
step 220, the electrical measurement device outputs a first driving timing sequence, a second driving timing sequence, a third driving timing sequence, a fourth driving timing sequence, a fifth driving timing sequence and a sixth driving timing sequence to the first data line, the second data line, the third data line, the fourth data line, the fifth data line and the sixth data line respectively in a frame unit.
4. A method for reducing the electrical measurement false positive rate of a display panel according to claim 3, wherein the step 300 comprises:
step 310, outputting a positive timing sequence to the first R test PAD, the first B test PAD and the second G test PAD in an odd frame;
and step 320, outputting a negative polarity timing sequence to the first G test PAD, the second R test PAD and the second B test PAD in an even frame.
5. The method for reducing the electrical measurement false positive rate of a display panel according to claim 3, wherein the step 300 further comprises:
step 330, outputting a negative polarity timing sequence to the first R test PAD, the first B test PAD, and the second G test PAD in odd frames;
and 340, outputting a positive timing sequence to the first G test PAD, the second R test PAD and the second B test PAD in an even frame.
6. A display panel electrical measurement apparatus employing the method of any one of claims 1-5, comprising:
a control circuit;
a first group of test PADs and a second group of test PADs;
the first group of test PADs and the second group of test PADs are respectively and electrically connected with the control circuit;
the first group of test PADs and the second group of test PADs are arranged at intervals and are used for being respectively connected with the data lines in the display panel to be tested in a one-to-one correspondence mode;
the control circuit controls the first group of test PADs and the second group of test PADs to output positive polarity and negative polarity driving time sequences to the data lines at intervals by taking a frame as a unit.
7. The display panel electrical measurement apparatus of claim 6, wherein the number of the data lines is 6, the first group of test PADs includes a first R test PAD, a first G test PAD, a first B test PAD, and the second group of test PADs includes a second R test PAD, a second G test PAD, a second B test PAD.
8. The electrical measurement apparatus for display panel as claimed in claim 7, wherein the first R test PAD, the first G test PAD, the first B test PAD, the second R test PAD, the second G test PAD, the second B test PAD are connected to the first data line, the second data line, the third data line, the fourth data line, the fifth data line, the sixth data line of the display panel to be tested in sequence.
9. The display panel electrical measurement apparatus of claim 8, wherein the control circuit controls the first R test PAD, the first B test PAD, and the second G test PAD to output a positive polarity timing at an odd frame, and the control circuit controls the first G test PAD, the second R test PAD, and the second B test PAD to output a negative polarity timing at an even frame.
10. The display panel electrical measurement apparatus of claim 8, wherein the control circuit controls the first R test PAD, the first B test PAD, and the second G test PAD to output a negative polarity timing at an odd frame, and the control circuit controls the first G test PAD, the second R test PAD, and the second B test PAD to output a positive polarity timing at an even frame.
CN202211573392.1A 2022-12-08 2022-12-08 Method for reducing electrical measurement misjudgment rate of display panel and electrical measurement equipment Pending CN115909929A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202211573392.1A CN115909929A (en) 2022-12-08 2022-12-08 Method for reducing electrical measurement misjudgment rate of display panel and electrical measurement equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202211573392.1A CN115909929A (en) 2022-12-08 2022-12-08 Method for reducing electrical measurement misjudgment rate of display panel and electrical measurement equipment

Publications (1)

Publication Number Publication Date
CN115909929A true CN115909929A (en) 2023-04-04

Family

ID=86479410

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202211573392.1A Pending CN115909929A (en) 2022-12-08 2022-12-08 Method for reducing electrical measurement misjudgment rate of display panel and electrical measurement equipment

Country Status (1)

Country Link
CN (1) CN115909929A (en)

Similar Documents

Publication Publication Date Title
US9672087B2 (en) Error detecting apparatus for gate driver, display apparatus having the same and method of detecting error of gate driver
CN108257538A (en) The driving method of display device, drive control device and the display device
CN104091554B (en) The method of testing and system of row driving chip
CN203134316U (en) LED full color screen system and detection circuit thereof
CN106128351A (en) A kind of display device
CN105096810A (en) Driving component and display device
US10600346B2 (en) Display driving device
CN107613233A (en) A kind of TV Processing System of two kinds of signals of compatible processing
CN110702376B (en) Display module troubleshooting method and device
CN104916243A (en) Detection method and device for scan driving circuit and liquid crystal panel
CN114373412B (en) Display device and abnormality detection method thereof
CN1916699A (en) System and method for testing image plane on liquid crystal
CN115909929A (en) Method for reducing electrical measurement misjudgment rate of display panel and electrical measurement equipment
CN104318880B (en) Voltage shift circuit with short circuit detection mechanism and short circuit detection method
CN205506989U (en) Point screen tool
CN105609022B (en) GIP detection circuits and panel display apparatus
CN109493776A (en) A kind of display panel test fixture and its test method
CN109597228B (en) Panel detection method
US20130179745A1 (en) Test interface circuit for increasing testing speed
CN107316597B (en) Open circuit and short circuit detection system of liquid crystal display module
CN102298891A (en) Method for testing signal transmission line, integrated circuit and display panel module
CN114871118A (en) Item parameter display method for multiple visual inspection test equipment of PCBA (printed circuit board assembly)
CN111402770A (en) Testing device of display device
CN110082631B (en) Test method and test device for touch panel
CN112885275A (en) Detection circuit and method for display panel

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination