CN115882858B - Analog-to-digital conversion chip differential nonlinearity measuring method and device and electronic equipment - Google Patents
Analog-to-digital conversion chip differential nonlinearity measuring method and device and electronic equipment Download PDFInfo
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Abstract
A method, a device and electronic equipment for measuring differential nonlinearity of an analog-to-digital conversion chip are provided, wherein the method comprises the following steps: inputting sine waves into an analog-to-digital conversion chip to obtain sampling output waveforms; converting the sampled output waveform into a first actual output function of the code-sample number; acquiring a first function of a theoretical standard waveform of the code-sampling number; cutting one of two sides of the first actual output function to obtain a second actual output function; transversely scaling the first function, wherein the theoretical output function is formed by convolving the scaled first function with a first normal distribution function; and calculating differential nonlinearity of the analog-to-digital conversion chip based on the second actual output function and the theoretical output function. The invention improves the accuracy and precision of measuring the differential nonlinearity.
Description
Technical Field
The present invention relates to the field of chip testing technologies, and in particular, to a method and an apparatus for measuring differential nonlinearity of an analog-to-digital conversion chip, and an electronic device.
Background
Chip testing is an important ring in the chip industry chain, and the method for testing the chip is different according to different types of chips. The ADC chip is called Analog-to-Digital Converter (Analog-to-digital conversion chip), which is a converter chip that converts an Analog signal into a digital signal, and DNL (Differential Non-linearity) refers to the maximum value of the difference between two adjacent scales of the Analog-to-digital conversion chip, which is also called Differential nonlinearity, and reflects the local microscopic nonlinearity in the whole range.
The prior literature has disclosed methods of calculating differential nonlinearities and suggests the types of errors that may occur, but during actual testing, no one has yet compensated for these errors, and the values of the directly calculated differential nonlinearities are inaccurate.
The information disclosed in this background section is only for enhancement of understanding of the general background of the invention and should not be taken as an acknowledgement or any form of suggestion that this information forms the prior art already known to a person skilled in the art.
Disclosure of Invention
Aiming at the problems existing in the prior art, the invention provides a method, a device and electronic equipment for measuring differential nonlinearity of an analog-to-digital conversion chip.
The technical scheme of the invention provides a method for measuring differential nonlinearity of an analog-to-digital conversion chip, which comprises the following steps:
inputting sine waves into an analog-to-digital conversion chip, and obtaining sampling output waveforms of the analog-to-digital conversion chip;
converting the sampled output waveform into a first actual output function of code-sample number;
acquiring a first function of a theoretical standard waveform of the code-sample number based on the total sample number and the coded sampling probability function;
cutting one of two sides of the first actual output function to enable a central value of the first actual output function and a central value of the first function to be approximate to each other so as to obtain a second actual output function;
transversely scaling the first function to fit the shape of a theoretical output function to the shape of the second actual output function, wherein the theoretical output function is formed by convolving the scaled first function with a first normal distribution function;
and calculating differential nonlinearity of the analog-to-digital conversion chip based on the second actual output function and the theoretical output function.
Optionally, clipping one of two sides of the first actual output function to approach a center value of the first actual output function and a center value of the first function includes:
convolving the first function with a second normal distribution function to form a second function;
convolving the second function with the first actual output function to form a third function;
determining a central value of the first actual output function based on the central value of the first function, the length of the waveform projection of the second function on the X axis and the central value of the third function;
determining a clipping adjustment amount based on a center value of the first actual output function and a center value of the first function;
and cutting one of two sides of the first actual output function based on the cutting adjustment amount, so that the central value of the first actual output function and the central value of the first function are approximate.
Optionally, the central value of the second normal distribution function is the central value of the first function.
Optionally, the central value of the first normal distribution function is the central value of the first actual output function.
Optionally, the method for acquiring the standard deviation of the first normal distribution function includes:
the analog-digital conversion chip sends out a preset voltage signal, and a normally distributed curve is obtained according to the acquired actual times;
and calculating a standard deviation based on the curve of the normal distribution as the standard deviation of the first normal distribution function.
Optionally, the method for obtaining the central value of the third function includes:
if the third function has only one wave crest, taking a coding value corresponding to the wave crest value of the third function as a central value of the third function;
and if the third function has two wave peaks, taking the average value of the coded values corresponding to the two wave peaks as the central value of the third function.
Optionally, converting the sampled output waveform into a first actual output function of the code-sample number, comprising:
converting the sampled output waveform into an original actual output function of code-sample number;
and copying each corresponding straight square block of the codes in the transverse direction by a preset multiple based on the original actual output function to form the first actual output function.
The technical scheme of the invention also provides a device for measuring differential nonlinearity of an analog-to-digital conversion chip, which comprises:
the sampling module is used for inputting sine waves into the analog-to-digital conversion chip and obtaining sampling output waveforms of the analog-to-digital conversion chip;
a conversion module for converting the sampled output waveform into a first actual output function of code-sample number;
the theoretical standard module is used for acquiring a first function of a theoretical standard waveform of the code-sample number based on the total sample number and the code sampling probability function;
the clipping module clips one of two sides of the first actual output function to enable the central value of the first actual output function and the central value of the first function to approach to obtain a second actual output function;
the scaling module transversely scales the first function to fit the shape of a theoretical output function with the shape of the second actual output function, and the theoretical output function is formed by convolving the scaled first function with a first normal distribution function;
and the calculating module is used for calculating differential nonlinearity of the analog-to-digital conversion chip based on the second actual output function and the theoretical output function.
The technical scheme of the invention also provides electronic equipment which comprises a memory, a processor and a computer program stored in the memory and capable of running on the processor, wherein the processor realizes the steps of the method for measuring the differential nonlinearity of the analog-to-digital conversion chip when executing the program.
The technical solution of the present invention further provides a non-transitory computer readable storage medium, on which a computer program is stored, the computer program, when executed by a processor, implementing the steps of the method for measuring differential nonlinearity of an analog-to-digital conversion chip according to any one of the above.
According to the measuring method, the measuring device and the electronic equipment for the differential nonlinearity of the analog-to-digital conversion chip, provided by the technical scheme of the invention, offset errors, gain errors and random measurement errors are eliminated, and the accuracy and precision of measuring the differential nonlinearity are improved.
Drawings
In order to more clearly illustrate the invention or the technical solutions of the prior art, the following brief description will be given of the drawings used in the embodiments or the description of the prior art, it being obvious that the drawings in the following description are some embodiments of the invention and that other drawings can be obtained from them without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of a method for measuring differential nonlinearity of an analog-to-digital conversion chip according to the present invention;
FIG. 2 is a schematic diagram of a histogram of a sampled output waveform collected by an analog-to-digital conversion chip according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of a first function according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of a second function according to an embodiment of the present invention;
FIG. 5 is a schematic diagram of a third function with only one peak according to an embodiment of the present invention;
FIG. 6 is a schematic diagram of a third function of an embodiment of the present invention with two peaks;
FIG. 7 is a schematic structural diagram of a differential nonlinearity measurement device of an analog-to-digital conversion chip according to the present invention;
fig. 8 is a schematic diagram of an entity structure of an electronic device according to the present invention.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the present invention more apparent, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings, and it is apparent that the described embodiments are some embodiments of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
The method for measuring the differential nonlinearity of the analog-to-digital conversion chip provided by the embodiment of the invention is described in detail below through specific embodiments and application scenes thereof with reference to the accompanying drawings.
In the embodiment of the invention, the testing error of the imperfect chip is compensated mainly by adjusting the central value of the actual output function and the opening size of the theoretical output function, so that the finally calculated differential nonlinearity is more accurate.
Fig. 1 is a schematic diagram of a method for measuring differential nonlinearity of an analog-to-digital conversion chip according to the technical scheme of the present invention, as shown in fig. 1, the method for measuring differential nonlinearity of an analog-to-digital conversion chip according to the technical scheme of the present invention includes the following steps.
S100, inputting sine waves into the analog-to-digital conversion chip, and obtaining sampling output waveforms of the analog-to-digital conversion chip.
S200, converting the sampled output waveform into a first actual output function of the code-sample number.
FIG. 2 is a schematic diagram of a histogram converted from a sampled output waveform collected by an analog-to-digital conversion chip according to an embodiment of the present invention, wherein the histogram is represented by a first actual output function, and is represented by K, and the vertical axis is the Y axis, and the horizontal axis is the X axis, and represents the number of samples, and represents the code 0 （n）。
S300, acquiring a first function of a theoretical standard waveform of the code-sample number based on the total sample number and the code sampling probability function.
The specific formula of the encoded sampling probability function is:
wherein V is FS For the full-scale voltage value of the analog-to-digital conversion chip, A is the peak value of the input sine wave voltage, N is the bit number of the analog-to-digital conversion chip, N is the coding number, and n=2 N For example, if the number of bits of a certain analog-to-digital conversion chip is 3, then n is 8, and the codes on the X-axis are 0 to 7.p (n) represents the probability that the code n is sampled, so if conversion to a number is desired, p (n) needs to be multiplied by the total number of samples, which is recorded as M, then the formula of the first function is:
f 1 （n）=p（n）M
FIG. 3 is a schematic diagram of a first function of an embodiment of the present invention, as shown in FIG. 3, the first function is a perfect bowl-shaped diagram.
S400, cutting one of two sides of the first actual output function to enable the central value of the first actual output function and the central value of the first function to be approximate to obtain a second actual output function.
Optionally, clipping one of two sides of the first actual output function to approach a center value of the first actual output function and a center value of the first function includes:
convolving the first function with a second normal distribution function to form a second function;
convolving the second function with the first actual output function to form a third function;
determining a central value of a first actual output function based on the central value of the first function, the length of the waveform projection of the second function on the X axis and the central value of the third function;
determining a clipping adjustment amount based on the center value of the first actual output function and the center value of the first function;
based on the clipping adjustment amount, one of both sides of the first actual output function is clipped so that the center value of the first actual output function approaches the center value of the first function.
Optionally, the center value of the second normal distribution function is the center value of the first function, the standard deviation of the second normal distribution function takes any value, and the second normal distribution function is recorded as g 1 （n）。
Preferably, the symmetry axis of the bowl-shaped graph in fig. 3 is calculated by convolving the first function with the second normal distribution function, and the corresponding code value is the central value of the first function, denoted as C 1 . Will f 1 (n) and g 1 (n) convolving to obtain a second function k after convolving 1 (n) fig. 4 is a schematic diagram of a second function according to an embodiment of the present invention, and as shown in fig. 4, a graph of the second function is a theoretical output function with gain error.
Optionally, the method for obtaining the central value of the third function includes:
if the third function has only one wave crest, taking the code value corresponding to the wave crest value of the third function as the center value of the third function;
if the third function has two peaks, taking the average value of the coding values corresponding to the two peaks as the center value of the third function.
Preferably, fig. 5 is a schematic diagram of the third function of the embodiment of the present invention when only one peak is included, as shown in fig. 5, when the waveform of the second function is close to two peaks of the actual waveform of the first actual output function, the third function has only one peak; FIG. 6 is a schematic diagram of a third function having two peaks according to an embodiment of the present invention, as shown in FIG. 6, when the waveform of the second function is far apart from the two peaks of the actual waveform of the first actual output function.
If the waveform of FIG. 5 appears, the code value corresponding to the peak value is directly taken as the central value, if the waveform of FIG. 6 appears, the average value of the code values corresponding to the two peak values is taken as the central value, and the central value of the third function is recorded as C 2 。
Since the resulting pattern is extended in the X-axis direction after the convolution is completed, C is required 2 The specific formula is converted into:
C 3 =C 2 -（L-C 1 -1），
where L is the length of the projection of the waveforms of the second function (e.g., all waveforms in fig. 4) on the X-axis. C thus obtained 3 I.e. the central value of the first actual output function. In general C 3 And C 1 Is not equal, so the central value C of the first actual output function needs to be 3 Adjusted to the center value C of the first function 1 The specific adjustment mode is as follows:
note a=c 3 - C 1 If a>0, wherein a is an integer, the center of the actual waveform (i.e. the first actual output function) is shifted to the right from the theoretical standard waveform (i.e. the first function), and the center of the actual waveform is shifted to the left by a unitThe right part of the inter-waveform cuts out 2a waveforms of encoded length, and similarly, if a<0 means that the center of the actual waveform is far to the left than the theoretical standard waveform, and the center of the actual waveform needs to be shifted right by an unit of |a| and the left side of the actual waveform needs to be cut out of the waveform of 2|a | coding lengths.
Optionally, converting the sampled output waveform into a first actual output function of the code-sample number, comprising:
converting the sampled output waveform into an original actual output function of the code-sample number;
based on the original actual output function, the corresponding square block of each code is duplicated by a preset multiple in the transverse direction to form a first actual output function.
The above processing of the original actual output function, for the case where a is not an integer, for example, it is calculated that a is 0.6, and the center of the actual histogram needs to be shifted to the left by 0.6 coding lengths, so at the time of initial sampling, all codes will be copied 10 (i.e., the predetermined multiple is 10 times), in short, if a 3-bit ADC chip is used, the codes should be 8, after copying 10, 80 small codes are used, and at the moment, the 0.6 coding lengths refer to 6 small coding lengths.
S500, transversely scaling the first function to enable the shape of the theoretical output function to be fitted with the shape of the second actual output function, wherein the theoretical output function is formed by convolving the scaled first function and the first normal distribution function.
Optionally, the central value of the first normal distribution function is the central value of the first actual output function.
Optionally, the method for acquiring the standard deviation of the first normal distribution function includes:
the analog-digital conversion chip sends out a preset voltage signal, and a normally distributed curve is obtained according to the acquired actual times;
based on the curve of the normal distribution, the standard deviation is calculated as the standard deviation of the first normal distribution function.
In the first function, when the abscissa code n is multiplied by the coefficient S, the bowl opening of the first function is enlarged or reduced.
The analog-digital conversion chip sends a signal with any voltage, which can be 0V, 0V and the like, if 0V is selected, the analog-digital conversion chip can obtain a normal distribution curve according to the collected actual times, thus the standard deviation of the normal distribution can be calculated, the standard deviation is used as the standard deviation of a first normal distribution function, and the first normal distribution function is recorded as g 2 (n). F after scaling 1 (n) and g 2 (n) convolving to obtain a graph similar to that of FIG. 4, i.e., a theoretical output function, denoted as k 2 (n) then fitting the theoretical output function to the second actual output function.
Preferably, the gradient descent method can be directly used to continuously adjust the S so that the final S value can be k 2 The graph of (n) is most closely fitted to the second actual output function.
And S600, calculating differential nonlinearity of the analog-to-digital conversion chip based on the second actual output function and the theoretical output function.
Preferably, the value of differential nonlinearity corresponding to each code is calculated by the following formula:
the invention mainly compensates the test error of the imperfect chip by adjusting the central value of the actual output function and the opening size of the theoretical output function, so that the finally calculated differential nonlinearity is more accurate, and therefore, the second actual output function is used for replacing the first actual output function in the calculation formula to obtain more accurate differential nonlinearity.
The measuring device of differential nonlinearity of the analog-to-digital conversion chip provided by the invention is described below, and the measuring device of differential nonlinearity of the analog-to-digital conversion chip and the measuring method of differential nonlinearity of the analog-to-digital conversion chip described below can be correspondingly referred to each other.
Fig. 7 is a schematic structural diagram of a device for measuring differential nonlinearity of an analog-to-digital conversion chip according to the technical scheme of the present invention, as shown in fig. 7, where the device for measuring differential nonlinearity of an analog-to-digital conversion chip according to the technical scheme of the present invention includes:
the sampling module is used for inputting sine waves into the analog-to-digital conversion chip and obtaining sampling output waveforms of the analog-to-digital conversion chip;
a conversion module for converting the sampled output waveform into a first actual output function of the code-sample number;
the theoretical standard module is used for acquiring a first function of a theoretical standard waveform of the code-sample number based on the total sample number and the code sampling probability function;
the clipping module clips one of two sides of the first actual output function to enable the central value of the first actual output function and the central value of the first function to be approximate to each other so as to obtain a second actual output function;
the scaling module transversely scales the first function to enable the shape of the theoretical output function to be fitted with the shape of the second actual output function, and the theoretical output function is formed by convolving the scaled first function and the first normal distribution function;
and the calculating module is used for calculating differential nonlinearity of the analog-to-digital conversion chip based on the second actual output function and the theoretical output function.
The embodiment eliminates offset error, gain error and measurement random error, improves the accuracy and precision of measuring differential nonlinearity, and further improves the measurement and calculation precision of INL (Interger Nonliner, linearity error).
Fig. 8 is a schematic diagram of an entity structure of an electronic device according to the present invention, as shown in fig. 8, the electronic device may include: processor 810, communication interface (Communications Interface) 820, memory 830, and communication bus 840, wherein processor 810, communication interface 820, memory 830 accomplish communication with each other through communication bus 840. The processor 810 may invoke logic instructions in the memory 830 to perform a method for measuring differential nonlinearity of an analog-to-digital conversion chip, the method comprising:
inputting sine waves into an analog-to-digital conversion chip, and obtaining sampling output waveforms of the analog-to-digital conversion chip;
converting the sampled output waveform into a first actual output function of code-sample number;
acquiring a first function of a theoretical standard waveform of the code-sample number based on the total sample number and the coded sampling probability function;
cutting one of two sides of the first actual output function to enable a central value of the first actual output function and a central value of the first function to be approximate to each other so as to obtain a second actual output function;
transversely scaling the first function to fit the shape of a theoretical output function to the shape of the second actual output function, wherein the theoretical output function is formed by convolving the scaled first function with a first normal distribution function;
and calculating differential nonlinearity of the analog-to-digital conversion chip based on the second actual output function and the theoretical output function.
Further, the logic instructions in the memory 830 described above may be implemented in the form of software functional units and may be stored in a computer-readable storage medium when sold or used as a stand-alone product. Based on this understanding, the technical solution of the present invention may be embodied essentially or in a part contributing to the prior art or in a part of the technical solution, in the form of a software product stored in a storage medium, comprising several instructions for causing a computer device (which may be a personal computer, a server, a network device, etc.) to perform all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), a magnetic disk, or an optical disk, or other various media capable of storing program codes.
In another aspect, the present invention also provides a computer program product comprising a computer program stored on a non-transitory computer readable storage medium, the computer program comprising program instructions which, when executed by a computer, enable the computer to perform a method for measuring differential nonlinearity of an analog-to-digital conversion chip provided by the above methods, the method comprising:
inputting sine waves into an analog-to-digital conversion chip, and obtaining sampling output waveforms of the analog-to-digital conversion chip;
converting the sampled output waveform into a first actual output function of code-sample number;
acquiring a first function of a theoretical standard waveform of the code-sample number based on the total sample number and the coded sampling probability function;
cutting one of two sides of the first actual output function to enable a central value of the first actual output function and a central value of the first function to be approximate to each other so as to obtain a second actual output function;
transversely scaling the first function to fit the shape of a theoretical output function to the shape of the second actual output function, wherein the theoretical output function is formed by convolving the scaled first function with a first normal distribution function;
and calculating differential nonlinearity of the analog-to-digital conversion chip based on the second actual output function and the theoretical output function.
In yet another aspect, the present invention further provides a non-transitory computer readable storage medium having stored thereon a computer program which, when executed by a processor, is implemented to perform the method of measuring differential nonlinearity of an analog-to-digital conversion chip provided above, the method comprising:
inputting sine waves into an analog-to-digital conversion chip, and obtaining sampling output waveforms of the analog-to-digital conversion chip;
converting the sampled output waveform into a first actual output function of code-sample number;
acquiring a first function of a theoretical standard waveform of the code-sample number based on the total sample number and the coded sampling probability function;
cutting one of two sides of the first actual output function to enable a central value of the first actual output function and a central value of the first function to be approximate to each other so as to obtain a second actual output function;
transversely scaling the first function to fit the shape of a theoretical output function to the shape of the second actual output function, wherein the theoretical output function is formed by convolving the scaled first function with a first normal distribution function;
and calculating differential nonlinearity of the analog-to-digital conversion chip based on the second actual output function and the theoretical output function.
The apparatus embodiments described above are merely illustrative, wherein the elements illustrated as separate elements may or may not be physically separate, and the elements shown as elements may or may not be physical elements, may be located in one place, or may be distributed over a plurality of network elements. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment. Those of ordinary skill in the art will understand and implement the present invention without undue burden.
From the above description of the embodiments, it will be apparent to those skilled in the art that the embodiments may be implemented by means of software plus necessary general hardware platforms, or of course may be implemented by means of hardware. Based on this understanding, the foregoing technical solution may be embodied essentially or in a part contributing to the prior art in the form of a software product, which may be stored in a computer readable storage medium, such as ROM/RAM, a magnetic disk, an optical disk, etc., including several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute the method described in the respective embodiments or some parts of the embodiments.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present invention, and are not limiting; although the invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present invention.
Claims (7)
1. A method for measuring differential nonlinearity of an analog-to-digital conversion chip, the method comprising:
inputting sine waves into an analog-to-digital conversion chip, and obtaining sampling output waveforms of the analog-to-digital conversion chip;
converting the sampled output waveform into a first actual output function of code-sample number, the first actual output function graph having a symmetric double peak in a defined interval;
acquiring a first function of a theoretical standard waveform of the code-sample number based on the total sample number and the coded sampling probability function, wherein the first function graph is bowl-shaped;
cutting one of two sides of the first actual output function graph to enable a central value of the first actual output function graph and a central value of the first function graph to be approximate to each other so as to obtain a second actual output function;
transversely scaling the first function to fit the shape of a theoretical output function to the shape of the second actual output function, wherein the theoretical output function is formed by convolving the scaled first function with a first normal distribution function;
calculating differential nonlinearity of the analog-to-digital conversion chip based on the second actual output function and the theoretical output function;
the central value of the first normal distribution function is the central value of the first actual output function;
the method for acquiring the standard deviation of the first normal distribution function comprises the following steps:
the analog-digital conversion chip sends out a preset voltage signal, and a normally distributed curve is obtained according to the acquired actual times;
and calculating a standard deviation based on the curve of the normal distribution as the standard deviation of the first normal distribution function.
2. The method for measuring differential nonlinearity of an analog-to-digital conversion chip as claimed in claim 1, wherein clipping one of both sides of the first actual output function pattern to approach a center value of the first actual output function pattern and a center value of the first function pattern comprises:
convolving the first function with a second normal distribution function to form a second function;
convolving the second function with the first actual output function to form a third function;
determining a central value of the first actual output function graph based on the central value of the first function, the length of the waveform projection of the second function on the X axis and the central value of the third function;
determining a clipping adjustment amount based on the center value of the first actual output function pattern and the center value of the first function pattern;
based on the clipping adjustment amount, clipping one of two sides of the first actual output function graph to approach a center value of the first actual output function graph and a center value of the first function graph;
the center value of the second normal distribution function is the center value of the first function.
3. The method for measuring differential nonlinearity of an analog-to-digital conversion chip as claimed in claim 2, wherein the method for obtaining the center value of the third function comprises:
if the third function has only one wave crest, taking a coding value corresponding to the wave crest value of the third function as a central value of the third function;
and if the third function has two wave peaks, taking the average value of the coded values corresponding to the two wave peaks as the central value of the third function.
4. The method of claim 1, wherein converting the sampled output waveform into a first actual output function of the code-sample number comprises:
converting the sampled output waveform into an original actual output function of code-sample number;
and copying each corresponding straight square block of the codes in the transverse direction by a preset multiple based on the original actual output function to form the first actual output function.
5. A device for measuring differential nonlinearity of an analog-to-digital conversion chip, the device comprising:
the sampling module is used for inputting sine waves into the analog-to-digital conversion chip and obtaining sampling output waveforms of the analog-to-digital conversion chip;
the conversion module is used for converting the sampling output waveform into a first actual output function of the code-sampling number, and the first actual output function graph has symmetrical double peaks in a defined interval;
the theoretical standard module is used for acquiring a first function of a theoretical standard waveform of the code-sample number based on the total sample number and the coded sampling probability function, and the first function graph is bowl-shaped;
the clipping module is used for clipping one of two sides of the first actual output function graph to enable the central value of the first actual output function graph and the central value of the first function graph to be approximate so as to acquire a second actual output function;
the scaling module is used for transversely scaling the first function to fit the shape of a theoretical output function with the shape of the second actual output function, and the theoretical output function is formed by convolving the scaled first function with a first normal distribution function;
the calculating module is used for calculating differential nonlinearity of the analog-to-digital conversion chip based on the second actual output function and the theoretical output function;
the central value of the first normal distribution function is the central value of the first actual output function;
the method for acquiring the standard deviation of the first normal distribution function comprises the following steps:
the analog-digital conversion chip sends out a preset voltage signal, and a normally distributed curve is obtained according to the acquired actual times;
and calculating a standard deviation based on the curve of the normal distribution as the standard deviation of the first normal distribution function.
6. An electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, characterized in that the processor implements the steps of the method for measuring differential nonlinearity of an analog-to-digital conversion chip as claimed in any one of claims 1-4 when the program is executed.
7. A non-transitory computer readable storage medium, on which a computer program is stored, characterized in that the computer program, when being executed by a processor, implements the steps of the method for measuring differential nonlinearity of an analog-to-digital conversion chip as claimed in any one of claims 1-4.
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