CN115842790B - Business data flow control method applied to PCIe equipment - Google Patents

Business data flow control method applied to PCIe equipment Download PDF

Info

Publication number
CN115842790B
CN115842790B CN202211701918.XA CN202211701918A CN115842790B CN 115842790 B CN115842790 B CN 115842790B CN 202211701918 A CN202211701918 A CN 202211701918A CN 115842790 B CN115842790 B CN 115842790B
Authority
CN
China
Prior art keywords
data
descriptor
module
host
flow control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202211701918.XA
Other languages
Chinese (zh)
Other versions
CN115842790A (en
Inventor
臧云利
朱彤
李振
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shandong Duofang Semiconductor Co ltd
Sanwei Xin'an Technology Co ltd
Original Assignee
Shandong Duofang Semiconductor Co ltd
Sanwei Xin'an Technology Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shandong Duofang Semiconductor Co ltd, Sanwei Xin'an Technology Co ltd filed Critical Shandong Duofang Semiconductor Co ltd
Priority to CN202211701918.XA priority Critical patent/CN115842790B/en
Publication of CN115842790A publication Critical patent/CN115842790A/en
Application granted granted Critical
Publication of CN115842790B publication Critical patent/CN115842790B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)

Abstract

The invention relates to a business data flow control method applied to PCIe equipment, which is realized based on host end and PCIe equipment end and comprises the following steps: when the host end producer descriptor pointer is updated, the PCIe equipment end acquires and combines the current consumer descriptor pointer and the free space of the service processing module to acquire a data item to be acquired; and the PCIe device side sends Mwr requests to the host side, acquires and processes corresponding producer messages from the host side, and updates the host side and PCIe device side consumer descriptor pointers. The flow control method disclosed by the invention can convert the I/O operation of the host end into the memory operation, thereby reducing the I/O operation in data transmission and reducing the time consumption on a data transmission path; and in addition, the data transmission is carried out by combining the idle space of the data processing module, so that the data loss can be effectively prevented, a plurality of tasks can be processed at the same time, and the transmission efficiency is improved.

Description

Business data flow control method applied to PCIe equipment
Technical Field
The invention relates to the technical field of flow control, in particular to a business data flow control method applied to PCIe equipment.
Background
In a PCIe system, a processor host is connected to a PCIe device side based on a root complex mode root node device rc. high-speed communication is carried out between host and PCIe equipment end, and flow control is needed to avoid data coverage or loss caused by resource problem.
In general, in a high-performance application scenario, a PCIe device side bears the heavy duty of a hardware acceleration application, in such an application, data communication mostly adopts a queue mechanism to issue and transmit back, and when a bandwidth of a host issuing calculation task is greater than a processing bandwidth of the PCIe device side, in order to ensure reliable data transmission, host side software is required to participate in flow control, and at present, the implementation modes are as follows:
1) The host side software obtains the working state inside PCIe equipment by I/O operation and issuing a read state mode through the RC node;
2) The PCIe device side notifies the host side in an MSI interrupt mode, the mode has functional limitation, and in order to ensure that the data communication reliably acquires the comprehensive queue state data, the software on the host side often repeats the operation of the step 1) to confirm the state information;
the host side software reads the working state of the queue of the PCIe device side as an I/O operation, and issues a TLP read request (MRd) to the response (CplD) of the PCIe device side through the RC node in the whole process, taking PCIe gen3x8 as an example, the whole process usually takes 700-1000 nS, and the process mainly takes time on path delay. In addition, in the transmission service of the small data packet (the document is defined as 1Kbyte or below), because the PCIe communication transmission time and the hardware acceleration function processing time of the small data packet are shortened, the transmission time of the acquired state cannot be ignored in the whole system working process, and the small data packet may become a main reason for influencing the transmission performance.
Therefore, how to provide a new flow control method to overcome the above-mentioned drawbacks is a problem that needs to be solved by those skilled in the art.
It should also be noted that the information disclosed in this background section is only for enhancement of understanding of the general background of the invention and should not be taken as an acknowledgement or any form of suggestion that this information forms the prior art that is well known to a person skilled in the art.
Disclosure of Invention
In view of this, the invention provides a service data flow control method for PCIe devices based on chip implementation, and by setting the flow control chip disclosed by the invention at PCIe device end, PCIe device can actively write request (Mwr) to RC side to complete host end memory writing of state information such as queues, and finally achieve effects of improving flow control efficiency and reducing occupation of host end CPU.
In order to achieve the above purpose, the present invention adopts the following technical scheme:
a business data flow control method applied to PCIe equipment is realized based on host end and PCIe equipment end, and comprises the following steps:
when the host end producer descriptor pointer is updated, writing the producer descriptor pointer into the PCIe equipment end;
the PCIe device receives the producer descriptor pointer, acquires the current consumer descriptor pointer of the PCIe device and the free space of the PCIe device business processing module,
acquiring a current data entry to be processed according to the producer descriptor pointer and the consumer descriptor pointer,
obtaining the data items to be obtained according to the obtained data items to be processed and the free space of the service processing module,
according to the data entry to be acquired, the PCIe device side sends a Mwr request to the host side, acquires corresponding producer information from the host side, and the Mwr request carries a descriptor address consistent with the consumer descriptor pointer; and after the corresponding producer information is acquired, the producer information is sent to the service processing module for processing, and consumer descriptor pointers of the host end and the PCIe equipment end are updated according to the data items to be acquired.
Preferably, the control method is implemented based on a chip, and the chip is arranged at the PCIe device end.
Preferably, the chip includes a PCIe interface module, and is connected to the PCIe device through the PCIe interface module.
Preferably, the chip comprises a service processing module and a flow control engine, wherein the service processing module is used for processing the task issued by the host end; and the flow control engine is used for starting when the descriptor pointer of the host end producer is updated, and controlling the flow according to the idle space of the service processing module.
Preferably, before the flow control is performed, the host end performs configuration, which includes applying for a memory space that can be read and written by the chip, where the memory space includes a descriptor queue memory space and a consumer pointer information memory space.
Preferably, the chip further includes a descriptor buffer module and a data buffer module, where the descriptor buffer module is configured to store a base address of the memory space of the descriptor queue and a base address of the memory space of the consumer pointer information, and is provided with a producer descriptor pointer register, and the data buffer module corresponds to the descriptor buffer module and is configured to store data information corresponding to the consumer pointer.
Preferably, the descriptor caching module is further configured to obtain a data entry to be processed according to the producer descriptor pointer and the stored consumer pointer information when the host end producer descriptor pointer is updated.
Preferably, the flow control engine comprises a flow control preprocessing module, a flow control information calculation module, a flow post-processing module and a Mwr sending request module,
the flow control preprocessing module receives the data items to be processed, the consumer descriptor pointers and the corresponding data information output by the data caching module, and outputs the data information to the flow control information calculation module after merging and latching;
the flow control information calculation module is used for calculating the data items to be obtained in combination with the free space of the service processing module, and sending the calculated data items to be obtained to the flow post-processing module;
the flow post-processing module reads the address of the data item to be acquired from the descriptor cache module and sends the address to the Mwr sending request module;
the Mwr sending request module sends Mwr a request to the host according to the address of the data item to be obtained, and obtains the corresponding producer message from the host.
Preferably, the flow control engine further comprises a descriptor status management module, configured to maintain status information of the read-write pointers and descriptors of the host end and other service function modules of the PCIe device end;
preferably, the flow control engine further comprises a configuration module, configured to store configuration information of the host end.
Compared with the prior art, the invention discloses a business data flow control method applied to PCIe equipment, which can convert the I/O operation of host side software into memory operation, thereby reducing the I/O operation in data transmission and reducing the time consumption on a data transmission path;
and in addition, the data transmission is carried out by combining the idle space of the data processing module, so that the data loss can be effectively prevented, and a plurality of tasks can be processed simultaneously, thereby improving the transmission efficiency.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings that are required to be used in the embodiments or the description of the prior art will be briefly described below, and it is obvious that the drawings in the following description are only embodiments of the present invention, and that other drawings can be obtained according to the provided drawings without inventive effort for a person skilled in the art.
FIG. 1 is a flow control flow chart provided by the present invention;
FIG. 2 is a schematic diagram of a chip structure according to the present invention;
FIG. 3 is a schematic diagram of a flow control engine according to the present invention;
FIG. 4 is a flow control process diagram provided by the present invention.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
The embodiment of the invention discloses a business data flow control method applied to PCIe equipment, which aims at reducing I/O operation while ensuring normal data transmission, further reducing time consumption on a path caused by the operation, simultaneously processing a plurality of tasks, improving the current wave control efficiency, converting the I/O operation into memory operation and effectively reducing the occupation of a CPU in a host.
Specifically, the method is realized based on host end and PCIe equipment end, and is realized by the following steps:
when the host end producer descriptor pointer is updated, writing the producer descriptor pointer into a PCIe device end;
the PCIe device side receives the producer descriptor pointer, acquires the consumer descriptor pointer of the current PCIe device side and the free space of the PCIe device side business processing module,
based on the producer descriptor pointer and the consumer descriptor pointer, obtaining a current pending data entry,
obtaining the data items to be obtained according to the obtained data items to be processed and the free space of the service processing module,
according to the data item to be acquired, the PCIe device side sends Mwr request to the host side, acquires corresponding producer information from the host side, and Mwr request carries a descriptor address consistent with the consumer descriptor pointer; after corresponding producer information is acquired, the producer information is sent to a business processing module for processing, and consumer descriptor pointers of a host end and a PCIe equipment end are updated according to data items to be acquired.
In one embodiment, the data entry to be processed is: the difference between the producer descriptor pointer and the consumer descriptor pointer;
according to the acquired data items to be processed and the free space of the service processing module, the data items to be acquired are obtained, wherein the process is to compare the acquired data items to be processed with the free space n_free of the service processing module, and when the acquired data items to be processed are smaller than or equal to the free space n_free of the service processing module, the data items acquired from host are the data items to be processed, namely Pro effect Ptr-custom merPtr; when the acquired data items to be processed are larger than the free space n_free of the service processing module, acquiring the number of the data items from the host end as n_free. In one embodiment, the flow control process is detailed in fig. 1, and includes:
s1, monitoring whether the ProducerPtr is updated or not, if not, continuing monitoring, and if so, executing S2;
s2, acquiring a current CustomerPtr;
s3, acquiring an idle state n_free of the data processing module;
s4, comparing the sizes of the ProducerPtr-OustomerPtr and the n_free,
s5, if the producer Ptr-OustomerPtr > n_free, acquiring the number of data entries from a host end as n_free;
s6, if the ProducerPtr-OustomerPtr is less than or equal to n_free, acquiring the number of data entries from the host section as Pro ducerPtr-custom merPtr;
s7, sending Mwr requests by the flow control post-processing package, and synchronizing the local and host ends CustomerPtr;
s8, starting Mwr of the pcie to send a request.
According to the method disclosed by the invention, based on the producer descriptor pointer and the consumer descriptor pointer, the data items to be processed can be accurately obtained, the number of the data items which can be processed at one time by PCIe can be judged by combining with the free space of the service processing module, and Mwr request and data carrying are carried out according to the number, so that the data is prevented from being covered and lost, the data is actively judged and required through the PCIe terminal, and the CPU memory is not required to be occupied.
On the other hand, the invention also provides a service data flow control method for PCIe equipment based on chip realization, namely the flow control process is realized through the chip.
In one embodiment, a PCIe device side is provided with a chip 1, as shown in fig. 2, the chip 1 includes a PCIe interface IP module 2, and the PCIe interface IP module 2 is connected with the PCIe device side so as to perform communication;
secondly, on the chip, the system comprises a service processing module 5 and a flow control engine 3, wherein the service processing module 5 is used for processing tasks issued by a host end; the flow control engine 3 is used for starting when the host end producer descriptor pointer is updated, and controlling the flow according to the free space of the service processing module 5.
Before the flow control, the system is powered on, the host enumerates the EP peripherals, and then performs related configuration, including applying for a memory space of the chip for read-write access, that is, applying for a memory space in the DDR for read-write access, where DDR is a memory name, that is, a double rate synchronous dynamic random access memory, which is one of memories. Generally, the chip cannot access all the space of the memory, so that the host needs to perform configuration and application in advance to facilitate accurate access of the chip.
The memory space applied comprises a descriptor queue memory space and a queue consumer pointer information memory space; the host end writes the base address of the memory space of the descriptor queue and the base address of the memory space of the pointer information of the queue consumer into a register corresponding to the PCIe equipment end through I/O operation at one time; in the invention, the corresponding register is a descriptor cache module;
that is, the chip further includes a descriptor buffer module 6 and a data buffer module 4, where the descriptor buffer module 6 is configured to store a base address of a memory space of a descriptor queue and a base address of a memory space of queue consumer pointer information, and is provided with a producer descriptor pointer register, and when a host end producer descriptor is updated, the host end descriptor is written into the producer descriptor register through an I/O operation. The data buffer module 4 corresponds to the descriptor buffer module 6, and is configured to store data information corresponding to the consumer pointer, including a length of data, and the like.
In one embodiment, after the PCIe device side has the consumer pointer, initializing the memory space corresponding to the host side consumer pointer through Mwr operation to make it zero;
meanwhile, a producer pointer pre-designed by the PCIe equipment end is initialized to zero through the I/O operation of the host end.
In addition, the descriptor buffer module 6 is further configured to obtain a data entry to be processed according to the producer descriptor pointer and the stored queue consumer pointer information when the host producer descriptor pointer is updated.
Further, the flow control engine 3 performs flow control according to the data items to be processed, where the flow control engine 3 includes a flow control preprocessing module, a flow control information calculation module, a flow post-processing module, and a Mwr sending request module, as shown in fig. 3, specifically,
the flow control preprocessing module is used for receiving the data items to be processed, the consumer descriptor pointers and the corresponding data information output by the data caching module, which are acquired by the descriptor caching module, merging and latching the data items and the corresponding data information, and outputting the data information to the flow control information computing module;
the flow control information calculation module is combined with the free space of the service processing module to calculate data items to be acquired, and the calculated data items to be acquired are sent to the flow post-processing module;
the flow post-processing module reads the address of the data item to be acquired from the descriptor caching module and sends the address to the Mwr sending request module;
mwr the sending request module sends Mwr a request to the host according to the address of the data entry to be acquired, and acquires the corresponding producer message from the host.
In general, the descriptor management module performs pointer management on a producer and a consumer, calculates the occupied data space to be transmitted, namely the data items to be processed, through the descriptor information, outputs the descriptor information in real time, outputs the buffer information in real time by the data buffer management module, and provides the buffer information to the flow control pre-processing module together, the module combines and latches the related descriptor and the data buffer space information, and outputs the combined and latched information to the flow control calculation processing module, the module calculates and generates flow control data through the buffer state of the descriptor according to the size of the configuration safety area, namely the free space of the service processing module, and transmits the flow control data to the post-processing module, and the module reads the destination address information from the configuration information, combines the destination address information and transmits the flow control data to the Mwr transmitting module. Thus, one flow control processing cycle is completed.
In order that the above objects, features and advantages of the present invention will be readily understood, a more particular description of the invention will be rendered by reference to the appended fig. 4; the sequence numbers in fig. 4 indicate the sequence of the data processing steps;
firstly, step 1, after a host works normally, the host writes a payload, namely data to be processed, into a host buffer area and payload buffer area information including an original address, a destination address and length information to form a producer descriptor (producer ptr);
step 2, the host writes the producer descriptor pointer into a producer pointer register corresponding to the PCIe device through I/O operation;
step 3, after receiving the producer pointer (producer Ptr), the PCIe device starts the flow processing engine to acquire the current consumer pointer (consumer Ptr);
step 4, the flow processing engine acquires an idle statistical state in the data processing module, and calculates producer information required to be acquired from a host by combining a current consumer pointer (customerPtr) and a producer pointer (producer Ptr) state in the PCIe device;
step 5, the flow processing engine sends the calculated number of the information items of the producer to be acquired to the post-processing module;
step 6, the post-processing module initiates Mwr request according to the acquired producer message, and acquires corresponding data from a host end;
step 7, the post-processing module sends the acquired data to the data processing module for data processing;
and 8) simultaneously, updating the consumer pointer CustomerPtr) according to the number of the acquired producer information items, and synchronously updating the current consumer pointer CustomerPtr) of the PCIe equipment to a consumer pointer register corresponding to a host end by a post-processing module.
The flow control method based on chip realization can timely detect and calculate the related flow control information through the descriptor caching module and the data caching module, and actively send the flow control information to a host memory area in a Mwr mode. The timeliness of the query mode is better than that of the query mode, and the whole process is shorter than the time for querying the flow control information of the EP peripheral equipment by one host. Equivalent to the timeliness of conventional interrupt schemes, which must be accompanied by an I/O read operation. The scheme of the invention can effectively avoid I/O operation, and has more advantages of time consumption.
In addition, in one embodiment, the flow engine further comprises a descriptor status management module, configured to maintain status information of the read-write pointers and descriptors of the host and other service function modules of the PCIe side.
In one embodiment, the flow engine further comprises a configuration module for configuring relevant information for all modules.
In the present specification, each embodiment is described in a progressive manner, and each embodiment is mainly described in a different point from other embodiments, and identical and similar parts between the embodiments are all enough to refer to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant points refer to the description of the method section.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (10)

1. The service data flow control method applied to the PCIe equipment is characterized by being realized based on a host end and the PCIe equipment end, and comprises the following steps:
when the host end producer descriptor pointer is updated, writing the producer descriptor pointer into the PCIe equipment end;
the PCIe device receives the producer descriptor pointer, acquires the current consumer descriptor pointer of the PCIe device and the free space of the PCIe device business processing module,
obtaining a current data item to be processed according to the producer descriptor pointer and the consumer descriptor pointer, wherein the data item to be processed is: the difference between the producer descriptor pointer and the consumer descriptor pointer;
according to the data items to be processed and the free space of the service processing module, obtaining the data items to be acquired, wherein the process comprises the following steps:
comparing the acquired data items to be processed with the free space n_free of the service processing module, and when the acquired data items to be processed are smaller than or equal to the free space n_free of the service processing module, taking the data items acquired from host as the data items to be processed; when the acquired data items to be processed are larger than the free space n_free of the service processing module, acquiring the number of the data items from a host end as n_free;
according to the data item to be acquired, the PCIe device side sends a Mwr request to the host side, acquires data corresponding to the data item to be acquired from the host side, and the Mwr request carries a descriptor address consistent with the consumer descriptor pointer; and after the corresponding data are acquired, the data are sent to the service processing module for processing, and consumer descriptor pointers of the host end and the PCIe equipment end are updated according to the data items to be acquired.
2. The method for controlling traffic data flow applied to PCIe equipment according to claim 1, wherein the control method is implemented based on a chip, and the chip is arranged at the PCIe equipment end.
3. The method for controlling traffic data flow applied to PCIe devices according to claim 2, wherein said chip includes a PCIe interface module, and is connected to said PCIe device side through said PCIe interface module.
4. The method for controlling traffic data flow applied to PCIe equipment according to claim 2, wherein the chip comprises a traffic processing module and a flow control engine, and the traffic processing module is used for processing tasks issued by the host terminal; and the flow control engine is used for starting when the host end producer descriptor pointer is updated, and controlling the flow according to the idle space of the service processing module.
5. The method for traffic data flow control for PCIe devices according to claim 4, wherein prior to flow control, configuration is performed by said host, including applying for memory space accessible by said chip for read-write, said memory space including descriptor queue memory space and consumer pointer information memory space.
6. The method for controlling traffic data flow applied to PCIe devices according to claim 5, wherein said chip further comprises a descriptor buffer module and a data buffer module, said descriptor buffer module is used for storing a base address of said descriptor queue memory space and a base address of said consumer pointer information memory space, and is provided with a producer descriptor pointer register, said data buffer module corresponds to said descriptor buffer module and is used for storing data information corresponding to consumer pointer.
7. The method for traffic data flow control for PCIe devices according to claim 6, wherein said descriptor buffer module is further configured to obtain a data entry to be processed according to said producer descriptor pointer and stored consumer pointer information when said host producer descriptor pointer is updated.
8. The method of claim 7, wherein the flow control engine comprises a flow control preprocessing module, a flow control information calculation module, a flow post-processing module, and a Mwr send request module,
the flow control preprocessing module receives the data items to be processed, the consumer descriptor pointers and the corresponding data information output by the data caching module, and outputs the data information to the flow control information calculation module after merging and latching;
the flow control information calculation module is used for calculating the data items to be obtained in combination with the free space of the service processing module, and sending the calculated data items to be obtained to the flow post-processing module;
the flow post-processing module reads the address of the data item to be acquired from the descriptor cache module and sends the address to the Mwr sending request module;
the Mwr sending request module sends Mwr a request to the host according to the address of the data entry to be acquired, and acquires a corresponding producer message from the host.
9. The method of claim 4, wherein the flow control engine further comprises a descriptor status management module for maintaining status information of the read-write pointers and descriptors of the host and other service function modules of the PCIe device.
10. The method for controlling traffic data flow applied to PCIe devices according to claim 4, wherein said flow control engine further comprises a configuration module for storing information of said host configuration.
CN202211701918.XA 2022-12-29 2022-12-29 Business data flow control method applied to PCIe equipment Active CN115842790B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202211701918.XA CN115842790B (en) 2022-12-29 2022-12-29 Business data flow control method applied to PCIe equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202211701918.XA CN115842790B (en) 2022-12-29 2022-12-29 Business data flow control method applied to PCIe equipment

Publications (2)

Publication Number Publication Date
CN115842790A CN115842790A (en) 2023-03-24
CN115842790B true CN115842790B (en) 2023-05-02

Family

ID=85579377

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202211701918.XA Active CN115842790B (en) 2022-12-29 2022-12-29 Business data flow control method applied to PCIe equipment

Country Status (1)

Country Link
CN (1) CN115842790B (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107623642A (en) * 2017-08-30 2018-01-23 山东中创软件商用中间件股份有限公司 A kind of message traffic control method and device
CN111858413A (en) * 2020-06-29 2020-10-30 牛芯半导体(深圳)有限公司 Data scheduling method and device for PCIE (peripheral component interface express) exchange chip port
CN113535395A (en) * 2021-07-14 2021-10-22 西安电子科技大学 Descriptor queue and memory optimization method, system and application of network storage service
WO2022016767A1 (en) * 2020-07-20 2022-01-27 北京泽石科技有限公司 Data queue processing method and apparatus

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6873331B2 (en) * 2002-03-29 2005-03-29 Hewlett-Packard Development Company, L.P. System and method for passing messages among processing nodes in a distributed system
US9477622B2 (en) * 2012-02-07 2016-10-25 Intel Corporation Deterministic method to support multiple producers with multiple consumers in peer or hierarchical systems
US9460024B2 (en) * 2013-03-15 2016-10-04 Vmware, Inc. Latency reduction for direct memory access operations involving address translation
US10073977B2 (en) * 2015-07-20 2018-09-11 Intel Corporation Technologies for integrity, anti-replay, and authenticity assurance for I/O data
US11283723B2 (en) * 2018-09-27 2022-03-22 Intel Corporation Technologies for managing single-producer and single consumer rings

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107623642A (en) * 2017-08-30 2018-01-23 山东中创软件商用中间件股份有限公司 A kind of message traffic control method and device
CN111858413A (en) * 2020-06-29 2020-10-30 牛芯半导体(深圳)有限公司 Data scheduling method and device for PCIE (peripheral component interface express) exchange chip port
WO2022016767A1 (en) * 2020-07-20 2022-01-27 北京泽石科技有限公司 Data queue processing method and apparatus
CN113535395A (en) * 2021-07-14 2021-10-22 西安电子科技大学 Descriptor queue and memory optimization method, system and application of network storage service

Also Published As

Publication number Publication date
CN115842790A (en) 2023-03-24

Similar Documents

Publication Publication Date Title
US7526593B2 (en) Packet combiner for a packetized bus with dynamic holdoff time
KR102245247B1 (en) GPU remote communication using triggered actions
US10739836B2 (en) System, apparatus and method for handshaking protocol for low power state transitions
US11403247B2 (en) Methods and apparatus for network interface fabric send/receive operations
CN111949568B (en) Message processing method, device and network chip
US8473658B2 (en) Input output bridging
US7469309B1 (en) Peer-to-peer data transfer method and apparatus with request limits
CN110058816B (en) DDR-based high-speed multi-user queue manager and method
US20110238869A1 (en) Autonomous Multi-Packet Transfer for Universal Serial Bus
CN115964319A (en) Data processing method for remote direct memory access and related product
CN113590512A (en) Self-starting DMA device capable of directly connecting peripheral equipment and application
CN115842790B (en) Business data flow control method applied to PCIe equipment
JPH1196072A (en) Memory access control circuit
CN116166581A (en) Queue type DMA controller circuit for PCIE bus and data transmission method
CN102420749A (en) Device and method for realizing network card issuing function
CN114281499A (en) Interrupt transmission processing method and system during bus interconnection
CN115277644A (en) Bus data transmission system, method, device and storage medium
CN116601616A (en) Data processing device, method and related equipment
CN113157628A (en) Storage system, data processing method and device, storage system and electronic equipment
CN115617722B (en) System and method for realizing sharing DMA linked list by multiple PCIE devices
CN117389915B (en) Cache system, read command scheduling method, system on chip and electronic equipment
US20230134412A1 (en) Serial transmission controller and data transmission method thereof
CN118069570A (en) Doorbell type chip access system, device and method
CN113609041A (en) Data transmission method and system
WO2018101136A1 (en) Information processing system, semiconductor integrated circuit, and information processing method

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant