CN115834804A - Video transmission system for converting multi-path SRIO into multi-path ARINC818 - Google Patents
Video transmission system for converting multi-path SRIO into multi-path ARINC818 Download PDFInfo
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Abstract
The invention relates to a video transmission system for converting multi-path SRIO into multi-path ARINC 818.A sensor respectively forms video data and video configuration information into independent SRIO data packets and then sends the data packets through an SRIO bus; the SRIO switch forwards the SRIO data packets of each sensor to the FPGA protocol conversion chip; in the FPGA protocol conversion chip, a protocol conversion function module maps a source ID of an SRIO data packet with ARINC818 data channels, and each ARINC818 channel is connected with a corresponding protocol conversion function module; the SRIO controller writes SRIO data packets from different source IDs into a corresponding protocol conversion function module through an AXI bus, the protocol conversion function module completes configuration of a video configuration register according to video configuration information, and converts the video data into an ARINC818 protocol for sending. The invention realizes the multiple input and multiple output of the video data.
Description
Technical Field
The invention belongs to the technical field of video transmission, and provides a method for converting multi-path SRIO video data stream input into multi-path ARINC818 protocol output by utilizing SRIO and ARINC818 protocol characteristics.
Background
The ARINC818 bus is a video transmission bus based on FC-AV protocol standard, is widely applied to the field of aviation audio and video transmission, has the excellent network performance of an optical fiber channel, and has the characteristics of unidirectional transmission, no need of realizing link initialization and flow control and the like. However, due to the point-to-point transmission characteristic of the ARINC818 bus, when there are multiple paths of sensor video inputs, each path of video data needs to be buffered, which increases the hardware cost and the protocol conversion device lacks flexibility.
The SRIO bus has the characteristics of high bandwidth and flexible networking, and is suitable for being used as a data transmission interface of a front-end sensor. By utilizing the high bandwidth characteristic of the SRIO and combining the characteristic of high flexibility of an SRIO switching network, the capacity of multiplexing the multi-channel ARINC818 bandwidth of a multi-channel video source in a time-sharing mode can be effectively improved, and the requirement of high-speed transmission of multi-channel video data is met. The invention describes a specific implementation device for converting video data from multiple SRIO protocol inputs into multiple ARINC818 protocol outputs (MIMO).
Disclosure of Invention
The invention aims to provide a video transmission system for converting multi-path SRIO into multi-path ARINC818, which effectively improves the capacity of multiplexing the multi-path ARINC818 bandwidth of multi-path video sources in a time-sharing way by utilizing the high bandwidth characteristic of SRIO and combining the characteristic of high flexibility of an SRIO switching network, and meets the requirement of high-speed transmission of multi-path video data.
The invention aims to be realized by the following technical scheme:
a video transmission system for converting multi-path SRIO into multi-path ARINC818 comprises a sensor, an SRIO switch and an FPGA protocol conversion chip;
the sensor respectively forms video data and video configuration information into independent SRIO data packets and then sends the data packets through an SRIO bus;
the SRIO switch forwards the SRIO data packets of each sensor to the FPGA protocol conversion chip for unified processing;
the FPGA protocol conversion chip comprises an SRIO controller and a protocol conversion function module, wherein the protocol conversion function module maps a source ID of an SRIO data packet with ARINC818 data channels, and each ARINC818 channel is connected with a corresponding protocol conversion function module; the SRIO controller writes SRIO data packets from different source IDs into a corresponding protocol conversion function module through an AXI bus, the protocol conversion function module completes configuration of a video configuration register according to video configuration information, and converts the video data into an ARINC818 protocol for sending.
Preferably, the sensor uses Swrite as the SRIO packet type for transmitting video data, selects Nwrite as the packet type for transmitting video configuration information, and uses different SRIO address fields for different video types;
when the sensor sends the video data SRIO data packet by using the Swrite, the protocol conversion function module writes the effective load of the SRIO data packet into a corresponding video line cache FIFO according to the address space corresponding to the destination address of the SRIO data packet; when the sensor uses Nwrite to send the video configuration information SRIO data packet, the protocol conversion function module writes the data load of the SRIO data packet into the corresponding video configuration register according to the address space corresponding to the destination address in the SRIO data packet, and the video configuration register is used as the frame header information when the ARINC818 framing.
Preferably, the sensor writes the start address in the SRIO address field as the destination address into the write, after each write, the destination address in the SRIO data packet increases, and as long as the destination address in the SRIO data packet is still in the address field corresponding to the sensor, the protocol conversion function module continues to store the video data in the line cache FIFO corresponding to the sensor; after the switch finishes sending a frame of video data, the destination address in the SRIO packet returns to the initial address again, and starts sending the next frame of video data.
Preferably, the protocol conversion function module performs the protocol conversion by the following steps:
1) Calculating the byte number Row _ Bytes of a Row according to the video configuration information written by the Nwrite; if Row _ Bytes is less than or equal to 2112 Bytes, the ARINC818 data frame sends a line of video data, and when the Row _ Bytes exceeds the 2112 Bytes, the line of video is divided into a plurality of ARINC818 frames to be sent;
2) When the destination address written by the Swrite is the initial address of the SRIO address field, generating an ARINC818 container head sending request mark, controlling the ARINC818 framing IP to generate a container head, and starting the sending of a video container; resolution information is sent through OBJ0 auxiliary data, static fields in the OBJ0 are filled in advance in ARINC818 framing IP, and dynamic fields are filled by video configuration information written by Nwrite;
3) Reading out video data from a line buffer FIFO according to the byte number of Row _ Bytes, converting the data Stream into an AXI _ Stream bus, and sending the AXI _ Stream bus to an ARINC818 framing IP;
4) The ARINC818 framing IP polls each path of AXI _ Stream data in a round-robin manner by the arbitration unit, and video data is transmitted using the OBJ 2.
Drawings
Fig. 1 is a block diagram of a video transmission system for converting SRIO into ARINC818 according to an embodiment.
Fig. 2 is a functional block diagram of an FPGA protocol conversion chip.
Fig. 3 is a functional block diagram of a protocol conversion function module.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples.
Referring to fig. 1, the video transmission system for converting multiple SRIO channels into multiple ARINC channels 818 in this embodiment includes a sensor, an SRIO switch, and an FPGA protocol conversion chip.
The sensor is used as a video data acquisition unit, and video data and video configuration information are respectively formed into independent SRIO data packets and then are sent through an SRIO bus. The SRIO bus adopts a 5Gbps, X4 mode. The sensor can output video data in various formats in a time-sharing manner, and the video configuration information is written into a register of the FPGA for configuration through the SRIO before the video data is sent.
The SRIO switch is used as a switching device of the SRIO bus and is responsible for forwarding the SRIO data packets of the front-end sensors to the FPGA protocol conversion chip for unified processing.
The FPGA protocol conversion chip is configured according to the received video configuration information, and converts the video data stream into a multi-path ARINC818 protocol format for sending.
Referring to fig. 2, the FPGA protocol conversion chip includes an SRIO controller and a protocol conversion function module, where the protocol conversion function module maps a source ID of an SRIO packet with an ARINC818 data channel. Each ARINC818 channel has a corresponding protocol conversion function module connected to it. The SRIO controller writes SRIO data packets from different source IDs into the corresponding protocol conversion function module through the AXI bus, and converts the SRIO data packets into an ARINC818 protocol for sending.
Referring to fig. 3, the protocol conversion function module distinguishes whether video data or video configuration information is received by the packet type of the SRIO packet. Different video types use different SRIO address fields, so that the function of sending different types of video data by one front-end device in a time-sharing manner is realized. The SRIO address field assignment is shown in Table 1.
In the SRIO packet, because the switch packet has a smaller header and the data transmission efficiency is higher, the switch is selected as the SRIO packet type for transmitting the video data, and Nwrite is selected as the packet type for transmitting the video configuration information.
TABLE 1SRIO Address assignment
When the sensor uses Swrite to send the video data SRIO data packet, the protocol conversion function module writes the effective load of the SRIO data packet into the corresponding video line cache FIFO according to the address space corresponding to the destination address of the SRIO data packet. The line buffer FIFO data depth should be sufficient to buffer the storage of at least 4 lines of video data. Meanwhile, the FIFO also plays the roles of bit width conversion and clock domain crossing.
When the sensor uses Nwrite to send the video configuration information SRIO data packet, the FPGA writes the data load of the SRIO data packet into the corresponding video configuration register according to the address space corresponding to the destination address in the SRIO data packet. Register definitions are shown in table 2 video configuration registers:
table 2 video configuration register
The video configuration register is defined as Word0 of the OBJ0 auxiliary data in the ARINC818 protocol, and is used as frame header information when the ARINC818 frames.
The specific steps of the sensor for sending the video data and the video configuration information are as follows:
1) And writing information such as video resolution, video format and the like into the video configuration register through Nwrite.
2) Firstly, the initial address of the SRIO address field is used as a target address to write video data through Swrite, the SRIO data packet has the longest length of only 256 bytes, after each Swrite, the target address is automatically increased, and as long as the target address is still in the SRIO address field corresponding to the sensor, the FPGA continuously stores the video data in the line cache FIFO corresponding to the sensor.
3) After the Swrite sends a frame of video data, the destination address of the Swrite returns to the start address of the SRIO address field again, and starts sending the next frame of video data. The action of Swrite writing to the SRIO start address will generate the SOFi signal of ARINC818 and generate a container header.
The FPGA carries out protocol conversion and comprises the following steps:
1) The byte count Row _ Bytes of a Row is calculated according to the video configuration information written by Nwrite. If Row _ Bytes is less than or equal to 2112 Bytes, the ARINC818 data frame sends a line of video data, and when the Row _ Bytes exceeds the 2112 Bytes, the line of video is divided into two ARINC818 frames to be sent.
2) When the destination address written by the sensor through the Swrite is the starting address of the address field, the ARINC818 container head sending request flag is generated, the ARINC818 framing IP is controlled to generate the container head, and the sending of a video container is started. The resolution information is sent via OBJ0 auxiliary data, the static fields in OBJ0 are pre-filled in ARINC818 framing IP and the dynamic fields are filled by the video configuration information written in Nwrite.
3) One line of video data is read out from the line buffer FIFO according to the number of Bytes of Row _ Bytes (half line when Row _ Bytes > 2112), and the data Stream is converted into AXI _ Stream bus and sent to ARINC818 framing IP.
4) The ARINC818 framing IP polls each path of AXI _ Stream data in a round-robin manner by the arbitration unit, and video data is transmitted using the OBJ 2.
The video transmission system for converting the multiple SRIO channels into the multiple ARINC818 provided by the invention can realize that:
1. SRIO is used as a video transmission interface and a protocol configuration interface, and a static field of an ARINC818 frame header is configured by the SRIO at a source end after equipment is powered on, so that video transmission types supported by an ARINC818 protocol can be supported in the protocol conversion method, and the adaptability of protocol conversion is improved.
2. The packet type of SRIO is used to distinguish between video data and configuration data. Video stream data is sent using Swrite, configuration data is sent using Nwrite, and configuration data and status information are read using Nread. The protocol conversion logic does not need to analyze an application layer protocol, so that the logic implementation is simplified, and the video transmission efficiency is improved.
3. In the protocol conversion method, the SRIO source ID is mapped to different ARINC818 buses, so that Multiple Input Multiple Output (MIMO) of video data is realized, the limitation caused by point-to-point transmission of the ARINC818 is avoided by utilizing an SRIO switching network, and the robustness and the expansibility of the system are improved.
4. In the protocol conversion method, different destination address fields in the SRIO header are used to distinguish different types of video data in the same front-end device, so that one front-end device can transmit multiple types of video data to one ARINC818 bus in a time-division multiplexing manner.
5. In the protocol conversion method, only the video line needs to be cached, the whole frame of video data does not need to be cached by a large-capacity memory, only a small amount of on-chip RAM is needed to be used as a line cache FIFO, and the area and the cost are saved.
6. The start address of the SRIO address field is used to generate the SOFi of the ARINC818 protocol. The resolution information of the configuration register is used for obtaining the video data length, and EOFn/t is generated, so that the reconstruction of ARINC818 video time sequence is realized by SRIO sending time sequence and register configuration.
It should be understood that equivalents and modifications to the invention as described herein may occur to those skilled in the art, and all such modifications and alterations are intended to fall within the scope of the appended claims.
Claims (4)
1. A video transmission system for converting multi-path SRIO into multi-path ARINC818 comprises a sensor, an SRIO switch and an FPGA protocol conversion chip, and is characterized in that;
the sensor respectively forms video data and video configuration information into independent SRIO data packets and then sends the data packets through an SRIO bus;
the SRIO switch forwards the SRIO data packets of each sensor to the FPGA protocol conversion chip for unified processing;
the FPGA protocol conversion chip comprises an SRIO controller and a protocol conversion function module, wherein the protocol conversion function module maps a source ID of an SRIO data packet with ARINC818 data channels, and each ARINC818 channel is connected with a corresponding protocol conversion function module; the SRIO controller writes SRIO data packets from different source IDs into a corresponding protocol conversion function module through an AXI bus, the protocol conversion function module completes configuration of a video configuration register according to video configuration information, and converts the video data into an ARINC818 protocol for sending.
2. The system of claim 1, wherein the SRIO is converted to ARINC 818;
the sensor uses Swrite as the SRIO packet type for transmitting video data, selects Nwrite as the packet type for transmitting video configuration information, and uses different SRIO address fields for different video types;
when the sensor sends the video data SRIO data packet by using the Swrite, the protocol conversion function module writes the effective load of the SRIO data packet into a corresponding video line cache FIFO according to the address space corresponding to the destination address of the SRIO data packet; when the sensor uses Nwrite to send the video configuration information SRIO data packet, the protocol conversion function module writes the data load of the SRIO data packet into the corresponding video configuration register according to the address space corresponding to the destination address in the SRIO data packet, and the video configuration register is used as the frame header information when the ARINC818 frames.
3. The system of claim 2, wherein the SRIO is converted to ARINC 818; the sensor writes the initial address in the SRIO address segment as the destination address into Swrite, after each Swrite, the destination address in the SRIO data packet increases, as long as the destination address in the SRIO data packet is still in the address segment corresponding to the sensor, the protocol conversion function module continuously stores the video data in the line cache FIFO corresponding to the sensor; after the switch finishes sending a frame of video data, the destination address in the SRIO packet returns to the starting address again, and starts sending the next frame of video data.
4. The system of claim 2, wherein the SRIO is converted to ARINC 818; the protocol conversion function module performs protocol conversion according to the following steps:
1) Calculating the byte number Row _ Bytes of a Row according to the video configuration information written by the Nwrite; if Row _ Bytes is less than or equal to 2112 Bytes, the ARINC818 data frame sends a line of video data, and when the Row _ Bytes exceeds the 2112 Bytes, the line of video is divided into a plurality of ARINC818 frames to be sent;
2) When the sensor writes that the destination address in each SRIO data packet is the starting address of the SRIO address field through Swrite, generating an ARINC818 container header sending request mark, controlling the ARINC818 framing IP to generate a container header and starting to send a video container; resolution information is sent through OBJ0 auxiliary data, static fields in the OBJ0 are filled in advance in ARINC818 framing IP, and dynamic fields are filled by video configuration information written by Nwrite;
3) Reading out video data from a line buffer FIFO according to the byte number of Row _ Bytes, converting the data Stream into an AXI _ Stream bus, and sending the AXI _ Stream bus to an ARINC818 framing IP;
4) The ARINC818 framing IP polls each path of AXI _ Stream data in a round-robin manner through an arbitration unit, and video data is transmitted by using OBJ 2.
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| CN116939052A (en) * | 2023-09-19 | 2023-10-24 | 中国电子科技集团公司第五十八研究所 | High-flux trusted data communication system and method based on PCIE-SRIO |
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| CN116939052A (en) * | 2023-09-19 | 2023-10-24 | 中国电子科技集团公司第五十八研究所 | High-flux trusted data communication system and method based on PCIE-SRIO |
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