CN115833848A - Decoding determination method and device, electronic equipment and storage medium - Google Patents

Decoding determination method and device, electronic equipment and storage medium Download PDF

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CN115833848A
CN115833848A CN202211188892.3A CN202211188892A CN115833848A CN 115833848 A CN115833848 A CN 115833848A CN 202211188892 A CN202211188892 A CN 202211188892A CN 115833848 A CN115833848 A CN 115833848A
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sequence
window
information
hard decision
determining
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牛凯
李炫钰
韩雨欣
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Beijing University of Posts and Telecommunications
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Abstract

The application provides a decoding determining method, a decoding determining device, electronic equipment and a storage medium. The method comprises the following steps: determining a reliability measure of the received sequence y to determine an information sequence z; generating an information bit window corresponding to the information sequence z according to a preset generation criterion; sorting the pre-acquired initial generator matrix G according to a permutation function to determine a system generator matrix G 1 And determining a hard decision decoding; obtaining an error pattern e according to an error pattern generation rule, and turning system bit bits in the code word information sequence according to the error pattern e to determine K new system bit bits; generating a matrix G from the system 1 And obtaining a binary bit sequence according to the hard decision codeword sequence determined by the new system bit; in response to the hard decision codeword sequence being legal, determining the candidate minimum Euclidean distance of the information bit window, determining the optimal hard decision codeword sequence under the information bit window corresponding to the minimum Euclidean distance, and determining the optimal hard decision codeword sequence under the information bit window according to the maximum Euclidean distanceAnd determining the optimal decoding by the optimal hard decision codeword sequence.

Description

Decoding determination method and device, electronic equipment and storage medium
Technical Field
The present application relates to the field of decoding technologies, and in particular, to a decoding determination method and apparatus, an electronic device, and a storage medium.
Background
In the related art, in commonly used decoding algorithms, strict requirements are imposed on code rate and code length, so that the complexity of the algorithm is high, the decoding delay is long, and the throughput rate is low.
Disclosure of Invention
In view of the above, an object of the present application is to provide a decoding determining method, apparatus, electronic device and storage medium.
Based on the object, in a first aspect, the present application provides a decoding determining method, including:
determining reliability measurement of a received receiving sequence y, and performing descending order arrangement on the receiving sequence y according to the reliability measurement to determine an information sequence z;
generating an information bit window corresponding to the information sequence z according to a preset generation criterion;
sorting the pre-acquired initial generator matrix G according to a permutation function to determine a system generator matrix G 1 And generating a matrix G according to said system 1 And the pre-acquired code word information sequence determines hard decision decoding by inversely replacing the replacement function;
obtaining an error pattern e according to an error pattern generation rule, and turning over the systematic bit in the codeword information sequence according to the error pattern e to determine K new systematic bit;
generating a matrix G from the system 1 And obtaining a binary bit sequence according to the hard decision codeword sequence determined by the new system bit;
and in response to the fact that the hard decision codeword sequence is legal, determining a candidate minimum Euclidean distance of the information bit window through the binary bit sequence and the receiving sequence, determining an optimal hard decision codeword sequence under the information bit window corresponding to the minimum Euclidean distance, and determining optimal decoding according to the optimal hard decision codeword sequence.
In one possible implementation, the information bit window includes: a reliable window, an overlapping sliding window, a non-overlapping sliding window, a hopping window, an odd-even window, and a random window;
the generating an information bit window corresponding to the information sequence according to a preset generation criterion includes:
the first K bits in the information sequence are used as the reliable window according to descending order of the reliability measurement; wherein K represents the source bit length;
sliding the reliable window backward by d bits in the information sequence to determine the overlapping sliding window; wherein d represents a first sliding digit number, and d is less than K;
sliding the reliable window backward by c bits in the information sequence to determine the non-overlapping sliding window; wherein c represents a second sliding digit, and c is more than or equal to K;
taking the front p bits and the rear q bits from the d-th bit which are sequenced according to the reliability measurement in the information sequence as the jump window; wherein p represents a third number of sliding bits, q represents a fourth number of sliding bits, p + q = K;
selecting the first K bits of odd bits in the information sequence as an odd window, or selecting the first K bits of even bits in the information sequence as an even window to determine the odd-even window;
randomly selecting K bits in the information sequence to determine the random window.
In one possible implementation, the permutation function includes: a first permutation function λ 1
The pre-acquired initial generating matrix G is sequenced according to the permutation function to determine a system generating matrix G 1 The method comprises the following steps:
according to the first permutation function lambda 1 Reordering the columns of the initial generator matrix G to determine a first generator matrix G';
searching corresponding K irrelevant column vectors from the first generating matrix G 'according to the information bit window, and arranging the irrelevant column vectors in a descending order according to the reliability measure to determine a second generating matrix G'; the first K columns of the second generation matrix G 'are the uncorrelated column vectors, and the other column vectors are the same as the corresponding column vectors in the first generation matrix G';
performing an elementary row transformation on the second generator matrix G' to determine the system generator matrix G 1
Wherein the system generates a matrix G 1 Is shown as
Figure BDA0003867496940000021
Wherein, I K Denotes an identity matrix and P denotes a parity check matrix.
In one possible implementation, the permutation function includes: second permutation function lambda 2
Generating a matrix G according to the system 1 And the pre-acquired codeword information sequence determines a hard decision decoding by inversely permuting the permutation function, including:
determining a transposed sequence according to the system generator matrix and a pre-obtained codeword information sequence
Figure BDA0003867496940000031
Figure BDA0003867496940000032
Performing an inverse permutation of the first permutation function lambda on the codeword information sequence 1 And said second permutation function λ 2 Determining the hard decision decoding; wherein the hard decision decoding is represented as
Figure BDA0003867496940000033
In one possible implementation, the permutation function includes: second permutation function lambda 2
The determining a hard decision decoding by inversely permuting the permutation function according to the system generator matrix and the pre-obtained codeword information sequence includes:
determining a transposed sequence according to the system generator matrix and a pre-obtained codeword information sequence
Figure BDA0003867496940000034
Figure BDA0003867496940000035
Performing an inverse permutation of the first permutation function λ according to the codeword information sequence 1 And said second permutation function λ 2 Determining the hard decision decoding; wherein the hard decision decoding is represented as
Figure BDA0003867496940000036
Where a denotes a codeword information sequence.
In a possible implementation manner, the obtaining an error pattern e according to an error pattern generation rule, and flipping systematic bits in the codeword information sequence according to the error pattern e to determine K new systematic bits includes:
obtaining an error pattern e according to an error pattern generation rule;
flipping systematic bits in the codeword information sequence according to the error pattern e to determine K new systematic bits
Figure BDA0003867496940000037
Wherein the new systematic bit
Figure BDA0003867496940000038
Is shown as
Figure BDA0003867496940000039
Wherein a represents the codeword information sequence.
In one possible implementation, the generating a matrix G according to the system 1 And obtaining a binary bit sequence according to the hard decision codeword sequence determined by the new systematic bit, including:
generating a matrix G from the system 1 Reconstructing the hard decision decoding to determine a hard decisionDetermining a decoding sequence and determining a binary bit sequence according to the hard decision decoding sequence; wherein the binary bit sequence is represented as
Figure BDA0003867496940000041
Wherein,
Figure BDA0003867496940000042
representing the hard decision decoded sequence.
In a possible implementation manner, if the hard decision codeword sequence is legal, determining a candidate minimum euclidean distance of the information bit window through the binary bit sequence and the received sequence, determining an optimal binary bit sequence under the information bit window corresponding to the minimum euclidean distance, and determining an optimal decoding according to the optimal binary bit sequence, includes:
verifying whether the hard decision decoding sequence meets the legitimacy or not by utilizing cyclic redundancy check and frozen bit check;
for each window of information bits it is possible to,
in response to the hard-decision decoded sequence satisfying legitimacy, determining a euclidean distance between a binary bit sequence and a twice-rearranged received sequence v, and determining whether the euclidean distance is less than an initial euclidean distance; wherein the rearranged received sequence v = λ 2 (z), wherein z = λ 1 (y), z represents a once-rearranged received sequence, λ 1 Representing a first permutation function, λ 2 A second permutation function is represented that is,
in response to the Euclidean distance being smaller than the initial Euclidean distance of the current information bit window, replacing the initial Euclidean distance with the Euclidean distance, and determining a hard decision decoding sequence corresponding to the Euclidean distance as the candidate decoding,
in response to finding delta legal codewords, determining an optimal hard decision codeword sequence of a current information bit window according to the candidate decoding;
and determining the optimal hard decision codeword sequence with the minimum Euclidean distance in all information bit windows as the optimal decoding.
In a second aspect, the present application provides a decoding determining apparatus comprising:
a first determining module configured to determine a reliability measure of a received sequence y, and arrange the received sequence y in descending order according to the reliability measure to determine an information sequence z;
a generating module configured to generate an information bit window corresponding to the information sequence z according to a preset generating criterion;
a second determination module configured to rank the pre-obtained initial generator matrix G according to a permutation function to determine a system generator matrix G 1 And generating a matrix G according to said system 1 And the pre-acquired code word information sequence determines hard decision decoding by inversely replacing the replacement function;
a third determining module, configured to obtain an error pattern e according to an error pattern generation rule, and flip the systematic bits in the codeword information sequence according to the error pattern e to determine K new systematic bits;
a fourth determination module configured to generate a matrix G from the system 1 And obtaining a binary bit sequence according to the hard decision codeword sequence determined by the new system bit;
and a fifth determining module, configured to determine a candidate minimum euclidean distance of the information bit window through the binary bit sequence and the received sequence in response to the hard decision codeword sequence being legal, determine an optimal hard decision codeword sequence under the information bit window corresponding to the minimum euclidean distance, and determine an optimal decoding according to the optimal hard decision codeword sequence.
In a third aspect, the present application provides an electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, the processor implementing the method for determining a transcoding as described in the first aspect when executing the program.
In a fourth aspect, the present application provides a non-transitory computer-readable storage medium storing computer instructions for causing a computer to perform the transcoding determination method according to the first aspect.
As can be seen from the foregoing, the decoding determining method, apparatus, electronic device and storage medium provided in the present application determine a reliability metric of a received sequence y, and perform descending order arrangement on the received sequence y according to the reliability metric to determine an information sequence z; generating an information bit window corresponding to the information sequence z according to a preset generation criterion; sorting the pre-acquired initial generator matrix G according to a permutation function to determine a system generator matrix G 1 And generating a matrix G according to said system 1 And the pre-acquired code word information sequence determines hard decision decoding by inversely replacing the replacement function; obtaining an error pattern e according to an error pattern generation rule, and turning over the systematic bit in the codeword information sequence according to the error pattern e to determine K new systematic bit; generating a matrix G from the system 1 And obtaining a binary bit sequence according to the hard decision codeword sequence determined by the new system bit; and in response to the fact that the hard decision codeword sequence is legal, determining a candidate minimum Euclidean distance of the information bit window through the binary bit sequence and the receiving sequence, determining an optimal hard decision codeword sequence under the information bit window corresponding to the minimum Euclidean distance, and determining optimal decoding according to the optimal hard decision codeword sequence. The method has good performance for various codes and decoding, is suitable for code lengths with various lengths, and can reduce the complexity to realize the flexibility of application and configuration and achieve shorter decoding delay and higher throughput rate.
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In order to more clearly illustrate the technical solutions in the present application or the related art, the drawings needed to be used in the description of the embodiments or the related art will be briefly introduced below, and it is obvious that the drawings in the following description are only embodiments of the present application, and it is obvious for those skilled in the art that other drawings can be obtained according to these drawings without creative efforts.
Fig. 1 illustrates an exemplary flowchart of a decoding determining method provided in an embodiment of the present application.
Fig. 2 shows a usage scenario of a transcoding determination method according to an embodiment of the present application.
Fig. 3 shows an exemplary schematic diagram of an information bit window according to an embodiment of the application.
Fig. 4 shows an exemplary structural diagram of a decoding determination apparatus provided in an embodiment of the present application.
Fig. 5 shows an exemplary structural schematic diagram of an electronic device provided in an embodiment of the present application.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more apparent, the present application is further described in detail below with reference to the accompanying drawings in combination with specific embodiments.
It should be noted that technical terms or scientific terms used in the embodiments of the present application should have a general meaning as understood by those having ordinary skill in the art to which the present application belongs, unless otherwise defined. The use of "first," "second," and similar terms in the embodiments of the present application do not denote any order, quantity, or importance, but rather the terms are used to distinguish one element from another. The word "comprising" or "comprises", and the like, means that the element or item listed before the word covers the element or item listed after the word and its equivalents, but does not exclude other elements or items. The terms "connected" or "coupled" and the like are not restricted to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "upper", "lower", "left", "right", and the like are used merely to indicate relative positional relationships, and when the absolute position of the object being described is changed, the relative positional relationships may also be changed accordingly.
As described in the background section, few of the existing decoding algorithms are designed for short codes, so that their performance is generally limited on the short codes, and the performance potential under the short codes cannot be fully exploited. And they are usually designed for a certain codeword structure, and even if a good performance is achieved in a certain codeword, they are still difficult to migrate and expand.
The applicant finds through research that, in the related art, the GRAND algorithm has about 1dB performance advantage compared with the CA-SCL under the conditions of high code rate and short code length. But the most important disadvantage is that it needs a higher code rate and a shorter code length, so its application range is not wide enough, otherwise it will cause the complexity of the algorithm to increase rapidly, resulting in a too long decoding delay. In addition, for the code words with medium and low code rates, even though larger overhead is paid, the performance advantages of GRAND and the variants thereof are not obvious, and even the performance advantages are poor under partial conditions. Although the throughput rate is improved remarkably, the average complexity is still high in the medium-low signal-to-noise ratio, and the decoding delay is still unacceptable.
In other related arts, the OSD decoding algorithm and its existing improved scheme have been developed to have better decoding performance, but the complexity reduction is still not effective enough. Resulting in high decoding latency, low throughput, flexibility with similar constraints as GRAND, and thus can only be used for short codes. And as the code length increases, the decoding performance is gradually limited. The disadvantage of OSD is that the code length is critical, and once the number of information bits increases, the complexity increases exponentially.
Therefore, the decoding determining method, apparatus, electronic device and storage medium provided by the present application determine the reliability measure of the received sequence y, and perform descending order arrangement on the received sequence y according to the reliability measure to determine the information sequence z; generating an information bit window corresponding to the information sequence z according to a preset generation criterion; sorting the pre-acquired initial generator matrix G according to a permutation function to determine a system generator matrix G 1 And generating a matrix G according to said system 1 And the pre-acquired code word information sequence determines hard decision decoding by inversely replacing the replacement function; obtaining an error pattern e according to an error pattern generation rule, and obtaining the code word informationTurning over the systematic bits in the sequence according to the error pattern e to determine K new systematic bits; generating a matrix G from the system 1 And obtaining a binary bit sequence according to the hard decision codeword sequence determined by the new system bit; and in response to the fact that the hard decision codeword sequence is legal, determining a candidate minimum Euclidean distance of the information bit window through the binary bit sequence and the receiving sequence, determining an optimal hard decision codeword sequence under the information bit window corresponding to the minimum Euclidean distance, and determining optimal decoding according to the optimal hard decision codeword sequence. The method has good performance for various codes and decoding, is suitable for code lengths with various lengths, and can reduce the complexity to realize the flexibility of application and configuration and achieve shorter decoding delay and higher throughput rate.
The decoding determination method provided in the embodiments of the present application is specifically described below by specific embodiments.
Referring to fig. 1, a decoding determining method provided in the embodiment of the present application specifically includes the following steps:
s102: determining a reliability measure of a received receiving sequence y, and sequencing the receiving sequence y in a descending order according to the reliability measure to determine an information sequence z.
S104: and generating an information bit window corresponding to the information sequence z according to a preset generation criterion.
S106: sorting the pre-acquired initial generator matrix G according to a permutation function to determine a system generator matrix G 1 And generating a matrix G according to said system 1 And determining hard decision decoding by reversely replacing the replacement function with the pre-acquired codeword information sequence.
S108: and obtaining an error pattern e according to an error pattern generation rule, and turning the systematic bit in the code word information sequence according to the error pattern e to determine K new systematic bit.
S110: generating a matrix G from the system 1 And obtaining a binary bit sequence according to the hard decision codeword sequence determined by the new system bit.
S112: and in response to the fact that the hard decision codeword sequence is legal, determining a candidate minimum Euclidean distance of the information bit window through the binary bit sequence and the receiving sequence, determining an optimal hard decision codeword sequence under the information bit window corresponding to the minimum Euclidean distance, and determining optimal decoding according to the optimal hard decision codeword sequence.
Fig. 2 shows a usage scenario of a transcoding determination method according to an embodiment of the present application.
In some embodiments, referring to fig. 2, the invention is primarily divided into two parts: a window generation module and a decoder core. And generating a position window of the system bits required in a series of subsequent decoding by using a window generation module. And the subsequent decoder core performs preprocessing and subsequent decoding according to the window.
The decoder core is divided into the following three main modules: the device comprises a preprocessing module, a decoding module and an error detection and correction module. The main schematic diagram of this scheme is shown in fig. 2, where the dashed lines indicate that the decoder core can select multiple windows for decoding at the same time.
In some embodiments, an information bit window corresponding to an information sequence may be generated according to a preset generation criterion, wherein the information bit window may include a reliable window, an overlapping sliding window, a non-overlapping sliding window, a skip window, a parity window, and a random window. The received sequences may be first sorted in descending order according to the reliability measure to obtain a reordered sequence, and the permutation operation may be defined as a first permutation function λ 1 . While according to a first permutation function lambda 1 The columns of the initial generator matrix G = G (N, K) are reordered to obtain a first generator matrix G'. And generating the corresponding system code information bit window of the reordered sequence according to various criteria. Where N denotes the transmission codeword length and K denotes the source bit length.
Fig. 3 shows an exemplary schematic diagram of an information bit window according to an embodiment of the application.
Specifically, referring to fig. 3, the top K bits in the information sequence arranged in descending order according to the reliability measure serve as the reliability window; wherein K represents the source bit length;
sliding the reliable window backward by d bits in the information sequence to determine the overlapping sliding window; wherein d represents a first number of sliding bits, d < K, and the overlapping sliding window may include d +1, d + 2., d + K bits;
sliding the reliable window backward by c bits in the information sequence to determine the non-overlapping sliding window; wherein c represents a second sliding digit, c is larger than or equal to K, and the non-overlapping sliding window can comprise c +1, c +2, a.d., c + K;
taking the front p bits and the rear q bits from the d-th bit which are sequenced according to the reliability measurement in the information sequence as the jump window; wherein p represents a third number of sliding bits, q represents a fourth number of sliding bits, p + q = K;
selecting the first K bits of odd bits in the information sequence as an odd window, or selecting the first K bits of even bits in the information sequence as an even window to determine the odd-even window;
randomly selecting K bits in the information sequence to determine the random window.
It should be noted that, in the decoding design, it is necessary to select the reliable windows, and whether the remaining windows are selected, a few of them are selected, and the parameter setting is large, which can be adjusted according to the requirements. The selection criteria is illustrated schematically in fig. 3, where the numbers are reliability numbers, the larger the less reliable.
In some embodiments, according to the information bits selected by each window, decoding is performed serially or in parallel according to requirements, that is, preprocessing, decoding, error detection and error correction are performed sequentially or simultaneously, so that the decoding sequences with the same number as the windows and the euclidean distances thereof are obtained, and finally, the optimal sequence is selected as a decoding result.
In particular, it is possible to operate according to said first permutation function λ 1 Reordering the columns of the initial generator matrix G to determine a first generator matrix G'; searching corresponding K irrelevant column vectors from the first generating matrix G 'according to the information bit window, and arranging the irrelevant column vectors in a descending order according to the reliability measure to determine a second generating matrix G'; wherein the second generator matrix G "The first K columns are the uncorrelated column vectors, and the remaining column vectors are the same as the corresponding column vectors in the first generation matrix G'; performing an elementary row transformation on the second generator matrix G' to determine the system generator matrix G 1 (ii) a Wherein the system generates a matrix G 1 Is shown as
Figure BDA0003867496940000091
Wherein, I K Denotes an identity matrix and P denotes a parity check matrix.
Further, a permutation function, comprising: second permutation function lambda 2 (ii) a Determining a transposed sequence according to the system generator matrix and a pre-obtained codeword information sequence
Figure BDA0003867496940000092
Performing an inverse permutation of the first permutation function λ according to the codeword information sequence 1 And said second permutation function λ 2 Determining the hard decision coding; wherein the hard decision decoding is represented as
Figure BDA0003867496940000101
In a specific embodiment, K uncorrelated column vectors may be specifically searched from G', and the positions of the columns correspond to the windows of the window generation module in a one-to-one manner. Taking the K independent column vectors as the first K columns of G' and keeping the reliability measurement of the K independent column vectors in descending order; the remaining N-K columns are also used as the remaining N-K columns for G' without loss of reliability descending order. This process is defined as a permutation function λ 2 . According to a permutation function lambda 2 For z = λ 1 (y) rearranging to obtain the sequence v = lambda 2 (z). The first K column vectors of v are called systematic bit. Performing primary row transformation operation on the matrix G' to obtain a generating matrix G in the system form 1 . For code word
Figure BDA0003867496940000108
According to the system format of the generator matrix G 1 Can obtain
Figure BDA0003867496940000102
Thus the decoding result
Figure BDA0003867496940000109
Can be based on
Figure BDA00038674969400001010
Using inverse permutation of lambda 1 -1 λ 2 -1 Thus obtaining the compound. The above is a hard decision decoding based on reliability metric, close to the best decoding.
Further, after the preprocessing process, decoding a hard decision result in OSD decoding, and obtaining an error pattern e according to an error pattern generation rule; flipping systematic bits in the codeword information sequence according to the error pattern e to determine K new systematic bits
Figure BDA0003867496940000103
Wherein the new systematic bit
Figure BDA0003867496940000104
Is shown as
Figure BDA0003867496940000105
Wherein a represents the codeword information sequence.
Still further, a matrix G is generated according to the system 1 Reconstructing the hard decision decoding to determine a hard decision decoding sequence, and determining a binary bit sequence according to the hard decision decoding sequence; wherein the binary bit sequence is represented as
Figure BDA0003867496940000106
Wherein,
Figure BDA0003867496940000107
representing the hard decision decoded sequence.
It should be noted that obtaining the error pattern e according to the error pattern generation rule may include: and generating a plurality of error patterns and correction sequences by using the PEP generator for calling in a subsequent decoding stage, for example, inputting the bit number l and the target Hamming weight, and outputting a plurality of error patterns and a plurality of correction sequences corresponding to the error patterns one by using the PEP generator. Where l may be a temporary COW value.
Specifically, a first error pattern with a hamming weight of 1 may be generated with the PEP generator; wherein, the first error pattern corresponds to a first correction sequence with the I bit being 1 and the rest being 0 in OEI; further, the number of bits/can be split with the PEP generator to determine a plurality of bit sequences to generate a second error pattern with a hamming weight of 2; wherein the second error patterns correspond to a plurality of second correction sequences having a Hamming weight of 2, each second error pattern including a left value a and a right value b; still further, for each of the second error patterns, the left value a may be subtracted by the PEP generator from the series of numbers b +1 through a/2 to generate a plurality of third error patterns generating a hamming weight of 3, wherein each third error pattern corresponds to a third correction sequence having a hamming weight of 3.
In one embodiment, an error pattern with a Hamming weight of 1 is first generated, corresponding to a correction sequence with a first bit of 1 and all remaining bits of 0 in OEI. Further, an error pattern with a hamming weight of 2 is generated. Splitting l, subtracting 1,2 up to a series of numbers l/2, can generate several patterns such as l-1,1, l-2,2, corresponding to several correction sequences with hamming weight of 2. Still further, an error pattern with a hamming weight of 3 is generated. For each error pattern with a hamming weight of 2, the left value is a and the right value is b. A is split and subtracted with a series of numbers starting from b +1 up to a/2. So that several patterns such as { a-b-1, b +1, b }, { a-b-2, b +2, b } may be generated. Corresponding to several correction sequences with a hamming weight of 3. Similarly, the above steps can be repeated to generate an error pattern with a Hamming weight of h from an error pattern with a Hamming weight of h-1. HW, corresponding to a hamming weight of 4,5. Where HW represents the target hamming weight.
It should be noted that, by using the PEP generator, all error patterns can be generated offline in advance and stored in the memory, so that the subsequent online decoder can read and use the error patterns conveniently. Note that in this application, the generated PEP pattern may be used for all windows and corresponding decoding processes, and need not be regenerated.
Verifying whether the hard decision decoding sequence meets the legitimacy or not by utilizing cyclic redundancy check and frozen bit check; determining a euclidean distance between the BPSK sequence and the received sequence in response to the hard decision decoded sequence satisfying legitimacy, and determining whether the euclidean distance is less than an initial euclidean distance; and in response to the Euclidean distance being smaller than the initial Euclidean distance, replacing the initial Euclidean distance with the Euclidean distance, and determining a hard decision decoding sequence corresponding to the Euclidean distance as the candidate decoding.
Furthermore, a plurality of candidate codes are determined according to the information bit windows, and the candidate code corresponding to the initial Euclidean distance corresponding to each information bit window is determined to be the optimal candidate code; and determining the optimal candidate code with the minimum Euclidean distance as the optimal code.
In order to ensure the accuracy of decoding, error detection and correction are finally required, and the flow of the module is as follows:
and verifying the validity of the code word c by using CRC check and frozen bit check.
If the code word is legal, the Euclidean distance D (m, v) between the binary bit sequence m and the received sequence v is calculated and compared with the minimum Euclidean distance (the initial value is infinite) of the window. If smaller than the value, the value is replaced with it and the codeword is determined as the current best candidate codeword for the window.
For each oneWindow, until delta has a legal code word to be found, decoding is finished, and the final optimal candidate code word c is obtained * Obtaining the final decoding sequence of the window through the inverse transformation of two times of replacement transformation
Figure BDA0003867496940000121
Figure BDA0003867496940000122
Note that to limit complexity, the δ of windows other than the main reliable window may be reduced moderately.
And finally comparing the Euclidean distances corresponding to the final decoding sequences of all the windows, and selecting the decoding sequence with the minimum Euclidean distance in all the sequences as a final decoding result.
As can be seen from the foregoing, the decoding determining method, apparatus, electronic device and storage medium provided in the present application determine a reliability metric of a received sequence y, and perform descending order arrangement on the received sequence y according to the reliability metric to determine an information sequence z; generating an information bit window corresponding to the information sequence z according to a preset generation criterion; sorting the pre-acquired initial generator matrix G according to a permutation function to determine a system generator matrix G 1 And generating a matrix G according to said system 1 And the pre-acquired code word information sequence determines hard decision decoding by inversely replacing the replacement function; obtaining an error pattern e according to an error pattern generation rule, and turning over system bit bits in the code word information sequence according to the error pattern e to determine K new system bit bits; generating a matrix G from the system 1 And obtaining a binary bit sequence according to the hard decision codeword sequence determined by the new system bit; and in response to the fact that the hard decision codeword sequence is legal, determining a candidate minimum Euclidean distance of the information bit window through the binary bit sequence and the receiving sequence, determining an optimal hard decision codeword sequence under the information bit window corresponding to the minimum Euclidean distance, and determining optimal decoding according to the optimal hard decision codeword sequence. Make the performance of various coding and decoding good, and is suitable for various lengthsThe code length is long, and the complexity can be reduced, so that the flexibility of application and configuration is realized, and the shorter decoding time delay and the higher throughput rate are achieved.
In addition, the M-OSD decoding scheme is designed on the basis of the OSD decoding scheme. By means of the selection window of information bits in various reconstructed system codes, various OSD decoders can be constructed, and the OSD decoders can be used for decoding at the same time, so that the probability of missing correct code words is reduced. The main structure of the PEP pre-generation or the decoding is suitable for each window, and repeated generation or design is not needed. Therefore, the scheme is a multiple design scheme which is generally used for various types of channel coding and various types of OSD variants. Moreover, the design method of the window is various, including but not limited to overlapping sliding window, non-overlapping sliding window, odd-even selection window, jump window, random window, etc. When the method is used, a plurality of certain windows can be selected, or a plurality of various windows can be combined under various schemes, and compared with the original scheme, the complexity is improved by 0.5 to 1 time, and the increase is limited. And through a large number of various windows, the decoding accuracy can be effectively improved.
Compared with a mainstream decoding algorithm which is designed and optimized based on a certain type of codes, the M-OSD scheme provided by the proposal can be applied to various types of codes, and can be migrated only by simply adjusting the structure and the check relation of the codes.
Compared with the existing various variants such as PEPADS and the like, the complexity of the OSD decoding algorithm is limited, and the decoding performance is further improved. Especially for longer codewords.
Compared with other mainstream decoding algorithms, the M-OSD provided by the proposal has good decoding performance, is very suitable for short codes, and has more obvious performance advantages under the short codes.
It should be noted that the method of the embodiment of the present application may be executed by a single device, such as a computer or a server. The method of the embodiment can also be applied to a distributed scene and completed by the mutual cooperation of a plurality of devices. In such a distributed scenario, one of the multiple devices may only perform one or more steps of the method of the embodiment, and the multiple devices interact with each other to complete the method.
It should be noted that the description describes some embodiments of the present application. Other embodiments are within the scope of the following claims. In some cases, the actions or steps recited in the claims may be performed in a different order than in the described embodiments and still achieve desirable results. In addition, the processes depicted in the accompanying figures do not necessarily require the particular order shown, or sequential order, to achieve desirable results. In some embodiments, multitasking and parallel processing may also be possible or may be advantageous.
Fig. 4 shows an exemplary structural diagram of a decoding determination apparatus provided in an embodiment of the present application.
Based on the same inventive concept, corresponding to the method of any embodiment, the application also provides a decoding determination device.
Referring to fig. 4, the coding determination apparatus includes: the device comprises a first determining module, a generating module, a second determining module, a third determining module, a fourth determining module and a fifth determining module; wherein,
a first determining module configured to determine a reliability measure of a received sequence y, and arrange the received sequence y in descending order according to the reliability measure to determine an information sequence z;
a first generating module configured to generate an information bit window corresponding to the information sequence z according to a preset generating criterion;
a second determination module configured to rank the pre-obtained initial generator matrix G according to a permutation function to determine a system generator matrix G 1 And generating a matrix G according to said system 1 And the pre-acquired code word information sequence determines hard decision decoding by inversely replacing the replacement function;
a third determining module configured to obtain an error pattern e according to an error pattern generation rule, and flip systematic bits in the codeword information sequence according to the error pattern e to determine K new systematic bits;
a fourth determination module configured to generate a matrix G from the system 1 And obtaining a binary bit sequence according to the hard decision codeword sequence determined by the new system bit;
and a fifth determining module, configured to determine a candidate minimum euclidean distance of the information bit window through the binary bit sequence and the received sequence in response to the hard decision codeword sequence being legal, determine an optimal hard decision codeword sequence under the information bit window corresponding to the minimum euclidean distance, and determine an optimal decoding according to the optimal hard decision codeword sequence.
In one possible implementation, the information bit window includes: a reliable window, an overlapping sliding window, a non-overlapping sliding window, a jumping window, an odd-even window, and a random window;
the generation module is further configured to:
the first K bits in the information sequence are used as the reliable window according to descending order of the reliability measurement; wherein K represents the source bit length;
sliding the reliable window backward by d bits in the information sequence to determine the overlapping sliding window; wherein d represents a first sliding digit number, d < K;
sliding the reliable window backward by c bits in the information sequence to determine the non-overlapping sliding window; wherein c represents a second sliding digit, and c is more than or equal to K;
taking the front p bits and the rear q bits from the d-th bit which are sequenced according to the reliability measurement in the information sequence as the jump window; wherein p represents a third number of sliding bits, q represents a fourth number of sliding bits, p + q = K;
selecting the first K bits of odd bits in the information sequence as an odd window, or selecting the first K bits of even bits in the information sequence as an even window to determine the odd-even window;
randomly selecting K bits in the information sequence to determine the random window.
In one possible implementation, the deviceA transform function comprising: a first permutation function λ 1
The second determination module is further configured to:
according to the first permutation function lambda 1 Reordering the columns of the initial generator matrix G to determine a first generator matrix G';
searching corresponding K irrelevant column vectors from the first generating matrix G 'according to the information bit window, and arranging the irrelevant column vectors in a descending order according to the reliability measure to determine a second generating matrix G'; the first K columns of the second generation matrix G 'are the uncorrelated column vectors, and the other column vectors are the same as the corresponding column vectors in the first generation matrix G';
performing an elementary row transformation on the second generator matrix G' to determine the system generator matrix G 1
Wherein the system generates a matrix G 1 Is shown as
Figure BDA0003867496940000151
Where IK denotes an identity matrix and P denotes a parity check matrix.
In one possible implementation, the permutation function includes: second permutation function lambda 2
The second determination module is further configured to:
determining a transposed sequence according to the system generating matrix and a pre-obtained code word information sequence
Figure BDA0003867496940000152
Figure BDA0003867496940000153
Performing an inverse permutation of the first permutation function λ according to the codeword information sequence 1 And said second permutation function λ 2 Determining the hard decision decoding; wherein the hard decision decoding is represented as
Figure BDA0003867496940000154
Where a denotes a codeword information sequence.
In one possible implementation, the third determining module is further configured to:
obtaining an error pattern e according to an error pattern generation rule;
flipping systematic bits in the codeword information sequence according to the error pattern e to determine K new systematic bits
Figure BDA0003867496940000155
Wherein the new systematic bit
Figure BDA0003867496940000156
Is shown as
Figure BDA0003867496940000157
Wherein a represents the codeword information sequence.
In one possible implementation, the fourth determining module is further configured to:
generating a matrix G from the system 1 Reconstructing the hard decision decoding to determine a hard decision decoding sequence, and determining a binary bit sequence according to the hard decision decoding sequence; wherein the binary bit sequence is represented as
Figure BDA0003867496940000161
Wherein,
Figure BDA0003867496940000162
representing the hard decision decoded sequence.
In one possible implementation, the fifth determining module is further configured to:
verifying whether the hard decision decoding sequence meets the legitimacy or not by utilizing cyclic redundancy check and frozen bit check;
for each window of information bits it is possible to,
in response to the hard-decision decoded sequence satisfying legitimacy, determining a euclidean distance between a binary bit sequence and a twice-rearranged received sequence v, and determining whether the euclidean distance is less than an initial euclidean distance; wherein the rearranged received sequence v = λ 2 (z), wherein z = λ 1 (y), z represents a once-rearranged received sequence, λ 1 Representing a first permutation function, λ 2 A second permutation function is represented that is,
in response to the Euclidean distance being smaller than the initial Euclidean distance of the current information bit window, replacing the initial Euclidean distance with the Euclidean distance, and determining a hard decision decoding sequence corresponding to the Euclidean distance as the candidate decoding,
in response to finding delta legal codewords, determining an optimal hard decision codeword sequence of a current information bit window according to the candidate decoding;
and determining the optimal hard decision codeword sequence with the minimum Euclidean distance in all information bit windows as the optimal decoding.
For convenience of description, the above devices are described as being divided into various modules by functions, and are described separately. Of course, the functionality of the various modules may be implemented in the same one or more software and/or hardware implementations as the present application.
The apparatus of the embodiment is configured to implement the corresponding decoding determining method in any of the foregoing embodiments, and has the beneficial effects of the corresponding method embodiment, which are not described herein again.
Fig. 5 shows an exemplary structural schematic diagram of an electronic device provided in an embodiment of the present application.
Based on the same inventive concept, corresponding to the method of any embodiment, the present application further provides an electronic device, which includes a memory, a processor, and a computer program stored in the memory and executable on the processor, and when the processor executes the computer program, the decoding determination method of any embodiment is implemented. Fig. 5 is a schematic diagram illustrating a more specific hardware structure of an electronic device according to this embodiment, where the electronic device may include: processor 510, memory 520, input/output interface 530, communication interface 540, and bus 550. Wherein processor 510, memory 520, input/output interface 530, and communication interface 540 are communicatively coupled to each other within the device via bus 550.
The processor 510 may be implemented by a general-purpose CPU (Central Processing Unit), a microprocessor, an Application Specific Integrated Circuit (ASIC), or one or more Integrated circuits, and is configured to execute related programs to implement the technical solutions provided in the embodiments of the present specification.
The Memory 520 may be implemented in the form of a ROM (Read Only Memory), a RAM (Random Access Memory), a static storage device, a dynamic storage device, or the like. The memory 520 may store an operating system and other application programs, and when the technical solution provided by the embodiments of the present specification is implemented by software or firmware, the relevant program codes are stored in the memory 520 and called by the processor 510 for execution.
The input/output interface 530 is used for connecting an input/output module to realize information input and output. The input/output module may be configured as a component within the device (not shown) or may be external to the device to provide corresponding functionality. The input devices may include a keyboard, a mouse, a touch screen, a microphone, various sensors, etc., and the output devices may include a display, a speaker, a vibrator, an indicator light, etc.
The communication interface 540 is used for connecting a communication module (not shown in the figure) to realize communication interaction between the device and other devices. The communication module can realize communication in a wired mode (such as USB, network cable and the like) and also can realize communication in a wireless mode (such as mobile network, WIFI, bluetooth and the like).
Bus 550 includes a pathway to transfer information between various components of the device, such as processor 510, memory 520, input/output interface 530, and communication interface 540.
It should be noted that although the device only shows the processor 510, the memory 520, the input/output interface 530, the communication interface 540 and the bus 550, in a specific implementation, the device may also include other components necessary for normal operation. Moreover, those skilled in the art will appreciate that the apparatus may also include only those components necessary to implement the embodiments of the present description, and not necessarily all of the components shown in the figures.
The electronic device of the embodiment is used for implementing the corresponding decoding determination method in any one of the foregoing embodiments, and has the beneficial effects of the corresponding method embodiment, which are not described herein again.
Based on the same inventive concept, corresponding to the method of any of the embodiments, the present application also provides a non-transitory computer-readable storage medium storing computer instructions for causing the computer to execute the decode determination method of any of the embodiments.
Computer-readable media of the present embodiments, including both non-transitory and non-transitory, removable and non-removable media, may implement information storage by any method or technology. The information may be computer readable instructions, data structures, modules of a program, or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), static Random Access Memory (SRAM), dynamic Random Access Memory (DRAM), other types of Random Access Memory (RAM), read Only Memory (ROM), electrically Erasable Programmable Read Only Memory (EEPROM), flash memory or other memory technology, compact disc read only memory (CD-ROM), digital Versatile Discs (DVD) or other optical storage, magnetic cassettes, magnetic tape magnetic disk storage or other magnetic storage devices, or any other non-transmission medium that can be used to store information that can be accessed by a computing device.
The computer instructions stored in the storage medium of the embodiment are used to enable the computer to execute the decoding determination method according to any one of the above embodiments, and have the beneficial effects of the corresponding method embodiment, which are not described herein again.
Those of ordinary skill in the art will understand that: the discussion of any embodiment above is meant to be exemplary only, and is not intended to intimate that the scope of the disclosure, including the claims, is limited to these examples; within the context of the present application, features from the above embodiments or from different embodiments may also be combined, steps may be implemented in any order, and there are many other variations of the different aspects of the embodiments of the present application as described above, which are not provided in detail for the sake of brevity.
In addition, well-known power/ground connections to Integrated Circuit (IC) chips and other components may or may not be shown in the provided figures for simplicity of illustration and discussion, and so as not to obscure the embodiments of the application. Furthermore, devices may be shown in block diagram form in order to avoid obscuring embodiments of the application, and this also takes into account the fact that specifics with respect to implementation of such block diagram devices are highly dependent upon the platform within which the embodiments of the application are to be implemented (i.e., specifics should be well within purview of one skilled in the art). Where specific details (e.g., circuits) are set forth in order to describe example embodiments of the application, it should be apparent to one skilled in the art that the embodiments of the application can be practiced without, or with variation of, these specific details. Accordingly, the description is to be regarded as illustrative instead of restrictive.
While the present application has been described in conjunction with specific embodiments thereof, many alternatives, modifications, and variations of these embodiments will be apparent to those of ordinary skill in the art in light of the foregoing description. For example, other memory architectures, such as Dynamic RAM (DRAM), may use the discussed embodiments.
The present embodiments are intended to embrace all such alternatives, modifications and variances which fall within the broad scope of the appended claims. Therefore, any omissions, modifications, substitutions, improvements, and the like that may be made without departing from the spirit and principles of the embodiments of the present application are intended to be included within the scope of the present application.

Claims (10)

1. A method for decoding determination, comprising:
determining reliability measurement of a received receiving sequence y, and performing descending order arrangement on the receiving sequence y according to the reliability measurement to determine an information sequence z;
generating an information bit window corresponding to the information sequence z according to a preset generation criterion;
sorting the pre-acquired initial generator matrix G according to a permutation function to determine a system generator matrix G 1 And generating a matrix G according to said system 1 And the pre-acquired code word information sequence determines hard decision decoding by inversely replacing the replacement function;
obtaining an error pattern e according to an error pattern generation rule, and turning over system bit bits in the code word information sequence according to the error pattern e to determine K new system bit bits;
generating a matrix G from the system 1 And obtaining a binary bit sequence according to the hard decision codeword sequence determined by the new system bit;
and in response to the fact that the hard decision codeword sequence is legal, determining a candidate minimum Euclidean distance of the information bit window through the binary bit sequence and the receiving sequence, determining an optimal hard decision codeword sequence under the information bit window corresponding to the minimum Euclidean distance, and determining optimal decoding according to the optimal hard decision codeword sequence.
2. The method of claim 1, wherein the window of information bits comprises: a reliable window, an overlapping sliding window, a non-overlapping sliding window, a jumping window, an odd-even window, and a random window;
the generating an information bit window corresponding to the information sequence according to a preset generation criterion includes:
the first K bits in the information sequence are used as the reliable window according to descending order of the reliability measurement; wherein K represents the source bit length;
sliding the reliable window backward by d bits in the information sequence to determine the overlapping sliding window; wherein d represents a first sliding digit number, and d is less than K;
sliding the reliable window backward by c bits in the information sequence to determine the non-overlapping sliding window; wherein c represents a second sliding digit, and c is more than or equal to K;
taking the front p bits and the rear q bits from the d-th bit which are sequenced according to the reliability measurement in the information sequence as the jump window; wherein p represents a third number of sliding bits, q represents a fourth number of sliding bits, p + q = K;
selecting the first K bits of odd bits in the information sequence as an odd window, or selecting the first K bits of even bits in the information sequence as an even window to determine the odd-even window;
randomly selecting K bits in the information sequence to determine the random window.
3. The method of claim 1, wherein the permutation function comprises: a first permutation function λ 1
The pre-acquired initial generating matrix G is sequenced according to the permutation function to determine a system generating matrix G 1 The method comprises the following steps:
according to the first permutation function lambda 1 Reordering the columns of the initial generator matrix G to determine a first generator matrix G';
searching corresponding K irrelevant column vectors from the first generating matrix G 'according to the information bit window, and arranging the irrelevant column vectors in a descending order according to the reliability measure to determine a second generating matrix G'; the first K columns of the second generation matrix G 'are the uncorrelated column vectors, and the other column vectors are the same as the corresponding column vectors in the first generation matrix G';
performing an elementary row transformation on the second generator matrix G' to determine the system generator matrix G 1
WhereinThe system generates a matrix G 1 Is shown as
Figure FDA0003867496930000021
Wherein, I K Denotes an identity matrix and P denotes a parity check matrix.
4. The method of claim 3, wherein the permutation function comprises: second permutation function lambda 2
Generating a matrix G according to the system 1 And the pre-acquired codeword information sequence determines a hard decision decoding by inversely permuting the permutation function, including:
determining a transposed sequence according to the system generator matrix and a pre-obtained codeword information sequence
Figure FDA0003867496930000022
Figure FDA0003867496930000023
Performing an inverse permutation of the first permutation function λ according to the codeword information sequence 1 And said second permutation function λ 2 Determining the hard decision decoding; wherein the hard decision decoding is represented as
Figure FDA0003867496930000031
Where a denotes a codeword information sequence.
5. The method of claim 1, wherein obtaining an error pattern e according to an error pattern generation rule, and flipping systematic bits in the codeword information sequence according to the error pattern e to determine K new systematic bits comprises:
obtaining an error pattern e according to an error pattern generation rule;
flipping systematic bits in the codeword information sequence according to the error pattern e to determine K new systematic bits
Figure FDA0003867496930000032
Wherein the new systematic bit
Figure FDA0003867496930000033
Is shown as
Figure FDA0003867496930000034
Wherein a represents the codeword information sequence.
6. The method of claim 1, wherein generating the matrix G according to the system 1 And obtaining a binary bit sequence according to the hard decision codeword sequence determined by the new systematic bit, comprising:
generating a matrix G from the system 1 Reconstructing the hard decision decoding to determine a hard decision decoding sequence, and determining a binary bit sequence according to the hard decision decoding sequence; wherein the binary bit sequence is represented as
Figure FDA0003867496930000035
Wherein,
Figure FDA0003867496930000036
representing the hard decision decoded sequence.
7. The method of claim 1, wherein said determining a candidate minimum euclidean distance of the information bit window from the binary bit sequence and the received sequence in response to the hard decision codeword sequence being legal, determining an optimal binary bit sequence under the information bit window corresponding to the minimum euclidean distance, and determining an optimal decoding from the optimal binary bit sequence comprises:
verifying whether the hard decision decoding sequence meets the legitimacy or not by utilizing cyclic redundancy check and frozen bit check;
for each window of information bits it is possible to,
in response to the hard-decision decoded sequence satisfying legitimacy, determining a euclidean distance between a binary bit sequence and a twice-rearranged received sequence v, and determining whether the euclidean distance is less than an initial euclidean distance; wherein the rearranged received sequence v = λ 2 (z), wherein z = λ 1 (y), z represents a once-rearranged received sequence, λ 1 Representing a first permutation function, λ 2 A second permutation function is represented that is,
in response to the Euclidean distance being smaller than the initial Euclidean distance of the current information bit window, replacing the initial Euclidean distance with the Euclidean distance, and determining a hard decision decoding sequence corresponding to the Euclidean distance as the candidate decoding,
in response to finding delta legal codewords, determining an optimal hard decision codeword sequence of a current information bit window according to the candidate decoding;
and determining the optimal hard decision codeword sequence with the minimum Euclidean distance in all information bit windows as the optimal decoding.
8. A decode determination device, comprising:
a first determining module configured to determine a reliability measure of a received sequence y, and arrange the received sequence y in descending order according to the reliability measure to determine an information sequence z;
a generating module configured to generate an information bit window corresponding to the information sequence z according to a preset generating criterion;
a second determination module configured to rank the pre-obtained initial generator matrix G according to a permutation function to determine a system generator matrix G 1 According toThe system generates a matrix G 1 And determining hard decision decoding by inversely replacing the replacement function with the pre-acquired codeword information sequence;
a third determining module configured to obtain an error pattern e according to an error pattern generation rule, and flip systematic bits in the codeword information sequence according to the error pattern e to determine K new systematic bits;
a fourth determination module configured to generate a matrix G from the system 1 And obtaining a binary bit sequence according to the hard decision codeword sequence determined by the new system bit;
and a fifth determining module, configured to determine a candidate minimum euclidean distance of the information bit window through the binary bit sequence and the received sequence in response to that the hard decision codeword sequence is legal, determine an optimal hard decision codeword sequence under the information bit window corresponding to the minimum euclidean distance, and determine an optimal decoding according to the optimal hard decision codeword sequence.
9. An electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, characterized in that the processor implements the method according to any of claims 1 to 7 when executing the program.
10. A non-transitory computer readable storage medium storing computer instructions for causing a computer to implement the method of any one of claims 1 to 7.
CN202211188892.3A 2022-09-27 2022-09-27 Decoding determination method and device, electronic equipment and storage medium Pending CN115833848A (en)

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