CN115828832B

CN115828832B - Crosstalk prediction method and device for circuit board, electronic equipment and storage medium

Info

Publication number: CN115828832B
Application number: CN202310125821.7A
Authority: CN
Inventors: 范琳琳
Original assignee: Suzhou Inspur Intelligent Technology Co Ltd
Current assignee: Suzhou Inspur Intelligent Technology Co Ltd
Priority date: 2023-02-16
Filing date: 2023-02-16
Publication date: 2023-06-09
Anticipated expiration: 2043-02-16
Also published as: CN115828832A

Abstract

The embodiment of the invention provides a crosstalk prediction method, a device, electronic equipment and a storage medium of a circuit board, which relate to the technical field of model data processing.

Description

Crosstalk prediction method and device for circuit board, electronic equipment and storage medium

Technical Field

The present invention relates to the field of model data processing technologies, and in particular, to a crosstalk prediction method of a circuit board, a crosstalk prediction device of a circuit board, an electronic device, and a computer readable storage medium.

Background

In high speed PCB (Printed Circuit Board ) designs and integrated circuit designs, crosstalk is a troublesome problem, which refers to the undesirable effect of electromagnetic coupling on adjacent transmission lines when a signal is transmitted on a transmission channel, and when the interfered signal appears to be injected with a certain coupling voltage and coupling current, excessive crosstalk may cause false triggering of the circuit, resulting in the system not working properly.

However, as electronic devices are continuously updated and developed, the size of the PCB is smaller and smaller, the routing density of each layer is increased, and when the signal transmission speed is continuously increased, the crosstalk problem of the PCB is more serious, which affects the performance of the electronic devices, so that in the prior art, on one hand, it is proposed to use a PCB full-wave simulation tool to perform crosstalk prediction on the PCB when designing or using the PCB, but before using the PCB full-wave simulation tool, a relevant technician needs to build a corresponding model for different problems, so that the simulation tool does not have versatility, and meanwhile, in the process of performing crosstalk prediction on a larger PCB main board, a lot of time is required, on the other hand, it is proposed to use a machine learning algorithm to perform crosstalk prediction on the whole PCB, such as using a seq2seq model (Sequence to sequence, sequence to sequence model) and an LSTM model (Long short-term memory network) to perform crosstalk prediction on the PCB, but due to the fact that the Long-term memory of the seq2seq model and the LSTM model is insufficient, the overall accuracy of crosstalk prediction is lower.

Disclosure of Invention

The embodiment of the invention provides a crosstalk prediction method and device for a circuit board, electronic equipment and a computer readable storage medium, which are used for solving or partially solving the problems of long time consumption, low working efficiency and low accuracy in the prior art for performing crosstalk prediction on a PCB.

The embodiment of the invention discloses a crosstalk prediction method of a circuit board, which comprises the following steps:

obtaining predicted circuit board data and predicted network information corresponding to a circuit board to be predicted, wherein the predicted circuit board data at least comprises predicted hardware parameter information and a predicted network data set corresponding to the predicted hardware parameter information;

constructing a prediction network matrix aiming at the circuit board to be predicted by adopting the prediction network data set, the prediction hardware parameter information and the prediction network information;

normalizing the prediction network matrix according to the prediction hardware parameter information to obtain model input data;

and inputting the model input data into a target crosstalk prediction model corresponding to the circuit board to be predicted, and outputting a predicted crosstalk value of the circuit board to be predicted.

Optionally, the predicting network data set includes a predicting connection line data set, the predicting hardware parameter information includes a start point coordinate, an end point coordinate, width data, line space data corresponding to a network connection line of the circuit board to be predicted, and hierarchy information to which the network connection line belongs, and the obtaining the predicting circuit board data corresponding to the circuit board to be predicted includes:

And respectively combining the starting point coordinates, the end point coordinates, the width data, the line interval data and the level information to obtain the predicted connecting line data set.

Optionally, the circuit board to be predicted further includes a passive device, the prediction network data set includes a prediction pin data set, the prediction pin data set includes a first prediction pin data set corresponding to the passive device, and the obtaining the prediction circuit board data corresponding to the circuit board to be predicted includes:

acquiring resistance data, capacitance data and voltage data of the passive device;

and combining the resistance data, the capacitance data and the voltage data to obtain the first prediction pin data set.

Optionally, the combining the resistance data, the capacitance data, and the voltage data to obtain the first predicted pin data set includes:

respectively carrying out weighted average processing on the resistance data, the capacitance data and the voltage data to obtain average resistance data, average capacitance data and average voltage data for the circuit board;

and combining the average resistance data, the average capacitance data and the average voltage data to obtain the first prediction pin data set.

Optionally, the weighted average processing is performed on the resistance data, the capacitance data, and the voltage data to obtain average resistance data, average capacitance data, and average voltage data for the circuit board, including:

acquiring the number of the passive devices in the circuit board to be predicted;

accumulating the resistance data of each passive device in the circuit board to be predicted, dividing the resistance data by the number of the devices, and obtaining the average resistance data;

accumulating the capacitance data of each passive device in the circuit board to be predicted, dividing the capacitance data by the number of the devices, and obtaining the average capacitance data;

and accumulating the voltage data of each passive device in the circuit board to be predicted, and dividing the voltage data by the number of the devices to obtain the average voltage data.

Optionally, the circuit board to be predicted further includes an active device, the active device includes a first active device corresponding to the starting point coordinate, the predicted pin data set includes a second predicted pin data set corresponding to the first active device, and the obtaining the predicted circuit board data corresponding to the circuit board to be predicted includes:

Acquiring the input capacitance and the rising time of the first active device;

and combining the starting point coordinates, the input capacitance and the rising time to obtain the second predicted pin data set.

Optionally, the active device includes a second active device corresponding to the end point coordinate, the prediction pin data set includes a third prediction pin data set corresponding to the second active device, and the obtaining the prediction circuit board data corresponding to the circuit board to be predicted includes:

acquiring the output impedance and the falling time of the second active device;

and combining the end point coordinates, the output impedance and the falling time to obtain the third predicted pin data set.

Optionally, the predicting hardware parameter information further includes board layer data of the circuit board to be predicted, where the board layer data includes at least a size of the circuit board, a number of levels, and a thickness of the circuit board, and the obtaining predicted circuit board data corresponding to the circuit board to be predicted includes:

and respectively acquiring the size, the number of layers and the thickness of the circuit board corresponding to the circuit board to be predicted.

Optionally, the predicting hardware parameter information further includes pin number of the circuit board to be predicted, and the obtaining the predicted circuit board data corresponding to the circuit board to be predicted includes:

And obtaining the number of pins corresponding to each network in the circuit board, and taking the number of pins with the largest number of pins as the target number of pins.

Optionally, the predicting network information includes the number of networks of the network connection lines, and the constructing a predicting network matrix for the circuit board to be predicted using the predicting network data set, the predicting hardware parameter information, and the predicting network information includes:

combining the predicted network data set and the lamellar data to obtain a data structure corresponding to each network connecting line;

and correlating the target pin number, the network number and the data structure to generate a network matrix for the circuit board.

Optionally, the associating the target pin number, the network number and the data structure generates a network matrix for the circuit board, including:

and taking the target pin number as the row number of the network matrix, taking the network number as the column number of the network matrix, and taking the data structure as the element of the network matrix to generate the network matrix aiming at the circuit board.

Optionally, the size of the circuit board includes a width value and a length value of the circuit board, and the normalizing the prediction network matrix according to the prediction hardware parameter information to obtain model input data includes:

and dividing the transverse coordinate of the starting point coordinate by the width value, and dividing the longitudinal coordinate of the starting point coordinate by the length value to obtain the model input data.

Optionally, the normalizing the prediction network matrix according to the prediction hardware parameter information to obtain model input data includes:

and dividing the transverse coordinate of the end point coordinate by the width value, and dividing the longitudinal coordinate of the end point coordinate by the length value to obtain the model input data.

Optionally, the target crosstalk prediction model is generated by:

acquiring historical circuit board data, historical network information, a crosstalk reference value and an initial crosstalk prediction model corresponding to a plurality of historical circuit boards, wherein the historical circuit board data at least comprises a historical network data set and historical hardware parameter information, and the crosstalk reference value is used for judging whether the initial crosstalk prediction model is successfully trained;

Constructing a historical network matrix aiming at the historical circuit board by adopting the historical network data set, the historical hardware parameter information and the historical network information;

normalizing the historical network matrix according to the historical hardware parameter information to obtain model training data and model test data;

and training an initial crosstalk prediction model corresponding to the historical circuit board by adopting the crosstalk reference value, the model training data and the model test data to generate a target crosstalk prediction model.

Optionally, the initial crosstalk prediction model is constructed by the following method, including:

an encoder and a decoder for acquiring an initial crosstalk prediction model and the initial crosstalk prediction model;

and removing the embedded layer of the encoder, and connecting a full connection layer in the decoder, wherein the full connection layer is a function for mapping the matrix into a preset value.

Optionally, training the initial crosstalk prediction model corresponding to the historical circuit board by using the crosstalk reference value, the model training data and the model test data to generate a target crosstalk prediction model, including:

Inputting the model training data and the model test data into an initial crosstalk prediction model corresponding to the historical circuit board, and outputting an initial crosstalk value;

and generating the target crosstalk prediction model according to the comparison result of the initial crosstalk value and the crosstalk reference value.

Optionally, the generating the target crosstalk prediction model according to the comparison result of the initial crosstalk value and the crosstalk reference value includes:

and if the comparison result of the initial crosstalk value and the crosstalk reference value is the same as the numerical value, the initial crosstalk prediction model is successfully trained, and the target crosstalk prediction model is generated.

and if the comparison result of the initial crosstalk value and the crosstalk reference value is inconsistent, the training of the initial crosstalk prediction model is failed, and iteration processing and parameter updating processing are carried out on the initial crosstalk prediction model until the comparison result of the initial crosstalk value and the crosstalk reference value is consistent, and the training is successful, so that the target crosstalk prediction model is generated.

The invention also discloses a crosstalk prediction device of the circuit board, which comprises:

the system comprises a prediction circuit board data acquisition module, a prediction network data acquisition module and a prediction network data acquisition module, wherein the prediction circuit board data acquisition module is used for acquiring prediction circuit board data and prediction network information corresponding to a circuit board to be predicted, and the prediction circuit board data at least comprises prediction hardware parameter information and a prediction network data set corresponding to the prediction hardware parameter information;

the prediction network matrix construction module is used for constructing a prediction network matrix aiming at the circuit board to be predicted by adopting the prediction network data set, the prediction hardware parameter information and the prediction network information;

the model input data acquisition module is used for carrying out normalization processing on the prediction network matrix according to the prediction hardware parameter information to obtain model input data;

and the predicted crosstalk value output module is used for inputting the model input data into a target crosstalk prediction model corresponding to the circuit board to be predicted and outputting the predicted crosstalk value of the circuit board to be predicted.

Optionally, the predicted network data set includes a predicted connection line data set, the predicted hardware parameter information includes a start point coordinate, an end point coordinate, width data, line space data corresponding to a network connection line of the circuit board to be predicted, and hierarchy information to which the network connection line belongs, and the predicted circuit board data acquisition module includes:

And the predicted connecting line data set acquisition sub-module is used for respectively combining the starting point coordinates, the end point coordinates, the width data, the line spacing data and the level information to obtain the predicted connecting line data set.

Optionally, the circuit board to be predicted further includes a passive device, the prediction network data set includes a prediction pin data set, the prediction pin data set includes a first prediction pin data set corresponding to the passive device, and the prediction circuit board data acquisition module includes:

the passive device parameter acquisition submodule is used for acquiring resistance data, capacitance data and voltage data of the passive device;

and the first prediction pin data set obtaining submodule is used for combining the resistance data, the capacitance data and the voltage data to obtain the first prediction pin data set.

Optionally, the first prediction pin data set acquisition submodule includes:

the average parameter obtaining unit is used for respectively carrying out weighted average processing on the resistance data, the capacitance data and the voltage data to obtain average resistance data, average capacitance data and average voltage data for the circuit board;

Optionally, the average parameter acquiring unit is specifically configured to:

Optionally, the circuit board to be predicted further includes an active device, the active device includes a first active device corresponding to the starting point coordinate, the predicted pin data set includes a second predicted pin data set corresponding to the first active device, and the predicted circuit board data acquisition module is specifically configured to:

acquiring the input capacitance and the rising time of the first active device;

Optionally, the active device includes a second active device corresponding to the end point coordinate, the predicted pin data set includes a third predicted pin data set corresponding to the second active device, and the predicted circuit board data acquisition module is specifically configured to:

Optionally, the predicting hardware parameter information further includes board layer data of the circuit board to be predicted, where the board layer data includes at least a size of the circuit board, a number of levels, and a thickness of the circuit board, and the predicting circuit board data obtaining module is specifically configured to:

Optionally, the predicting hardware parameter information further includes pin number of the circuit board to be predicted, and the predicting circuit board data obtaining module is specifically configured to:

Optionally, the predicted network information includes a network number of the network connection lines, and the predicted network matrix construction module includes:

the data structure generation sub-module is used for combining the prediction network data set and the plate layer data to obtain data structures corresponding to the network connecting wires;

and the network matrix generation sub-module is used for associating the target pin number, the network number and the data structure to generate a network matrix for the circuit board.

Optionally, the network matrix generation submodule is specifically configured to:

Optionally, the circuit board size includes a width value and a length value of the circuit board, and the root model input data acquisition module includes:

and the model input data acquisition sub-module is used for dividing the transverse coordinate of the starting point coordinate by the width value, and dividing the longitudinal coordinate of the starting point coordinate by the length value to acquire the model input data.

Optionally, the model input data acquisition submodule is specifically configured to:

Optionally, the target crosstalk prediction model is generated by:

the system comprises a historical circuit board data acquisition module, a crosstalk prediction module and a crosstalk prediction module, wherein the historical circuit board data acquisition module is used for acquiring historical circuit board data, historical network information, crosstalk reference values and an initial crosstalk prediction model corresponding to a plurality of historical circuit boards, the historical circuit board data at least comprises a historical network data set and historical hardware parameter information, and the crosstalk reference values are used for judging whether the initial crosstalk prediction model is successfully trained;

the historical network matrix construction module is used for constructing a historical network matrix aiming at the historical circuit board by adopting the historical network data set, the historical hardware parameter information and the historical network information;

the model training data acquisition module is used for carrying out normalization processing on the historical network matrix according to the historical hardware parameter information to obtain model training data and model test data;

and the target crosstalk prediction model generation module is used for training an initial crosstalk prediction model corresponding to the historical circuit board by adopting the crosstalk reference value, the model training data and the model test data to generate a target crosstalk prediction model.

Optionally, the initial crosstalk prediction model is constructed by the following modules, including:

the device comprises an initial crosstalk prediction module acquisition module, a coder and a decoder, wherein the initial crosstalk prediction module is used for acquiring an initial crosstalk prediction model and the initial crosstalk prediction model;

and the model processing module is used for removing the embedded layer of the encoder and connecting a full-connection layer in the decoder, wherein the full-connection layer is a function for mapping the matrix into a preset value.

Optionally, the target crosstalk prediction model generating module includes:

the initial crosstalk value output sub-module is used for inputting the model training data and the model test data to an initial crosstalk prediction model corresponding to the historical circuit board and outputting an initial crosstalk value;

and the target crosstalk prediction model generation submodule is used for generating the target crosstalk prediction model according to the comparison result of the initial crosstalk value and the crosstalk reference value.

Optionally, the target crosstalk prediction model generation submodule is specifically configured to:

The embodiment of the invention also discloses electronic equipment, which comprises a processor, a communication interface, a memory and a communication bus, wherein the processor, the communication interface and the memory are communicated with each other through the communication bus;

the memory is used for storing a computer program;

the processor is configured to implement the method according to the embodiment of the present invention when executing the program stored in the memory.

Embodiments of the present invention also disclose a computer-readable storage medium having instructions stored thereon, which when executed by one or more processors, cause the processors to perform the method according to the embodiments of the present invention.

The embodiment of the invention has the following advantages:

In the embodiment of the invention, the predicted circuit board data and the predicted network information corresponding to the circuit board to be predicted are obtained, the predicted circuit board data at least comprises the predicted hardware parameter information and the predicted network data set corresponding to the predicted hardware parameter information, a predicted network matrix aiming at the circuit board to be predicted is constructed by adopting the predicted network data set, the predicted hardware parameter information and the predicted network information, the predicted network matrix is normalized according to the predicted hardware parameter information to obtain model input data, the model input data is input into a target crosstalk predicted model corresponding to the circuit board to be predicted, the predicted crosstalk value of the circuit board to be predicted is output, and accordingly the predicted hardware parameter information of the circuit board to be predicted and the predicted network data set corresponding to the predicted hardware parameter information are obtained, so that deep prediction is carried out according to the self information of the circuit board to be predicted, the reliability of the predicted crosstalk value can be analyzed aiming at the whole network, meanwhile, the predicted network matrix aiming at the circuit board to be predicted is constructed by adopting the predicted network data set, the predicted hardware parameter information and the predicted network information, the predicted network matrix is normalized according to the predicted to obtain the model input data, a large amount of the predicted circuit board to be predicted is input into the same matrix, the crosstalk value is estimated correspondingly, and the crosstalk value of the circuit board to be predicted is estimated more quickly, and the model to be estimated is input into the model.

Drawings

Fig. 1 is a flowchart of steps of a crosstalk prediction method for a circuit board according to an embodiment of the present invention;

FIG. 2 is a flowchart of steps for constructing a predicted network data set for a circuit board to be predicted, provided in an embodiment of the present invention;

FIG. 3 is a flowchart of steps for generating a target crosstalk prediction model provided in an embodiment of the present invention;

FIG. 4 is a flowchart of steps for constructing an initial crosstalk prediction model provided in an embodiment of the present invention;

fig. 5 is a block diagram of a crosstalk predicting apparatus for a circuit board according to an embodiment of the present invention;

fig. 6 is a block diagram of an electronic device according to an embodiment of the present invention.

Detailed Description

In order that the above-recited objects, features and advantages of the present invention will become more readily apparent, a more particular description of the invention will be rendered by reference to the appended drawings and appended detailed description.

As an example, PCBs may be classified into capacitive crosstalk, inductive crosstalk, near-end crosstalk, far-end crosstalk, and the like according to interference lines and routing routes and positions on the interference lines of the PCBs, and factors affecting the PCB crosstalk include at least line pitches of network connection lines, impedance and dielectric constants of devices in a circuit board, and the like, so that in order to be able to know whether a new PCB is crosstalk in advance to apply the new PCB to industry, a PCB full-wave simulation tool or a seq2seq model and an LSTM model is often used to predict the PCB, but the prediction of the PCB full-wave simulation tool takes a long time, such as several hours for a PCB with a smaller size, and several times of time for a PCB with a larger size, resulting in low prediction work efficiency, and the prediction effects of the seq2seq model and the LSTM model are poor, which has a certain difference from the requirements of industrial application.

In view of this, one of the core inventions of the embodiments of the present invention is to obtain the predicted circuit board data and the predicted network information corresponding to the circuit board to be predicted, where the predicted circuit board data at least includes the predicted hardware parameter information and the predicted network data set corresponding to the predicted hardware parameter information, the predicted network matrix for the circuit board to be predicted is constructed by adopting the predicted network data set, the predicted hardware parameter information and the predicted network information, the predicted network matrix for the circuit board to be predicted is normalized according to the predicted hardware parameter information, the model input data is obtained, the model input data is input to the target crosstalk prediction model corresponding to the circuit board to be predicted, the predicted crosstalk value of the circuit board to be predicted is output, thereby obtaining the predicted hardware parameter information of the circuit board to be predicted and the predicted network data set corresponding to the predicted hardware parameter information, so as to implement depth prediction according to the self information of the circuit board to be predicted, and the predicted network information corresponding to the circuit board to be predicted can analyze for the whole network, and the reliability of the predicted crosstalk value is increased.

Referring to fig. 1, a step flowchart of a crosstalk prediction method for a circuit board provided in an embodiment of the present invention may specifically include the following steps:

step 101, obtaining predicted circuit board data and predicted network information corresponding to a circuit board to be predicted, wherein the predicted circuit board data at least comprises predicted hardware parameter information and a predicted network data set corresponding to the predicted hardware parameter information;

in the embodiment of the invention, the predicted circuit board data and the predicted network information corresponding to the circuit board to be predicted can be obtained, wherein the predicted circuit board data at least comprises predicted hardware parameter information and a predicted network data set corresponding to the predicted hardware parameter information.

Optionally, the circuit board to be predicted may be a new PCB, where there are a plurality of network connection lines in the circuit board to be predicted, the network connection lines may be PCB connection lines, which are also called terminal connection lines, and are connection lines formed by needle bases, glue shells, terminals, wires, and processing, the predicted circuit board data may be various information related to the new PCB, which may include predicted hardware parameter information and predicted network data sets, where the predicted hardware parameter information may be a hardware parameter of the PCB itself, such as starting coordinates, end coordinates, width data, line-to-line data, and hierarchical information to which the network connection lines of the circuit board to be predicted belong, and may include board layer data of the circuit board to be predicted, such as board layer data at least includes a circuit board size, a hierarchical number, and a circuit board thickness, and the predicted network data sets may be a set composed of data of the PCB, and may include predicted connection line data sets and predicted pin data sets, the predicted network information may be a network number of respective networks associated with the network connection lines, and the network represents a connection relationship of the PCB elements. The netlist contains element names, labels, connection relationships, and so forth.

In one embodiment of the present invention, the predicted link data set may be a set of combined start point coordinates, end point coordinates, width data, line spacing data, and level information of the network link, such as segs= [ opening_start, opening_end, layer, width, opening, level name ], where the start point coordinates opening_start may be coordinates of start points of the network link, such as opening_start may be (23.456, 59.032), the end point coordinates opening_end may be coordinates of end points of the network link, such as opening_end is (23.456, 87.346), the width data width may be line width value of the network link, such as width may be 0.127, the line spacing data opening may be line spacing value of the network link, such as opening may be 0.3, the level information layer may be a working layer of the PCB, such as opening may be a wiring layer, a signal layer, an internal power/ground layer, etc. (3783), and the predicted link may be set of layers of (23.456, 87.346), the line spacing data width may be 0.127, the line spacing data may be the line spacing may be 0.3, the line spacing may be the line spacing of the network link, the working layer may be the PCB.

In another embodiment of the present invention, the circuit board to be predicted further includes a passive device and an active device, the passive device mainly includes a resistor, a capacitor, an inductor, a converter, a graduator, a matching network, a resonator, a filter, a mixer, a switch, etc., which can display an electronic element of its characteristics without an external power source, and the passive device mainly includes a resistor type, an inductor type and a capacitor type device, and their common characteristics are that they can work in the presence of signals without the power source in the circuit. Active devices require a power source to perform their specific functions. Mainly comprises an electron tube, a transistor, an integrated circuit and the like. Generally for signal amplification, conversion, etc. The predicted pin data set may be a set of pin related information of the passive device or the active device, which may include a first predicted pin data set corresponding to the passive device and a second predicted pin data set corresponding to the active device.

In a specific implementation, the first predicted pin data set Passive may be a set of pin related information of the Passive device, such as passive= [ r_value, f_value, v_value ], which may be obtained by obtaining resistance data, capacitance data, and voltage data of the Passive device and combining the resistance data, the capacitance data, and the voltage data.

Specifically, average resistance data r_value, average capacitance data f_value and average voltage data v_value of a circuit board can be obtained by respectively carrying out weighted average processing on resistance data, capacitance data and voltage data, for example, the number of passive devices in the circuit board to be predicted is obtained, the resistance data of each passive device in the circuit board to be predicted is accumulated and divided by the number of devices to obtain average resistance data, the capacitance data of each passive device in the circuit board to be predicted is accumulated and divided by the number of devices to obtain average capacitance data, the voltage data of each passive device in the circuit board to be predicted is accumulated and divided by the number of devices to obtain average voltage data, then the average resistance data, the average capacitance data and the average voltage data are combined to obtain a first predicted pin data set, wherein the number of devices can be the number of all passive devices on each network, so that the voltage, inductance and capacitance of each passive device on each sub-network are described by adopting the average value of the voltages, inductances and capacitances of the passive devices, the voltages of the passive devices can be predicted more accurately predicted, and the crosstalk effect of certain passive devices can be reduced or the whole passive devices can be more accurately estimated, and the crosstalk effect of the whole passive devices can be estimated more accurately.

The Active device further comprises a first Active device corresponding to the start point coordinate and a second Active device corresponding to the end point coordinate, the predicted pin data set comprises a second predicted pin data set active_start corresponding to the first Active device, for example, active_start= [ Coord_start, value1, t1], an input capacitance and a rising time of the first Active device can be obtained first, and then the start point coordinate Coord_start, the input capacitance value1 and the rising time t1 are combined to obtain a second predicted pin data set, wherein the input capacitance can be an input capacitance of a pin, and the rising time can be a rising time of a signal.

The predicted pin data set may further include a third predicted pin data set active_end corresponding to the second Active device, where active_end= [ integrated_end, value2, t2] may be obtained by obtaining an output impedance and a falling time of the second Active device, and combining an endpoint coordinate integrated_end, the output impedance value2, and the falling time t2, where the output impedance may be an output impedance of a pin, and the falling time may be a falling time of a signal.

In another embodiment of the present invention, the predicted hardware parameter information further includes Board layer data Board of the circuit Board to be predicted, for example, board= [ size, layer, thickness ], where the Board layer data Board includes at least a size of the circuit Board, a layer number of layers, and a thickness of the circuit Board, and the predicted circuit Board data corresponding to the circuit Board to be predicted is obtained, and the size of the circuit Board, the number of layers, and the thickness of the circuit Board corresponding to the circuit Board to be predicted may be obtained respectively.

For example, the circuit board size includes a width value and a length value of the PCB, the circuit board size may be expressed as (w, h), w may be a width value of the PCB, h may be a length value of the PCB, the number of layers may be the number of layers of the PCB, and the circuit board thickness may be thickness information of the PCB.

In another embodiment of the present invention, the predicted hardware parameter information further includes the number of pins of the circuit board to be predicted, and since the number of pins included in each network is not necessarily equal, the number of pins corresponding to each network in the circuit board may be obtained first, and in order to keep the dimensions of the data consistent, the maximum number of pins m of all the networks is calculated, m is taken as the target number of pins and the final number of pins, so as to construct data x= [ X1, X2, …, xm ] of each network according to the connection segment data in the network, where if the number of pins of the network is less than m, the corresponding X needs to be replaced with 0 from the next to m of the actual number of pins, i.e. a 0 supplementing operation is performed on the data.

Step 102, constructing a prediction network matrix aiming at the circuit board to be predicted by adopting the prediction network data set, the prediction hardware parameter information and the prediction network information;

In the embodiment of the invention, the prediction network matrix aiming at the circuit board to be predicted can be constructed by adopting the prediction network data set, the prediction hardware parameter information and the prediction network information.

Alternatively, the prediction network matrix may be a matrix constructed from the prediction network data set, the prediction hardware parameter information, and the prediction network information, for subsequent input into the corresponding model as model training data or as model input data.

In a specific implementation, the predicted network data set and the board layer data may be combined to obtain a data structure corresponding to each network connection line, and then the target pin number, the network number, and the data structure are correlated to generate a network matrix for the circuit board.

Specifically, the number of target pins is taken as the number of rows of the network matrix, the number of networks is taken as the number of columns of the network matrix, and the data structure is taken as the element of the network matrix, so that the network matrix aiming at the circuit board is generated.

As an example, the above constructed data are integrated to obtain a data structure of one connection segment of a network: x= [ Board, active_start, active_end, passive, segs ], the number of pins of each network is unequal, the maximum number m of pins of all networks is obtained as a final pin number value, network data x= [ X1, X2, …, xm ] are constructed, if the number of pins of the network is smaller than m, then 0 is correspondingly complemented, a network matrix of the PCB is constructed, the number n of the networks of the PCB is obtained, and the network matrix of the PCB is: p= [ X1, X2, …, xn ].

Step 103, normalizing the prediction network matrix according to the prediction hardware parameter information to obtain model input data;

in the embodiment of the invention, the prediction network matrix is normalized according to the prediction hardware parameter information to obtain the model input data.

Alternatively, the model input data may be data for input into a target crosstalk prediction model to predict a crosstalk value of a circuit board to be predicted.

In a specific implementation, the transverse coordinates of the starting point coordinates may be divided by the width value, and the longitudinal coordinates of the starting point coordinates may be divided by the length value, to obtain the model input data.

Specifically, the transverse coordinates of the end point coordinates may be divided by the width value, and the longitudinal coordinates of the end point coordinates may be divided by the length value to complete the normalization process, so as to obtain the model input data, where the value of the model input data is between [0,1 ].

As an example, referring to fig. 2, a flowchart of a step of constructing a predicted network data set of a circuit board to be predicted is shown, after a predicted connection line data set, a first predicted pin data set, a second predicted pin data set, a third predicted pin data set, and predicted hardware parameter information are respectively acquired, a predicted network matrix for the circuit board to be predicted is generated, and normalization processing is performed by using coordinate points.

And 104, inputting the model input data into a target crosstalk prediction model corresponding to the circuit board to be predicted, and outputting a predicted crosstalk value of the circuit board to be predicted.

In the embodiment of the invention, the model input data can be input into the target crosstalk prediction model corresponding to the circuit board to be predicted, and the predicted crosstalk value of the circuit board to be predicted is output.

Alternatively, the target crosstalk prediction model may be a model trained using model training data, and the predicted crosstalk value may be a value output through the target crosstalk prediction model, such as 0 and 1, where 0 may be regarded as a value without crosstalk and 1 may be regarded as a value with crosstalk according to requirements.

In a specific implementation, referring to fig. 3, a flowchart illustrating a step of generating a target crosstalk prediction model is shown, firstly, a data set needs to be constructed, then an initial crosstalk prediction model is constructed, then, model training data and model test data are adopted to train the initial crosstalk prediction model, a target crosstalk prediction model is obtained, the trained target crosstalk prediction model can be used for prediction, and a specific training process is generated through the following steps:

s1, acquiring historical circuit board data, historical network information, crosstalk reference values and an initial crosstalk prediction model corresponding to a plurality of historical circuit boards, wherein the historical circuit board data at least comprise a historical network data set and historical hardware parameter information, and the crosstalk reference values are used for judging whether the initial crosstalk prediction model is successfully trained;

S2, constructing a historical network matrix aiming at the historical circuit board by adopting the historical network data set, the historical hardware parameter information and the historical network information;

and S3, training an initial crosstalk prediction model corresponding to the historical circuit board by adopting the crosstalk reference value, the model training data and the model test data to generate a target crosstalk prediction model.

Alternatively, the historical circuit board may be an old circuit board or a used PCB board, the historical circuit board may include historical network connection lines, the historical network connection lines may be PCB connection lines, the historical circuit board data may be various information related to the old PCB board, and may include historical hardware parameter information and historical network data sets, wherein the historical hardware parameter information may be hardware parameters of the PCB itself, such as starting point coordinates, end point coordinates, width data, line interval data and hierarchy information to which the historical network connection lines belong in the historical network connection lines, and may further include board layer data of the historical circuit board, the historical network data sets may be sets composed of data of the PCB, the historical network data sets may include historical connection line data sets and historical pin data sets, the historical network information may be network numbers of respective networks related to the historical network connection lines, the reference value may be the number of networks on the existing multiple boards predicted through existing software capability signaling software, and the crosstalk is obtained as a reference value of 0 or 1, and the crosstalk is defined as 0 or 1 does not mean crosstalk.

Referring to fig. 4, a flowchart of a step of constructing an initial crosstalk prediction model is shown, specifically by the following sub-steps:

s11, acquiring an initial crosstalk prediction model, and an encoder and a decoder of the initial crosstalk prediction model;

s12, removing the embedded layer of the encoder, and connecting a full connection layer in the decoder, wherein the full connection layer is a function for mapping the matrix into a preset value.

The initial crosstalk prediction model can be a transducer model, can be used for recognizing voice or text, belongs to an NLP (Natural Language Processing ) classical model, mainly performs coding input and calculation output based on attention, and does not depend on a cyclic neural network or a convolutional neural network with aligned sequences, and can be trained in parallel and has global information, so that prediction time is greatly shortened, and detection efficiency is improved; meanwhile, the method is also a universal method, and as long as the crosstalk detection model is trained, when a new PCB needs to be subjected to crosstalk detection, the crosstalk detection result can be obtained by acquiring corresponding data and inputting the data into the model.

The Embedding layer may be an Embedding layer (word vector layer or word Embedding layer), which is used for implementing dimension reduction of matrix data through some matrix multiplication, and can directly consider the network matrix of each network as a vector matrix after Embedding.

The full connection layer refers to that each node is connected with all nodes of the previous layer, so as to integrate the features extracted from the front edge, and the parameters of the full connection layer are the most because of the full connection property, so that the data such as a matrix are converted into fixed data such as 0 or 1.

Specifically, model training data and model test data are input into an initial crosstalk prediction model corresponding to a historical circuit board, an initial crosstalk value is output, and then a target crosstalk prediction model is generated according to a comparison result of the initial crosstalk value and a crosstalk reference value.

In an alternative embodiment, if the comparison result of the initial crosstalk value and the crosstalk reference value is the same as the value, the training of the initial crosstalk prediction model is successfully represented, and a target crosstalk prediction model is generated, if the crosstalk reference value is 1 and the initial crosstalk value is also 1, the training is successfully represented.

In another alternative embodiment, if the comparison result of the initial crosstalk value and the crosstalk reference value is inconsistent, if the crosstalk reference value is 1 and the initial crosstalk value is 0, the training fails, the training failure of the initial crosstalk prediction model is represented, the iterative processing and the parameter updating processing are performed on the initial crosstalk prediction model, if the data in the historical network data set are adjusted, the initial crosstalk value can be output to be 1 until the comparison result of the initial crosstalk value and the crosstalk reference value is consistent, the training is successful, the target crosstalk prediction model is generated, and the trained target crosstalk prediction model is not only suitable for the crosstalk prediction of a large-scale PCB board, but also greatly improves the prediction accuracy.

It should be noted that the embodiments of the present invention include, but are not limited to, the foregoing examples, and it is understood that those skilled in the art may set the embodiments according to the actual situation under the guidance of the concept of the embodiments of the present invention, and the present invention is not limited thereto.

In the embodiment of the invention, the predicted circuit board data and the predicted network information corresponding to the circuit board to be predicted and the predicted network information are obtained, the predicted circuit board data at least comprises the predicted hardware parameter information and the predicted network data set corresponding to the predicted hardware parameter information, a predicted network matrix aiming at the circuit board to be predicted is constructed by adopting the predicted network data set, the predicted hardware parameter information and the predicted network information, the predicted network matrix is normalized according to the predicted hardware parameter information, the model input data is obtained, the model input data is input into a target crosstalk prediction model corresponding to the circuit board to be predicted, the predicted crosstalk value of the circuit board to be predicted is output, and accordingly the predicted hardware parameter information of the circuit board to be predicted and the predicted network data set corresponding to the predicted hardware parameter information are obtained, so that the depth prediction according to the self information of the circuit board to be predicted is realized, the reliability of the predicted crosstalk value can be analyzed aiming at the whole network, meanwhile, the predicted network matrix aiming at the circuit board to be predicted is constructed by adopting the predicted network data set, the predicted hardware parameter information and the predicted network information, a great amount of the predicted circuit board data is input into the same matrix, and the crosstalk value is estimated more rapidly when the crosstalk value is input into the same matrix, and the model is more estimated, and the crosstalk value is more rapidly estimated, and the crosstalk value is input into the prediction model.

It should be noted that, for simplicity of description, the method embodiments are shown as a series of acts, but it should be understood by those skilled in the art that the embodiments are not limited by the order of acts, as some steps may occur in other orders or concurrently in accordance with the embodiments. Further, those skilled in the art will appreciate that the embodiments described in the specification are presently preferred embodiments, and that the acts are not necessarily required by the embodiments of the invention.

Referring to fig. 5, a block diagram of a crosstalk predicting device for a circuit board provided in an embodiment of the present invention may specifically include the following modules:

the predicted circuit board data acquisition module 501 is configured to acquire predicted circuit board data and predicted network information corresponding to a circuit board to be predicted, where the predicted circuit board data at least includes predicted hardware parameter information and a predicted network data set corresponding to the predicted hardware parameter information;

a prediction network matrix construction module 502, configured to construct a prediction network matrix for the circuit board to be predicted using the prediction network data set, the prediction hardware parameter information, and the prediction network information;

The model input data obtaining module 503 is configured to normalize the prediction network matrix according to the prediction hardware parameter information, so as to obtain model input data;

and the predicted crosstalk value output module 504 is configured to input the model input data to a target crosstalk prediction model corresponding to the circuit board to be predicted, and output a predicted crosstalk value of the circuit board to be predicted.

In an alternative embodiment, the predicted network data set includes a predicted connection line data set, the predicted hardware parameter information includes start coordinates, end coordinates, width data, line space data corresponding to the network connection line of the circuit board to be predicted, and hierarchy information to which the network connection line belongs, and the predicted circuit board data acquisition module 501 includes:

In an alternative embodiment, the circuit board to be predicted further includes a passive device, the prediction network data set includes a prediction pin data set, the prediction pin data set includes a first prediction pin data set corresponding to the passive device, and the prediction circuit board data obtaining module 501 includes:

In an alternative embodiment, the first prediction pin data set acquisition submodule includes:

In an alternative embodiment, the average parameter obtaining unit is specifically configured to:

In an alternative embodiment, the circuit board to be predicted further includes an active device, the active device includes a first active device corresponding to the starting point coordinate, the predicted pin data set includes a second predicted pin data set corresponding to the first active device, and the predicted circuit board data obtaining module 501 is specifically configured to:

acquiring the input capacitance and the rising time of the first active device;

In an alternative embodiment, the active device includes a second active device corresponding to the endpoint coordinate, the predicted pin data set includes a third predicted pin data set corresponding to the second active device, and the predicted circuit board data obtaining module 501 is specifically configured to:

In an alternative embodiment, the predicted hardware parameter information further includes board layer data of the circuit board to be predicted, where the board layer data includes at least a circuit board size, a number of levels, and a circuit board thickness, and the predicted circuit board data obtaining module 501 is specifically configured to:

In an alternative embodiment, the predicted hardware parameter information further includes the pin number of the circuit board to be predicted, and the predicted circuit board data obtaining module 501 is specifically configured to:

In an alternative embodiment, the predicted network information includes a number of networks of the network connection lines, and the predicted network matrix construction module 502 includes:

In an alternative embodiment, the network matrix generation submodule is specifically configured to:

In an alternative embodiment, the circuit board size includes a width value and a length value of the circuit board, and the root model input data obtaining module 503 includes:

In an alternative embodiment, the model input data acquisition submodule is specifically configured to:

In an alternative embodiment, the target crosstalk prediction model is generated by:

the system comprises a historical circuit board data acquisition module, a crosstalk reference value and an initial crosstalk prediction model, wherein the historical circuit board data acquisition module is used for acquiring historical circuit board data, crosstalk reference values and the initial crosstalk prediction model corresponding to a plurality of historical circuit boards, the historical circuit board data at least comprise a historical network data set and historical hardware parameter information, the historical circuit board comprises at least one historical network connecting line, the historical network connecting line comprises historical network information, and the crosstalk reference values are used for judging whether the initial crosstalk prediction model is successfully trained;

In an alternative embodiment, the initial crosstalk prediction model is constructed by the following modules, including:

In an alternative embodiment, the target crosstalk prediction model generating module includes:

In an alternative embodiment, the target crosstalk prediction model generation submodule is specifically configured to:

For the device embodiments, since they are substantially similar to the method embodiments, the description is relatively simple, and reference is made to the description of the method embodiments for relevant points.

In addition, the embodiment of the invention also provides electronic equipment, which comprises: the processor, the memory, store the computer program on the memory and can run on the processor, this computer program realizes each process of the above-mentioned crosstalk prediction method embodiment of the circuit board when being carried out by the processor, and can reach the same technical effect, in order to avoid repetition, will not be repeated here.

The embodiment of the invention also provides a computer readable storage medium, on which a computer program is stored, which when executed by a processor, realizes the processes of the crosstalk prediction method embodiment of the circuit board, and can achieve the same technical effects, and in order to avoid repetition, the description is omitted here. Wherein the computer readable storage medium is selected from Read-Only Memory (ROM), random access Memory (Random Access Memory, RAM), magnetic disk or optical disk.

Fig. 6 is a block diagram of an electronic device implementing various embodiments of the present invention.

The electronic device 600 includes, but is not limited to: radio frequency unit 601, network module 602, audio output unit 603, input unit 604, sensor 605, display unit 606, user input unit 607, interface unit 608, memory 609, processor 610, and power supply 611. It will be appreciated by those skilled in the art that the electronic device structure shown in fig. 6 is not limiting of the electronic device and that the electronic device may include more or fewer components than shown, or may combine certain components, or a different arrangement of components. In the embodiment of the invention, the electronic equipment comprises, but is not limited to, a mobile phone, a tablet computer, a notebook computer, a palm computer, a vehicle-mounted terminal, a wearable device, a pedometer and the like.

It should be understood that, in the embodiment of the present invention, the radio frequency unit 601 may be used to receive and send information or signals during a call, specifically, receive downlink data from a base station, and then process the downlink data with the processor 610; and, the uplink data is transmitted to the base station. Typically, the radio frequency unit 601 includes, but is not limited to, an antenna, at least one amplifier, a transceiver, a coupler, a low noise amplifier, a duplexer, and the like. In addition, the radio frequency unit 601 may also communicate with networks and other devices through a wireless communication system.

The electronic device provides wireless broadband internet access to the user via the network module 602, such as helping the user to send and receive e-mail, browse web pages, and access streaming media, etc.

The audio output unit 603 may convert audio data received by the radio frequency unit 601 or the network module 602 or stored in the memory 609 into an audio signal and output as sound. Also, the audio output unit 603 may also provide audio output (e.g., a call signal reception sound, a message reception sound, etc.) related to a specific function performed by the electronic device 600. The audio output unit 603 includes a speaker, a buzzer, a receiver, and the like.

The input unit 604 is used for receiving audio or video signals. The input unit 604 may include a graphics processor (Graphics Processing Unit, GPU) 6041 and a microphone 6042, the graphics processor 6041 processing image data of still pictures or video obtained by an image capturing apparatus (such as a camera) in a video capturing mode or an image capturing mode. The processed image frames may be displayed on the display unit 606. The image frames processed by the graphics processor 6041 may be stored in the memory 609 (or other storage medium) or transmitted via the radio frequency unit 601 or the network module 602. Microphone 6042 may receive sound and can process such sound into audio data. The processed audio data may be converted into a format output that can be transmitted to the mobile communication base station via the radio frequency unit 601 in the case of a telephone call mode.

The electronic device 600 also includes at least one sensor 605, such as a light sensor, a motion sensor, and other sensors. Specifically, the light sensor includes an ambient light sensor and a proximity sensor, wherein the ambient light sensor can adjust the brightness of the display panel 6061 according to the brightness of ambient light, and the proximity sensor can turn off the display panel 6061 and/or the backlight when the electronic device 600 moves to the ear. As one of the motion sensors, the accelerometer sensor can detect the acceleration in all directions (generally three axes), and can detect the gravity and direction when stationary, and can be used for recognizing the gesture of the electronic equipment (such as horizontal and vertical screen switching, related games, magnetometer gesture calibration), vibration recognition related functions (such as pedometer and knocking), and the like; the sensor 605 may also include a fingerprint sensor, a pressure sensor, an iris sensor, a molecular sensor, a gyroscope, a barometer, a hygrometer, a thermometer, an infrared sensor, etc., which are not described herein.

The display unit 606 is used to display information input by a user or information provided to the user. The display unit 606 may include a display panel 6061, and the display panel 6061 may be configured in the form of a liquid crystal display (Liquid Crystal Display, LCD), an Organic Light-Emitting Diode (OLED), or the like.

The user input unit 607 may be used to receive input numeric or character information and to generate key signal inputs related to user settings and function control of the electronic device. Specifically, the user input unit 607 includes a touch panel 6071 and other input devices 6072. Touch panel 6071, also referred to as a touch screen, may collect touch operations thereon or thereabout by a user (e.g., operations of the user on touch panel 6071 or thereabout using any suitable object or accessory such as a finger, stylus, or the like). The touch panel 6071 may include two parts of a touch detection device and a touch controller. The touch detection device detects the touch azimuth of a user, detects a signal brought by touch operation and transmits the signal to the touch controller; the touch controller receives touch information from the touch detection device and converts it into touch point coordinates, which are then sent to the processor 610, and receives and executes commands sent from the processor 610. In addition, the touch panel 6071 may be implemented in various types such as resistive, capacitive, infrared, and surface acoustic wave. The user input unit 607 may include other input devices 6072 in addition to the touch panel 6071. Specifically, other input devices 6072 may include, but are not limited to, a physical keyboard, function keys (e.g., volume control keys, switch keys, etc.), a track ball, a mouse, and a joystick, which are not described herein.

Further, the touch panel 6071 may be overlaid on the display panel 6061, and when the touch panel 6071 detects a touch operation thereon or thereabout, the touch operation is transmitted to the processor 610 to determine a type of a touch event, and then the processor 610 provides a corresponding visual output on the display panel 6061 according to the type of the touch event. Although in fig. 6, the touch panel 6071 and the display panel 6061 are two independent components for implementing the input and output functions of the electronic device, in some embodiments, the touch panel 6071 and the display panel 6061 may be integrated to implement the input and output functions of the electronic device, which is not limited herein.

The interface unit 608 is an interface to which an external device is connected to the electronic apparatus 600. For example, the external devices may include a wired or wireless headset port, an external power (or battery charger) port, a wired or wireless data port, a memory card port, a port for connecting a device having an identification module, an audio input/output (I/O) port, a video I/O port, an earphone port, and the like. The interface unit 608 may be used to receive input (e.g., data information, power, etc.) from an external device and transmit the received input to one or more elements within the electronic apparatus 600 or may be used to transmit data between the electronic apparatus 600 and an external device.

The memory 609 may be used to store software programs as well as various data. The memory 609 may mainly include a storage program area that may store an operating system, an application program required for at least one function (such as a sound playing function, an image playing function, etc.), and a storage data area; the storage data area may store data (such as audio data, phonebook, etc.) created according to the use of the handset, etc. In addition, the memory 609 may include high speed random access memory, and may also include non-volatile memory, such as at least one magnetic disk storage device, flash memory device, or other volatile solid state storage device.

The processor 610 is a control center of the electronic device, connects various parts of the entire electronic device using various interfaces and lines, and performs various functions of the electronic device and processes data by running or executing software programs and/or modules stored in the memory 609, and calling data stored in the memory 609, thereby performing overall monitoring of the electronic device. The processor 610 may include one or more processing units; preferably, the processor 610 may integrate an application processor that primarily handles operating systems, user interfaces, applications, etc., with a modem processor that primarily handles wireless communications. It will be appreciated that the modem processor described above may not be integrated into the processor 610.

The electronic device 600 may also include a power supply 611 (e.g., a battery) for powering the various components, and preferably the power supply 611 may be logically coupled to the processor 610 via a power management system that performs functions such as managing charging, discharging, and power consumption.

In addition, the electronic device 600 includes some functional modules, which are not shown, and will not be described herein.

It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.

From the above description of the embodiments, it will be clear to those skilled in the art that the above-described embodiment method may be implemented by means of software plus a necessary general hardware platform, but of course may also be implemented by means of hardware, but in many cases the former is a preferred embodiment. Based on such understanding, the technical solution of the present invention may be embodied essentially or in a part contributing to the prior art in the form of a software product stored in a storage medium (e.g. ROM/RAM, magnetic disk, optical disk) comprising instructions for causing a terminal (which may be a mobile phone, a computer, a server, an air conditioner, or a network device, etc.) to perform the method according to the embodiments of the present invention.

The embodiments of the present invention have been described above with reference to the accompanying drawings, but the present invention is not limited to the above-described embodiments, which are merely illustrative and not restrictive, and many forms may be made by those having ordinary skill in the art without departing from the spirit of the present invention and the scope of the claims, which are to be protected by the present invention.

Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.

It will be clear to those skilled in the art that, for convenience and brevity of description, specific working procedures of the above-described systems, apparatuses and units may refer to corresponding procedures in the foregoing method embodiments, and are not repeated herein.

In the embodiments provided in the present application, it should be understood that the disclosed apparatus and method may be implemented in other manners. For example, the apparatus embodiments described above are merely illustrative, e.g., the division of the units is merely a logical function division, and there may be additional divisions when actually implemented, e.g., multiple units or components may be combined or integrated into another system, or some features may be omitted or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be an indirect coupling or communication connection via some interfaces, devices or units, which may be in electrical, mechanical or other form.

The units described as separate units may or may not be physically separate, and units shown as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

In addition, each functional unit in the embodiments of the present invention may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit.

The functions, if implemented in the form of software functional units and sold or used as a stand-alone product, may be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention may be embodied essentially or in a part contributing to the prior art or in a part of the technical solution, in the form of a software product stored in a storage medium, comprising several instructions for causing a computer device (which may be a personal computer, a server, a network device, etc.) to perform all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a usb disk, a removable hard disk, a ROM, a RAM, a magnetic disk, or an optical disk, etc.

The foregoing is merely illustrative of the present invention, and the present invention is not limited thereto, and any person skilled in the art will readily recognize that variations or substitutions are within the scope of the present invention. Therefore, the protection scope of the invention is subject to the protection scope of the claims.

Claims

1. A method for crosstalk prediction of a circuit board, the method comprising:

inputting the model input data into a target crosstalk prediction model corresponding to the circuit board to be predicted, and outputting a predicted crosstalk value of the circuit board to be predicted;

the target crosstalk prediction model is generated by the following steps:

training an initial crosstalk prediction model corresponding to the historical circuit board by adopting the crosstalk reference value, the model training data and the model test data to generate a target crosstalk prediction model;

the predicting network information includes the number of networks of network connection lines, the constructing a predicting network matrix for the circuit board to be predicted by using the predicting network data set, the predicting hardware parameter information and the predicting network information includes:

taking the number of target pins as the number of rows of the network matrix, taking the number of networks as the number of columns of the network matrix, and taking the data structure as the element of the network matrix to generate the network matrix aiming at the circuit board;

The predicted hardware parameter information includes a start point coordinate and an end point coordinate corresponding to a network connection line of the circuit board to be predicted, the size of the circuit board includes a width value and a length value of the circuit board, the predicted network matrix is normalized according to the predicted hardware parameter information to obtain model input data, and the method includes:

dividing the transverse coordinate of the starting point coordinate by the width value, and dividing the longitudinal coordinate of the starting point coordinate by the length value to obtain the model input data;

the normalizing the prediction network matrix according to the prediction hardware parameter information to obtain model input data includes:

2. The method according to claim 1, wherein the predicted network data set includes a predicted connection line data set, the predicted hardware parameter information includes a start point coordinate, an end point coordinate, width data, line space data corresponding to a network connection line of the circuit board to be predicted, and hierarchy information to which the network connection line belongs, and the obtaining the predicted circuit board data corresponding to the circuit board to be predicted includes:

And combining the starting point coordinates, the ending point coordinates, the width data, the line interval data and the level information into the predicted connecting line data set.

3. The method of claim 2, wherein the circuit board to be predicted further comprises a passive device, wherein the prediction network data set comprises a prediction pin data set, wherein the prediction pin data set comprises a first prediction pin data set corresponding to the passive device, wherein the obtaining the prediction circuit board data corresponding to the circuit board to be predicted comprises:

4. The method of claim 3, wherein said combining said resistance data, said capacitance data, and said voltage data to obtain said first set of predicted pin data comprises:

5. The method of claim 4, wherein the weighted averaging the resistance data, the capacitance data, and the voltage data to obtain average resistance data, average capacitance data, and average voltage data for the circuit board, respectively, comprises:

6. The method of claim 2, wherein the circuit board to be predicted further comprises an active device comprising a first active device corresponding to the starting point coordinates, wherein the set of predicted pin data comprises a second set of predicted pin data corresponding to the first active device, and wherein the obtaining the predicted circuit board data corresponding to the circuit board to be predicted comprises:

Acquiring the input capacitance and the rising time of the first active device;

7. The method of claim 6, wherein the active device comprises a second active device corresponding to the endpoint coordinate, wherein the predicted pin data set comprises a third predicted pin data set corresponding to the second active device, and wherein the obtaining predicted circuit board data corresponding to a circuit board to be predicted comprises:

8. The method of claim 2, wherein the predicted hardware parameter information further includes board layer data of the circuit board to be predicted, the board layer data including at least a circuit board size, a number of levels, and a circuit board thickness, and the obtaining predicted circuit board data corresponding to the circuit board to be predicted includes:

9. The method of claim 8, wherein the predicting hardware parameter information further includes a pin count of the circuit board to be predicted, and the obtaining predicted circuit board data corresponding to the circuit board to be predicted includes:

10. The method of claim 1, wherein the initial crosstalk prediction model is constructed by:

11. The method of claim 1, wherein training the initial crosstalk prediction model corresponding to the historical circuit board using the crosstalk reference value, the model training data, and the model test data to generate the target crosstalk prediction model comprises:

12. The method of claim 11, wherein the generating the target crosstalk prediction model from the comparison of the initial crosstalk value and the crosstalk reference value comprises:

13. The method of claim 11, wherein the generating the target crosstalk prediction model from the comparison of the initial crosstalk value and the crosstalk reference value comprises:

14. A crosstalk predicting apparatus for a circuit board, the apparatus comprising:

the predicted crosstalk value output module is used for inputting the model input data to a target crosstalk prediction model corresponding to the circuit board to be predicted and outputting a predicted crosstalk value of the circuit board to be predicted;

the target crosstalk prediction model is generated through the following modules:

the target crosstalk prediction model generation module is used for training an initial crosstalk prediction model corresponding to the historical circuit board by adopting the crosstalk reference value, the model training data and the model test data to generate a target crosstalk prediction model;

wherein the predicted network information includes the number of networks of network connection lines, and the predicted network matrix construction module includes:

the data structure generation sub-module is used for combining the prediction network data set and the slab data to obtain data structures corresponding to the network connecting wires;

a network matrix generation sub-module, configured to use a target pin number as a row number of the network matrix, use the network number as a column number of the network matrix, and use the data structure as an element of the network matrix, to generate a network matrix for the circuit board;

The prediction hardware parameter information includes a start point coordinate and an end point coordinate corresponding to a network connection line of the circuit board to be predicted, the size of the circuit board includes a width value and a length value of the circuit board, and the model input data acquisition module includes:

the model input data acquisition sub-module is used for dividing the transverse coordinate of the starting point coordinate by the width value, dividing the longitudinal coordinate of the starting point coordinate by the length value, and acquiring the model input data;

the model input data acquisition submodule is specifically used for:

15. An electronic device comprising a processor, a communication interface, a memory and a communication bus, wherein the processor, the communication interface and the memory communicate with each other via the communication bus;

the memory is used for storing a computer program;

the processor being configured to implement the method of any of claims 1-13 when executing a program stored on a memory.

16. A computer-readable storage medium having instructions stored thereon, which when executed by one or more processors, cause the processors to perform the method of any of claims 1-13.