CN115828832A

CN115828832A - Crosstalk prediction method and device of circuit board, electronic equipment and storage medium

Info

Publication number: CN115828832A
Application number: CN202310125821.7A
Authority: CN
Inventors: 范琳琳
Original assignee: Suzhou Inspur Intelligent Technology Co Ltd
Current assignee: Suzhou Inspur Intelligent Technology Co Ltd
Priority date: 2023-02-16
Filing date: 2023-02-16
Publication date: 2023-03-21
Anticipated expiration: 2043-02-16
Also published as: CN115828832B

Abstract

The embodiment of the invention provides a crosstalk prediction method and device of a circuit board, electronic equipment and a storage medium, and relates to the technical field of model data processing.

Description

Crosstalk prediction method and device of circuit board, electronic equipment and storage medium

Technical Field

The present invention relates to the field of model data processing technologies, and in particular, to a crosstalk prediction method for a circuit board, a crosstalk prediction apparatus for a circuit board, an electronic device, and a computer-readable storage medium.

Background

In high-speed PCB (Printed circuit board) design and integrated circuit design, crosstalk is a troublesome problem, which means that when a signal is transmitted on a transmission channel, an adjacent transmission line is undesirably affected due to electromagnetic coupling, and when a certain coupling voltage and coupling current are injected into an interfered signal, excessive crosstalk may cause false triggering of a circuit, which may result in that the system cannot normally operate.

However, with the continuous update and development of electronic devices, the size of a PCB is getting smaller, the trace density of each layer is increased, and when the signal transmission speed is continuously increased, the crosstalk problem of the PCB becomes more serious, which affects the performance of the electronic device, therefore, in the prior art, on one hand, it is proposed to use a PCB full-wave simulation tool to predict the crosstalk of the PCB when designing or using the PCB, but before using the PCB full-wave simulation tool, a relevant technician is required to build a corresponding model for different problems, which results in that the simulation tool is not universal, and at the same time, a lot of time is consumed in the process of predicting the crosstalk of a larger PCB motherboard, on the other hand, it is proposed to use a machine learning algorithm to predict the crosstalk of the entire PCB, for example, a Long-term memory network (LSTM) model and a seq2seq model are used, and the crosstalk prediction of the PCB is further performed, but because the memory of the seq2seq model and the tm model is insufficient, the effect of predicting the crosstalk is poor, which results in low overall accuracy and the prediction of the Long-term memory network.

Disclosure of Invention

The embodiment of the invention provides a crosstalk prediction method and device for a circuit board, electronic equipment and a computer readable storage medium, and aims to solve or partially solve the problems of long time consumption, low working efficiency and low accuracy in the prior art of crosstalk prediction on a PCB.

The embodiment of the invention discloses a crosstalk prediction method of a circuit board, which comprises the following steps:

obtaining predicted circuit board data and predicted network information corresponding to a circuit board to be predicted, wherein the predicted circuit board data at least comprises predicted hardware parameter information and a predicted network data set corresponding to the predicted hardware parameter information;

adopting the prediction network data set, the prediction hardware parameter information and the prediction network information to construct a prediction network matrix for the circuit board to be predicted;

normalizing the prediction network matrix according to the prediction hardware parameter information to obtain model input data;

and inputting the model input data into a target crosstalk prediction model corresponding to the circuit board to be predicted, and outputting a predicted crosstalk value of the circuit board to be predicted.

Optionally, the predicting network data set includes a predicting connection line data set, the predicting hardware parameter information includes a start coordinate, an end coordinate, width data, line spacing data corresponding to a network connection line of the circuit board to be predicted, and hierarchical information to which the network connection line belongs, and the obtaining predicted circuit board data corresponding to the circuit board to be predicted includes:

and respectively combining the starting point coordinate, the end point coordinate, the width data, the line spacing data and the level information to obtain the predicted connecting line data set.

Optionally, the circuit board to be predicted further includes a passive device, the prediction network data set includes a prediction pin data set, the prediction pin data set includes a first prediction pin data set corresponding to the passive device, and the obtaining of the prediction circuit board data corresponding to the circuit board to be predicted includes:

acquiring resistance data, capacitance data and voltage data of the passive device;

and combining the resistance data, the capacitance data and the voltage data to obtain the first prediction pin data set.

Optionally, the combining the resistance data, the capacitance data, and the voltage data to obtain the first predicted pin data set includes:

respectively carrying out weighted average processing on the resistance data, the capacitance data and the voltage data to obtain average resistance data, average capacitance data and average voltage data aiming at the circuit board;

and combining the average resistance data, the average capacitance data and the average voltage data to obtain the first prediction pin data set.

Optionally, the performing weighted average processing on the resistance data, the capacitance data, and the voltage data to obtain average resistance data, average capacitance data, and average voltage data for the circuit board respectively includes:

acquiring the number of the passive devices in the circuit board to be predicted;

accumulating the resistance data of each passive device in the circuit board to be predicted, and dividing the resistance data by the number of the devices to obtain average resistance data;

accumulating the capacitance data of each passive device in the circuit board to be predicted, and dividing the capacitance data by the number of the devices to obtain average capacitance data;

and accumulating the voltage data of each passive device in the circuit board to be predicted, and dividing the voltage data by the number of the devices to obtain the average voltage data.

Optionally, the circuit board to be predicted further includes an active device, the active device includes a first active device corresponding to the start point coordinate, the predicted pin data set includes a second predicted pin data set corresponding to the first active device, and the obtaining predicted circuit board data corresponding to the circuit board to be predicted includes:

acquiring the input capacitance and the rise time of the first active device;

and combining the starting point coordinate, the input capacitance and the rise time to obtain the second prediction pin data set.

Optionally, the active device includes a second active device corresponding to the end point coordinate, and the obtaining of the predicted circuit board data corresponding to the circuit board to be predicted from the third predicted pin data set corresponding to the second active device includes:

acquiring the output impedance and the fall time of the second active device;

and combining the end point coordinate, the output impedance and the fall time to obtain the third prediction pin data set.

Optionally, the predicting hardware parameter information further includes board layer data of the circuit board to be predicted, where the board layer data at least includes a circuit board size, a number of layers, and a circuit board thickness, and the obtaining predicted circuit board data corresponding to the circuit board to be predicted includes:

and respectively acquiring the circuit board size, the level number and the circuit board thickness corresponding to the circuit board to be predicted.

Optionally, the predicting hardware parameter information further includes the number of pins of the circuit board to be predicted, and the obtaining of predicted circuit board data corresponding to the circuit board to be predicted includes:

and acquiring the number of pins corresponding to each network in the circuit board, and taking the number of the pins with the largest number as the target number of pins.

Optionally, the constructing a prediction network matrix for the circuit board to be predicted by using the prediction network data set, the prediction hardware parameter information, and the prediction network information includes:

combining the predicted network data set and the slab data to obtain a data structure corresponding to each network connection line;

and correlating the target pin number, the network number and the data structure to generate a network matrix for the circuit board.

Optionally, the associating the target pin number, the network number, and the data structure to generate a network matrix for the circuit board includes:

and taking the target pin number as the row number of the network matrix, taking the network number as the column number of the network matrix, and taking the data structure as an element of the network matrix to generate the network matrix for the circuit board.

Optionally, the size of the circuit board includes a width value and a height value of the circuit board, and the normalizing the prediction network matrix according to the prediction hardware parameter information to obtain model input data includes:

and dividing the transverse coordinate of the starting point coordinate by the width value, and dividing the longitudinal coordinate of the starting point coordinate by the height value to obtain the model input data.

Optionally, the normalizing the prediction network matrix according to the prediction hardware parameter information to obtain model input data includes:

and dividing the transverse coordinate of the end point coordinate by the width value, and dividing the longitudinal coordinate of the end point coordinate by the height value to obtain the model input data.

Optionally, the target crosstalk prediction model is generated by:

obtaining historical circuit board data, historical network information, a crosstalk reference value and an initial crosstalk prediction model corresponding to a plurality of historical circuit boards, wherein the historical circuit board data at least comprises a historical network data set and historical hardware parameter information, and the crosstalk reference value is used for judging whether the initial crosstalk prediction model is trained successfully or not;

constructing a historical network matrix for the historical circuit board by using the historical network data set, the historical hardware parameter information and the historical network information;

carrying out normalization processing on the historical network matrix according to the historical hardware parameter information to obtain model training data and model testing data;

and training an initial crosstalk prediction model corresponding to the historical circuit board by adopting the crosstalk reference value, the model training data and the model test data to generate a target crosstalk prediction model.

Optionally, the initial crosstalk prediction model is constructed by:

acquiring an initial crosstalk prediction model and an encoder and a decoder of the initial crosstalk prediction model;

removing the embedded layer of the encoder and concatenating a fully-concatenated layer in the decoder, the fully-concatenated layer being a function for mapping the matrix to a preset value.

Optionally, the training an initial crosstalk prediction model corresponding to the historical circuit board by using the crosstalk reference value, the model training data, and the model test data to generate a target crosstalk prediction model includes:

inputting the model training data and the model testing data into an initial crosstalk prediction model corresponding to the historical circuit board, and outputting an initial crosstalk value;

and generating the target crosstalk prediction model according to the comparison result of the initial crosstalk value and the crosstalk reference value.

Optionally, the generating the target crosstalk prediction model according to the comparison result between the initial crosstalk value and the crosstalk reference value includes:

if the comparison result of the initial crosstalk value and the crosstalk reference value is a numerical value which is consistent, the initial crosstalk prediction model is represented to be trained successfully, and the target crosstalk prediction model is generated.

if the comparison result of the initial crosstalk value and the crosstalk reference value is a numerical value which is not consistent, the initial crosstalk prediction model is represented to be failed in training, iterative processing and parameter updating processing are carried out on the initial crosstalk prediction model, and the training is successful until the comparison result of the initial crosstalk value and the crosstalk reference value is a numerical value which is consistent, so that the target crosstalk prediction model is generated.

The invention also discloses a crosstalk prediction device of the circuit board, which comprises:

the device comprises a predicted circuit board data acquisition module, a predicted circuit board data acquisition module and a predicted network information acquisition module, wherein the predicted circuit board data acquisition module is used for acquiring predicted circuit board data and predicted network information corresponding to a circuit board to be predicted, and the predicted circuit board data at least comprises predicted hardware parameter information and a predicted network data set corresponding to the predicted hardware parameter information;

the prediction network matrix construction module is used for constructing a prediction network matrix aiming at the circuit board to be predicted by adopting the prediction network data set, the prediction hardware parameter information and the prediction network information;

the model input data acquisition module is used for carrying out normalization processing on the prediction network matrix according to the prediction hardware parameter information to obtain model input data;

and the predicted crosstalk value output module is used for inputting the model input data into a target crosstalk prediction model corresponding to the circuit board to be predicted and outputting the predicted crosstalk value of the circuit board to be predicted.

Optionally, the predicted network data set includes a predicted connection line data set, the predicted hardware parameter information includes a start coordinate, an end coordinate, width data, line spacing data corresponding to a network connection line of the circuit board to be predicted, and hierarchy information to which the network connection line belongs, and the predicted circuit board data obtaining module includes:

and the predicted connecting line data set acquisition submodule is used for respectively combining the starting point coordinate, the end point coordinate, the width data, the line spacing data and the level information to acquire the predicted connecting line data set.

Optionally, the circuit board to be predicted further includes a passive device, the prediction network data set includes a prediction pin data set, the prediction pin data set includes a first prediction pin data set corresponding to the passive device, and the prediction circuit board data obtaining module includes:

the passive device parameter acquisition submodule is used for acquiring resistance data, capacitance data and voltage data of the passive device;

and the first prediction pin data set acquisition submodule is used for combining the resistance data, the capacitance data and the voltage data to acquire the first prediction pin data set.

Optionally, the first prediction pin data set obtaining sub-module includes:

an average parameter obtaining unit, configured to perform weighted average processing on the resistance data, the capacitance data, and the voltage data, respectively, to obtain average resistance data, average capacitance data, and average voltage data for the circuit board;

Optionally, the average parameter acquiring unit is specifically configured to:

Optionally, the circuit board to be predicted further includes an active device, the active device includes a first active device corresponding to the start point coordinate, the predicted pin data set includes a second predicted pin data set corresponding to the first active device, and the predicted circuit board data obtaining module is specifically configured to:

acquiring the input capacitance and the rise time of the first active device;

Optionally, the active device includes a second active device corresponding to the end point coordinate, the predicted pin data set includes a third predicted pin data set corresponding to the second active device, and the predicted circuit board data obtaining module is specifically configured to:

acquiring the output impedance and the fall time of the second active device;

Optionally, the predicted hardware parameter information further includes board layer data of the circuit board to be predicted, where the board layer data at least includes a circuit board size, a number of layers, and a circuit board thickness, and the predicted circuit board data obtaining module is specifically configured to:

Optionally, the predicted hardware parameter information further includes a number of pins of the circuit board to be predicted, and the predicted circuit board data obtaining module is specifically configured to:

Optionally, the predicted network information includes the number of networks of the network connection lines, and the predicted network matrix building module includes:

the data structure generation submodule is used for combining the predicted network data set and the slab data to obtain a data structure corresponding to each network connecting line;

and the network matrix generation submodule is used for correlating the target pin number, the network number and the data structure to generate a network matrix for the circuit board.

Optionally, the network matrix generation submodule is specifically configured to:

Optionally, the circuit board size includes a width value and a height value of the circuit board, and the root model input data obtaining module includes:

and the model input data acquisition sub-module is used for dividing the transverse coordinate of the starting point coordinate by the width value and dividing the longitudinal coordinate of the starting point coordinate by the height value to acquire the model input data.

Optionally, the model input data obtaining sub-module is specifically configured to:

and dividing the transverse coordinate of the terminal coordinate by the width value, and dividing the longitudinal coordinate of the terminal coordinate by the height value to obtain the model input data.

Optionally, the target crosstalk prediction model is generated by:

the device comprises a historical circuit board data acquisition module, a crosstalk prediction module and a crosstalk prediction module, wherein the historical circuit board data acquisition module is used for acquiring historical circuit board data, historical network information, a crosstalk reference value and an initial crosstalk prediction model which correspond to a plurality of historical circuit boards, the historical circuit board data at least comprise a historical network data set and historical hardware parameter information, and the crosstalk reference value is used for judging whether the initial crosstalk prediction model is trained successfully;

a historical network matrix construction module, configured to construct a historical network matrix for the historical circuit board by using the historical network data set, the historical hardware parameter information, and the historical network information;

the model training data acquisition module is used for carrying out normalization processing on the historical network matrix according to the historical hardware parameter information to obtain model training data and model test data;

and the target crosstalk prediction model generation module is used for training an initial crosstalk prediction model corresponding to the historical circuit board by adopting the crosstalk reference value, the model training data and the model test data to generate a target crosstalk prediction model.

Optionally, the initial crosstalk prediction model is constructed by the following modules, including:

the initial crosstalk prediction module acquisition module is used for acquiring an initial crosstalk prediction model and an encoder and a decoder of the initial crosstalk prediction model;

a model processing module for removing the embedded layer of the encoder and connecting a fully connected layer in the decoder, the fully connected layer being a function for mapping the matrix to a preset value.

Optionally, the target crosstalk prediction model generation module includes:

the initial crosstalk value output submodule is used for inputting the model training data and the model testing data into an initial crosstalk prediction model corresponding to the historical circuit board and outputting an initial crosstalk value;

and the target crosstalk prediction model generation submodule is used for generating the target crosstalk prediction model according to the comparison result of the initial crosstalk value and the crosstalk reference value.

Optionally, the target crosstalk prediction model generation submodule is specifically configured to:

The embodiment of the invention also discloses electronic equipment which comprises a processor, a communication interface, a memory and a communication bus, wherein the processor, the communication interface and the memory finish mutual communication through the communication bus;

the memory is used for storing a computer program;

the processor is configured to implement the method according to the embodiment of the present invention when executing the program stored in the memory.

Also disclosed is a computer-readable storage medium having instructions stored thereon, which, when executed by one or more processors, cause the processors to perform a method according to an embodiment of the invention.

The embodiment of the invention has the following advantages:

in the embodiment of the invention, the predicted circuit board data and the predicted network information corresponding to the circuit board to be predicted are obtained, the predicted circuit board data at least comprise predicted hardware parameter information and a predicted network data set corresponding to the predicted hardware parameter information, a predicted network matrix aiming at the circuit board to be predicted is constructed by adopting the predicted network data set, the predicted hardware parameter information and the predicted network information, the predicted network matrix is normalized according to the predicted hardware parameter information to obtain model input data, the model input data is input to a target crosstalk prediction model corresponding to the circuit board to be predicted, the predicted crosstalk value of the circuit board to be predicted is output, the predicted hardware parameter information of the circuit board to be predicted and the predicted network data set corresponding to the predicted hardware parameter information are obtained, so that depth prediction is carried out according to the self information of the circuit board to be predicted, the predicted network information corresponding to the circuit board to be predicted can be analyzed aiming at the whole network by obtaining the predicted network information, the reliability of the predicted crosstalk value is increased, meanwhile, the predicted network matrix aiming at the predicted circuit board is constructed by adopting the predicted network data set, the predicted hardware parameter information and the predicted network information to be predicted, a large amount of the predicted circuit board to be predicted is summarized to the same matrix, crosstalk is evaluated comprehensively, the crosstalk of the predicted circuit board to further reduce the crosstalk, the crosstalk of the predicted network data and the predicted input to obtain the predicted circuit board with high accuracy when the predicted network data input to be predicted.

Drawings

Fig. 1 is a flowchart illustrating steps of a crosstalk prediction method for a circuit board according to an embodiment of the present invention;

FIG. 2 is a flowchart of steps for constructing a prediction network data set of a circuit board to be predicted according to an embodiment of the present invention;

FIG. 3 is a flowchart illustrating steps for generating a target crosstalk prediction model according to an embodiment of the present invention;

FIG. 4 is a flowchart of a step of constructing an initial crosstalk prediction model provided in an embodiment of the present invention;

fig. 5 is a block diagram of a crosstalk prediction apparatus of a circuit board according to an embodiment of the present invention;

fig. 6 is a block diagram of an electronic device provided in the embodiment of the present invention.

Detailed Description

In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in further detail below.

As an example, a PCB can be classified into capacitive crosstalk, inductive crosstalk, near-end crosstalk, far-end crosstalk, and the like according to the interfering lines of the PCB and the routing routes and positions on the interfering lines, and factors affecting the PCB crosstalk at least include line spacing of network connection lines, impedance and dielectric constant of devices in the circuit board, and the like, and in order to know in advance whether a new PCB is crosstalk or not to apply the new PCB to the industry, a PCB full-wave simulation tool or a seq2seq model and LSTM model are often used to predict the PCB, but the prediction of the PCB full-wave simulation tool is time-consuming, for example, a PCB with a small size may need several hours, for a PCB with a large size, several times of time may be needed, resulting in low prediction work efficiency, while the prediction effects of the seq2seq model and the LSTM model are poor, and there is a certain difference between the prediction accuracy and the requirements of the industrial application.

In view of the above, one of the core invention points of the embodiments of the present invention is to obtain predicted circuit board data and predicted network information corresponding to a circuit board to be predicted, where the predicted circuit board data at least includes predicted hardware parameter information and a predicted network data set corresponding to the predicted hardware parameter information, construct a predicted network matrix for the circuit board to be predicted using the predicted network data set, the predicted hardware parameter information and the predicted network information, normalize the predicted network matrix according to the predicted hardware parameter information to obtain model input data, input the model input data to a target crosstalk prediction model corresponding to the circuit board to be predicted, output a predicted crosstalk value of the circuit board to be predicted, thereby obtain predicted hardware parameter information of the circuit board to be predicted and a predicted network data set corresponding to the predicted hardware parameter information, so as to implement deep prediction according to the own information of the circuit board to be predicted, analyze the entire network by obtaining the predicted network information corresponding to the circuit board to be predicted, increase reliability of the predicted crosstalk value, and simultaneously construct a predicted network matrix for the circuit board to be predicted using the predicted network data set, the predicted hardware parameter information and the predicted network information to reduce crosstalk of the circuit board to be predicted and estimate the crosstalk value of the circuit board to be predicted more accurately.

Referring to fig. 1, a flowchart illustrating steps of a crosstalk prediction method for a circuit board provided in an embodiment of the present invention is shown, which specifically may include the following steps:

step 101, obtaining predicted circuit board data and predicted network information corresponding to a circuit board to be predicted, wherein the predicted circuit board data at least comprises predicted hardware parameter information and a predicted network data set corresponding to the predicted hardware parameter information;

in the embodiment of the invention, the predicted circuit board data and the predicted network information corresponding to the circuit board to be predicted can be obtained, and the predicted circuit board data at least comprises the predicted hardware parameter information and the predicted network data set corresponding to the predicted hardware parameter information.

Optionally, the circuit board to be predicted may be a new PCB, a plurality of network connection lines exist in the circuit board to be predicted, the network connection lines may be PCB connection lines, which are also called terminal connection lines, and are connection lines formed by a pin base, a rubber shell, a terminal, a wire, and a processing connection line, the predicted circuit board data may be various information related in the new PCB, and may include predicted hardware parameter information and a predicted network data set, where the predicted hardware parameter information may be hardware parameters of the PCB itself, for example, the predicted hardware parameter information may include start coordinates, end coordinates, width data, line spacing data corresponding to the network connection lines of the circuit board to be predicted, and hierarchy information to which the network connection lines belong, and may further include board layer data of the circuit board to be predicted, for example, the board layer data at least includes a circuit board size, a hierarchy number, a circuit board thickness, and the like, the predicted network data set may be a set composed of PCB data, and may include a predicted connection line data set and a predicted pin data set, the predicted network information may be network number of each network associated with the network connection lines, and the network represents a connection relationship of each component of the PCB. The network table contains element names, labels, connections, etc.

In an embodiment of the present invention, the set of predicted connection line data may be a set of start coordinates, end coordinates, width data, line spacing data, and hierarchy information of the network connection line, such as segs = [ Coord _ start, coord _ end, layer, width, clearness, hierarchy name ], where the start coordinates Coord _ start may be coordinates of a start point of the network connection line, such as Coord _ start may be (23.456, 59.032), the end coordinates Coord _ end may be coordinates of an end point of the network connection line, if Coord _ end is (23.456, 87.346), width data width may be a line width value of the network connection line, e.g., width may be 0.127, line spacing data clearance may be a line spacing value of the network connection line, e.g., clearance may be 0.3, and layer information layer may be a working layer of the PCB, e.g., layer may be a wiring layer, a signal layer, an internal power/ground layer, a solder resist layer, etc., then the predicted connection line data set segs = [ (23.456,59.032), (23.456, 87.346), 0.127,0.3, wiring layer ].

In another embodiment of the present invention, the circuit board to be predicted further includes passive devices and active devices, the passive devices mainly include resistors, capacitors, inductors, converters, graduators, matching networks, resonators, filters, mixers, switches, etc., and the passive devices can display electronic components of their characteristics without an external power supply, and the passive devices mainly include resistors, inductors, and capacitors, and they have a common characteristic that they can operate in the presence of signals without a power supply in the circuit. Active devices require power to implement their specific functional electronic components. Mainly comprising electron tubes, transistors, integrated circuits, etc. Generally for amplification, conversion, etc. of signals. The predicted pin data set may be a set of pin related information of a passive device or an active device, which may include a first predicted pin data set corresponding to the passive device and a second predicted pin data set corresponding to the active device.

In a specific implementation, the first predicted pin data set pasive may be a set of pin related information of a Passive device, such as pasive = [ r _ value, f _ value, v _ value ], which may be obtained by acquiring resistance data, capacitance data, and voltage data of the Passive device, and combining the resistance data, capacitance data, and voltage data.

Specifically, the resistance data r _ value, the average capacitance data f _ value and the average voltage data v _ value of the circuit board can be obtained by performing weighted average processing on the resistance data, the capacitance data f _ value and the voltage data respectively, for example, the number of passive devices in the circuit board to be predicted is obtained, the resistance data of each passive device in the circuit board to be predicted is accumulated and is divided by the number of devices to obtain average resistance data, the capacitance data of each passive device in the circuit board to be predicted is accumulated and is divided by the number of devices to obtain average capacitance data, the voltage data of each passive device in the circuit board to be predicted is accumulated and is divided by the number of devices to obtain average voltage data, and then the average resistance data, the average capacitance data and the average voltage data are combined to obtain a first prediction pin data set, wherein the number of devices can be the number of all the passive devices on each network, so that the voltage, inductance and capacitance of each passive device on each network can be described by using the average values of the voltages, inductances and capacitance sub-networks, crosstalk or certain crosstalk can be reduced, and the overall prediction results can be more reliably evaluated.

The Active device further includes a first Active device corresponding to the start coordinate and a second Active device corresponding to the end coordinate, the predicted pin data set includes a second predicted pin data set Active _ start corresponding to the first Active device, such as Active _ start = [ Coord _ start, value1, t1], the input capacitance and the rise time of the first Active device may be obtained first, and then the start coordinate Coord _ start, the input capacitance value1, and the rise time t1 are combined to obtain a second predicted pin data set, where the input capacitance may be an input capacitance of the pin, and the rise time may be a rise time of the signal.

The predicted pin data set may further include a third predicted pin data set Active _ end, active _ end = [ Coord _ end, value2, t2] corresponding to the second Active device, and the third predicted pin data set may be obtained by obtaining an output impedance and a falling time of the second Active device and combining the end point coordinate Coord _ end, the output impedance value2, and the falling time t2, where the output impedance may be an output impedance of a pin and the falling time may be a falling time of a signal.

In another embodiment of the present invention, the predicted hardware parameter information further includes Board data Board of the circuit Board to be predicted, such as Board = [ size, layer, thickness ], where the Board data Board at least includes a circuit Board size, a number of layers, and a circuit Board thickness, and the predicted circuit Board data corresponding to the circuit Board to be predicted is obtained, and the circuit Board size, the number of layers, and the circuit Board thickness corresponding to the circuit Board to be predicted can be obtained respectively.

For example, the circuit board size includes a width value and a height value of the PCB, the circuit board size may be represented as (w, h), w may be a width value of the PCB, h may be a height value of the PCB, the number of layers may be the number of layers of the PCB, and the circuit board thickness may be PCB thickness information.

In another embodiment of the present invention, the predicted hardware parameter information further includes the number of pins of the circuit board to be predicted, and since the number of pins included in each network is not necessarily equal, the number of pins corresponding to each network in the circuit board may be obtained first, and in order to keep the dimensionality of data consistent, the maximum number of pins m of all networks is calculated, m is taken as a target number of pins and a final number of pins value, and then data X = [ X1, X2, …, xm ] for constructing each network according to the connection segment data in the network is constructed, where if the number of pins of a network is less than m, corresponding X needs to be replaced by 0 from the next one of the actual number of pins to m, that is, 0 is supplemented to the network.

102, constructing a prediction network matrix for the circuit board to be predicted by adopting the prediction network data set, the prediction hardware parameter information and the prediction network information;

in the embodiment of the invention, a prediction network matrix aiming at the circuit board to be predicted can be constructed by adopting the prediction network data set, the prediction hardware parameter information and the prediction network information.

Alternatively, the prediction network matrix may be a matrix constructed from the prediction network data set, the prediction hardware parameter information, and the prediction network information, and is used for subsequent input into a corresponding model as model training data or as model input data.

In a specific implementation, the predicted network data set and the board layer data may be combined to obtain a data structure corresponding to each network connection line, and then the target pin number, the network number, and the data structure are associated to generate a network matrix for the circuit board.

Specifically, the target pin number is used as the row number of the network matrix, the network number is used as the column number of the network matrix, and the data structure is used as an element of the network matrix to generate the network matrix for the circuit board.

As an example, the constructed data is integrated to obtain a data structure of a connection segment of a network: x = [ Board, active _ start, active _ end, passive, segs ], the number of pins of each network is unequal, the maximum number m of pins of all networks is obtained as the final number value of the pins, network data X = [ X1, X2, …, xm ] are constructed, if the number of the pins of the network is less than m, then 0 is supplemented correspondingly later, a network matrix of the PCB is constructed, the number n of the networks of the PCB is obtained, and the network matrix of the PCB is: p = [ X1, X2, …, xn ].

103, normalizing the prediction network matrix according to the prediction hardware parameter information to obtain model input data;

in the embodiment of the invention, the prediction network matrix is normalized according to the prediction hardware parameter information to obtain the model input data.

Alternatively, the model input data may be data for inputting into the target crosstalk prediction model to predict the crosstalk value of the circuit board to be predicted.

In a specific implementation, the model input data may be obtained by dividing the lateral coordinate of the starting point coordinate by the width value and dividing the longitudinal coordinate of the starting point coordinate by the height value.

Specifically, the normalization processing may be completed by dividing the horizontal coordinate of the end point coordinate by the width value and dividing the vertical coordinate of the end point coordinate by the height value, and the model input data may be obtained, where the value of the model input data is [0,1 ].

As an example, referring to fig. 2, a flowchart of steps for constructing a predicted network data set of a circuit board to be predicted is shown, after a predicted connecting line data set, a first predicted pin data set, a second predicted pin data set, a third predicted pin data set, and predicted hardware parameter information are respectively obtained, a predicted network matrix for the circuit board to be predicted is generated, and normalization processing is performed by using coordinate points.

And 104, inputting the model input data into a target crosstalk prediction model corresponding to the circuit board to be predicted, and outputting a predicted crosstalk value of the circuit board to be predicted.

In the embodiment of the invention, the model input data can be input into the target crosstalk prediction model corresponding to the circuit board to be predicted, and the predicted crosstalk value of the circuit board to be predicted is output.

Optionally, the target crosstalk prediction model may be a model trained by using model training data, and the predicted crosstalk value may be a value output by the target crosstalk prediction model, such as 0 and 1, where 0 may be regarded as a value without crosstalk and 1 may be regarded as a value with crosstalk as needed.

In specific implementation, referring to fig. 3, a flowchart of steps for generating a target crosstalk prediction model is shown, where a data set needs to be constructed first, then an initial crosstalk prediction model is constructed, then model training data and model test data are adopted to train the initial crosstalk prediction model to obtain the target crosstalk prediction model, the trained target crosstalk prediction model may be used for prediction, and a specific training process is generated through the following steps:

s1, obtaining historical circuit board data, historical network information, a crosstalk reference value and an initial crosstalk prediction model corresponding to a plurality of historical circuit boards, wherein the historical circuit board data at least comprise a historical network data set and historical hardware parameter information, and the crosstalk reference value is used for judging whether the initial crosstalk prediction model is trained successfully;

s2, establishing a historical network matrix for the historical circuit board by adopting the historical network data set, the historical hardware parameter information and the historical network information;

and S3, training an initial crosstalk prediction model corresponding to the historical circuit board by adopting the crosstalk reference value, the model training data and the model testing data to generate a target crosstalk prediction model.

Alternatively, the historical circuit board may be an old circuit board or a used PCB, the historical circuit board may include historical network connection lines, the historical network connection lines may be PCB connection lines, the historical circuit board data may be various information involved in the old PCB, and may include historical hardware parameter information and a historical network data set, where the historical hardware parameter information may be hardware parameters of the PCB itself, for example, the historical hardware parameter information may include a start coordinate, an end coordinate, width data, line spacing data in the historical network connection lines, and hierarchical information to which the historical network connection lines belong, and may further include slab data of the historical circuit board, the historical network data set may be a set composed of data of the PCB, which may include a historical connection line data set and a historical pin data set, the historical network information may be the number of networks of each network associated with the historical network connection lines, the crosstalk reference value may be crosstalk prediction performed on existing networks on a plurality of PCBs by existing software Cadence signity (high speed circuit design simulation software), and the obtained crosstalk reference value is 0 or 1.

Referring to fig. 4, a flowchart of steps for constructing an initial crosstalk prediction model is shown, and the steps are specifically constructed through the following sub-steps:

s11, acquiring an initial crosstalk prediction model and an encoder and a decoder of the initial crosstalk prediction model;

s12, removing the embedded layer of the encoder, and connecting a full connection layer in the decoder, wherein the full connection layer is a function for mapping the matrix to a preset value.

The initial crosstalk prediction model can be a Transformer model, can be used for recognizing voice or text, belongs to an NLP (Natural Language Processing) classical model, is mainly used for coding input and computing output based on attention, does not depend on a cyclic neural network or a convolutional neural network aligned with a sequence, can be trained in a parallelized manner and has global information, so that the prediction time is greatly shortened, and the detection efficiency is improved; meanwhile, the method is also a universal method, as long as the crosstalk detection model is trained, when a new PCB needs to be subjected to crosstalk detection, the corresponding data is obtained, and the model is input to obtain the crosstalk detection result.

The Embedding layer may be an Embedding layer (a word vector layer or a word Embedding layer), which implements dimension reduction of matrix data through some matrix multiplication, and may directly regard the network matrix of each network as a vector matrix after Embedding.

The fully-connected layer means that each node is connected with all nodes of the previous layer to integrate the extracted features, and because of the fully-connected characteristic, the parameters of the fully-connected layer are the most, so that the data such as a matrix are converted into fixed data such as 0 or 1.

Specifically, model training data and model testing data are input into an initial crosstalk prediction model corresponding to the historical circuit board, an initial crosstalk value is output, and then a target crosstalk prediction model is generated according to a comparison result of the initial crosstalk value and a crosstalk reference value.

In an optional embodiment, if the comparison result between the initial crosstalk value and the crosstalk reference value is a numerical value which is consistent, the initial crosstalk prediction model is characterized to be trained successfully, and a target crosstalk prediction model is generated, and if the crosstalk reference value is 1 and the initial crosstalk value is also 1, the training is successful.

In another optional embodiment, if the comparison result of the initial crosstalk value and the crosstalk reference value is that the values are not consistent, if the crosstalk reference value is 1 and the initial crosstalk value is 0, it indicates that the training fails, the initial crosstalk prediction model is characterized to fail to train, and the initial crosstalk prediction model is subjected to iterative processing and parameter updating processing, if the data in the historical network data set is adjusted, so that the initial crosstalk value can be output as 1, until the comparison result of the initial crosstalk value and the crosstalk reference value is that the values are consistent, the training succeeds, a target crosstalk prediction model is generated, and the trained target crosstalk prediction model is not only suitable for the crosstalk prediction of a large-sized PCB, but also greatly improves the prediction accuracy.

It should be noted that the embodiment of the present invention includes but is not limited to the above examples, and it is understood that, under the guidance of the idea of the embodiment of the present invention, a person skilled in the art can set the method according to practical situations, and the present invention is not limited to this.

In the embodiment of the invention, the predicted circuit board data, the predicted network information and the predicted network information corresponding to the circuit board to be predicted are obtained, the predicted circuit board data at least comprises predicted hardware parameter information and a predicted network data set corresponding to the predicted hardware parameter information, the predicted network matrix corresponding to the circuit board to be predicted is built by adopting the predicted network data set, the predicted hardware parameter information and the predicted network information, the predicted network matrix is normalized according to the predicted hardware parameter information to obtain model input data, the model input data is input to a target crosstalk prediction model corresponding to the circuit board to be predicted, the predicted crosstalk value of the circuit board to be predicted is output, the predicted hardware parameter information of the circuit board to be predicted and the predicted network data set corresponding to the predicted hardware parameter information are obtained, so that depth prediction is carried out according to the self information of the circuit board to be predicted, the predicted crosstalk value reliability can be increased by analyzing the whole network information through obtaining the predicted network information corresponding to the circuit board to be predicted, the predicted network matrix corresponding to the circuit board to be predicted is built by adopting the predicted network data set, the predicted hardware parameter information and the predicted network information, a large amount of predicted circuit board data are summarized to the same matrix, crosstalk of the predicted circuit board to be estimated, the predicted network matrix corresponding to the predicted circuit board to be predicted, the predicted network crosstalk value of the circuit board to be predicted is comprehensively, the predicted circuit board to be predicted, the predicted network matrix is comprehensively estimated, and the predicted network data of the predicted circuit board to be more quickly input, and the predicted circuit board, and the predicted network model, and the predicted circuit board can be predicted, and the predicted circuit board can be more quickly input accuracy of the predicted circuit board can be predicted.

It should be noted that, for simplicity of description, the method embodiments are described as a series of acts or combination of acts, but those skilled in the art will recognize that the present invention is not limited by the illustrated order of acts, as some steps may occur in other orders or concurrently in accordance with the embodiments of the present invention. Further, those skilled in the art will appreciate that the embodiments described in the specification are presently preferred and that no particular act is required to implement the invention.

Referring to fig. 5, a block diagram of a crosstalk prediction apparatus for a circuit board provided in an embodiment of the present invention is shown, and specifically, the crosstalk prediction apparatus may include the following modules:

a predicted circuit board data obtaining module 501, configured to obtain predicted circuit board data and predicted network information corresponding to a circuit board to be predicted, where the predicted circuit board data at least includes predicted hardware parameter information and a predicted network data set corresponding to the predicted hardware parameter information;

a prediction network matrix constructing module 502, configured to construct a prediction network matrix for the circuit board to be predicted by using the prediction network data set, the prediction hardware parameter information, and the prediction network information;

a model input data obtaining module 503, configured to perform normalization processing on the prediction network matrix according to the prediction hardware parameter information, so as to obtain model input data;

and a predicted crosstalk value output module 504, configured to input the model input data to a target crosstalk prediction model corresponding to the circuit board to be predicted, and output a predicted crosstalk value of the circuit board to be predicted.

In an optional embodiment, the predicted network data set includes a predicted connection line data set, the predicted hardware parameter information includes a start coordinate, an end coordinate, width data, line spacing data corresponding to a network connection line of the circuit board to be predicted, and hierarchical information to which the network connection line belongs, and the predicted circuit board data obtaining module 501 includes:

In an optional embodiment, the circuit board to be predicted further includes a passive device, the predicted network data set includes a predicted pin data set, the predicted pin data set includes a first predicted pin data set corresponding to the passive device, and the predicted circuit board data obtaining module 501 includes:

and the first prediction pin data set acquisition submodule is used for combining the resistance data, the capacitance data and the voltage data to obtain a first prediction pin data set.

In an alternative embodiment, the first predicted pin data set obtaining sub-module includes:

In an optional embodiment, the average parameter obtaining unit is specifically configured to:

In an optional embodiment, the circuit board to be predicted further includes an active device, the active device includes a first active device corresponding to the start point coordinate, the predicted pin data set includes a second predicted pin data set corresponding to the first active device, and the predicted circuit board data obtaining module 501 is specifically configured to:

acquiring the input capacitance and the rise time of the first active device;

In an alternative embodiment, the active device includes a second active device corresponding to the endpoint coordinate, the predicted pin data set includes a third predicted pin data set corresponding to the second active device, and the predicted circuit board data obtaining module 501 is specifically configured to:

acquiring the output impedance and the fall time of the second active device;

and combining the end point coordinate, the output impedance and the falling time to obtain the third prediction pin data set.

In an optional embodiment, the predicted hardware parameter information further includes board layer data of the circuit board to be predicted, where the board layer data at least includes a circuit board size, a number of layers, and a circuit board thickness, and the predicted circuit board data obtaining module 501 is specifically configured to:

In an optional embodiment, the predicted hardware parameter information further includes the number of pins of the circuit board to be predicted, and the predicted circuit board data obtaining module 501 is specifically configured to:

In an alternative embodiment, the predicted network information includes the number of networks of the network connection lines, and the predicted network matrix building module 502 includes:

In an optional embodiment, the network matrix generation submodule is specifically configured to:

In an alternative embodiment, the circuit board size includes a width value and a height value of the circuit board, and the root model input data obtaining module 503 includes:

In an alternative embodiment, the model input data obtaining sub-module is specifically configured to:

In an alternative embodiment, the target crosstalk prediction model is generated by:

the historical circuit board data acquisition module is used for acquiring historical circuit board data, a crosstalk reference value and an initial crosstalk prediction model corresponding to a plurality of historical circuit boards, wherein the historical circuit board data at least comprises a historical network data set and historical hardware parameter information, the historical circuit board comprises at least one historical network connecting line, the historical network connecting line comprises historical network information, and the crosstalk reference value is used for judging whether the initial crosstalk prediction model is trained successfully or not;

In an alternative embodiment, the initial crosstalk prediction model is constructed by the following modules, including:

In an optional embodiment, the target crosstalk prediction model generation module includes:

In an optional embodiment, the target crosstalk prediction model generation submodule is specifically configured to:

In an optional embodiment, the target crosstalk prediction model generation sub-module is specifically configured to:

if the comparison result of the initial crosstalk value and the crosstalk reference value is not consistent, representing that the training of the initial crosstalk prediction model fails, and performing iterative processing and parameter updating processing on the initial crosstalk prediction model until the comparison result of the initial crosstalk value and the crosstalk reference value is consistent, successfully training, and generating the target crosstalk prediction model.

For the device embodiment, since it is basically similar to the method embodiment, the description is simple, and for the relevant points, refer to the partial description of the method embodiment.

In addition, an embodiment of the present invention further provides an electronic device, including: the processor, the memory, and the computer program stored in the memory and capable of running on the processor, when executed by the processor, implement each process of the crosstalk prediction method embodiment of the circuit board, and can achieve the same technical effect, and are not described herein again to avoid repetition.

The embodiment of the present invention further provides a computer-readable storage medium, where a computer program is stored, and when the computer program is executed by a processor, the computer program implements each process of the embodiment of the crosstalk prediction method for a circuit board, and can achieve the same technical effect, and in order to avoid repetition, details are not repeated here. The computer-readable storage medium may be a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk.

Fig. 6 is a block diagram of an electronic device implementing various embodiments of the invention.

The electronic device 600 includes, but is not limited to: a radio frequency unit 601, a network module 602, an audio output unit 603, an input unit 604, a sensor 605, a display unit 606, a user input unit 607, an interface unit 608, a memory 609, a processor 610, and a power supply 611. Those skilled in the art will appreciate that the electronic device configuration shown in fig. 6 does not constitute a limitation of the electronic device, and that the electronic device may include more or fewer components than shown, or some components may be combined, or a different arrangement of components. In the embodiment of the present invention, the electronic device includes, but is not limited to, a mobile phone, a tablet computer, a notebook computer, a palm computer, a vehicle-mounted terminal, a wearable device, a pedometer, and the like.

It should be understood that, in the embodiment of the present invention, the radio frequency unit 601 may be used for receiving and sending signals during a message sending and receiving process or a call process, and specifically, receives downlink data from a base station and then processes the received downlink data to the processor 610; in addition, the uplink data is transmitted to the base station. In general, radio frequency unit 601 includes, but is not limited to, an antenna, at least one amplifier, a transceiver, a coupler, a low noise amplifier, a duplexer, and the like. Further, the radio frequency unit 601 may also communicate with a network and other devices through a wireless communication system.

The electronic device provides wireless broadband internet access to the user via the network module 602, such as assisting the user in sending and receiving e-mails, browsing web pages, and accessing streaming media.

The audio output unit 603 may convert audio data received by the radio frequency unit 601 or the network module 602 or stored in the memory 609 into an audio signal and output as sound. Also, the audio output unit 603 may also provide audio output related to a specific function performed by the electronic apparatus 600 (e.g., a call signal reception sound, a message reception sound, etc.). The audio output unit 603 includes a speaker, a buzzer, a receiver, and the like.

The input unit 604 is used to receive audio or video signals. The input Unit 604 may include a Graphics Processing Unit (GPU) 6041 and a microphone 6042, and the graphics processor 6041 processes image data of a still picture or video obtained by an image capturing apparatus (such as a camera) in a video capture mode or an image capture mode. The processed image frames may be displayed on the display unit 606. The image frames processed by the graphic processor 6041 may be stored in the memory 609 (or other storage medium) or transmitted via the radio frequency unit 601 or the network module 602. The microphone 6042 can receive sound, and can process such sound into audio data. The processed audio data may be converted into a format output transmittable to a mobile communication base station via the radio frequency unit 601 in case of the phone call mode.

The electronic device 600 also includes at least one sensor 605, such as a light sensor, motion sensor, and other sensors. Specifically, the light sensor includes an ambient light sensor that can adjust the brightness of the display panel 6061 according to the brightness of ambient light, and a proximity sensor that can turn off the display panel 6061 and/or the backlight when the electronic apparatus 600 is moved to the ear. As one type of motion sensor, an accelerometer sensor can detect the magnitude of acceleration in each direction (generally three axes), detect the magnitude and direction of gravity when stationary, and can be used to identify the posture of an electronic device (such as horizontal and vertical screen switching, related games, magnetometer posture calibration), and vibration identification related functions (such as pedometer, tapping); the sensors 605 may also include fingerprint sensors, pressure sensors, iris sensors, molecular sensors, gyroscopes, barometers, hygrometers, thermometers, infrared sensors, etc., which are not described in detail herein.

The display unit 606 is used to display information input by the user or information provided to the user. The display unit 606 may include a display panel 6061, and the display panel 6061 may be configured by a Liquid Crystal Display (LCD), an organic light-Emitting Diode (OLED), or the like.

The user input unit 607 may be used to receive input numeric or character information and generate key signal inputs related to user settings and function control of the electronic device. Specifically, the user input unit 607 includes a touch panel 6071 and other input devices 6072. Touch panel 6071, also referred to as a touch screen, may collect touch operations by a user on or near it (e.g., operations by a user on or near touch panel 6071 using a finger, stylus, or any suitable object or accessory). The touch panel 6071 may include two parts of a touch detection device and a touch controller. The touch detection device detects the touch direction of a user, detects a signal brought by touch operation and transmits the signal to the touch controller; the touch controller receives touch information from the touch sensing device, converts the touch information into touch point coordinates, sends the touch point coordinates to the processor 610, receives a command from the processor 610, and executes the command. In addition, the touch panel 6071 can be implemented by various types such as a resistive type, a capacitive type, an infrared ray, and a surface acoustic wave. The user input unit 607 may include other input devices 6072 in addition to the touch panel 6071. Specifically, the other input devices 6072 may include, but are not limited to, a physical keyboard, function keys (such as volume control keys, switch keys, etc.), a track ball, a mouse, and a joystick, which are not described herein again.

Further, the touch panel 6071 can be overlaid on the display panel 6061, and when the touch panel 6071 detects a touch operation on or near the touch panel 6071, the touch operation is transmitted to the processor 610 to determine the type of the touch event, and then the processor 610 provides a corresponding visual output on the display panel 6061 according to the type of the touch event. Although the touch panel 6071 and the display panel 6061 are shown in fig. 6 as two separate components to implement the input and output functions of the electronic device, in some embodiments, the touch panel 6071 and the display panel 6061 may be integrated to implement the input and output functions of the electronic device, and this is not limited here.

The interface unit 608 is an interface for connecting an external device to the electronic apparatus 600. For example, the external device may include a wired or wireless headset port, an external power supply (or battery charger) port, a wired or wireless data port, a memory card port, a port for connecting a device having an identification module, an audio input/output (I/O) port, a video I/O port, an earphone port, and the like. The interface unit 608 may be used to receive input (e.g., data information, power, etc.) from external devices and transmit the received input to one or more elements within the electronic device 600 or may be used to transmit data between the electronic device 600 and external devices.

The memory 609 may be used to store software programs as well as various data. The memory 609 may mainly include a program storage area and a data storage area, wherein the program storage area may store an operating system, an application program required by at least one function (such as a sound playing function, an image playing function, etc.), and the like; the storage data area may store data (such as audio data, a phonebook, etc.) created according to the use of the cellular phone, etc. Further, the memory 609 may include high speed random access memory, and may also include non-volatile memory, such as at least one magnetic disk storage device, flash memory device, or other volatile solid state storage device.

The processor 610 is a control center of the electronic device, connects various parts of the entire electronic device using various interfaces and lines, performs various functions of the electronic device and processes data by operating or executing software programs and/or modules stored in the memory 609, and calling data stored in the memory 609, thereby integrally monitoring the electronic device. Processor 610 may include one or more processing units; preferably, the processor 610 may integrate an application processor, which mainly handles operating systems, user interfaces, application programs, etc., and a modem processor, which mainly handles wireless communications. It will be appreciated that the modem processor described above may not be integrated into the processor 610.

The electronic device 600 may further include a power supply 611 (e.g., a battery) for supplying power to the various components, and preferably, the power supply 611 may be logically connected to the processor 610 via a power management system, such that the power management system may be used to manage charging, discharging, and power consumption.

In addition, the electronic device 600 includes some functional modules that are not shown, and are not described in detail herein.

It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising a … …" does not exclude the presence of another identical element in a process, method, article, or apparatus that comprises the element.

Through the above description of the embodiments, those skilled in the art will clearly understand that the method of the above embodiments can be implemented by software plus a necessary general hardware platform, and certainly can also be implemented by hardware, but in many cases, the former is a better implementation manner. Based on such understanding, the technical solutions of the present invention may be embodied in the form of a software product, which is stored in a storage medium (such as ROM/RAM, magnetic disk, optical disk) and includes instructions for enabling a terminal (such as a mobile phone, a computer, a server, an air conditioner, or a network device) to execute the method according to the embodiments of the present invention.

While the present invention has been described with reference to the particular illustrative embodiments, it is to be understood that the invention is not limited to the disclosed embodiments, but is intended to cover various modifications, equivalent arrangements, and equivalents thereof, which may be made by those skilled in the art without departing from the spirit and scope of the invention as defined by the appended claims.

Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.

It is clear to those skilled in the art that, for convenience and brevity of description, the specific working processes of the above-described systems, apparatuses and units may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.

In the embodiments provided in the present application, it should be understood that the disclosed apparatus and method may be implemented in other ways. For example, the above-described apparatus embodiments are merely illustrative, and for example, the division of the units is only one logical division, and other divisions may be realized in practice, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.

The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.

In addition, functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit.

The functions may be stored in a computer-readable storage medium if they are implemented in the form of software functional units and sold or used as separate products. Based on such understanding, the technical solution of the present invention may be embodied in the form of a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: various media capable of storing program codes, such as a U disk, a removable hard disk, a ROM, a RAM, a magnetic disk, or an optical disk.

The above description is only for the specific embodiments of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present invention, and all the changes or substitutions should be covered within the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.

Claims

1. A method for predicting crosstalk of a circuit board, the method comprising:

acquiring predicted circuit board data and predicted network information corresponding to a circuit board to be predicted, wherein the predicted circuit board data at least comprises predicted hardware parameter information and a predicted network data set corresponding to the predicted hardware parameter information;

2. The method according to claim 1, wherein the predicted network data set comprises a predicted connecting line data set, the predicted hardware parameter information comprises start coordinates, end coordinates, width data, line spacing data and hierarchy information to which the network connecting lines of the circuit board to be predicted belong, and the obtaining of the predicted circuit board data corresponding to the circuit board to be predicted comprises:

3. The method of claim 2, wherein the circuit board to be predicted further comprises a passive device, wherein the predicted network data set comprises a predicted pin data set comprising a first predicted pin data set corresponding to the passive device, and wherein obtaining predicted circuit board data corresponding to the circuit board to be predicted comprises:

4. The method of claim 3, wherein combining the resistance data, the capacitance data, and the voltage data to obtain the first predicted pin data set comprises:

5. The method of claim 4, wherein the performing a weighted average process on the resistance data, the capacitance data, and the voltage data to obtain an average resistance data, an average capacitance data, and an average voltage data for the circuit board comprises:

6. The method of claim 3, wherein the circuit board to be predicted further comprises an active device, the active device comprises a first active device corresponding to the start coordinate, the predicted pin data set comprises a second predicted pin data set corresponding to the first active device, and the obtaining predicted circuit board data corresponding to the circuit board to be predicted comprises:

acquiring the input capacitance and the rise time of the first active device;

7. The method of claim 6, wherein the active device comprises a second active device corresponding to the endpoint coordinates, wherein the predicted pin data set comprises a third predicted pin data set corresponding to the second active device, and wherein obtaining predicted circuit board data corresponding to a circuit board to be predicted comprises:

acquiring the output impedance and the fall time of the second active device;

the output impedance combines the end point coordinate, the output impedance, and the fall time to obtain the third predicted pin data set.

8. The method according to claim 2, wherein the predicted hardware parameter information further includes board layer data of the circuit board to be predicted, the board layer data at least includes a circuit board size, a number of layers, and a circuit board thickness, and the obtaining of the predicted circuit board data corresponding to the circuit board to be predicted includes:

and respectively obtaining the circuit board size, the level number and the circuit board thickness corresponding to the circuit board to be predicted.

9. The method according to claim 8, wherein the predicted hardware parameter information further includes a pin number of the circuit board to be predicted, and the obtaining predicted circuit board data corresponding to the circuit board to be predicted includes:

10. The method of claim 9, wherein the predicted network information comprises a network number of the network connection lines, and wherein constructing a predicted network matrix for the circuit board to be predicted using the predicted network data set, the predicted hardware parameter information, and the predicted network information comprises:

11. The method of claim 10, wherein associating the target pin number, the net number, and the data structure to generate a net matrix for the circuit board comprises:

12. The method of claim 11, wherein the circuit board dimensions include width and height values of the circuit board, and wherein normalizing the prediction network matrix according to the predicted hardware parameter information to obtain model input data comprises:

13. The method of claim 12, wherein the normalizing the predicted network matrix according to the predicted hardware parameter information to obtain model input data comprises:

14. The method of claim 1, wherein the target crosstalk prediction model is generated by:

15. The method of claim 14, wherein the initial crosstalk prediction model is constructed by:

16. The method of claim 14, wherein the training an initial crosstalk prediction model corresponding to the historical circuit board using the crosstalk reference value, the model training data, and the model test data to generate a target crosstalk prediction model comprises:

17. The method of claim 16, wherein generating the target crosstalk prediction model according to the comparison of the initial crosstalk value and the crosstalk reference value comprises:

18. The method of claim 16, wherein generating the target crosstalk prediction model according to the comparison of the initial crosstalk value and the crosstalk reference value comprises:

19. An apparatus for predicting crosstalk of a circuit board, the apparatus comprising:

20. An electronic device, comprising a processor, a communication interface, a memory and a communication bus, wherein the processor, the communication interface and the memory communicate with each other via the communication bus;

the memory is used for storing a computer program;

the processor, when executing a program stored on the memory, implementing the method of any of claims 1-18.

21. A computer-readable storage medium having stored thereon instructions, which when executed by one or more processors, cause the processors to perform the method of any one of claims 1-18.