CN115816261A - Silicon wafer processing method and device - Google Patents
Silicon wafer processing method and device Download PDFInfo
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- CN115816261A CN115816261A CN202211597468.4A CN202211597468A CN115816261A CN 115816261 A CN115816261 A CN 115816261A CN 202211597468 A CN202211597468 A CN 202211597468A CN 115816261 A CN115816261 A CN 115816261A
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 276
- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 276
- 239000010703 silicon Substances 0.000 title claims abstract description 276
- 238000003672 processing method Methods 0.000 title claims abstract description 13
- 238000007689 inspection Methods 0.000 claims abstract description 84
- 238000005498 polishing Methods 0.000 claims abstract description 67
- 235000012431 wafers Nutrition 0.000 claims description 266
- 238000004140 cleaning Methods 0.000 claims description 25
- 238000000034 method Methods 0.000 claims description 18
- 239000002699 waste material Substances 0.000 claims description 10
- 238000004519 manufacturing process Methods 0.000 abstract description 2
- 239000004065 semiconductor Substances 0.000 abstract description 2
- 239000002245 particle Substances 0.000 description 7
- 238000006748 scratching Methods 0.000 description 6
- 230000002393 scratching effect Effects 0.000 description 6
- 230000002159 abnormal effect Effects 0.000 description 3
- 230000002411 adverse Effects 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000001514 detection method Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 238000006467 substitution reaction Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 230000000750 progressive effect Effects 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Abstract
The invention provides a silicon wafer processing method and device, and belongs to the technical field of semiconductor manufacturing. The silicon wafer processing method comprises the following steps: a scratch inspection step, which is used for carrying out scratch inspection on the silicon wafer with qualified flatness inspection and judging whether the silicon wafer is scratched or not; a scratch depth obtaining step, which is used for obtaining the scratch depth of the silicon wafer if the silicon wafer is scratched; a processing step, which is used for determining a processing mode of the silicon wafer according to the scratch depth of the silicon wafer, wherein the processing mode comprises any one of the following steps: and reworking and polishing the double surfaces, reworking and polishing the single surface, and judging the silicon wafer to be unqualified. The technical scheme of the invention can effectively reduce useless rework and improve the rework efficiency.
Description
Technical Field
The invention relates to the technical field of semiconductor manufacturing, in particular to a silicon wafer processing method and device.
Background
With the higher integration level of integrated circuits, the characteristic line width of the integrated circuits is continuously reduced, which reflects that the requirements on a clean area are more and more strict on raw material monocrystalline silicon, and the defects such as scratches and the like have zero requirements.
At present, the existence of defects such as scratches and the like of a polished silicon wafer is checked through equipment. If the silicon wafer is scratched, double-side polishing and reworking repair are carried out no matter the length and the depth of the scratch, the steps of single-side final polishing, cleaning and the like are carried out after double-side polishing, and then whether rework is successful or not is checked and confirmed again. Due to the limitation of the thickness of the silicon wafer, the double-side polishing can be carried out for 2 times at most, the thickness of the silicon wafer is lower than the thickness required by a customer after the double-side polishing is carried out for 2 times, and the silicon wafer can be only scrapped. The repeated reworking can not improve the yield of the silicon wafer, but can cause adverse effect on the quality of the silicon wafer, so that the surface of the silicon wafer is seriously corroded and is uneven.
Disclosure of Invention
In order to solve the above technical problems, the present invention provides a silicon wafer processing method and apparatus, which can effectively reduce useless rework and improve rework efficiency.
In order to achieve the above purpose, the embodiment of the invention adopts the following technical scheme:
a method of processing a silicon wafer, comprising:
a scratch inspection step, which is used for carrying out scratch inspection on the silicon wafer with qualified flatness inspection and judging whether the silicon wafer is scratched or not;
a scratch depth obtaining step, which is used for obtaining the scratch depth of the silicon wafer if the silicon wafer is scratched;
a processing step, which is used for determining a processing mode of the silicon wafer according to the scratch depth of the silicon wafer, wherein the processing mode comprises any one of the following steps: and reworking and polishing the double surfaces, reworking and polishing the single surface, and judging the silicon wafer to be unqualified.
In some embodiments, the processing step comprises:
when the scratch depth of the silicon wafer is larger than a first value, judging the silicon wafer to be an unqualified silicon wafer;
when the scratch depth of the silicon wafer is larger than a second value and is smaller than or equal to the first value, performing rework and double-side polishing on the silicon wafer;
and when the scratch depth of the silicon wafer is greater than a third value and less than or equal to the second value, polishing the reworked single surface of the silicon wafer.
In some embodiments, after the reworking double-side polishing the silicon wafer, the method further comprises:
and polishing the reworked single surface of the silicon wafer.
In some embodiments, after the reworking single-side polishing of the silicon wafer, the method further comprises:
and cleaning the silicon wafer.
In some embodiments, after the cleaning the silicon wafer, the method further comprises:
carrying out flatness inspection and thickness inspection on the silicon wafer;
returning to the scratch inspection step for the silicon wafers qualified in flatness inspection and thickness inspection;
and judging the silicon wafers with unqualified flatness inspection and thickness inspection as reported wastes.
An embodiment of the present invention further provides a silicon wafer processing apparatus, including:
the scratch inspection module is used for carrying out scratch inspection on the silicon wafer qualified in flatness inspection and judging whether the silicon wafer is scratched or not;
the scratch depth acquisition module is used for acquiring the scratch depth of the silicon wafer if the silicon wafer is scratched;
the processing module is used for determining a processing mode of the silicon wafer according to the scratch depth of the silicon wafer, and the processing mode comprises any one of the following modes: and reworking and polishing the double surfaces, reworking and polishing the single surface, and judging the silicon wafer to be unqualified.
In some embodiments, the processing module is specifically configured to:
when the scratch depth of the silicon wafer is larger than a first value, judging the silicon wafer to be an unqualified silicon wafer;
when the scratch depth of the silicon wafer is larger than a second value and is smaller than or equal to the first value, performing rework and double-side polishing on the silicon wafer;
and when the scratch depth of the silicon wafer is greater than a third value and less than or equal to the second value, polishing the reworked single surface of the silicon wafer.
In some embodiments, the processing module is further configured to perform a single-side polishing on the reworked silicon wafer after the double-side polishing on the reworked silicon wafer.
In some embodiments, the apparatus further comprises:
and the cleaning module is used for cleaning the silicon wafer after the reworking single-side polishing of the silicon wafer.
In some embodiments, the apparatus further comprises:
the flatness and thickness inspection module is used for carrying out flatness inspection and thickness inspection on the silicon wafer; and turning to the scratch inspection module to process the silicon wafers qualified in flatness inspection and thickness inspection, and judging the silicon wafers unqualified in flatness inspection and thickness inspection as waste products.
The invention has the beneficial effects that:
in the embodiment, the silicon wafer qualified in flatness inspection is scratched, whether the silicon wafer is scratched or not is judged, and if the silicon wafer is scratched, the processing mode of the silicon wafer is determined according to the scratching depth of the silicon wafer, so that different types of rework modes can be accurately selected according to the scratching depth of the silicon wafer, and useless rework can be effectively reduced, and the rework efficiency is improved; in addition, because useless reworking is avoided, the potential risk caused by repeated reworking can be reduced, and the yield of the silicon wafer is improved.
Drawings
FIG. 1 is a schematic flow chart of a silicon wafer processing method according to an embodiment of the present invention;
FIG. 2 is a schematic flow chart illustrating the processing of a silicon wafer according to an embodiment of the present invention;
FIG. 3 is a block diagram showing a silicon wafer processing apparatus according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the drawings of the embodiments of the present invention. It is to be understood that the embodiments described are only a few embodiments of the present invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the described embodiments of the invention, are within the scope of the invention.
In the related technology, the scratch depth of the silicon wafer cannot be determined, if the silicon wafer is scratched, the silicon wafer can only be subjected to unified rework no matter the scratch length and depth, and a rework mode cannot be selected, so that a lot of useless reworking is increased, the quality of the silicon wafer can be adversely affected by repeated reworking, and the yield of the silicon wafer is reduced.
The invention provides a silicon wafer processing method and device, which can effectively reduce useless rework and improve rework efficiency.
An embodiment of the present invention provides a silicon wafer processing method, as shown in fig. 1, including:
a scratch inspection step 101, which is used for performing scratch inspection on the silicon wafer with qualified flatness inspection, and judging whether the silicon wafer has scratches or not;
a scratch depth obtaining step 102, configured to obtain a scratch depth of the silicon wafer if the silicon wafer is scratched;
a processing step 103, configured to determine a processing mode of the silicon wafer according to the scratch depth of the silicon wafer, where the processing mode includes any one of: and reworking and polishing the double surfaces, reworking and polishing the single surface, and judging the silicon wafer to be unqualified.
In the embodiment, the silicon wafer qualified in flatness inspection is scratched, whether the silicon wafer is scratched or not is judged, and if the silicon wafer is scratched, the processing mode of the silicon wafer is determined according to the scratching depth of the silicon wafer, so that different types of rework modes can be accurately selected according to the scratching depth of the silicon wafer, and useless rework can be effectively reduced, and the rework efficiency is improved; in addition, because useless reworking is avoided, the potential risk caused by repeated reworking can be reduced, and the yield of the silicon wafer is improved.
In this embodiment, the Scratch depth of the silicon wafer can be obtained through Scratch detection equipment (the Scratch depth can be measured through a 3D measuring microscope, and the precision can reach nm level), the silicon wafer is polished on one side by single-side polishing equipment, and the silicon wafer is polished on two sides by double-side polishing equipment.
In some embodiments, the processing step comprises:
when the scratch depth of the silicon wafer is larger than a first value, judging the silicon wafer to be an unqualified silicon wafer;
when the scratch depth of the silicon wafer is larger than a second value and is smaller than or equal to the first value, performing rework and double-side polishing on the silicon wafer;
and when the scratch depth of the silicon wafer is greater than a third value and less than or equal to the second value, polishing the reworked single surface of the silicon wafer.
In some embodiments, the first value may be 3-5 μm, the second value may be 100-200nm, and the third value may be 0.
In the embodiment, when the scratch depth of the silicon wafer is larger than a first value, for example, the silicon wafer is directly judged to be an unqualified silicon wafer, rework is not performed on the silicon wafer, and useless rework can be avoided; when the scratch depth of the silicon wafer is smaller, for example, smaller than a third value, the silicon wafer is directly polished on a single side, so that the influence of double-side polishing on the silicon wafer on the thickness of the silicon wafer is avoided; when the scratch depth of the silicon wafer is larger than the second value and is smaller than or equal to the first value, the silicon wafer is subjected to double-side polishing, so that different types of reworking are accurately selected according to the scratch depth of the silicon wafer
By the method, the polishing and cleaning times of the silicon wafer are reduced, and the problem of flatness 5 caused by multiple polishing of the silicon wafer and the abnormal silicon wafer particles caused by multiple cleaning are avoided; the yield of the silicon wafer is improved, and the capacity waste caused by multiple useless reworking is avoided.
In some embodiments, after the reworking double-side polishing the silicon wafer, the method further comprises:
and the reworked single surface of the silicon wafer is polished, so that the single surface polishing removal amount is less, and the bad effect of particles is better improved.
In some embodiments, after the reworking single-side polishing of the silicon wafer, the method further comprises: and 0, cleaning the silicon wafer. In the embodiment, the silicon wafer can be cleaned by using the cleaning equipment,
removing impurities such as particles and the like attached to the surface of the silicon wafer.
In some embodiments, after the cleaning the silicon wafer, the method further comprises:
carrying out flatness inspection and thickness inspection on the silicon wafer;
returning to the scratch inspection step for the silicon wafers qualified in flatness inspection and thickness inspection; and 5, judging the silicon wafer with unqualified flatness inspection and thickness inspection as a waste product.
In the embodiment, after the silicon wafer is cleaned, the flatness inspection and the thickness inspection are carried out on the silicon wafer again, so that the silicon wafer with unqualified flatness inspection and thickness inspection can be prevented from flowing into the subsequent process; and for the silicon wafer qualified in flatness inspection and thickness inspection, re-inspecting whether the surface of the silicon wafer is scratched or not, so that if the surface of the silicon wafer is scratched, the silicon wafer can be processed again to remove the scratch.
In a specific example, as shown in fig. 2, the processing of the silicon wafer includes the following steps:
step 1: after processing, finishing the silicon wafer with qualified flatness inspection, inspecting whether the surface of the silicon wafer is scratched or not, and judging the silicon wafer without scratches as the qualified silicon wafer; the scratched silicon wafer needs to be subjected to subsequent treatment;
step 2: measuring the scratch depth of the silicon wafer with the scratch on the surface, and if the scratch depth of the silicon wafer 5 is greater than a first value, judging the silicon wafer to be an unqualified silicon wafer; if the scratch depth of the silicon wafer is larger than a second value and is smaller than or equal to the first value, performing rework and double-side polishing on the silicon wafer; if the scratch depth of the silicon wafer is larger than a third value and is smaller than or equal to the second value, polishing the reworked single surface of the silicon wafer;
and step 3: carrying out single-side final polishing on the reworked silicon wafer with double polished surfaces, and then cleaning the silicon wafer by using cleaning equipment; cleaning the reworked single-side polished silicon wafer by directly using cleaning equipment;
and 4, step 4: measuring whether the flatness and the thickness of the reworked silicon wafer meet the requirements or not by using flatness measuring equipment, judging the silicon wafer to be a waste product if the thickness and the flatness do not meet the requirements, and carrying out scratch inspection again if the thickness and the flatness meet the requirements;
and 5: performing scratch inspection on the reworked silicon wafer, inspecting whether the surface of the silicon wafer is scratched or not, and judging the silicon wafer which is not scratched as a qualified silicon wafer; and (4) carrying out subsequent treatment on the scratched silicon wafer.
According to the method, different types of rework modes are accurately selected according to the scratch depth of the silicon wafer, so that the polishing and cleaning times of the silicon wafer are reduced, and the flatness problem caused by multiple polishing of the silicon wafer and the abnormal silicon wafer particles caused by multiple cleaning are avoided; the yield of the silicon wafer is improved, and the capacity waste caused by multiple useless reworking is avoided.
An embodiment of the present invention further provides a silicon wafer processing apparatus, as shown in fig. 3, including:
the scratch inspection module 21 is configured to perform scratch inspection on the silicon wafer qualified in flatness inspection, and determine whether the silicon wafer is scratched;
a scratch depth obtaining module 22, configured to obtain a scratch depth of the silicon wafer if the silicon wafer is scratched;
the processing module 23 is configured to determine a processing mode of the silicon wafer according to the scratch depth of the silicon wafer, where the processing mode includes any one of: and reworking and polishing two sides, reworking and polishing one side, and judging the silicon wafer to be unqualified.
In the embodiment, the silicon wafer qualified in flatness inspection is scratched, whether the silicon wafer is scratched or not is judged, and if the silicon wafer is scratched, the processing mode of the silicon wafer is determined according to the scratching depth of the silicon wafer, so that different types of rework modes can be accurately selected according to the scratching depth of the silicon wafer, and useless rework can be effectively reduced, and the rework efficiency is improved; in addition, as useless reworking is avoided, potential risks caused by repeated reworking can be reduced, and the yield of the silicon wafer is improved.
In this embodiment, the Scratch depth of the silicon wafer can be obtained through the Scratch detection device (the Scratch depth can be measured through a 3D measurement microscope, and the precision can reach nm level), the silicon wafer is polished on one side through the single-side polishing device, and the silicon wafer is polished on two sides through the double-side polishing device.
In some embodiments, the processing module 23 is specifically configured to:
when the scratch depth of the silicon wafer is larger than a first value, judging the silicon wafer to be an unqualified silicon wafer;
when the scratch depth of the silicon wafer is larger than a second value and is smaller than or equal to the first value, performing rework and double-side polishing on the silicon wafer;
and when the scratch depth of the silicon wafer is greater than a third value and less than or equal to the second value, polishing the reworked single surface of the silicon wafer.
In some embodiments, the first value may be 3-5 μm, the second value may be 100-200nm, and the third value may be 0.
In the embodiment, when the scratch depth of the silicon wafer is larger than a first value, for example, the silicon wafer is directly judged to be an unqualified silicon wafer, rework is not performed on the silicon wafer, and useless rework can be avoided; when the scratch depth of the silicon wafer is smaller, for example, smaller than a third value, the silicon wafer is directly polished on a single side, so that the influence of double-side polishing on the silicon wafer on the thickness of the silicon wafer is avoided; when the scratch depth of the silicon wafer is greater than the second value and is less than or equal to the first value, double-side polishing is carried out on the silicon wafer, so that different types of rework modes are accurately selected according to the scratch depth of the silicon wafer, the polishing and cleaning times of the silicon wafer are reduced, and the flatness problem caused by multiple polishing of the silicon wafer and the abnormal silicon wafer particles caused by multiple cleaning are avoided; the yield of the silicon wafer is improved, and the capacity waste caused by multiple useless reworking is avoided.
In some embodiments, the processing module 23 is further configured to perform single-side polishing on the reworked silicon wafer after the double-side polishing of the reworked silicon wafer is performed, where the single-side polishing removal amount is small, and the bad improvement on the particles is good.
In some embodiments, the apparatus further comprises:
and the cleaning module is used for cleaning the silicon wafer after the reworking single-side polishing of the silicon wafer. In this embodiment, the silicon wafer may be cleaned by a cleaning device to remove impurities such as particles attached to the surface of the silicon wafer.
In some embodiments, the apparatus further comprises:
the flatness and thickness inspection module is used for carrying out flatness inspection and thickness inspection on the silicon wafer; and turning to the scratch inspection module to process the silicon wafers qualified in flatness inspection and thickness inspection, and judging the silicon wafers unqualified in flatness inspection and thickness inspection as reported wastes.
In the embodiment, after the silicon wafer is cleaned, the flatness inspection and the thickness inspection are carried out on the silicon wafer again, so that the silicon wafer with unqualified flatness inspection and thickness inspection can be prevented from flowing into the subsequent process; and for the silicon wafer which is qualified in flatness inspection and thickness inspection, whether the surface of the silicon wafer is scratched or not is inspected again, so that if the surface of the silicon wafer is scratched, the silicon wafer can be processed again to remove the scratch.
It should be noted that, in the present specification, all the embodiments are described in a progressive manner, and the same and similar parts among the embodiments are referred to each other, and each embodiment focuses on the differences from the other embodiments. In particular, for the embodiments, since they are substantially similar to the product embodiments, the description is simple, and reference may be made to the partial description of the product embodiments for relevant points.
Unless otherwise defined, technical or scientific terms used herein shall have the ordinary meaning as understood by one of ordinary skill in the art to which this disclosure belongs. The use of "first," "second," and similar terms in this disclosure is not intended to indicate any order, quantity, or importance, but rather is used to distinguish one element from another. The word "comprising" or "comprises", and the like, means that the element or item preceding the word comprises the element or item listed after the word and its equivalent, but does not exclude other elements or items. The terms "connected" or "coupled" and the like are not restricted to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "upper", "lower", "left", "right", and the like are used merely to indicate relative positional relationships, and when the absolute position of the object being described is changed, the relative positional relationships may also be changed accordingly.
It will be understood that when an element such as a layer, film, region, or substrate is referred to as being "on" or "under" another element, it can be "directly on" or "under" the other element or intervening elements may be present.
In the foregoing description of embodiments, the particular features, structures, materials, or characteristics may be combined in any suitable manner in any one or more embodiments or examples.
The above description is only for the specific embodiments of the present disclosure, but the scope of the present disclosure is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present disclosure, and all the changes or substitutions should be covered within the scope of the present disclosure. Therefore, the protection scope of the present disclosure shall be subject to the protection scope of the claims.
Claims (10)
1. A silicon wafer processing method is characterized by comprising the following steps:
a scratch inspection step, which is to perform scratch inspection on the silicon wafer with qualified flatness inspection and judge whether the silicon wafer is scratched or not;
a scratch depth obtaining step, namely obtaining the scratch depth of the silicon wafer if the silicon wafer is scratched;
a processing step, namely determining a processing mode of the silicon wafer according to the scratch depth of the silicon wafer, wherein the processing mode comprises any one of the following steps: and reworking and polishing the double surfaces, reworking and polishing the single surface, and judging the silicon wafer to be unqualified.
2. The silicon wafer processing method according to claim 1, wherein the processing step comprises:
when the scratch depth of the silicon wafer is larger than a first value, judging the silicon wafer to be an unqualified silicon wafer;
when the scratch depth of the silicon wafer is greater than a second value and less than or equal to the first value, performing rework and double-side polishing on the silicon wafer;
and when the scratch depth of the silicon wafer is greater than a third value and less than or equal to the second value, polishing the reworked single surface of the silicon wafer.
3. The silicon wafer processing method according to claim 2, wherein after the reworking double-side polishing of the silicon wafer, the method further comprises:
and polishing the reworked single surface of the silicon wafer.
4. The silicon wafer processing method according to claim 2 or 3, wherein after the reworking single-side polishing of the silicon wafer, the method further comprises:
and cleaning the silicon wafer.
5. The method of claim 4, wherein after the cleaning the silicon wafer, the method further comprises:
carrying out flatness inspection and thickness inspection on the silicon wafer;
returning to the scratch inspection step for the silicon wafers qualified in flatness inspection and thickness inspection;
and judging the silicon wafers with unqualified flatness inspection and thickness inspection as reported wastes.
6. An apparatus for processing a silicon wafer, comprising:
the scratch inspection module is used for carrying out scratch inspection on the silicon wafer qualified in flatness inspection and judging whether the silicon wafer is scratched or not;
the scratch depth acquisition module is used for acquiring the scratch depth of the silicon wafer if the silicon wafer is scratched;
the processing module is used for determining a processing mode of the silicon wafer according to the scratch depth of the silicon wafer, and the processing mode comprises any one of the following modes: and reworking and polishing the double surfaces, reworking and polishing the single surface, and judging the silicon wafer to be unqualified.
7. The silicon wafer processing apparatus of claim 6, wherein the processing module is specifically configured to:
when the scratch depth of the silicon wafer is larger than a first value, judging the silicon wafer to be an unqualified silicon wafer;
when the scratch depth of the silicon wafer is larger than a second value and is smaller than or equal to the first value, performing rework and double-side polishing on the silicon wafer;
and when the scratch depth of the silicon wafer is greater than a third value and less than or equal to the second value, polishing the reworked single surface of the silicon wafer.
8. The silicon wafer processing apparatus according to claim 7,
the processing module is also used for polishing the reworked single surface of the silicon wafer after polishing the reworked double surfaces of the silicon wafer.
9. The silicon wafer processing apparatus according to claim 7 or 8, characterized in that the apparatus further comprises:
and the cleaning module is used for cleaning the silicon wafer after the reworking single-side polishing of the silicon wafer.
10. The silicon wafer processing apparatus as set forth in claim 9, further comprising:
the flatness and thickness inspection module is used for carrying out flatness inspection and thickness inspection on the silicon wafer; and turning to the scratch inspection module to process the silicon wafers qualified in flatness inspection and thickness inspection, and judging the silicon wafers unqualified in flatness inspection and thickness inspection as waste products.
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| CN202211597468.4A CN115816261A (en) | 2022-12-12 | 2022-12-12 | Silicon wafer processing method and device |
| TW112105540A TW202330166A (en) | 2022-12-12 | 2023-02-16 | Silicon wafer processing method and device |
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| CN202211597468.4A CN115816261A (en) | 2022-12-12 | 2022-12-12 | Silicon wafer processing method and device |
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| CN108818161A (en) * | 2018-07-24 | 2018-11-16 | 上海新昇半导体科技有限公司 | The rework system and method for silicon wafer |
| US20220326162A1 (en) * | 2021-04-12 | 2022-10-13 | Globalwafers Co., Ltd. | Wafer processing system and rework method thereof |
| CN114695643A (en) * | 2022-06-02 | 2022-07-01 | 天通控股股份有限公司 | Reworking method for poor back of lithium niobate single-side polished wafer |
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