CN115808356B - Chip testing method and chip testing equipment - Google Patents

Abstract

The embodiment of the application provides a chip testing method and chip testing equipment, which are applied to the technical field of testing. When the chip to be tested is placed on the positioning device, the positioning device calibrates the position and the flatness of the chip to be tested, after the calibration is completed, the loading device applies pressure to the chip to be tested, the strain testing device detects strain values corresponding to a plurality of test points in a reference area of the chip to be tested when the chip to be tested is broken, and the cracking area and the strength of the chip to be tested when the chip to be tested is broken are determined according to the strain values corresponding to the test points. Therefore, the position and the flatness of the chip to be tested are calibrated before the test, and the problems of deviation, warping and the like of the chip to be tested during the test are reduced; and the crack initiation area and the strength of the chip to be tested are detected by capturing strain values corresponding to a plurality of test points in the reference area of the chip to be tested, so that the stability and the accuracy of the test result of the chip to be tested are improved.

Description

Chip testing method and chip testing equipment

Technical Field

The present disclosure relates to the field of testing technologies, and in particular, to a chip testing method and a chip testing device.

Background

With the continuous development of electronic technology, light and thin electronic devices gradually become a trend of industry pursuit. As the thickness of electronic devices becomes thinner, the available design space for chips disposed on the internal motherboard becomes smaller, which results in the problem that the chips are prone to fracture under mechanical stress.

Therefore, in order to provide a chip meeting the strength requirement on the motherboard of the electronic device, the strength of the chip needs to be detected in advance. However, in the current detection mode, the intensity of the chip to be detected obtained by the detection has larger deviation, so that the stability and accuracy of the test result of the chip to be detected are poor.

Disclosure of Invention

The embodiment of the application provides a chip testing method and chip testing equipment, which can accurately and stably test and obtain the strength of a chip to be tested and a cracking area when the chip is cracked.

In a first aspect, an embodiment of the present application provides a chip testing method, which is applied to a chip testing device, where the chip testing device includes a positioning device, a loading device and a strain testing device, and the method includes: when the chip to be tested is placed on the positioning device, the positioning device calibrates the position and the flatness of the chip to be tested; after calibration is completed, the loading device applies pressure to the chip to be tested; when the strain testing device detects the fracture of the chip to be tested, strain values corresponding to a plurality of testing points in a reference area of the chip to be tested are obtained, and a pressure applying area is at least partially overlapped with the reference area when the loading device applies pressure on the chip to be tested; the strain testing device determines a cracking area and strength of the chip to be tested when the chip to be tested is cracked according to strain values corresponding to the plurality of testing points.

Therefore, before the chip to be tested is tested, the position and the flatness of the chip to be tested are calibrated, and the problems of deviation, tilting and the like of the chip to be tested during testing are solved, so that the stability and the accuracy of the test result of the chip to be tested are improved; in addition, the stress values corresponding to a plurality of test points in the reference area of the chip to be tested are captured, so that the cracking area and the strength of the chip to be tested when the chip to be tested is cracked can be accurately captured, and the real stress values of the cracking area can be obtained by testing different chips to be tested, thereby reducing the deviation of the strength test results of different chips to be tested; in addition, the embodiment of the application does not need to adopt the strain gauge to detect, so that the problem of strength reinforcement of the chip to be detected caused by the strain gauge is avoided, and the stability and accuracy of the test result of the chip to be detected are improved.

In one possible implementation, the positioning device includes an adjustable span support module, a horizontal calibration module, a vertical flattening module, and a positioning control module. When the chip to be tested is placed on the positioning device, the positioning device calibrates the position and the flatness of the chip to be tested, and the positioning device comprises: when the chip to be tested is placed on the adjustable span supporting module, the positioning control module controls the horizontal calibration module to move towards the first direction, and controls the vertical flattening module to move towards the second direction. The horizontal calibration module is used for driving the chip to be tested to move when moving towards a first direction, so that the position of the chip to be tested is calibrated, and the first direction is the horizontal direction from the horizontal calibration module to the chip to be tested; when the vertical flattening module moves towards the second direction, the vertical flattening module is used for applying pressure to the edge position of the chip to be tested, so that the flatness of the chip to be tested is calibrated, the second direction is the vertical direction from the vertical flattening module to the chip to be tested, and the first direction and the second direction are mutually perpendicular. Therefore, the horizontal calibration module and the vertical flattening module can be controlled to work through the positioning control module, so that the problems of no deflection, tilting and the like of the test gesture of the chip to be tested can be automatically controlled, and the intensity detection efficiency of the chip to be tested can be improved.

In one possible implementation, the adjustable span support module includes a first support stage and a second support stage disposed in parallel. Before the positioning device calibrates the position and the flatness of the chip to be tested, the method further comprises the following steps: the positioning control module controls the first support carrier and the second support carrier to move symmetrically by taking the center line of the equipment as the center. Wherein, the center line of the device is the center line between the first support carrier and the second support carrier; the first end is one end of the first support carrier far away from the second support carrier, and the second end is one end of the second support carrier far away from the first support carrier. In this way, the first support carrier and the second support carrier can jointly bear chips to be tested with different sizes by adjusting the distance between the first support carrier and the second support carrier; and the chip to be tested borne by the first support carrier and the second support carrier is controlled not to exceed the first end of the first support carrier and the second end of the second support carrier, so that the processing requirements of the first support carrier and the second support carrier can be reduced, and the first support carrier and the second support carrier are ensured not to damage the chip to be tested excessively.

In one possible implementation, the horizontal calibration module includes a first calibration bar and a second calibration bar, and the vertical flattening module includes a third calibration bar and a fourth calibration bar. The positioning control module controls the horizontal calibration module to move towards a first direction and controls the vertical flattening module to move towards a second direction, comprising: the positioning control module controls the first calibration rod and the second calibration rod to move towards the first direction symmetrically by taking the center line of the equipment as the center; the positioning control module controls the third calibration rod and the fourth calibration rod to move towards the second direction at the same time by taking the center line of the equipment as the center. The lengths of the first calibration rod, the second calibration rod, the third calibration rod and the fourth calibration rod are larger than the dimension of the chip to be tested along the third direction; the third direction is the length direction of first calibration pole, second calibration pole, third calibration pole and fourth calibration pole, and the third direction is perpendicular with first direction and second direction respectively. Therefore, the damage of the first calibration rod, the second calibration rod, the third calibration rod and the fourth calibration rod to the chip to be tested can be reduced.

In one possible implementation manner, the driving force when the horizontal calibration module drives the chip to be tested to move is less than or equal to 5N; the driving force of the vertical flattening module when the vertical flattening module applies pressure to the edge position of the chip to be tested is less than or equal to 5N. Therefore, the damage to the chip to be tested caused by the overlarge driving force when the horizontal calibration module moves can be reduced, and the damage to the chip to be tested caused by the overlarge driving force when the vertical flattening module moves can be reduced.

In one possible implementation, the loading device includes a loading ram and a loading control module. The loading device applies pressure to the chip to be tested, and the loading device comprises: the loading control module controls the loading pressure head to move towards the direction of the chip to be tested so as to apply pressure to the chip to be tested through the loading pressure head; in the pressure application process, the loading pressure head collects the pressure applied by the chip to be tested and the displacement generated when the chip to be tested is deformed; the loading pressure head sends the pressure and displacement to the loading control module; the loading control module calculates the pressing-down amount of the loading pressure head when the loading pressure head applies pressure to the chip to be tested according to the pressure and the displacement; the loading control module sends the pressing quantity to the strain testing device. Therefore, the pressure and displacement are acquired through the loading pressure head, so that the loading control module can calculate the pressing quantity according to the pressure and displacement, and the strain value corresponding to each test point in the reference area of the chip to be tested can be calculated conveniently and subsequently based on the pressing quantity.

In one possible implementation manner, when the strain testing device detects that the chip to be tested is broken, strain values corresponding to a plurality of testing points in a reference area of the chip to be tested include: in the pressure applying process, the strain testing device detects strain values corresponding to a plurality of testing points in a reference area of the chip to be tested in real time. The strain testing device determines a cracking area when a chip to be tested is cracked and the strength of the chip to be tested according to strain values corresponding to a plurality of testing points, and comprises: the strain testing device determines the maximum value of the strain values corresponding to the multiple testing points when the chip to be tested breaks as the strength of the chip to be tested, and determines the testing point corresponding to the maximum strain value when the chip to be tested breaks as the cracking area. Therefore, the strain testing device can timely acquire the strain values corresponding to the plurality of test points in the reference area of the chip to be tested when the chip to be tested breaks by detecting the strain values corresponding to the plurality of test points in the reference area of the chip to be tested in real time.

In one possible implementation, the reference area includes a first reference line and a second reference line on the chip to be tested, the first reference line and the second reference line extending along a third direction; each test point in the plurality of test points comprises a first test point positioned on a first reference line and a second test point positioned on a second reference line, and the coordinate values of the first test point and the second test point along a third direction are the same. Before the loading device applies pressure to the chip to be tested, the method further comprises the following steps: the strain testing device obtains a first interval between each first test point and a corresponding second test point on the chip to be tested before pressure is applied. In the pressure applying process, the strain testing device detects strain values corresponding to a plurality of testing points in a reference area of a chip to be tested in real time, and the strain testing device comprises: the strain testing device acquires a second interval between each first test point and a corresponding second test point on the chip to be tested in the pressure applying process; the strain testing device calculates a strain value corresponding to each testing point in the reference area of the chip to be tested according to the first interval, the second interval and the pressing quantity sent by the loading device. Therefore, based on the first interval, the second interval and the pressing quantity, the strain value corresponding to each test point in the reference area of the chip to be tested can be conveniently calculated, and the strength and the cracking area of the chip to be tested can be evaluated.

In one possible implementation, the strain testing device includes a camera module and a strain testing control module. Before the strain testing device obtains pressure application, a first interval between each first test point and a corresponding second test point on a chip to be tested comprises the following steps: the camera module acquires a first image of a chip to be tested before pressure is applied; the camera module sends the first image to the strain test control module; the strain test control module identifies a first spacing between each first test point and its corresponding second test point in the first image. In the process of obtaining pressure application, the strain testing device obtains a second interval between each first test point and a corresponding second test point on the chip to be tested, and the second interval comprises the following steps: the camera module acquires a second image of the chip to be tested in the pressure application process; the camera module sends the second image to the strain test control module; the strain test control module identifies a second spacing between each first test point and its corresponding second test point in the second image. In this way, the first pitch and the second pitch can be conveniently determined based on image recognition.

In one possible implementation manner, the strain testing device calculates a strain value corresponding to each test point in the reference area of the chip to be tested according to the first interval, the second interval, and the pressing amount sent by the loading device, and the method includes: the strain test control module calculates a radius value according to the second interval and the pressing quantity; the strain test control module calculates and obtains a central angle according to the second interval and the radius value; the strain test control module calculates and obtains the surface arc distance between each first test point and the corresponding second test point according to the central angle and the radius value; and the strain test control module calculates and obtains a strain value corresponding to each test point in the reference area of the chip to be tested according to the surface arc distance and the first distance.

In one possible implementation, the strain testing control module calculates a radius value according to the second distance and the pressing amount, including: the strain test control module calculates the radius value according to the following formula：

. The strain test control module calculates a central angle according to the second interval and the radius value, and comprises the following steps: the strain test control module calculates the central angle through the following formula: />

. The strain test control module calculates the surface arc distance between each first test point and the corresponding second test point according to the central angle and the radius value, and the method comprises the following steps: the strain test control module calculates and obtains the surface arc distance between the first test point and the corresponding second test point through the following formula:

. The strain testing control module calculates and obtains a strain value corresponding to each testing point in a reference area of the chip to be tested according to the surface arc distance and the first distance, and the strain testing control module comprises the following steps: the strain test control module calculates and obtains a strain value corresponding to each test point in the reference area of the chip to be tested through the following formula: />

. Wherein R represents a radius value, A represents a second pitch, H represents a depression amount, ++>

Represents the central angle>

Represents the surface arc spacing, L represents the first spacing, +. >

Representing the strain value. Therefore, the calculation of the surface arc distance between the first test point and the second test point can be simplified into the problem that the chord length and the chord height are known to calculate the arc length, so that the calculation complexity of the surface arc distance is reduced.

In a second aspect, an embodiment of the present application provides a chip testing apparatus, including a positioning device, a loading device, and a strain testing device. The positioning device is used for calibrating the position and the flatness of the chip to be tested when the chip to be tested is placed on the positioning device; the loading device is used for applying pressure to the chip to be tested after calibration is completed; the strain testing device is used for detecting strain values corresponding to a plurality of testing points in a reference area of the chip to be tested when the chip to be tested breaks, and the loading device is used for applying pressure to a pressure application area of the chip to be tested, wherein the pressure application area and the reference area are at least partially overlapped; the strain testing device is also used for determining a cracking area and the strength of the chip to be tested when the chip to be tested is cracked according to strain values corresponding to the plurality of testing points.

In one possible implementation, the positioning device includes an adjustable span support module, a horizontal calibration module, a vertical flattening module, and a positioning control module. The positioning control module is used for controlling the horizontal calibration module to move towards a first direction and controlling the vertical flattening module to move towards a second direction when the chip to be tested is placed on the span-adjustable support module. The horizontal calibration module is used for driving the chip to be tested to move when moving towards a first direction, so that the position of the chip to be tested is calibrated, and the first direction is the horizontal direction from the horizontal calibration module to the chip to be tested; when the vertical flattening module moves towards the second direction, the vertical flattening module is used for applying pressure to the edge position of the chip to be tested, so that the flatness of the chip to be tested is calibrated, the second direction is the vertical direction from the vertical flattening module to the chip to be tested, and the first direction and the second direction are mutually perpendicular.

In one possible implementation, the adjustable span support module includes a first support stage and a second support stage disposed in parallel. The positioning control module is also used for controlling the first support carrier and the second support carrier to symmetrically move by taking the center line of the equipment as the center. Wherein, the center line of the device is the center line between the first support carrier and the second support carrier; the first end is one end of the first support carrier far away from the second support carrier, and the second end is one end of the second support carrier far away from the first support carrier.

In one possible implementation, the horizontal calibration module includes a first calibration bar and a second calibration bar, and the vertical flattening module includes a third calibration bar and a fourth calibration bar. The positioning control module is specifically used for controlling the first calibration rod and the second calibration rod to move towards the first direction symmetrically by taking the center line of the equipment as the center; the positioning control module is also specifically used for controlling the third calibration rod and the fourth calibration rod to simultaneously move towards the second direction by taking the center line of the equipment as the center. The lengths of the first calibration rod, the second calibration rod, the third calibration rod and the fourth calibration rod are larger than the dimension of the chip to be tested along the third direction; the third direction is the length direction of first calibration pole, second calibration pole, third calibration pole and fourth calibration pole, and the third direction is perpendicular with first direction and second direction respectively.

In one possible implementation manner, the driving force when the horizontal calibration module drives the chip to be tested to move is less than or equal to 5N; the driving force of the vertical flattening module when the vertical flattening module applies pressure to the edge position of the chip to be tested is less than or equal to 5N.

In one possible implementation, the loading device includes a loading ram and a loading control module. The loading control module is used for controlling the loading pressure head to move towards the direction of the chip to be tested so as to apply pressure to the chip to be tested through the loading pressure head; the loading pressure head is used for collecting the pressure applied by the chip to be tested and the displacement generated when the chip to be tested is deformed in the pressure application process; the loading pressure head is also used for sending the pressure and displacement to the loading control module; the loading control module is also used for calculating the pressing-down amount of the loading pressure head when the loading pressure head applies pressure to the chip to be tested according to the pressure and the displacement; the loading control module is also used for sending the pressing quantity to the strain testing device.

In one possible implementation manner, the strain testing device is specifically configured to detect strain values corresponding to a plurality of test points in a reference area of a chip to be tested in real time during a pressure application process; the strain testing device is also specifically configured to determine a maximum value of strain values corresponding to a plurality of testing points when the chip to be tested is broken as strength of the chip to be tested, and determine the testing point corresponding to the maximum strain value when the chip to be tested is broken as a cracking area.

In one possible implementation, the reference area includes a first reference line and a second reference line on the chip to be tested, the first reference line and the second reference line extending along a third direction; each test point in the plurality of test points comprises a first test point positioned on a first reference line and a second test point positioned on a second reference line, and the coordinate values of the first test point and the second test point along a third direction are the same. The strain testing device is also used for acquiring a first interval between each first test point and a corresponding second test point on the chip to be tested before pressure is applied; the strain testing device is also specifically used for acquiring a second interval between each first test point and a corresponding second test point on the chip to be tested in the pressure application process; the strain testing device is also specifically configured to calculate a strain value corresponding to each test point in the reference area of the chip to be tested according to the first interval, the second interval and the pressing amount sent by the loading device.

In one possible implementation, the strain testing device includes a camera module and a strain testing control module. The camera module is used for collecting a first image comprising a chip to be tested before pressure application; the camera module is also used for sending the first image to the strain test control module; the strain test control module is used for identifying a first interval between each first test point and a corresponding second test point in the first image; the camera module is also used for collecting a second image of the chip to be tested in the pressure application process; the camera module is also used for sending the second image to the strain test control module; the strain test control module is further configured to identify a second distance between each first test point and its corresponding second test point in the second image.

In one possible implementation, the strain test control module is further configured to calculate a radius value according to the second distance and the pressing amount; the strain test control module is also used for calculating and obtaining a central angle according to the second interval and the radius value; the strain test control module is also used for calculating and obtaining the surface arc distance between each first test point and the corresponding second test point according to the central angle and the radius value; the strain test control module is further used for calculating and obtaining a strain value corresponding to each test point in the reference area of the chip to be tested according to the surface arc distance and the first distance.

In one possible implementation, the strain test control module is specifically configured to calculate the radius value according to the following formula:

. The strain test control module is also specifically used for calculating and obtaining the central angle through the following formula: />

. The strain test control module is further specifically configured to calculate and obtain a surface arc distance between the first test point and the second test point according to the following formula: />

. The strain test control module is further specifically configured to calculate and obtain a strain value corresponding to each test point in the reference area of the chip to be tested according to the following formula:

. Wherein R represents a radius value, A represents a second pitch, H represents a depression amount, ++>

Represents the central angle>

Represents the surface arc spacing, L represents the first spacing, +.>

Representing the strain value.

The effects of each possible implementation manner of the second aspect are similar to those of the first aspect and the possible designs of the first aspect, and are not described herein.

Drawings

Fig. 1 is a schematic structural diagram of a chip testing apparatus according to an embodiment of the present application;

fig. 2 is a schematic structural diagram of a positioning device in a chip test apparatus according to an embodiment of the present application;

FIG. 3 is a schematic top view of a first calibration bar and a second calibration bar included in a horizontal calibration module in a positioning device and a third calibration bar and a fourth calibration bar included in a vertical flattening module in the positioning device according to an embodiment of the present application;

fig. 4 is a schematic structural diagram of a loading device in a chip test apparatus according to an embodiment of the present application;

fig. 5 is a schematic structural diagram of a strain testing device in a chip testing apparatus according to an embodiment of the present application;

fig. 6 is a schematic diagram of a first image including a chip to be tested, which is acquired before pressure is applied, by an image pickup module in the strain testing device according to the embodiment of the present application;

FIG. 7 is a schematic diagram of a geometric diagram corresponding to calculating strain values by DIC algorithm according to an embodiment of the present application;

fig. 8 is a flow chart of a chip testing method according to an embodiment of the present application.

Detailed Description

In order to clearly describe the technical solutions of the embodiments of the present application, in the embodiments of the present application, the words "first", "second", etc. are used to distinguish the same item or similar items having substantially the same function and effect. For example, the first chip and the second chip are merely for distinguishing different chips, and the order of the different chips is not limited. It will be appreciated by those of skill in the art that the words "first," "second," and the like do not limit the amount and order of execution, and that the words "first," "second," and the like do not necessarily differ.

It should be noted that, in the embodiments of the present application, words such as "exemplary" or "such as" are used to mean serving as an example, instance, or illustration. Any embodiment or design described herein as "exemplary" or "for example" should not be construed as preferred or advantageous over other embodiments or designs. Rather, the use of words such as "exemplary" or "such as" is intended to present related concepts in a concrete fashion.

In the embodiments of the present application, "at least one" means one or more, and "a plurality" means two or more. "and/or", describes an association relationship of an association object, and indicates that there may be three relationships, for example, a and/or B, and may indicate: a alone, a and B together, and B alone, wherein a, B may be singular or plural. The character "/" generally indicates that the context-dependent object is an "or" relationship. "at least one of" or the like means any combination of these items, including any combination of single item(s) or plural items(s). For example, at least one (one) of a, b, or c may represent: a, b, c, a-b, a-c, b-c, or a-b-c, wherein a, b, c may be single or plural.

With the continuous development of electronic technology, electronic devices such as mobile phones, tablet computers, notebook computers and the like have become common tools in life and work of people, and light and thin electronic devices are favored by more and more consumers, so that the light and thin electronic devices gradually become a trend of industry pursuits.

When electronic equipment's thickness is thinner and thinner, the available design space of the chip that sets up on its inside mainboard also can be less and less, and is corresponding for the thickness of the chip that sets up on the mainboard also is thinner and more, leads to the chip that sets up on the mainboard to gradually expose the problem that body intensity is not enough, thereby leads to the chip that sets up on the mainboard to appear the inefficacy problem such as fracture easily under mechanical stress. Wherein the motherboard may be a printed circuit board (printed circuit board, PCB).

In order to set a chip meeting the strength requirement on the main board of the electronic equipment, the strength of the chip needs to be detected in advance, so that the chip meeting the strength requirement is screened out to be fixed on the main board of the electronic equipment. Therefore, detection of the die monomer strength is also becoming increasingly important.

Currently, a three-point bending detection method can be introduced in the industry as a detection means for the strength of a chip monomer. Three-point bending refers to placing a specimen on a bending apparatus, and performing a bending test by adjusting a span and loading the specimen until the specimen reaches a prescribed degree of bending or a fracture occurs.

In some embodiments, a strain gauge is adhered to a fixed position on one side of a chip to be tested, a fixture is used to position a horizontal position of the chip to be tested, and then pressure is applied to the chip to be tested, so that the strain gauge can detect a strain value at the adhered position to determine the strength of the chip to be tested.

However, this detection method has the following two problems: in the first aspect, the lack of automation in placing the chips to be tested easily causes problems such as deviation and warpage of the test patterns of the chips to be tested, and large deviation exists among the test patterns of the chips to be tested, so that stability and accuracy of test results of the chips to be tested are affected. In the second aspect, when the strain gauge is stuck to the fixed position of the chip to be tested, the strain gauge can strengthen the strength of the chip to be tested, so that interference factors are artificially introduced, the strength test result of the chip to be tested is inaccurate, and the stability and accuracy of the test result of the chip to be tested are poor; in addition, after the strain gauge is stuck at the fixed position of the chip to be tested, when the chip to be tested is cracked due to the fact that pressure is applied to the chip to be tested, certain differences exist among different chips to be tested, so that certain range of drift occurs in the cracking areas of some chips to be tested, namely certain deviation exists in the strength test results of different chips to be tested because the cracking areas of some chips to be tested possibly are not the fixed positions where the strain gauge is stuck, and the strain value of the chip to be tested actually detected when the strain gauge is cracked is smaller than the maximum strain value of the chip to be tested when the chip to be tested is cracked, that is, the strain value of the cracking areas can not be effectively captured by the strain gauge.

Therefore, the influence of the two aspects can cause great deviation of the test result of the chip to be tested due to the relative microscopy of the material and the structure of the chip to be tested, so that the stability and the accuracy of the strength test result are poor.

Based on this, the embodiment of the application provides a chip testing method and a chip testing device, when a chip to be tested is placed on a positioning device, the positioning device calibrates the position and the flatness of the chip to be tested, after the calibration is completed, a loading device applies pressure to the chip to be tested, a strain testing device detects strain values corresponding to a plurality of testing points in a reference area of the chip to be tested when the chip to be tested is broken, and determines a cracking area and the strength of the chip to be tested when the chip to be tested is broken according to the strain values corresponding to the testing points. Therefore, before the chip to be tested is tested, the position and the flatness of the chip to be tested are calibrated, and the problems of deviation, tilting and the like of the chip to be tested during testing are solved, so that the stability and the accuracy of the test result of the chip to be tested are improved; in addition, the stress values corresponding to a plurality of test points in the reference area of the chip to be tested are captured, so that the cracking area and the strength of the chip to be tested when the chip to be tested is cracked can be accurately captured, and the real stress values of the cracking area can be obtained by testing different chips to be tested, thereby reducing the deviation of the strength test results of different chips to be tested; in addition, the embodiment of the application does not need to adopt the strain gauge to detect, so that the problem of strength reinforcement of the chip to be detected caused by the strain gauge is avoided, and the stability and accuracy of the test result of the chip to be detected are improved. Therefore, the chip testing method can enable the strength testing result of the chip to be tested to be stable and reliable.

It can be understood that the chip to be tested in the embodiment of the present application may be a large-sized package chip, such as a Double Data Rate (DDR) package chip, a universal flash memory storage multi-chip package memory (ufs-based mcp, uMCP), etc.; the chip to be tested in the embodiment of the application can also be a packaged chip packaged by adopting a wafer level chip scale package (wafer level chip scale packaging, WLCSP) mode. Of course, the chip to be tested in the embodiment of the present application may be other packaged chips or non-packaged chips. The specific type of the chip to be tested is not limited in the embodiment of the application.

In order to better understand the embodiments of the present application, the following describes in detail a chip testing method and a chip testing apparatus according to the embodiments of the present application, where the chip testing method may be applied to the chip testing apparatus.

Exemplary, fig. 1 is a schematic structural diagram of a chip testing apparatus according to an embodiment of the present application. Referring to fig. 1, the chip testing apparatus includes a positioning device 110, a loading device 120, and a strain testing device 130.

The positioning device 110 is used for calibrating the position and the flatness of the chip 200 to be tested when the chip 200 to be tested is placed on the positioning device 110. The loading device 120 is used for applying pressure to the chip 200 to be tested after calibration is completed. The strain testing device 130 is configured to detect strain values corresponding to a plurality of test points in a reference area of the chip 200 to be tested when the chip 200 to be tested is broken, and a pressure applying area of the loading device 120 when applying pressure on the chip 200 to be tested has at least a partial overlapping area with the reference area; the strain testing device 130 is further configured to determine a cracking area when the chip 200 to be tested is cracked and strength of the chip 200 to be tested according to strain values corresponding to the plurality of testing points.

In some embodiments, the positioning device 110 may also be referred to as a chip positioning device to be tested, which is used for calibrating the position and the flatness of the chip to be tested 200, so that the test form of the chip to be tested 200 has no problems of deviation, warpage, etc., and the normalization of the test forms of different chips to be tested 200 is ensured. The positioning device 110 is used for calibrating the position of the chip 200 to be tested, and is mainly used for moving the chip 200 to be tested to a designated position in the horizontal direction, so that the horizontal position among different chips 200 to be tested is prevented from being deviated, and the stability of the test result of the chip 200 to be tested is improved; the positioning device 110 is used for calibrating the flatness of the chip 200 to be tested, and is mainly used for flattening the warpage existing at the edge of the chip 200 to be tested, so that the edge of the chip 200 to be tested is free from warpage.

The loading device 120 may also be referred to as a three-point bending loading test device, which is used to apply pressure to the chip 200 to be tested until the chip 200 to be tested breaks after calibrating the position and flatness of the chip 200 to be tested using the positioning device 110.

Taking the chip 200 to be tested as a packaging chip as an example, when the strength of the chip 200 to be tested is tested, the positioning device 110 can bear the chip 200 to be tested, the surface of the chip 200 to be tested, which is contacted with the positioning device 110, is the packaging surface of the chip 200 to be tested, and the packaging surface of the chip 200 to be tested is opposite to the welding surface of the chip 200 to be tested. For example, the chip 200 to be tested may be packaged by Ball Grid Array (BGA) packaging technology, and then the surface of the chip 200 to be tested contacting the positioning device 110 is disposed opposite to the BGA bonding surface of the chip 200 to be tested.

A reference area is provided on the package surface of the chip 200 to be tested, and a pressure application area when the loading device 120 applies pressure on the chip 200 to be tested has at least a partial overlapping area with the reference area. In some embodiments, the pressure application area of the loading device 120 when applying pressure on the chip 200 to be tested coincides with the reference area, or the pressure application area of the loading device 120 when applying pressure on the chip 200 to be tested is located within the reference area.

The strain testing device 130 may also be referred to as a chip breaking strain testing device, which may detect strain values corresponding to a plurality of test points in a reference area of the chip 200 to be tested in real time during the process of applying pressure to the chip 200 to be tested by the loading device 120. Therefore, when the loading device 120 applies the chip 200 to be tested to cause the chip 200 to be tested to break, the strain testing device 130 can detect and obtain strain values corresponding to a plurality of test points in the reference area of the chip 200 to be tested when the chip 200 to be tested breaks.

Since the pressure applying area of the loading device 120 when applying pressure on the chip 200 to be tested has at least a partial overlapping area with the reference area, when the loading device 120 applies pressure on the chip 200 to be tested to cause the chip 200 to be tested to crack, the cracking area of the chip 200 to be tested will be substantially located in the reference area. In this way, when the strain testing device 130 detects that the chip 200 to be tested is broken, after the strain values corresponding to the multiple testing points in the reference area of the chip 200 to be tested are obtained, the breaking area when the chip 200 to be tested is broken and the strength of the chip 200 to be tested can be determined according to the strain values corresponding to the multiple testing points. The strength of the chip 200 to be tested refers to a strain value corresponding to a cracking region when the chip 200 to be tested is cracked.

As shown in FIG. 2, the positioning device 110 includes an adjustable span support module 111, a horizontal calibration module 112, a vertical flattening module 113, and a positioning control module 114. The positioning control module 114 is used for controlling the horizontal calibration module 112 to move towards a first direction and controlling the vertical flattening module 113 to move towards a second direction when the chip 200 to be tested is placed on the span adjustable support module 111.

When moving towards the first direction, the horizontal calibration module 112 is configured to drive the chip 200 to be tested to move, so as to calibrate the position of the chip 200 to be tested. That is, when the positioning control module 114 controls the horizontal calibration module 112 to move toward the first direction, the horizontal calibration module 112 may drive the chip 200 to be tested to move, so as to calibrate the position of the chip 200 to be tested.

When the vertical flattening module 113 moves towards the second direction, the vertical flattening module is used for applying pressure to the edge position of the chip 200 to be tested, so as to calibrate the flatness of the chip 200 to be tested. That is, the positioning control module 114 may apply pressure to the edge position of the chip 200 to be tested through the vertical flattening module 113 when controlling the vertical flattening module 113 to move toward the second direction, so as to calibrate the flatness of the chip 200 to be tested.

The first direction is the horizontal direction from the horizontal calibration module 112 to the chip 200 to be tested, the second direction is the vertical direction from the vertical flattening module 113 to the chip 200 to be tested, and the first direction and the second direction are mutually perpendicular.

The positioning control module 114 may be referred to as a positioning system central control computer. The positioning control module 114 is respectively connected with the adjustable span support module 111, the horizontal calibration module 112 and the vertical flattening module 113, and is used for controlling the connection of the adjustable span support module 111, the horizontal calibration module 112 and the vertical flattening module 113 to respectively execute corresponding operations.

Specifically, the adjustable span support module 111 includes a first support stage 1111 and a second support stage 1112 disposed in parallel. The positioning control module 114 is further configured to control the first support stage 1111 and the second support stage 1112 to move symmetrically about a device center line (e.g., the device center line 30 shown in fig. 1). Wherein, the device center line 30 is a center line between the first support stage 1111 and the second support stage 1112; the chip 200 to be tested borne by the first support carrier 1111 and the second support carrier 1112 together does not exceed a first end of the first support carrier 1111 and a second end of the second support carrier 1112, wherein the first end is an end of the first support carrier 1111 away from the second support carrier 1112, and the second end is an end of the second support carrier 1112 away from the first support carrier 1111.

It is understood that the adjustable span support module 111 includes a first driving mechanism for driving the first support stage 1111 and the second support stage 1112 to move, in addition to the first support stage 1111 and the second support stage 1112 described above. The first driving mechanism may include a mechanical structure such as bolt positioning or slide positioning, and the positioning control module 114 may be connected to the first driving mechanism, and the positioning control module 114 drives the first support stage 1111 and the second support stage 1112 to move by controlling the first driving mechanism, so as to implement a span adjustment function.

When the positioning control module 114 controls the first driving mechanism to drive the first support stage 1111 and the second support stage 1112 to move, the first support stage 1111 and the second support stage 1112 always maintain symmetrical movement about the center line of the apparatus, and thus the span is ensured to be centered. That is, the first support stage 1111 and the second support stage 1112 may be simultaneously moved symmetrically toward the position where the center line of the apparatus is located, so as to reduce the interval between the first support stage 1111 and the second support stage 1112; alternatively, the first support stage 1111 and the second support stage 1112 may be moved symmetrically away from the center line of the apparatus at the same time to increase the distance between the first support stage 1111 and the second support stage 1112. In this way, the first support stage 1111 and the second support stage 1112 are driven to move, so as to adjust the distance between the first support stage 1111 and the second support stage 1112, so that the first support stage 1111 and the second support stage 1112 can jointly carry the chips 200 to be tested with different sizes.

In one possible implementation, the chip 200 under test carried by the first support stage 1111 and the second support stage 1112 together does not exceed the first end of the first support stage 1111 and the second end of the second support stage 1112. That is, the supporting range of the first supporting stage 1111 and the second supporting stage 1112 is larger than the outline of the chip 200 to be tested, the chip 200 to be tested does not extend out of the first end of the first supporting stage 1111, and the chip 200 to be tested does not extend out of the second end of the second supporting stage 1112.

It should be noted that, in theory, if the chip 200 to be tested extends out of the first end of the first supporting stage 1111 and/or extends out of the second end of the second supporting stage 1112, the strain test result of the chip 200 to be tested will not be affected, i.e. the cracking area when the chip 200 to be tested is cracked and the strength of the chip 200 to be tested obtained by the test will not be affected. However, if the widths of the first support stage 1111 and the second support stage 1112 in the first direction are set to be narrower, the chip 200 to be tested may protrude from the first end of the first support stage 1111 and/or protrude from the second end of the second support stage 1112 when being placed on the first support stage 1111 and the second support stage 1112, thereby causing the corners of the first support stage 1111 and/or the second support stage 1112 to contact the surface of the chip 200 to be tested, thereby causing a certain damage to the chip 200 to be tested. If the damage to the chip 200 to be tested is reduced by the first support stage 1111 and the second support stage 1112, the processing requirements for the corners of the first support stage 1111 and the second support stage 1112 become high.

Therefore, in order to reduce the processing requirements of the first support stage 1111 and the second support stage 1112, and to ensure that the first support stage 1111 and the second support stage 1112 do not damage the chip 200 to be tested too much, it is necessary to reasonably set the widths of the first support stage 1111 and the second support stage 1112 along the first direction so that the chip 200 to be tested does not extend out of the first end of the first support stage 1111 and the chip 200 to be tested does not extend out of the second end of the second support stage 1112.

Specifically, as shown in fig. 2 and 3, horizontal calibration module 112 includes a first calibration bar 1121 and a second calibration bar 1122, and vertical flattening module 113 includes a third calibration bar 1131 and a fourth calibration bar 1132. The positioning control module 114 is specifically configured to control the first calibration rod 1121 and the second calibration rod 1122 to move symmetrically towards the first direction with respect to the device center line; the positioning control module 114 is further specifically configured to control the third calibration rod 1131 and the fourth calibration rod 1132 to simultaneously move toward the second direction with the center line of the apparatus as a center.

The horizontal calibration module 112 includes a first direction corresponding to the first calibration bar 1121, which is a horizontal direction from the first calibration bar 1121 to the chip 200 to be tested, and takes the view angles corresponding to fig. 2 and 3 as an example, the first direction corresponding to the first calibration bar 1121 is a left-to-right direction. Accordingly, the horizontal calibration module 112 includes a first direction corresponding to the second calibration bar 1122, which is a horizontal direction from the second calibration bar 1122 to the chip 200 to be tested, and the first direction corresponding to the second calibration bar 1122 is a right-to-left direction, taking the view angles corresponding to fig. 2 and 3 as an example.

Since the first calibration bar 1121 and the second calibration bar 1122 are respectively located at opposite sides of the chip 200 to be measured when the first calibration bar 1121 and the second calibration bar 1122 are used for calibrating the position of the chip 200 to be measured, the first direction of movement when the first calibration bar 1121 performs position calibration is opposite to the first direction of movement when the second calibration bar 1122 performs position calibration.

It will be appreciated that the horizontal calibration module 112 includes, in addition to the first and second calibration bars 1121, 1122 described above, a second drive mechanism for driving the movement of the first and second calibration bars 1121, 1122. The second driving mechanism may include a servo motor, the positioning control module 114 may be connected with the second driving mechanism, and the positioning control module 114 drives the first calibration rod 1121 and the second calibration rod 1122 to move by controlling the second driving mechanism, where the first calibration rod 1121 and the second calibration rod 1122 may drive the chip 200 to be tested to move, so as to calibrate the position of the chip 200 to be tested. The center axis between the first calibration rod 1121 and the second calibration rod 1122 coincides with the device center axis.

The second direction corresponding to the third calibration bar 1131 included in the vertical flattening module 113 is a vertical direction from the third calibration bar 1131 to the chip 200 to be tested, and taking the view angle corresponding to fig. 2 as an example, the second direction corresponding to the third calibration bar 1131 is a top-to-bottom direction. Accordingly, the second direction corresponding to the fourth calibration bar 1132 included in the vertical flattening module 113 is a vertical direction from the fourth calibration bar 1132 to the chip 200 to be tested, and taking the view angle corresponding to fig. 2 as an example, the second direction corresponding to the fourth calibration bar 1132 is also a top-to-bottom direction.

Since the third calibration bar 1131 and the fourth calibration bar 1132 are both positioned on the same side of the soldering surface of the chip 200 to be measured when the third calibration bar 1131 and the fourth calibration bar 1132 are used for calibrating the flatness of the chip 200 to be measured, the second direction in which the third calibration bar 1131 moves when the third calibration bar 1131 performs the flatness calibration is the same direction as the second direction in which the fourth calibration bar 1132 performs the flatness calibration.

It will be appreciated that vertical flattening module 113 includes, in addition to third and fourth calibration bars 1131 and 1132 described above, a third drive mechanism for driving movement of third and fourth calibration bars 1131 and 1132. The third driving mechanism may include a servo motor, the positioning control module 114 may be connected to the third driving mechanism, and the positioning control module 114 drives the third calibration rod 1131 and the fourth calibration rod 1132 to move by controlling the third driving mechanism, where the third calibration rod 1131 and the fourth calibration rod 1132 may apply pressure to the edge position of the chip 200 to be tested, so as to calibrate the flatness of the chip 200 to be tested. And, the central axis between the third calibration bar 1131 and the fourth calibration bar 1132 coincides with the device central axis.

As shown in fig. 3, the lengths of the first calibration bar 1121, the second calibration bar 1122, the third calibration bar 1131, and the fourth calibration bar 1132 are all greater than the dimension of the chip 200 to be tested along the third direction; the third direction is the length direction of the first calibration bar 1121, the second calibration bar 1122, the third calibration bar 1131, and the fourth calibration bar 1132, and the third direction is perpendicular to the first direction and the second direction, respectively.

If the length of any one or more of the first calibration bar 1121, the second calibration bar 1122, the third calibration bar 1131, and the fourth calibration bar 1132 is set to be less than or equal to the dimension of the chip 200 to be tested along the third direction, when the first calibration bar 1121, the second calibration bar 1122, the third calibration bar 1131, and the fourth calibration bar 1132 are used to calibrate the chip 200 to be tested, the edges of the calibration bars with the length less than or equal to the dimension of the chip 200 to be tested will contact with the surface of the chip 200 to be tested, thereby causing a certain damage to the chip 200 to be tested.

Therefore, the lengths of the first calibration rod 1121, the second calibration rod 1122, the third calibration rod 1131 and the fourth calibration rod 1132 are set to be greater than the dimension of the chip 200 to be tested along the third direction, so that when the chip 200 to be tested is calibrated by adopting the first calibration rod 1121, the second calibration rod 1122, the third calibration rod 1131 and the fourth calibration rod 1132, the first calibration rod 1121, the second calibration rod 1122, the third calibration rod 1131 and the fourth calibration rod 1132 are in surface contact with the chip 200 to be tested, thereby reducing the damage caused by the first calibration rod 1121, the second calibration rod 1122, the third calibration rod 1131 and the fourth calibration rod 1132 to the chip 200 to be tested.

In some embodiments, when the horizontal calibration module 112 calibrates the position of the chip 200 to be tested, the positioning control module 114 may control the horizontal calibration module 112 to move with a smaller driving force and with the center line of the device as an axisymmetric centripetal motion to drive the chip 200 to be tested to move, so that the chip 200 to be tested and the span-adjustable support module 111 are symmetrically and parallel centered, i.e. the center of the chip 200 to be tested coincides with the center line of the device. Specifically, the driving force of the horizontal calibration module 112 when driving the chip 200 to be tested to move is less than or equal to 5N, so as to reduce damage to the chip 200 to be tested caused by excessive driving force of the horizontal calibration module 112 when moving.

Correspondingly, when the vertical flattening module 113 corrects the flatness of the chip 200 to be tested, the positioning control module 114 can control the vertical flattening module 113 to move downwards with smaller driving force and with the center line of the device as the axis symmetry, so as to apply pressure to the edge position of the chip 200 to be tested, so that the warpage of four sides of the chip 200 to be tested can be flattened. Specifically, the driving force of the vertical flattening module 113 when applying pressure to the edge position of the chip 200 to be tested is less than or equal to 5N, so as to reduce damage to the chip 200 to be tested caused by excessive driving force when the vertical flattening module 113 moves.

After calibration of the position of the chip 200 to be tested using the horizontal calibration module 112 is completed, the positioning control module 114 may control the horizontal calibration module 112 to move toward a direction away from the chip 200 to be tested again so as to reset the horizontal calibration module 112. Specifically, the horizontal calibration module 112 includes a first calibration rod 1121, a second calibration rod 1122, and a second driving mechanism, and the positioning control module 114 drives the first calibration rod 1121 and the second calibration rod 1122 by controlling the second driving mechanism, and moves in a direction opposite to the first direction with respect to the center line of the device as a center symmetry, so as to restore the first calibration rod 1121 and the second calibration rod 1122, so that the first calibration rod 1121 and the second calibration rod 1122 return to the original positions, and further the chip 200 to be tested maintains a free state during testing.

For example, when the first calibration rod 1121 is reset, the first calibration rod 1121 moves in the opposite direction to the corresponding first direction. The opposite direction of the first direction corresponding to the first calibration bar 1121 is the horizontal direction from the chip 200 to be tested to the first calibration bar 1121, and taking the view angles corresponding to fig. 2 and 3 as an example, the opposite direction of the first direction corresponding to the first calibration bar 1121 is the right-to-left direction. Accordingly, when the second calibration rod 1122 is reset, the second calibration rod 1122 also moves in a direction opposite to its corresponding first direction. The opposite direction of the first direction corresponding to the second calibration bar 1122 is the horizontal direction from the chip 200 to be tested to the second calibration bar 1122, and the opposite direction of the first direction corresponding to the second calibration bar 1122 is the left-to-right direction, taking the viewing angles corresponding to fig. 2 and 3 as an example.

After the calibration of the flatness of the chip 200 to be tested by using the vertical flattening module 113 is completed, the positioning control module 114 may control the vertical flattening module 113 to move toward a direction away from the chip 200 to be tested again so as to reset the vertical flattening module 113. Specifically, the vertical flattening module 113 includes a third calibration rod 1131, a fourth calibration rod 1132 and a third driving mechanism, and the positioning control module 114 drives the third calibration rod 1131 and the fourth calibration rod 1132 by controlling the third driving mechanism, and uses the center line of the device as the center to move towards the opposite direction of the second direction at the same time, so as to implement homing of the third calibration rod 1131 and the fourth calibration rod 1132, so that the third calibration rod 1131 and the fourth calibration rod 1132 return to the original positions, and further the chip 200 to be tested maintains a free state during testing.

For example, upon homing, the third calibration rod 1131 moves in a direction opposite its corresponding second direction. The opposite direction of the second direction corresponding to the third calibration bar 1131 is the vertical direction from the chip 200 to be tested to the third calibration bar 1131, taking the view angle corresponding to fig. 2 as an example, and the opposite direction of the second direction corresponding to the third calibration bar 1131 is the direction from bottom to top. Accordingly, upon homing, the fourth calibration bar 1132 also moves in a direction opposite to its corresponding second direction. The opposite direction of the second direction corresponding to the fourth calibration bar 1132 is the vertical direction from the chip 200 to be tested to the fourth calibration bar 1132, taking the view angle corresponding to fig. 2 as an example, and the opposite direction of the second direction corresponding to the fourth calibration bar 1132 is the direction from bottom to top.

In summary, the positioning control module 114 may control the horizontal calibration module 112 to horizontally move in a direction towards or away from the center line of the device, and the positioning control module 114 may also control the vertical flattening module 113 to move up and down, so that before the chip 200 to be tested is tested, the placement form of the chip 200 to be tested is calibrated, so as to ensure that the chip 200 to be tested is centered on the first support stage 1111 and the second support stage 1112 in parallel, and four sides of the chip 200 to be tested have no warpage, so that the test form of the chip 200 to be tested is normalized.

In the related art, the horizontal positioning of the chip to be tested needs to customize dedicated clamps according to the chips to be tested with different sizes, resulting in lower efficiency of intensity detection of the chip to be tested, but in the three-point bending detection process of the chip to be tested 200, the positioning device 110 can be utilized to automatically control the testing posture of the chip to be tested 200 without problems of skew, tilting and the like, thereby improving the efficiency of intensity detection of the chip to be tested 200.

After calibration of the chip 200 to be tested using the positioning device 110 is completed and the horizontal calibration module 112 and the vertical flattening module 113 are reset, the loading device 120 starts to operate.

As shown in fig. 4, the loading device 120 includes a loading ram 121 and a loading control module 122. The loading control module 122 is used for controlling the loading pressure head 121 to move towards the direction of the chip 200 to be tested so as to apply pressure to the chip 200 to be tested through the loading pressure head 121; the loading pressure head 121 is used for collecting the pressure applied by the chip 200 to be tested and the displacement generated when the chip 200 to be tested is deformed in the pressure application process; the load ram 121 is also used to send pressure and displacement to the load control module 122; the loading control module 122 is further configured to calculate a pressing amount of the loading press head 121 when the chip 200 to be tested applies pressure according to the pressure and the displacement; the load control module 122 is also configured to send the amount of depression to the strain testing device 130.

In some embodiments, the loading ram 121 includes a mechanical ram body, a fourth drive mechanism, a pressure sensor, a displacement sensor, and the like. The pressure head body is mainly used for applying pressure to the chip 200 to be tested until the chip 200 to be tested breaks. The fourth driving mechanism may include a servo motor, the loading control module 122 may be connected to the fourth driving mechanism, and the loading control module 122 drives the pressure head body to move toward the second direction by controlling the fourth driving mechanism, so that after the pressure head body contacts the chip 200 to be tested, pressure can be applied to the chip 200 to be tested through the pressure head body. The pressure sensor may be connected to the load control module 122, and the pressure sensor is configured to collect, during the process of applying pressure to the chip 200 to be tested by the ram body, the pressure applied by the ram body to the chip 200 to be tested, and send the collected pressure to the load control module 122. The displacement sensor may be connected to the load control module 122, and is configured to collect displacement generated when the chip 200 to be tested is deformed in a process that the pressure head body applies pressure to the chip 200 to be tested, and send the collected displacement to the load control module 122.

It should be noted that, the second direction of movement of the indenter body during the testing process is a vertical direction from the indenter body to the chip 200 to be tested, and taking the view angle corresponding to fig. 4 as an example, the second direction of movement of the indenter body during the testing process is a direction from top to bottom. When the ram body moves in the second direction, the center line of the ram body always coincides with the center line of the device, and moves in the second direction. In addition, the shape and size of the ram body in the loading ram 121 may be changed according to actual test requirements.

The load control module 122 may also be a central control computer. The loading control module 122 may control the pressing force of the loading ram 121 when the chip 200 to be tested is pressed; the load control module 122 may be further configured to generate a pressure displacement curve according to the pressure and the displacement after receiving the pressure sent by the pressure sensor and the displacement sent by the displacement sensor, and further calculate a pressing amount of the load ram 121 when the pressure is applied to the chip 200 to be tested according to the pressure displacement curve.

Since the loading head 121 comes into contact with the chip 200 to be tested, the pressure collected by the pressure sensor gradually increases, and when the loading head 121 starts to crack after the pressure is applied, the pressure collected by the pressure sensor reaches a maximum value. Therefore, the loading control module 122 obtains a first displacement when the pressure increases from 0 and a second displacement when the pressure reaches a maximum value according to the pressure displacement curve, and the difference between the first displacement and the second displacement is the pressing amount of the loading ram 121 when the pressure is applied to the chip 200 to be tested.

It will be appreciated that the load control module 122 has a fracture recognition function, and when the load control module 122 receives that the displacement acquired by the pressure sensor suddenly drops from the maximum value, it is determined that the chip 200 to be tested is broken, in which case, the load control module 122 controls the load ram 121 not to continue to apply pressure to the chip 200 to be tested, and the pressure application process is stopped.

It should be noted that, in fig. 4, in order to more clearly show the positional relationship between the loading ram 121 and the chip 200 to be tested, not only the specific structure of the loading device 120, but also the specific structures of the chip 200 to be tested, and the first support stage 1111 and the second support stage 1112 carrying the chip 200 to be tested are shown.

After calibration of the chip 200 to be tested is completed by using the positioning device 110 and homing of the horizontal calibration module 112 and the vertical flattening module 113 is completed, the strain testing device 130 also starts to operate, i.e. the loading device 120 and the strain testing device 130 start to operate simultaneously, so as to test the chip 200 to be tested.

In this embodiment of the present application, the specific structure of the strain testing device 130 may be referred to below in the description corresponding to fig. 5, where the strain testing device 130 is specifically configured to detect, in real time, strain values corresponding to a plurality of test points in a reference area of the chip 200 to be tested during a pressure application process; the strain testing device 130 is further specifically configured to determine a maximum value of strain values corresponding to a plurality of test points when the chip 200 to be tested is broken as the strength of the chip 200 to be tested, and determine a test point corresponding to the maximum strain value when the chip 200 to be tested is broken as the cracking region.

In the process of applying pressure to the chip 200 to be tested by using the loading device 120, the strain testing device 130 may detect strain values corresponding to a plurality of test points in the reference area of the chip 200 to be tested in real time. In this way, when the loading device 120 applies pressure to the chip 200 to be tested to cause the chip 200 to be tested to fracture, the strain testing device 130 can also detect the strain values corresponding to the plurality of test points in the reference area of the chip 200 to be tested when the chip 200 to be tested fractures.

Since the strain direction of the chip 200 to be tested is clear in the test scene of three-point bending of the chip 200 to be tested, the strength of the chip 200 to be tested can be determined only by acquiring the strain value in the vertical direction (namely the second direction) during the test, and therefore, the embodiment of the application does not need to acquire the global variable of the chip 200 to be tested, and only needs to acquire the strain distribution in the vertical direction of the chip 200 to be tested.

In some embodiments, the strain testing device 130 may employ digital image correlation (digital image correlation, DIC) algorithm to capture the maximum strain value during the testing process and at the time of breaking the chip 200 under test, and capture the breaking area of the chip 200 under test, so as to detect the strength and the breaking area of the chip 200 under test. The DIC algorithm is an easy-to-use optical method for measuring deformation of the surface of an object, and in the embodiments of the present application, the DIC algorithm may also be referred to as a DIC optical strain test method.

In the DIC algorithm, a first reference line and a second reference line are fabricated on the package surface of the chip 200 to be tested by means of laser engraving or silk screen printing, so that a reference area is formed on the package surface of the chip 200 to be tested. Specifically, as shown in fig. 6, the reference area includes a first reference line 201 and a second reference line 202 on the chip 200 to be tested, and the first reference line 201 and the second reference line 202 extend in a third direction. Also, the first reference line 201 and the second reference line 202 are symmetrically distributed with the device center line, that is, the center axis between the first reference line 201 and the second reference line 202 coincides with the device center line, and the first reference line 201 and the second reference line 202 may also be referred to as DIC reference lines.

In order to detect the strength and the cracking area of the chip 200 to be tested, a plurality of test points may be previously divided into a reference area, and each of the plurality of test points in the reference area includes a first test point (e.g., point B in fig. 6) located on the first reference line 201 and a second test point (e.g., point C in fig. 6) located on the second reference line 202, where the coordinate values of the first test point and the second test point are the same along the third direction.

It should be noted that, the distances between the first reference line 201 and the second reference line 202 and the center line of the device can be adjusted according to the actual accuracy requirement; the number of reference lines formed on the package surface of the chip 200 to be tested is not limited to two as shown in fig. 6, and the number of reference lines formed on the package surface of the chip 200 to be tested can be adjusted according to the actual accuracy requirement.

In one possible implementation, the strain testing device 130 is further configured to obtain a first distance between each first test point and its corresponding second test point on the chip 200 to be tested before the pressure is applied; the strain testing device 130 is further specifically configured to obtain a second distance between each first test point and a corresponding second test point on the chip 200 to be tested during the pressure application process; the strain testing device 130 is further specifically configured to calculate a strain value corresponding to each test point in the reference area of the chip 200 to be tested according to the first interval, the second interval, and the pressing amount sent by the loading device 120.

As shown in fig. 5, the strain testing device 130 includes a camera module 131 and a strain testing control module 132. The camera module 131 is used for acquiring a first image including the chip 200 to be tested before pressure application; the camera module 131 is further configured to send the first image to the strain test control module 132; the strain test control module 132 is configured to identify a first distance between each first test point and its corresponding second test point in the first image. The camera module 131 is further configured to collect a second image including the chip 200 to be tested during the pressure application process; the camera module 131 is further configured to send the second image to the strain testing control module 132; the strain test control module 132 is further configured to identify a second spacing between each first test point and its corresponding second test point in the second image.

In some embodiments, the camera module 131 may be a high-speed photographic lens, and the camera module 131 may be connected with the strain test control module 132. The camera module 131 may collect a first image including the chip 200 to be tested and send the first image to the strain test control module 132 before testing the chip 200 to be tested; the camera module 131 may also collect a second image including the chip 200 under test in real time during the process of applying pressure to the chip 200 under test by the loading device 120, and send the second image to the strain test control module 132.

Since the light incident surface of the camera module 131 is located on the side of the package surface of the chip 200 to be tested, the first image collected by the camera module 131 includes the first reference line 201 and the second reference line 202 in the chip 200 to be tested, and the second image collected by the camera module 131 also includes the first reference line 201 and the second reference line 202 in the chip 200 to be tested.

The strain test control module 132 may also be referred to as a DIC central control processing computer. The strain test control module 132 may read a first interval between each first test point and a corresponding second test point from the first image, taking one of the first test points in fig. 6 as a B point and the corresponding second test point as a C point as an example, and the first interval is an interval between the B point and the C point.

In the process of applying pressure to the chip 200 by the loading device 120, the pressure applying area on the chip 200 will be deformed, and the reference area of the chip 200 will be deformed due to at least partial overlapping area between the pressure applying area and the reference area of the chip 200. Thus, the second spacing between each first test point and its corresponding second test point in the second image may vary as pressure is applied.

The strain test control module 132 may read, from the second image, a second interval between each first test point and a corresponding second test point, where the second interval is an optical horizontal distance between the first test point and the corresponding second test point in the second image acquired at a certain moment.

In addition, during the process of applying pressure to the chip 200 to be tested by the loading device 120, the loading control module 122 in the loading device 120 sends the pressing amount obtained by the real-time calculation to the strain test control module 132 in the strain test device 130.

In this way, at a certain moment in the process of applying pressure to the chip 200 to be tested by the loading device 120, the strain test control module 132 may calculate the strain value corresponding to each test point in the reference area of the chip 200 to be tested at the moment according to the first interval, the second interval corresponding to the moment, and the pressing amount corresponding to the moment, so as to finally grasp the strain values corresponding to all the test points in the reference area of the chip 200 to be tested when the chip 200 to be tested is broken, so as to determine the strength and the cracking area of the chip 200 to be tested.

In one possible implementation, the strain test control module 132 calculates a strain value corresponding to each test point in the reference area of the chip 200 to be tested as follows: the strain test control module 132 is further configured to calculate a radius value according to the second distance and the pressing amount; the strain test control module 132 is further configured to calculate a central angle according to the second distance and the radius value; the strain test control module 132 is further configured to calculate, according to the central angle and the radius value, a surface arc distance between each first test point and a corresponding second test point; the strain test control module 132 is further configured to calculate a strain value corresponding to each test point in the reference area of the chip 200 to be tested according to the surface arc distance and the first distance.

Because of each first test point on the first reference line 201, the surface arc spacing between the second test point corresponding to the first test point on the second reference line 202 may be as shown in FIG. 7

. Therefore, based on the geometric schematic shown in fig. 7, the calculation of the surface arc distance can be simplified to the problem of calculating the arc length by knowing the chord length and chord height.

Based on the side length formula of the right triangle, the strain test control module 132 is specifically configured to calculate the radius value according to the following formula:

The method comprises the steps of carrying out a first treatment on the surface of the Wherein, R represents a radius value, namely a radius value corresponding to an arc formed between the first test point and the second test point, A represents a second interval, and H represents a pressing amount.

Based on the calculation formula of the central angle, the strain testing control module 132 is further specifically configured to calculate the central angle according to the following formula:

the method comprises the steps of carrying out a first treatment on the surface of the Wherein (1)>

And the central angle is represented, namely, the central angle corresponding to an arc formed between the first test point and the second test point. />

Based on the calculation formula of the arc length, the strain test control module 132 is also specifically configured toThe surface arc distance between the first test point and the corresponding second test point is calculated by the following formula:

the method comprises the steps of carrying out a first treatment on the surface of the Wherein (1)>

Representing the surface arc spacing.

Finally, the strain test control module 132 is further specifically configured to calculate and obtain a strain value corresponding to each test point in the reference area of the chip 200 to be tested according to the following formula:

the method comprises the steps of carrying out a first treatment on the surface of the Wherein L represents a first spacing, +.>

Representing the strain value.

Taking one of the first test points in fig. 6 as a point B and the corresponding second test point as a point C as an example, the strain values corresponding to the test points formed by the points B and C at a certain moment can be calculated according to the above formulas. According to the method, strain values corresponding to test points formed by all the first test points and the second test points corresponding to the first test points can be calculated sequentially, so that the strain field of the whole reference area can be obtained, and further the cracking area and the strain values corresponding to the cracking area when the chip 200 to be tested is cracked can be obtained in real time.

It should be noted that, in fig. 5, in order to more clearly show the positional relationship between the strain testing device 130 and the chip 200 to be tested, not only the specific structure of the strain testing device 130, but also the specific structures of the chip 200 to be tested, the loading ram 121, and the first support stage 1111 and the second support stage 1112 carrying the chip 200 to be tested are shown.

In summary, the embodiment of the application mainly uses an optical non-contact strain method, such as DIC algorithm, to test and obtain the strain field of the chip 200 to be tested when bending at three points, thereby capturing the strength and the cracking area of the chip 200 to be tested.

It can be appreciated that the embodiments of the present application are not limited to capturing the strain value corresponding to each test point in the reference area of the chip 200 under test during the pressure application process by using the DIC algorithm. Of course, other methods, such as an optical strain testing method like a fringe interferometry, may be used to capture the strain value corresponding to each test point in the reference area of the chip 200 to be tested in the pressure application process, so as to determine the strength and the cracking area of the chip 200 to be tested.

For example, if the fringe interferometry is adopted, the first reference line 201 and the second reference line 202 may be not required to be manufactured on the package surface of the chip 200 to be tested, but a few line segments may be projected onto the chip 200 to be tested, during the test, the loading device 120 applies pressure to the chip 200 to be tested, and the image including the chip 200 to be tested is collected by the image capturing module 131, where the image includes the deformation generated by the line segments projected onto the chip 200 to be tested, and the strain test control module 132 may test the strength and the cracking area of the chip 200 to be tested according to the images.

The chip testing apparatus provided in the embodiment of the present application is described in detail above, and the chip testing method provided in the embodiment of the present application is described in detail below based on the chip testing apparatus shown in fig. 1. Fig. 8 is a flow chart of a chip testing method according to an embodiment of the present application. Referring to fig. 8, the chip testing method may specifically include the following steps:

in step 801, when the chip to be tested is placed on the positioning device, the positioning device calibrates the position and the flatness of the chip to be tested.

In some embodiments, after the chip 200 to be tested is placed on the positioning device 110, the positioning device 110 starts to work, which can calibrate the position and the flatness of the chip 200 to be tested, so that the testing form of the chip 200 to be tested has no problems of deviation, warpage, etc.

Wherein the positioning device 110 comprises an adjustable span support module 111, a horizontal calibration module 112, a vertical flattening module 113 and a positioning control module 114.

Firstly, the positioning control module 114 can control the span-adjustable supporting module 111 to perform span adjustment, so that the span-adjustable supporting module 111 can support the chip 200 to be tested with a corresponding size; the adjustable span support module 111 after the span adjustment, the chip 200 under test may be placed on the adjustable span support module 111.

When the chip 200 to be tested is placed on the adjustable span support module 111, the positioning control module 114 controls the horizontal calibration module 112 to move toward the first direction and controls the vertical flattening module 113 to move toward the second direction.

When the horizontal calibration module 112 moves towards the first direction, the horizontal calibration module 112 is used for driving the chip 200 to be tested to move, so as to calibrate the position of the chip 200 to be tested, and the first direction is the horizontal direction from the horizontal calibration module 112 to the chip 200 to be tested. When the vertical flattening module 113 moves towards the second direction, the vertical flattening module 113 is used for applying pressure to the edge position of the chip 200 to be tested, so as to calibrate the flatness of the chip 200 to be tested, and the second direction is the vertical direction from the vertical flattening module 113 to the chip 200 to be tested, and the first direction and the second direction are mutually perpendicular.

It should be noted that, when the horizontal calibration module 112 is controlled to move toward the first direction and the vertical flattening module 113 is controlled to move toward the second direction, the positioning control module 114 may simultaneously control the horizontal calibration module 112 and the vertical flattening module 113 to move so as to calibrate the position and the flatness of the chip 200 to be tested; alternatively, the positioning control module 114 may control the horizontal calibration module 112 to move to calibrate the position of the chip 200 to be tested, and then control the vertical flattening module 113 to move to calibrate the flatness of the chip 200 to be tested; alternatively, the positioning control module 114 may control the vertical flattening module 113 to move to calibrate the flatness of the chip 200 to be tested, and then control the horizontal calibration module 112 to move to calibrate the position of the chip 200 to be tested.

Specifically, the adjustable span support module 111 includes a first support stage 1111 and a second support stage 1112 disposed in parallel. Before the positioning device 110 performs calibration on the position and the flatness of the chip 200 to be tested, the method further includes: the positioning control module 114 controls the first support stage 1111 and the second support stage 1112 to move symmetrically about the center line of the apparatus. Wherein, the device center line 30 is a center line between the first support stage 1111 and the second support stage 1112; the chip 200 to be tested borne by the first support carrier 1111 and the second support carrier 1112 together does not exceed a first end of the first support carrier 1111 and a second end of the second support carrier 1112, wherein the first end is an end of the first support carrier 1111 away from the second support carrier 1112, and the second end is an end of the second support carrier 1112 away from the first support carrier 1111.

The horizontal calibration module 112 includes a first calibration bar 1121 and a second calibration bar 1122, and the vertical flattening module 113 includes a third calibration bar 1131 and a fourth calibration bar 1132. The positioning control module 114 controls the horizontal alignment module 112 to move toward a first direction and controls the vertical flattening module 113 to move toward a second direction, including: the positioning control module 114 controls the first calibration rod 1121 and the second calibration rod 1122 to move symmetrically toward the first direction with the device center line as the center; the positioning control module 114 controls the third calibration bar 1131 and the fourth calibration bar 1132 to simultaneously move toward the second direction centering on the device center line.

The lengths of the first calibration bar 1121, the second calibration bar 1122, the third calibration bar 1131, and the fourth calibration bar 1132 are all greater than the dimension of the chip 200 to be tested along the third direction; the third direction is the length direction of the first calibration bar 1121, the second calibration bar 1122, the third calibration bar 1131, and the fourth calibration bar 1132, and the third direction is perpendicular to the first direction and the second direction, respectively.

It can be appreciated that when the first calibration rod 1121 and the second calibration rod 1122 are used to calibrate the position of the chip 200 to be tested, a certain gap exists between the first calibration rod 1121 and the first support stage 1111, that is, the first calibration rod 1121 is not in direct contact with the first support stage 1111; there is also a gap between the second calibration rod 1122 and the second support stage 1112, i.e., the second calibration rod 1122 is not in direct contact with the second support stage 1112.

In some embodiments, the driving force of the horizontal calibration module 112 driving the chip 200 to be tested to move is less than or equal to 5N, so as to reduce damage to the chip 200 to be tested caused by excessive driving force of the horizontal calibration module 112 moving. The driving force of the vertical flattening module 113 when the vertical flattening module 113 applies pressure to the edge position of the chip 200 to be tested is less than or equal to 5N, so as to reduce damage to the chip 200 to be tested caused by excessive driving force when the vertical flattening module 113 moves.

Step 802, after calibration is completed, the loading device applies pressure to the chip to be tested.

After calibration of the position of the chip 200 to be tested using the horizontal calibration module 112 is completed, the positioning control module 114 may control the horizontal calibration module 112 to move toward a direction away from the chip 200 to be tested again so as to reset the horizontal calibration module 112. After the calibration of the flatness of the chip 200 to be tested by using the vertical flattening module 113 is completed, the positioning control module 114 may control the vertical flattening module 113 to move toward a direction away from the chip 200 to be tested again so as to reset the vertical flattening module 113.

After the horizontal calibration module 112 and the vertical flattening module 113 are reset, the loading device 120 starts to operate, which can apply pressure to the chip 200 to be tested until the chip 200 to be tested breaks.

In some embodiments, the loading device 120 includes a loading ram 121 and a loading control module 122. The loading control module 122 controls the loading pressure head 121 to move towards the direction of the chip 200 to be tested so as to apply pressure to the chip 200 to be tested through the loading pressure head 121; in the pressure application process, the loading pressure head 121 collects the pressure applied by the chip 200 to be tested and the displacement generated when the chip 200 to be tested is deformed; the load ram 121 sends the pressure and displacement to the load control module 122; the loading control module 122 calculates the pressing amount of the loading pressure head 121 when the chip 200 to be tested applies pressure according to the pressure and the displacement; the load control module 122 sends the amount of depression to the strain testing device 130.

The loading ram 121 may include a mechanical ram body, a fourth drive mechanism, a pressure sensor, a displacement sensor, and the like. The loading control module 122 drives the pressure head body to move towards the second direction by controlling the fourth driving mechanism, so that after the pressure head body is contacted with the chip 200 to be tested, pressure can be applied to the chip 200 to be tested through the pressure head body; the pressure sensor collects the pressure applied by the pressure head body to the chip 200 to be tested in real time and sends the collected pressure to the loading control module 122; the displacement sensor collects displacement generated when the chip 200 to be tested is deformed in real time in the process that the pressure head body applies pressure to the chip 200 to be tested, and sends the collected displacement to the loading control module 122.

The loading control module 122 may generate a pressure displacement curve according to the pressure and the displacement, and further calculate the pressing amount of the loading ram 121 when the chip 200 to be tested is pressed according to the pressure displacement curve. Finally, the load control module 122 sends the calculated amount of depression to the strain test control module 132 in the strain test device 130.

Step 803, when the strain testing device detects that the chip to be tested breaks, strain values corresponding to a plurality of testing points in a reference area of the chip to be tested; the loading device has a pressure application area which is at least partially overlapped with the reference area when the loading device applies pressure on the chip to be tested.

After the horizontal calibration module 112 and the vertical flattening module 113 are reset, the strain testing device 130 also starts to operate, that is, the loading device 120 and the strain testing device 130 start to operate simultaneously, so as to detect strain values corresponding to a plurality of test points in the reference area of the chip 200 to be tested when the chip 200 to be tested is broken.

A reference area is provided on the package surface of the chip 200 to be tested, and a pressure application area when the loading device 120 applies pressure on the chip 200 to be tested has at least a partial overlapping area with the reference area. When the strain testing device 130 detects that the chip 200 to be tested is broken, strain values corresponding to a plurality of testing points in the reference area of the chip 200 to be tested include: during the pressure application process, the strain testing device 130 detects strain values corresponding to a plurality of testing points in the reference area of the chip 200 under test in real time. In this way, when the loading device 120 applies pressure to the chip 200 to be tested to cause the chip 200 to be tested to fracture, the strain testing device 130 can also detect the strain values corresponding to the plurality of test points in the reference area of the chip 200 to be tested when the chip 200 to be tested fractures.

In the embodiment of the present application, the DIC algorithm may be used to test the strength and the cracking area of the chip 200 to be tested. In the DIC algorithm, a first reference line and a second reference line are fabricated on the package surface of the chip 200 to be tested by means of laser engraving or silk screen printing, so that a reference area is formed on the package surface of the chip 200 to be tested. Specifically, the reference area includes a first reference line 201 and a second reference line 202 on the chip 200 to be tested, and the first reference line 201 and the second reference line 202 extend along a third direction.

In order to detect the strength and the cracking area of the chip 200 to be tested, a plurality of test points may be divided in advance in a reference area, and each of the plurality of test points in the reference area includes a first test point located on the first reference line 201 and a second test point located on the second reference line 202, and coordinate values of the first test point and the second test point in the third direction are the same.

Before the loading device 120 applies pressure to the chip 200 to be tested, the method further includes: the strain testing device 130 obtains a first distance between each first test point and its corresponding second test point on the chip 200 to be tested before the pressure is applied. During the pressure application process, the strain testing device 130 detects strain values corresponding to a plurality of testing points in the 200 reference area of the chip to be tested in real time, including: the strain testing device 130 obtains a second interval between each first test point and a corresponding second test point on the chip 200 to be tested in the pressure applying process; the strain testing device 130 calculates a strain value corresponding to each test point in the reference area of the chip 200 to be tested according to the first interval, the second interval, and the pressing amount sent by the loading device 120.

In some embodiments, the strain testing device 130 includes a camera module 131 and a strain testing control module 132. The strain testing device 130 obtains a first distance between each first test point and its corresponding second test point on the chip 200 to be tested before the pressure is applied, including: the camera module 131 collects a first image including the chip 200 to be tested before the pressure is applied; the camera module 131 sends the first image to the strain test control module 132; the strain test control module 132 identifies a first spacing between each first test point and its corresponding second test point in the first image. The strain testing device 130 obtains a second distance between each first test point and a corresponding second test point on the chip 200 to be tested in the pressure application process, where the second distance includes: the camera module 131 collects a second image including the chip 200 to be tested in the pressure application process; the camera module 131 sends the second image to the strain test control module 132; the strain test control module 132 identifies a second spacing between each first test point and its corresponding second test point in the second image.

In one possible implementation, the strain test control module 132 calculates a strain value corresponding to each test point in the reference area of the chip 200 to be tested as follows: the strain test control module 132 calculates a radius value according to the second interval and the pressing amount; the strain test control module 132 calculates a central angle according to the second interval and the radius value; the strain test control module 132 calculates and obtains the surface arc distance between each first test point and the corresponding second test point according to the central angle and the radius value; the strain test control module 132 calculates a strain value corresponding to each test point in the reference area of the chip 200 to be tested according to the surface arc distance and the first distance.

Because of each first test point on the first reference line 201, the surface arc spacing between the second test point corresponding to the first test point on the second reference line 202 may be as shown in FIG. 7

. Therefore, based on the geometric schematic shown in fig. 7, the calculation of the surface arc distance can be simplified to the problem of calculating the arc length by knowing the chord length and chord height.

Specifically, the strain test control module 132 calculates the radius value by the following formula:

the method comprises the steps of carrying out a first treatment on the surface of the Wherein R represents a radius value, a represents a second pitch, and H represents a pressing amount. The strain test control module 132 calculates the central angle by the following formula: />

The method comprises the steps of carrying out a first treatment on the surface of the Wherein (1)>

Representing the central angle. The strain test control module 132 calculates the surface arc distance between the first test point and the corresponding second test point according to the following formula: />

The method comprises the steps of carrying out a first treatment on the surface of the Wherein (1)>

Representing the surface arc spacing. The strain test control module 132 calculates a strain value corresponding to each test point in the reference area of the chip 200 to be tested according to the following formula: />

The method comprises the steps of carrying out a first treatment on the surface of the Wherein L represents a first spacing, +.>

Representing the strain value.

Taking one of the first test points in fig. 6 as a point B and the corresponding second test point as a point C as an example, the strain values corresponding to the test points formed by the points B and C at a certain moment can be calculated according to the above formulas. According to the method, strain values corresponding to test points formed by all the first test points and the second test points corresponding to the first test points can be calculated sequentially, so that the strain field of the whole reference area can be obtained, and further the cracking area and the strain values corresponding to the cracking area when the chip 200 to be tested is cracked can be obtained in real time.

In step 804, the strain testing device determines the cracking area and the strength of the chip to be tested when the chip to be tested is cracked according to the strain values corresponding to the plurality of test points.

After the strain testing device 130 detects strain values corresponding to a plurality of test points in the reference area of the chip 200 to be tested when the chip 200 to be tested is broken, the strain testing control module 132 in the strain testing device 130 can determine the cracking area and the strength of the chip to be tested when the chip 200 to be tested is broken according to the strain values corresponding to the plurality of test points when the chip 200 to be tested is broken.

In one possible implementation manner, the strain testing device 130 determines, as the strength of the chip 200 to be tested, the maximum value of the strain values corresponding to the plurality of test points when the chip 200 to be tested breaks, and determines, as the initiation region, the test point corresponding to the maximum strain value when the chip 200 to be tested breaks (i.e., the maximum value of the strain values when the chip 200 to be tested breaks).

Therefore, taking the chip 200 to be tested as a packaged chip as an example, the package strength level of the chip 200 to be tested can be accurately estimated according to the test method of the embodiment of the present application.

In summary, before testing the chip 200 to be tested, the embodiment of the present application calibrates the position and the flatness of the chip 200 to be tested, so as to solve the problems of deviation, warpage and the like of the chip 200 to be tested during testing, thereby improving the stability and the accuracy of the test result of the chip 200 to be tested; in addition, by capturing strain values corresponding to a plurality of test points in the reference area of the chip 200 to be tested, the cracking area and the strength of the chip to be tested when the chip 200 to be tested is cracked can be accurately captured, and the real strain values of the cracking area can be obtained by testing different chips 200 to be tested, so that the deviation of the strength test results of different chips 200 to be tested is reduced; in addition, the embodiment of the application does not need to adopt a strain gauge for detection, so that the problem of strength reinforcement of the chip 200 to be detected caused by the strain gauge is avoided, and the stability and accuracy of the test result of the chip 200 to be detected are improved.

Embodiments of the present application are described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems) according to embodiments of the application. It will be understood that each flow and/or block of the flowchart illustrations and/or block diagrams, and combinations of flows and/or blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processing unit of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processing unit of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.

The foregoing detailed description of the embodiments has further described the objects, technical solutions and advantageous effects of the present application, and it should be understood that the foregoing is only a detailed description of the present application and is not intended to limit the scope of the present application, and any modifications, equivalent substitutions, improvements, etc. made on the basis of the technical solutions of the present application should be included in the scope of protection of the present application.

Claims (22)

1. A chip testing method, characterized by being applied to a chip testing apparatus, the chip testing apparatus including a positioning device, a loading device, and a strain testing device, the method comprising:

when a chip to be tested is placed on the positioning device, the positioning device calibrates the position and the flatness of the chip to be tested;

after calibration is completed, the loading device applies pressure to the chip to be tested;

the strain testing device detects strain values corresponding to a plurality of testing points in a reference area of the chip to be tested; the loading device is used for loading the chip to be tested, and the loading device is used for loading the chip to be tested;

the strain testing device determines a cracking area when the chip to be tested is cracked and the strength of the chip to be tested according to strain values corresponding to the plurality of testing points when the chip to be tested is cracked; the strength of the chip to be tested is the maximum value in the strain values corresponding to the plurality of test points when the chip to be tested breaks, and the cracking area is the test point corresponding to the maximum value.

2. The method of claim 1, wherein the positioning device comprises an adjustable span support module, a horizontal calibration module, a vertical flattening module, and a positioning control module; when the chip to be tested is placed on the positioning device, the positioning device calibrates the position and the flatness of the chip to be tested, and the positioning device comprises:

When the chip to be tested is placed on the adjustable span support module, the positioning control module controls the horizontal calibration module to move towards a first direction and controls the vertical flattening module to move towards a second direction;

the horizontal calibration module is used for driving the chip to be tested to move when moving towards the first direction so as to calibrate the position of the chip to be tested, and the first direction is the horizontal direction from the horizontal calibration module to the chip to be tested; when the vertical flattening module moves towards the second direction, the vertical flattening module is used for applying pressure to the edge position of the chip to be tested to calibrate the flatness of the chip to be tested, the second direction is the vertical direction from the vertical flattening module to the chip to be tested, and the first direction and the second direction are mutually perpendicular.

3. The method of claim 2, wherein the adjustable span support module comprises a first support stage and a second support stage disposed in parallel; before the positioning device calibrates the position and the flatness of the chip to be measured, the method further comprises:

The positioning control module controls the first supporting carrier and the second supporting carrier to move symmetrically by taking the center line of the equipment as the center;

wherein the equipment center line is a center line between the first support carrier and the second support carrier; the first support carrier and the second support carrier bear the chip to be tested together and do not exceed the first end of the first support carrier and the second end of the second support carrier, the first end is the end of the first support carrier far away from the second support carrier, and the second end is the end of the second support carrier far away from the first support carrier.

4. A method according to claim 3, wherein the horizontal calibration module comprises a first calibration bar and a second calibration bar, and the vertical flattening module comprises a third calibration bar and a fourth calibration bar; the positioning control module controls the horizontal calibration module to move towards a first direction and controls the vertical flattening module to move towards a second direction, comprising:

the positioning control module controls the first calibration rod and the second calibration rod to move towards the first direction symmetrically by taking the center line of the equipment as a center;

The positioning control module controls the third calibration rod and the fourth calibration rod to move towards the second direction at the same time by taking the center line of the equipment as the center;

the lengths of the first calibration rod, the second calibration rod, the third calibration rod and the fourth calibration rod are larger than the dimension of the chip to be tested along a third direction; the third direction is the length direction of the first calibration rod, the second calibration rod, the third calibration rod and the fourth calibration rod, and the third direction is perpendicular to the first direction and the second direction respectively.

5. The method of claim 2, wherein the driving force of the horizontal calibration module when driving the chip to be tested to move is less than or equal to 5N; and the driving force of the vertical flattening module when the vertical flattening module applies pressure to the edge position of the chip to be tested is less than or equal to 5N.

6. The method of claim 4, wherein the loading device comprises a loading ram and a loading control module; the loading device applies pressure to the chip to be tested, and the loading device comprises:

the loading control module controls the loading pressure head to move towards the direction of the chip to be tested so as to apply pressure to the chip to be tested through the loading pressure head;

In the pressure application process, the loading pressure head collects the pressure applied to the chip to be tested and the displacement generated when the chip to be tested is deformed;

the loading ram sending the pressure and the displacement to the loading control module;

the loading control module calculates the pressing amount of the loading pressure head when the loading pressure head applies pressure to the chip to be tested according to the pressure and the displacement;

and the loading control module sends the pressing quantity to the strain testing device.

7. The method of claim 6, wherein the strain testing device detects strain values corresponding to a plurality of test points in a reference area of the chip under test, comprising:

in the pressure applying process, the strain testing device detects strain values corresponding to a plurality of testing points in the reference area of the chip to be tested in real time.

8. The method of claim 7, wherein the reference area comprises a first reference line and a second reference line on the chip under test, the first reference line and the second reference line extending along a third direction; each test point in the plurality of test points comprises a first test point positioned on the first reference line and a second test point positioned on the second reference line, and the coordinate values of the first test point and the second test point along the third direction are the same;

Before the loading device applies pressure to the chip to be tested, the method further comprises:

before the strain testing device obtains pressure application, a first interval between each first test point and the corresponding second test point on the chip to be tested;

in the pressure applying process, the strain testing device detects strain values corresponding to a plurality of testing points in a reference area of the chip to be tested in real time, and the strain testing device comprises:

the strain testing device obtains a second interval between each first test point and the corresponding second test point on the chip to be tested in the pressure application process;

and the strain testing device calculates a strain value corresponding to each testing point in the reference area of the chip to be tested according to the first interval, the second interval and the pressing quantity sent by the loading device.

9. The method of claim 8, wherein the strain testing device comprises a camera module and a strain testing control module; before the strain testing device obtains pressure application, a first interval between each first test point and the corresponding second test point on the chip to be tested comprises the following steps:

The camera module acquires a first image comprising the chip to be tested before pressure application;

the camera module sends the first image to the strain test control module;

the strain test control module identifies a first distance between each first test point and the corresponding second test point in the first image;

in the process of obtaining pressure application, the strain testing device obtains a second interval between each first test point and the corresponding second test point on the chip to be tested, and the second interval comprises the following steps:

the camera module acquires a second image comprising the chip to be tested in the pressure application process;

the camera module sends the second image to the strain test control module;

the strain test control module identifies a second spacing between each first test point and its corresponding second test point in the second image.

10. The method of claim 9, wherein the calculating, by the strain testing device, a strain value corresponding to each test point in the reference area of the chip under test according to the first pitch, the second pitch, and the pressing amount sent by the loading device, includes:

The strain test control module calculates a radius value according to the second interval and the pressing quantity;

the strain test control module calculates and obtains a central angle according to the second interval and the radius value;

the strain test control module calculates and obtains the surface arc distance between each first test point and the corresponding second test point according to the central angle and the radius value;

and the strain test control module calculates and obtains a strain value corresponding to each test point in the reference area of the chip to be tested according to the surface arc distance and the first distance.

11. The method of claim 10, wherein the strain test control module calculates a radius value based on the second distance and the amount of depression, comprising:

the strain test control module calculates the radius value according to the following formula:

；

the strain test control module calculates a central angle according to the second interval and the radius value, and the method comprises the following steps:

the strain test control module calculates the central angle through the following formula:

；

the strain test control module calculates the surface arc distance between each first test point and the corresponding second test point according to the central angle and the radius value, and the method comprises the following steps:

The strain test control module calculates the first test according to the following formulaSurface arc spacing between test points and the corresponding second test points:

；

the strain test control module calculates a strain value corresponding to each test point in the reference area of the chip to be tested according to the surface arc distance and the first distance, and the strain test control module comprises:

the strain test control module calculates and obtains a strain value corresponding to each test point in the reference area of the chip to be tested through the following formula:

；

wherein R represents the radius value, A represents the second pitch, H represents the depression amount,

representing said central angle>

Representing the surface arc spacing, L representing the first spacing, +.>

Representing the strain value.

12. The chip testing equipment is characterized by comprising a positioning device, a loading device and a strain testing device;

the positioning device is used for calibrating the position and the flatness of the chip to be tested when the chip to be tested is placed on the positioning device;

the loading device is used for applying pressure to the chip to be tested after calibration is completed;

the strain testing device is used for detecting strain values corresponding to a plurality of testing points in a reference area of the chip to be tested; the loading device is used for loading the chip to be tested, and the loading device is used for loading the chip to be tested;

The strain testing device is further used for determining a cracking area when the chip to be tested is cracked and the strength of the chip to be tested according to strain values corresponding to the plurality of testing points when the chip to be tested is cracked; the strength of the chip to be tested is the maximum value in the strain values corresponding to the plurality of test points when the chip to be tested breaks, and the cracking area is the test point corresponding to the maximum value.

13. The apparatus of claim 12, wherein the positioning device comprises an adjustable span support module, a horizontal calibration module, a vertical flattening module, and a positioning control module;

the positioning control module is used for controlling the horizontal calibration module to move towards a first direction and controlling the vertical flattening module to move towards a second direction when the chip to be tested is placed on the adjustable span support module;

the horizontal calibration module is used for driving the chip to be tested to move when moving towards the first direction so as to calibrate the position of the chip to be tested, and the first direction is the horizontal direction from the horizontal calibration module to the chip to be tested; when the vertical flattening module moves towards the second direction, the vertical flattening module is used for applying pressure to the edge position of the chip to be tested to calibrate the flatness of the chip to be tested, the second direction is the vertical direction from the vertical flattening module to the chip to be tested, and the first direction and the second direction are mutually perpendicular.

14. The apparatus of claim 13, wherein the adjustable span support module comprises a first support stage and a second support stage disposed in parallel;

the positioning control module is also used for controlling the first support carrier and the second support carrier to symmetrically move by taking the center line of the equipment as the center;

wherein the equipment center line is a center line between the first support carrier and the second support carrier; the first support carrier and the second support carrier bear the chip to be tested together and do not exceed the first end of the first support carrier and the second end of the second support carrier, the first end is the end of the first support carrier far away from the second support carrier, and the second end is the end of the second support carrier far away from the first support carrier.

15. The apparatus of claim 14, wherein the horizontal calibration module comprises a first calibration bar and a second calibration bar, and the vertical flattening module comprises a third calibration bar and a fourth calibration bar;

the positioning control module is specifically configured to control the first calibration rod and the second calibration rod to move symmetrically towards the first direction with the center line of the device as a center;

The positioning control module is further specifically configured to control the third calibration rod and the fourth calibration rod to move towards the second direction simultaneously with the center line of the device as a center;

the lengths of the first calibration rod, the second calibration rod, the third calibration rod and the fourth calibration rod are larger than the dimension of the chip to be tested along a third direction; the third direction is the length direction of the first calibration rod, the second calibration rod, the third calibration rod and the fourth calibration rod, and the third direction is perpendicular to the first direction and the second direction respectively.

16. The apparatus of claim 13, wherein the driving force of the horizontal calibration module when driving the chip to be tested to move is less than or equal to 5N; and the driving force of the vertical flattening module when the vertical flattening module applies pressure to the edge position of the chip to be tested is less than or equal to 5N.

17. The apparatus of claim 15, wherein the loading device comprises a loading ram and a loading control module;

the loading control module is used for controlling the loading pressure head to move towards the direction of the chip to be tested so as to apply pressure to the chip to be tested through the loading pressure head;

The loading pressure head is used for collecting the pressure applied to the chip to be tested and the displacement generated when the chip to be tested is deformed in the pressure application process;

the loading pressure head is further used for sending the pressure and the displacement to the loading control module;

the loading control module is further used for calculating the pressing amount of the loading pressure head when the loading pressure head applies pressure to the chip to be tested according to the pressure and the displacement;

the loading control module is further used for sending the pressing quantity to the strain testing device.

18. The apparatus of claim 17, wherein the strain testing device is specifically configured to detect strain values corresponding to a plurality of test points in the reference area of the chip under test in real time during the pressure application process.

19. The apparatus of claim 18, wherein the reference area comprises a first reference line and a second reference line on the chip under test, the first reference line and the second reference line extending along a third direction; each test point in the plurality of test points comprises a first test point positioned on the first reference line and a second test point positioned on the second reference line, and the coordinate values of the first test point and the second test point along the third direction are the same;

The strain testing device is further used for acquiring a first interval between each first test point and the corresponding second test point on the chip to be tested before pressure is applied;

the strain testing device is further specifically configured to obtain a second distance between each first test point and the corresponding second test point on the chip to be tested in the pressure application process;

the strain testing device is further specifically configured to calculate a strain value corresponding to each test point in the reference area of the chip to be tested according to the first interval, the second interval, and the pressing amount sent by the loading device.

20. The apparatus of claim 19, wherein the strain testing device comprises a camera module and a strain testing control module;

the camera module is used for collecting a first image comprising the chip to be tested before pressure application;

the camera module is further used for sending the first image to the strain test control module;

the strain test control module is used for identifying a first interval between each first test point and the corresponding second test point in the first image;

The camera module is also used for collecting a second image comprising the chip to be tested in the pressure application process;

the camera module is further used for sending the second image to the strain test control module;

the strain test control module is further configured to identify a second distance between each first test point and the corresponding second test point in the second image.

21. The apparatus of claim 20, wherein the strain test control module is further configured to calculate a radius value based on the second distance and the amount of depression;

the strain test control module is further used for calculating a central angle according to the second interval and the radius value;

the strain test control module is further used for calculating and obtaining the surface arc distance between each first test point and the corresponding second test point according to the central angle and the radius value;

the strain test control module is further configured to calculate, according to the surface arc distance and the first distance, a strain value corresponding to each test point in the reference area of the chip to be tested.

22. The apparatus of claim 21, wherein the strain test control module is configured to calculate the radius value by:

；

The strain test control module is further specifically configured to calculate the central angle according to the following formula:

；

the strain test control module is further specifically configured to calculate and obtain a surface arc distance between the first test point and the second test point corresponding to the first test point according to the following formula:

；

the strain test control module is further specifically configured to calculate and obtain a strain value corresponding to each test point in the reference area of the chip to be tested according to the following formula:

；

wherein R represents the radius value, A represents the second pitch, H represents the depression amount,

representing said central angle>

Representing the surface arc spacing, L representing the first spacing, +.>

Representing the strain value.

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