CN115800439B - Battery through protection circuit and control method thereof - Google Patents

Battery through protection circuit and control method thereof Download PDF

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Publication number
CN115800439B
CN115800439B CN202211468100.8A CN202211468100A CN115800439B CN 115800439 B CN115800439 B CN 115800439B CN 202211468100 A CN202211468100 A CN 202211468100A CN 115800439 B CN115800439 B CN 115800439B
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output
branch circuit
port
voltage
circuit
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CN115800439A (en
Inventor
欧炜昌
黄鹏
赵智星
谢峰
詹海峰
胡宪权
杨光明
冷昭君
徐超群
唐再军
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Hunan Pengyao Technology Co ltd
Hunan Giantsun Power Electronics Co Ltd
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Hunan Pengyao Technology Co ltd
Hunan Giantsun Power Electronics Co Ltd
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    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
    • Y02E60/10—Energy storage using batteries

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Abstract

The invention provides a battery through protection circuit and a control method thereof, comprising the following steps: a through branch circuit, a protection branch circuit and a micro control unit; the direct-through branch circuit is used for realizing the output of the battery voltage; the protection branch circuit is respectively connected with the through branch circuit and the micro control unit, and is used for combining the micro control unit to protect the through branch circuit when the output of the through branch circuit is short-circuited, the output of the through branch circuit is overcurrent or the external power supply reversely flows into the through branch circuit. The circuit of the invention has no voltage-boosting chip, and can effectively control and reduce the cost; the output efficiency of the circuit can reach 96%, the loss is low, the heat is less, and the circuit meets the low-carbon environment-friendly requirement; the output current of the circuit is large and can reach 10AMax; the circuit has simple structure, good stability and convenient maintenance.

Description

Battery through protection circuit and control method thereof
Technical Field
The patent belongs to the technical field of energy storage power supplies, and particularly relates to a battery through protection circuit and a control method thereof.
Background
With the increasing demand of electronic products for portability, more and more electronic products are powered by batteries, and at the same time, a higher demand is put on the service life of the batteries, and in order to delay the service life of the electronic products, currently, rechargeable batteries, such as lithium batteries, are basically used for power supply of various devices, and for safety, protection circuits are usually provided to realize protection functions of overcharging, overdischarging, overcurrent, overtemperature and the like of the rechargeable batteries in the use process.
At present, a plurality of interfaces for outputting 12V of direct current of an energy storage power supply exist in the market, and the common application is to control and output 12V of voltage through voltage rising and falling; meanwhile, the cost of the finished product of the voltage-increasing and voltage-decreasing chip is too high due to backorder or price rising, and the price competitiveness of the product is also lacked.
Therefore, there is a need for a battery through protection circuit and a control method thereof.
Disclosure of Invention
The invention provides a battery through protection circuit and a control method thereof, wherein the circuit can directly output 12V without a buck-boost chip and has the functions of output overvoltage protection and output undervoltage protection; compared with the traditional buck-boost mode, the circuit mode has the advantages of low cost, simple circuit, good stability, no need of adding an extra buck-boost chip, larger output current, higher efficiency and 96 percent maximum.
A battery through protection circuit comprising: a through branch circuit, a protection branch circuit and a micro control unit; the direct-through branch circuit is used for realizing the output of the battery voltage; the protection branch circuit is respectively connected with the through branch circuit and the micro control unit, and is used for combining the micro control unit to protect the through branch circuit when the output of the through branch circuit is short-circuited, the output of the through branch circuit is overcurrent or the external power supply reversely flows into the through branch circuit.
Further, the through branch circuit includes an NMOS transistor Q13, a PMOS transistor Q12, an NMOS transistor Q1, an NMOS transistor Q8, a capacitor C261, a transistor Q35, a diode D7, a resistor R2, a resistor R3, a resistor R35, a resistor R48, and a port P2 and a port P3; the battery pin is connected with the triode Q35, then connected with the capacitor C261, then connected with the source electrode of the PMOS tube Q12, the drain electrode of the PMOS tube Q12 is connected with the diode D7, the resistor R35 and the resistor R48, then connected with the NMOS tube Q1 and the NMOS tube Q8, and the NMOS tube Q8 is connected with the port P2 and the port P3; the NMOS tube Q1 is connected with a resistor R2 and a resistor R3 which are connected in parallel;
The protection branch circuit comprises a first protection sub-branch circuit, a second protection sub-branch circuit and a third protection sub-branch circuit which are connected with each other; the first protection sub-branch circuit is connected with the through branch circuit, and the second protection sub-branch circuit is connected with the micro control unit; the first protection subcircuit comprises an operational amplifier U1, a resistor R5, a resistor R6, a resistor R7, a capacitor C2 and a capacitor C3; the second protection subcircuit comprises an operational amplifier U12, a resistor R44, a resistor R45, a resistor R46, a resistor R47, a capacitor C36 and a capacitor C37; the third protection subcircuit includes an operational amplifier U30, a resistor R270, a resistor R271, a resistor R272, a resistor R273, a capacitor C271, a capacitor C272, a capacitor C273, a diode D20, a diode D21, and an NMOS transistor Q37.
A battery through protection circuit control method includes:
s1: when the DC output of the enabling end in the through branch circuit is at a low level, the NMOS tube Q13 in the through branch circuit is configured to be in a closed state, and the control port P2 and the port P3 do not output battery voltage;
S2: when the direct current output of the enabling end in the direct-current branch circuit is at a high level, the NMOS tube Q13 in the direct-current branch circuit is configured to be in an open state, and the port P2 and the port P3 are controlled to output battery voltage;
S3: when the DC output of the enabling end in the straight-through branch circuit is at a high level, the NMOS tube Q13 in the straight-through branch circuit is configured to be in an open state, and when an output short circuit condition occurs, the operational amplifier U30 in the protection branch circuit is used for increasing the voltage of the negative electrode, the high level is output at the positive electrode, and the port P2 and the port P3 are controlled not to output the battery voltage;
S4: when the DC output of the enabling end in the straight-through branch circuit is at a high level, an NMOS tube Q13 in the straight-through branch circuit is configured to be in an open state, when an output overcurrent condition occurs, the output voltage of the NMOS tube Q13 in the straight-through branch circuit is increased by utilizing an operational amplifier U12 in the protection branch circuit, and the DC output of the enabling end in the straight-through branch circuit is controlled to be at a low level by utilizing the micro control unit, so that the ports P2 and P3 do not output battery voltage;
s5: when the DC output of the enabling end in the through branch circuit is at a high level, the NMOS tube Q13 in the through branch circuit is configured to be in an open state, and when the reverse voltage filling condition of an external power supply from the output port of the port P2 or the output port of the port P3 occurs, the operational amplifier U1 in the protection branch circuit is utilized to operate and amplify the voltage, the micro control unit is utilized to control the DC output of the enabling end in the through branch circuit to be converted into a low level, so that the ports P2 and P3 do not output the battery voltage.
Further, S1 includes: when the DC output of the enabling end in the DC branch circuit is low level, the NMOS transistor Q13 is in a closed state, the grid electrode of the PMOS transistor Q12 is the same as the battery voltage VBAT, the PMOS transistor Q12 is in a closed state, the NMOS transistors Q1 and Q8 are also in a closed state, and the ports P2 and P3 have no output.
Further, S2 includes: when the DC output of the enabling end in the DC branch circuit is at a high level, the NMOS tube Q13 is opened, the grid electrode of the PMOS tube Q12 is in short circuit with the ground voltage, the battery voltage VBAT flows to the source stage of the PMOS tube Q12 through the triode Q35, the PMOS tube Q12 is opened, the VBAT flows through the diode D7, the resistor R35 and the resistor R48 and then is used as the grid electrode driving voltage of the NMOS tube Q1 and the NMOS tube Q8 to drive the NMOS tube Q1 and the NMOS tube Q8 to be opened, and the battery voltage VBAT is output from the port P2 and the port P3.
Further, S3 includes: when the direct current output of an enabling end in the direct current branch circuit is at a high level, the port P2 and the port P3 are in an output opening state, when an output short circuit condition occurs, the negative voltage of the operational amplifier U30 is increased, when the negative voltage reaches a preset positive voltage, the positive electrode of the operational amplifier U30 outputs a high level, the NMOS tube Q37 controls the direct current short circuit protection end voltage to be consistent with the ground voltage, the NMOS tube Q13 is closed, the PMOS tube Q12 is closed, the NMOS tube Q1 and the NMOS tube Q8 are closed, and the port P2 and the port P3 are not output.
Further, S4 includes: when the DC output of the enabling end in the direct-pass branch circuit is in a high level, the port P2 and the port P3 are in an output open state, when an output overcurrent condition occurs, the positive voltage of the operational amplifier U12 is increased, the output voltage of the operational amplifier U12 is 85.5 times of the positive detection voltage through a preset voltage dividing resistor of the positive electrode, the output end of the operational amplifier U12 is reversely connected to the micro control unit, the micro control unit is utilized to compare the preset voltage value with the detection voltage value, the DC output level of the enabling end is controlled according to the comparison result, when the detection voltage value is consistent with the preset voltage value, the DC output of the enabling end is in a low level, the NMOS tube Q1 and the NMOS tube Q8 are closed, and the ports P2 and P3 are not output.
Further, S5 includes: when the direct current output of an enabling end in the direct current branch circuit is at a high level, the port P2 and the port P3 are in an output opening state, and when the reverse filling voltage condition of an external power supply from the port P2 or the port P3 output port occurs, the negative voltage of the operational amplifier U1 is increased, and the operational amplifier U1 is used for increasing the voltage by 101 times; and comparing the preset voltage value with the detection voltage value by utilizing the micro control unit, controlling the level of the output voltage of the end I according to the comparison result, enabling the direct current output of the end I to be low level after the detection voltage value is consistent with the preset voltage value, closing the NMOS tube Q1 and the NMOS tube Q8, and enabling the port P2 and the port P3 not to be output.
Further, S6, performing functional test on the protection branch circuit to obtain an early warning coping scheme of the abnormal working state of the protection branch circuit; the method comprises the following specific steps:
s601: connecting the test through circuit with the protection branch circuit;
S602: the micro control unit is used for respectively testing the conditions of output short circuit and output overcurrent of the test direct-current circuit and the reverse filling voltage of the external power supply from the output port of the port P2 or the output port of the port P3 to obtain test data;
s603: based on the test data for a plurality of times, recording and counting the component parameter range of the protection branch circuit in a normal working state to generate a component parameter data table;
S604: based on the component parameter data table and the component basic parameter data, normal working thresholds and abnormal working state early warning prompts of a plurality of components of the protection branch circuit are set by combining the component history common fault data.
Further, the method also comprises S7, aiming at the situation that the through circuit has overcurrent and reverse-filling voltage, carrying out risk judgment and maintenance on the circuit components; the method comprises the following specific steps:
s701: collecting a first voltage value when the through circuit has overcurrent or reverse-filling voltage conditions based on a preset sensing device;
S702: when the first voltage value is smaller than a preset voltage value, acquiring the first voltage value;
S703: acquiring a corresponding component loss influence value according to a first voltage value based on a preset voltage value-component loss influence value matching template;
S704: accumulating a plurality of component loss influence values to obtain component accumulation loss influence values, acquiring corresponding component risk levels based on a preset component accumulation loss influence value-component risk level value template, and maintaining according to a preset maintenance strategy according to the component risk levels.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention may be realized and attained by the structure particularly pointed out in the written description and drawings.
The technical scheme of the invention is further described in detail through the drawings and the embodiments.
Drawings
The accompanying drawings are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate the invention and together with the embodiments of the invention, serve to explain the invention. In the drawings:
FIG. 1 is a schematic diagram of a battery through protection circuit according to the present invention;
FIG. 2 is a schematic diagram of the steps of a method for functional testing of a protection branch circuit according to the present invention;
Fig. 3 is a schematic diagram of the steps of the method for risk determination and maintenance of circuit components according to the present invention.
Detailed Description
The preferred embodiments of the present invention will be described below with reference to the accompanying drawings, it being understood that the preferred embodiments described herein are for illustration and explanation of the present invention only, and are not intended to limit the present invention.
The invention provides a battery through protection circuit and a control method thereof, as shown in figure 1, comprising the following steps: a through branch circuit, a protection branch circuit and a micro control unit; the direct-through branch circuit is used for realizing the output of the battery voltage; the protection branch circuit is respectively connected with the through branch circuit and the micro control unit, and is used for combining the micro control unit to protect the through branch circuit when the output of the through branch circuit is short-circuited, the output of the through branch circuit is overcurrent or the external power supply reversely flows into the through branch circuit.
The working principle of the technical scheme is as follows: comprising the following steps: a through branch circuit, a protection branch circuit and a micro control unit; the direct-through branch circuit is used for realizing the output of the battery voltage; the protection branch circuit is respectively connected with the through branch circuit and the micro control unit, and is used for combining the micro control unit to protect the through branch circuit when the output of the through branch circuit is short-circuited, the output of the through branch circuit is overcurrent or the external power supply reversely flows into the through branch circuit.
The beneficial effects of the technical scheme are as follows: by adopting the scheme provided by the embodiment, the circuit can directly output 12V without a buck-boost chip and has the output overvoltage protection and the output undervoltage protection; compared with the traditional buck-boost mode, the circuit mode has the advantages of low cost, simple circuit, good stability, no need of adding an extra buck-boost chip, larger output current, higher efficiency and 96 percent maximum.
In one embodiment, the pass-through branch circuit includes an NMOS transistor Q13, a PMOS transistor Q12, an NMOS transistor Q1, and an NMOS transistor Q8, and a capacitor C261, a transistor Q35, a diode D7, a resistor R2, a resistor R3, a resistor R35, and a resistor R48, and a port P2 and a port P3; the battery pin is connected with the triode Q35, then connected with the capacitor C261, then connected with the source electrode of the PMOS tube Q12, the drain electrode of the PMOS tube Q12 is connected with the diode D7, the resistor R35 and the resistor R48, then connected with the NMOS tube Q1 and the NMOS tube Q8, and the NMOS tube Q8 is connected with the port P2 and the port P3; the NMOS tube Q1 is connected with a resistor R2 and a resistor R3 which are connected in parallel;
The protection branch circuit comprises a first protection sub-branch circuit, a second protection sub-branch circuit and a third protection sub-branch circuit which are connected with each other; the first protection sub-branch circuit is connected with the through branch circuit, and the second protection sub-branch circuit is connected with the micro control unit; the first protection subcircuit comprises an operational amplifier U1, a resistor R5, a resistor R6, a resistor R7, a capacitor C2 and a capacitor C3; the second protection subcircuit comprises an operational amplifier U12, a resistor R44, a resistor R45, a resistor R46, a resistor R47, a capacitor C36 and a capacitor C37; the third protection subcircuit includes an operational amplifier U30, a resistor R270, a resistor R271, a resistor R272, a resistor R273, a capacitor C271, a capacitor C272, a capacitor C273, a diode D20, a diode D21, and an NMOS transistor Q37.
The working principle of the technical scheme is as follows: the through branch circuit comprises an NMOS tube Q13, a PMOS tube Q12, an NMOS tube Q1, an NMOS tube Q8, a capacitor C261, a triode Q35, a diode D7, a resistor R2, a resistor R3, a resistor R35, a resistor R48, a port P2 and a port P3; the battery pin is connected with the triode Q35, then connected with the capacitor C261, then connected with the source electrode of the PMOS tube Q12, the drain electrode of the PMOS tube Q12 is connected with the diode D7, the resistor R35 and the resistor R48, then connected with the NMOS tube Q1 and the NMOS tube Q8, and the NMOS tube Q8 is connected with the port P2 and the port P3; the NMOS tube Q1 is connected with a resistor R2 and a resistor R3 which are connected in parallel;
The protection branch circuit comprises a first protection sub-branch circuit, a second protection sub-branch circuit and a third protection sub-branch circuit which are connected with each other; the first protection sub-branch circuit is connected with the through branch circuit, and the second protection sub-branch circuit is connected with the micro control unit; the first protection subcircuit comprises an operational amplifier U1, a resistor R5, a resistor R6, a resistor R7, a capacitor C2 and a capacitor C3; the second protection subcircuit comprises an operational amplifier U12, a resistor R44, a resistor R45, a resistor R46, a resistor R47, a capacitor C36 and a capacitor C37; the third protection subcircuit includes an operational amplifier U30, a resistor R270, a resistor R271, a resistor R272, a resistor R273, a capacitor C271, a capacitor C272, a capacitor C273, a diode D20, a diode D21, and an NMOS transistor Q37.
The beneficial effects of the technical scheme are as follows: by adopting the scheme provided by the embodiment, the through branch circuit and the protection branch circuit jointly form the through protection circuit and realize the protection function of the circuit.
A battery through protection circuit control method includes:
s1: when the DC output of the enabling end in the through branch circuit is at a low level, the NMOS tube Q13 in the through branch circuit is configured to be in a closed state, and the control port P2 and the port P3 do not output battery voltage;
S2: when the direct current output of the enabling end in the direct-current branch circuit is at a high level, the NMOS tube Q13 in the direct-current branch circuit is configured to be in an open state, and the port P2 and the port P3 are controlled to output battery voltage;
S3: when the DC output of the enabling end in the straight-through branch circuit is at a high level, the NMOS tube Q13 in the straight-through branch circuit is configured to be in an open state, and when an output short circuit condition occurs, the operational amplifier U30 in the protection branch circuit is used for increasing the voltage of the negative electrode, the high level is output at the positive electrode, and the port P2 and the port P3 are controlled not to output the battery voltage;
S4: when the DC output of the enabling end in the straight-through branch circuit is at a high level, an NMOS tube Q13 in the straight-through branch circuit is configured to be in an open state, when an output overcurrent condition occurs, the output voltage of the NMOS tube Q13 in the straight-through branch circuit is increased by utilizing an operational amplifier U12 in the protection branch circuit, and the DC output of the enabling end in the straight-through branch circuit is controlled to be at a low level by utilizing the micro control unit, so that the ports P2 and P3 do not output battery voltage;
s5: when the DC output of the enabling end in the through branch circuit is at a high level, the NMOS tube Q13 in the through branch circuit is configured to be in an open state, and when the reverse voltage filling condition of an external power supply from the output port of the port P2 or the output port of the port P3 occurs, the operational amplifier U1 in the protection branch circuit is utilized to operate and amplify the voltage, the micro control unit is utilized to control the DC output of the enabling end in the through branch circuit to be converted into a low level, so that the ports P2 and P3 do not output the battery voltage.
The working principle of the technical scheme is as follows: s1: when the DC output of the enabling end in the through branch circuit is at a low level, the NMOS tube Q13 in the through branch circuit is configured to be in a closed state, and the control port P2 and the port P3 do not output battery voltage;
S2: when the direct current output of the enabling end in the direct-current branch circuit is at a high level, the NMOS tube Q13 in the direct-current branch circuit is configured to be in an open state, and the port P2 and the port P3 are controlled to output battery voltage;
S3: when the DC output of the enabling end in the straight-through branch circuit is at a high level, the NMOS tube Q13 in the straight-through branch circuit is configured to be in an open state, and when an output short circuit condition occurs, the operational amplifier U30 in the protection branch circuit is used for increasing the voltage of the negative electrode, the high level is output at the positive electrode, and the port P2 and the port P3 are controlled not to output the battery voltage;
S4: when the DC output of the enabling end in the straight-through branch circuit is at a high level, an NMOS tube Q13 in the straight-through branch circuit is configured to be in an open state, when an output overcurrent condition occurs, the output voltage of the NMOS tube Q13 in the straight-through branch circuit is increased by utilizing an operational amplifier U12 in the protection branch circuit, and the DC output of the enabling end in the straight-through branch circuit is controlled to be at a low level by utilizing the micro control unit, so that the ports P2 and P3 do not output battery voltage;
s5: when the DC output of the enabling end in the through branch circuit is at a high level, the NMOS tube Q13 in the through branch circuit is configured to be in an open state, and when the reverse voltage filling condition of an external power supply from the output port of the port P2 or the output port of the port P3 occurs, the operational amplifier U1 in the protection branch circuit is utilized to operate and amplify the voltage, the micro control unit is utilized to control the DC output of the enabling end in the through branch circuit to be converted into a low level, so that the ports P2 and P3 do not output the battery voltage.
The beneficial effects of the technical scheme are as follows: by adopting the scheme provided by the embodiment, the protection branch circuit can realize effective protection of the through branch circuit when the output of the through branch circuit is short-circuited, the output of the through branch circuit is overcurrent or the external power supply reversely irrigates the through branch circuit voltage.
In one embodiment, S1 comprises: when the DC output of the enabling end in the DC branch circuit is low level, the NMOS transistor Q13 is in a closed state, the grid electrode of the PMOS transistor Q12 is the same as the battery voltage VBAT, the PMOS transistor Q12 is in a closed state, the NMOS transistors Q1 and Q8 are also in a closed state, and the ports P2 and P3 have no output.
The working principle of the technical scheme is as follows: s1 comprises the following steps: when the DC output of the enabling end in the DC branch circuit is low level, the NMOS transistor Q13 is in a closed state, the grid electrode of the PMOS transistor Q12 is the same as the battery voltage VBAT, the PMOS transistor Q12 is in a closed state, the NMOS transistors Q1 and Q8 are also in a closed state, and the ports P2 and P3 have no output.
The beneficial effects of the technical scheme are as follows: by adopting the scheme provided by the embodiment, through the combined control of the NMOS tube Q13 and the PMOS tube Q12, no voltage is output when the direct current output of the enabling end is at a low level.
In one embodiment, S2 comprises: when the DC output of the enabling end in the DC branch circuit is at a high level, the NMOS tube Q13 is opened, the grid electrode of the PMOS tube Q12 is in short circuit with the ground voltage, the battery voltage VBAT flows to the source stage of the PMOS tube Q12 through the triode Q35, the PMOS tube Q12 is opened, the VBAT flows through the diode D7, the resistor R35 and the resistor R48 and then is used as the grid electrode driving voltage of the NMOS tube Q1 and the NMOS tube Q8 to drive the NMOS tube Q1 and the NMOS tube Q8 to be opened, and the battery voltage VBAT is output from the port P2 and the port P3.
The working principle of the technical scheme is as follows: s2 comprises the following steps: when the DC output of the enabling end in the DC branch circuit is at a high level, the NMOS tube Q13 is opened, the grid electrode of the PMOS tube Q12 is in short circuit with the ground voltage, the battery voltage VBAT flows to the source stage of the PMOS tube Q12 through the triode Q35, the PMOS tube Q12 is opened, the VBAT flows through the diode D7, the resistor R35 and the resistor R48 and then is used as the grid electrode driving voltage of the NMOS tube Q1 and the NMOS tube Q8 to drive the NMOS tube Q1 and the NMOS tube Q8 to be opened, and the battery voltage VBAT is output from the port P2 and the port P3.
The beneficial effects of the technical scheme are as follows: by adopting the scheme provided by the embodiment, when the direct current output of the enabling end in the direct current branch circuit is at a high level, the battery voltage is output from the port through the cooperative control of the NMOS tube Q13 and the PMOS tube Q12.
In one embodiment, S3 comprises: when the direct current output of an enabling end in the direct current branch circuit is at a high level, the port P2 and the port P3 are in an output opening state, when an output short circuit condition occurs, the negative voltage of the operational amplifier U30 is increased, when the negative voltage reaches a preset positive voltage, the positive electrode of the operational amplifier U30 outputs a high level, the NMOS tube Q37 controls the direct current short circuit protection end voltage to be consistent with the ground voltage, the NMOS tube Q13 is closed, the PMOS tube Q12 is closed, the NMOS tube Q1 and the NMOS tube Q8 are closed, and the port P2 and the port P3 are not output.
The working principle of the technical scheme is as follows: s3 comprises the following steps: when the direct current output of an enabling end in the direct current branch circuit is at a high level, the port P2 and the port P3 are in an output opening state, when an output short circuit condition occurs, the negative voltage of the operational amplifier U30 is increased, when the negative voltage reaches a preset positive voltage, the positive electrode of the operational amplifier U30 outputs a high level, the NMOS tube Q37 controls the direct current short circuit protection end voltage to be consistent with the ground voltage, the NMOS tube Q13 is closed, the PMOS tube Q12 is closed, the NMOS tube Q1 and the NMOS tube Q8 are closed, and the port P2 and the port P3 are not output.
The beneficial effects of the technical scheme are as follows: by adopting the scheme provided by the embodiment, when the direct current output of the enabling end in the direct current branch circuit is in a high level and an output short circuit condition occurs, the negative voltage of the operational amplifier U30 is increased, so that the port has no voltage output, and the direct current circuit is protected.
In one embodiment, S4 comprises: when the DC output of the enabling end in the direct-pass branch circuit is in a high level, the port P2 and the port P3 are in an output open state, when an output overcurrent condition occurs, the positive voltage of the operational amplifier U12 is increased, the output voltage of the operational amplifier U12 is 85.5 times of the positive detection voltage through a preset voltage dividing resistor of the positive electrode, the output end of the operational amplifier U12 is reversely connected to the micro control unit, the micro control unit is utilized to compare the preset voltage value with the detection voltage value, the DC output level of the enabling end is controlled according to the comparison result, when the detection voltage value is consistent with the preset voltage value, the DC output of the enabling end is in a low level, the NMOS tube Q1 and the NMOS tube Q8 are closed, and the ports P2 and P3 are not output.
The working principle of the technical scheme is as follows: s4 comprises the following steps: when the DC output of the enabling end in the direct-pass branch circuit is in a high level, the port P2 and the port P3 are in an output open state, when an output overcurrent condition occurs, the positive voltage of the operational amplifier U12 is increased, the output voltage of the operational amplifier U12 is 85.5 times of the positive detection voltage through a preset voltage dividing resistor of the positive electrode, the output end of the operational amplifier U12 is reversely connected to the micro control unit, the micro control unit is utilized to compare the preset voltage value with the detection voltage value, the DC output level of the enabling end is controlled according to the comparison result, when the detection voltage value is consistent with the preset voltage value, the DC output of the enabling end is in a low level, the NMOS tube Q1 and the NMOS tube Q8 are closed, and the ports P2 and P3 are not output.
The beneficial effects of the technical scheme are as follows: by adopting the scheme provided by the embodiment, when the output overcurrent condition occurs in the through branch circuit, the output end of the operational amplifier U12 is connected to the micro control unit in an inverted mode, so that no voltage output of the port can be ensured, and the through circuit is protected.
In one embodiment, S5 comprises: when the direct current output of an enabling end in the direct current branch circuit is at a high level, the port P2 and the port P3 are in an output opening state, and when the reverse filling voltage condition of an external power supply from the port P2 or the port P3 output port occurs, the negative voltage of the operational amplifier U1 is increased, and the operational amplifier U1 is used for increasing the voltage by 101 times; and comparing the preset voltage value with the detection voltage value by utilizing the micro control unit, controlling the level of the output voltage of the end I according to the comparison result, enabling the direct current output of the end I to be low level after the detection voltage value is consistent with the preset voltage value, closing the NMOS tube Q1 and the NMOS tube Q8, and enabling the port P2 and the port P3 not to be output.
The working principle of the technical scheme is as follows: s5 comprises the following steps: when the direct current output of an enabling end in the direct current branch circuit is at a high level, the port P2 and the port P3 are in an output opening state, and when the reverse filling voltage condition of an external power supply from the port P2 or the port P3 output port occurs, the negative voltage of the operational amplifier U1 is increased, and the operational amplifier U1 is used for increasing the voltage by 101 times; and comparing the preset voltage value with the detection voltage value by utilizing the micro control unit, controlling the level of the output voltage of the end I according to the comparison result, enabling the direct current output of the end I to be low level after the detection voltage value is consistent with the preset voltage value, closing the NMOS tube Q1 and the NMOS tube Q8, and enabling the port P2 and the port P3 not to be output.
The beneficial effects of the technical scheme are as follows: by adopting the scheme provided by the embodiment, when the external power supply reversely irrigates the voltage from the port P2 or the port P3 output port, the operational amplifier U1 is utilized to increase the voltage, so that the port has no voltage output, and the pass-through circuit is protected.
In one embodiment, as shown in fig. 2, the method further includes S6, performing a functional test on the protection branch circuit to obtain an early warning response scheme for an abnormal working state of the protection branch circuit; the method comprises the following specific steps:
s601: connecting the test through circuit with the protection branch circuit;
S602: the micro control unit is used for respectively testing the conditions of output short circuit and output overcurrent of the test direct-current circuit and the reverse filling voltage of the external power supply from the output port of the port P2 or the output port of the port P3 to obtain test data;
s603: based on the test data for a plurality of times, recording and counting the component parameter range of the protection branch circuit in a normal working state to generate a component parameter data table;
S604: based on the component parameter data table and the component basic parameter data, normal working thresholds and abnormal working state early warning prompts of a plurality of components of the protection branch circuit are set by combining the component history common fault data.
The working principle of the technical scheme is as follows: s6, performing functional test on the protection branch circuit to obtain an early warning coping scheme of the abnormal working state of the protection branch circuit; the method comprises the following specific steps:
s601: connecting the test through circuit with the protection branch circuit;
S602: the micro control unit is used for respectively testing the conditions of output short circuit and output overcurrent of the test direct-current circuit and the reverse filling voltage of the external power supply from the output port of the port P2 or the output port of the port P3 to obtain test data;
s603: based on the test data for a plurality of times, recording and counting the component parameter range of the protection branch circuit in a normal working state to generate a component parameter data table;
S604: based on the component parameter data table and the component basic parameter data, normal working thresholds and abnormal working state early warning prompts of a plurality of components of the protection branch circuit are set by combining the component history common fault data.
The beneficial effects of the technical scheme are as follows: by adopting the scheme provided by the embodiment, the protection branch circuit can be ensured to be in a normal working state through the function test of the protection branch circuit.
In one embodiment, as shown in fig. 3, the method further includes S7, for the situation that the through circuit has overcurrent and reverse-current voltage, performing risk determination and maintenance on the circuit components; the method comprises the following specific steps:
s701: collecting a first voltage value when the through circuit has overcurrent or reverse-filling voltage conditions based on a preset sensing device;
S702: when the first voltage value is smaller than a preset voltage value, acquiring the first voltage value;
S703: acquiring a corresponding component loss influence value according to a first voltage value based on a preset voltage value-component loss influence value matching template;
S704: accumulating a plurality of component loss influence values to obtain component accumulation loss influence values, acquiring corresponding component risk levels based on a preset component accumulation loss influence value-component risk level value template, and maintaining according to a preset maintenance strategy according to the component risk levels.
The working principle of the technical scheme is as follows: s7, aiming at the conditions of overcurrent and reverse-filling voltage of the through circuit, judging and maintaining risks of circuit components; the method comprises the following specific steps:
s701: collecting a first voltage value when the through circuit has overcurrent or reverse-filling voltage conditions based on a preset sensing device;
S702: when the first voltage value is smaller than a preset voltage value, acquiring the first voltage value;
S703: acquiring a corresponding component loss influence value according to a first voltage value based on a preset voltage value-component loss influence value matching template;
S704: accumulating a plurality of component loss influence values to obtain component accumulation loss influence values, acquiring corresponding component risk levels based on a preset component accumulation loss influence value-component risk level value template, and maintaining according to a preset maintenance strategy according to the component risk levels.
In order to detect the function of the NMOS tube or the PMOS tube under the condition of short circuit or overcurrent, the short circuit protection test is implemented by the short circuit protection test, and the test principle of the short circuit protection test and the discharge overcurrent protection test is basically the same, namely once the battery is subjected to long-time large-current discharge, the current value is close to a short circuit protection point but does not reach the short circuit protection point due to the influence of external factors, so that the battery can enter a discharge overcurrent protection state, and the protection is started only after the delay is in the order of tens of milliseconds, so that the MOS tube is possibly broken down thermally; by evaluating the test temperature of the MOS tube, whether the MOS tube has failure risk or not can be judged; when the temperature of the MOS tube exceeds the maximum rated value, namely, the thermal breakdown condition occurs, the MOS tube can fail; the calculation formula of the temperature of the MOS tube is as follows:
In the above formula, T cs is the test temperature of the MOS tube of the model, alpha is the structural mobility of the MOS tube, C γ is the oxide layer capacitance of the MOS tube, W ε is the channel width of the MOS tube, L ε is the channel length of the MOS tube, V gs is the gate-source voltage of the MOS tube, and V h is the preset threshold voltage; i cs is a test current, R μ is a transient thermal impedance value of the MOS tube, R θ is a steady-state thermal impedance value of the MOS tube, and 25 represents a temperature value of the MOS tube under normal operation.
The beneficial effects of the technical scheme are as follows: by adopting the scheme provided by the embodiment, the risk judgment and maintenance are carried out on the circuit components, so that the good working performance of the components can be maintained, and the maintenance work can be predictively carried out; by evaluating the test temperature of the MOS tube, whether the MOS tube has failure risk can be judged, and the accuracy of risk judgment is further improved.
It will be apparent to those skilled in the art that various modifications and variations can be made to the present invention without departing from the spirit or scope of the invention. Thus, it is intended that the present invention also include such modifications and alterations insofar as they come within the scope of the appended claims or the equivalents thereof.

Claims (8)

1. A battery through protection circuit control method, characterized by comprising: a through branch circuit, a protection branch circuit and a micro control unit; the direct-through branch circuit is used for realizing the output of the battery voltage; the protection branch circuit is respectively connected with the through branch circuit and the micro control unit, and is used for combining the micro control unit to protect the through branch circuit when the output of the through branch circuit is short-circuited, the output of the through branch circuit is overcurrent or the external power supply reversely flows into the through branch circuit;
The through branch circuit comprises an NMOS tube Q13, a PMOS tube Q12, an NMOS tube Q1, an NMOS tube Q8, a capacitor C261, a triode Q35, a diode D7, a resistor R2, a resistor R3, a resistor R35, a resistor R48, a port P2 and a port P3; the battery pin is connected with the triode Q35, then connected with the capacitor C261, then connected with the source electrode of the PMOS tube Q12, the drain electrode of the PMOS tube Q12 is connected with the diode D7, the resistor R35 and the resistor R48, then connected with the NMOS tube Q1 and the NMOS tube Q8, and the NMOS tube Q8 is connected with the port P2 and the port P3; the NMOS tube Q1 is connected with a resistor R2 and a resistor R3 which are connected in parallel;
The protection branch circuit comprises a first protection sub-branch circuit, a second protection sub-branch circuit and a third protection sub-branch circuit which are connected with each other; the first protection sub-branch circuit is connected with the through branch circuit, and the second protection sub-branch circuit is connected with the micro control unit; the first protection subcircuit comprises an operational amplifier U1, a resistor R5, a resistor R6, a resistor R7, a capacitor C2 and a capacitor C3; the second protection subcircuit comprises an operational amplifier U12, a resistor R44, a resistor R45, a resistor R46, a resistor R47, a capacitor C36 and a capacitor C37; the third protection subcircuit comprises an operational amplifier U30, a resistor R270, a resistor R271, a resistor R272, a resistor R273, a capacitor C271, a capacitor C272, a capacitor C273, a diode D20, a diode D21 and an NMOS tube Q37;
s1: when the DC output of the enabling end in the through branch circuit is at a low level, the NMOS tube Q13 in the through branch circuit is configured to be in a closed state, and the control port P2 and the port P3 do not output battery voltage;
S2: when the direct current output of the enabling end in the direct-current branch circuit is at a high level, the NMOS tube Q13 in the direct-current branch circuit is configured to be in an open state, and the port P2 and the port P3 are controlled to output battery voltage;
S3: when the DC output of the enabling end in the straight-through branch circuit is at a high level, the NMOS tube Q13 in the straight-through branch circuit is configured to be in an open state, and when an output short circuit condition occurs, the operational amplifier U30 in the protection branch circuit is used for increasing the voltage of the negative electrode, the high level is output at the positive electrode, and the port P2 and the port P3 are controlled not to output the battery voltage;
S4: when the DC output of the enabling end in the straight-through branch circuit is at a high level, an NMOS tube Q13 in the straight-through branch circuit is configured to be in an open state, when an output overcurrent condition occurs, the output voltage of the NMOS tube Q13 in the straight-through branch circuit is increased by utilizing an operational amplifier U12 in the protection branch circuit, and the DC output of the enabling end in the straight-through branch circuit is controlled to be at a low level by utilizing the micro control unit, so that the ports P2 and P3 do not output battery voltage;
s5: when the DC output of the enabling end in the through branch circuit is at a high level, the NMOS tube Q13 in the through branch circuit is configured to be in an open state, and when the reverse voltage filling condition of an external power supply from the output port of the port P2 or the output port of the port P3 occurs, the operational amplifier U1 in the protection branch circuit is utilized to operate and amplify the voltage, the micro control unit is utilized to control the DC output of the enabling end in the through branch circuit to be converted into a low level, so that the ports P2 and P3 do not output the battery voltage.
2. The battery through protection circuit control method according to claim 1, wherein S1 includes: when the DC output of the enabling end in the DC branch circuit is low level, the NMOS transistor Q13 is in a closed state, the grid electrode of the PMOS transistor Q12 is the same as the battery voltage VBAT, the PMOS transistor Q12 is in a closed state, the NMOS transistors Q1 and Q8 are also in a closed state, and the ports P2 and P3 have no output.
3. The battery through protection circuit control method according to claim 1, wherein S2 includes: when the DC output of the enabling end in the DC branch circuit is at a high level, the NMOS tube Q13 is opened, the grid electrode of the PMOS tube Q12 is in short circuit with the ground voltage, the battery voltage VBAT flows to the source stage of the PMOS tube Q12 through the triode Q35, the PMOS tube Q12 is opened, the VBAT flows through the diode D7, the resistor R35 and the resistor R48 and then is used as the grid electrode driving voltage of the NMOS tube Q1 and the NMOS tube Q8 to drive the NMOS tube Q1 and the NMOS tube Q8 to be opened, and the battery voltage VBAT is output from the port P2 and the port P3.
4. The battery through protection circuit control method according to claim 1, wherein S3 includes: when the direct current output of an enabling end in the direct current branch circuit is at a high level, the port P2 and the port P3 are in an output opening state, when an output short circuit condition occurs, the negative voltage of the operational amplifier U30 is increased, when the negative voltage reaches a preset positive voltage, the positive electrode of the operational amplifier U30 outputs a high level, the NMOS tube Q37 controls the direct current short circuit protection end voltage to be consistent with the ground voltage, the NMOS tube Q13 is closed, the PMOS tube Q12 is closed, the NMOS tube Q1 and the NMOS tube Q8 are closed, and the port P2 and the port P3 are not output.
5. The battery through protection circuit control method according to claim 1, wherein S4 includes: when the DC output of the enabling end in the direct-pass branch circuit is in a high level, the port P2 and the port P3 are in an output open state, when an output overcurrent condition occurs, the positive voltage of the operational amplifier U12 is increased, the output voltage of the operational amplifier U12 is 85.5 times of the positive detection voltage through a preset voltage dividing resistor of the positive electrode, the output end of the operational amplifier U12 is reversely connected to the micro control unit, the micro control unit is utilized to compare the preset voltage value with the detection voltage value, the DC output level of the enabling end is controlled according to the comparison result, when the detection voltage value is consistent with the preset voltage value, the DC output of the enabling end is in a low level, the NMOS tube Q1 and the NMOS tube Q8 are closed, and the ports P2 and P3 are not output.
6. The battery through protection circuit control method according to claim 1, wherein S5 includes: when the direct current output of an enabling end in the direct current branch circuit is at a high level, the port P2 and the port P3 are in an output opening state, and when the reverse filling voltage condition of an external power supply from the port P2 or the port P3 output port occurs, the negative voltage of the operational amplifier U1 is increased, and the operational amplifier U1 is used for increasing the voltage by 101 times; and comparing the preset voltage value with the detection voltage value by utilizing the micro control unit, controlling the level of the output voltage of the end I according to the comparison result, enabling the direct current output of the end I to be low level after the detection voltage value is consistent with the preset voltage value, closing the NMOS tube Q1 and the NMOS tube Q8, and enabling the port P2 and the port P3 not to be output.
7. The method for controlling a through protection circuit of a battery according to claim 1, further comprising S6, performing a functional test on the protection branch circuit to obtain an early warning response scheme of an abnormal operation state of the protection branch circuit; the method comprises the following specific steps:
s601: connecting the test through circuit with the protection branch circuit;
S602: the micro control unit is used for respectively testing the conditions of output short circuit and output overcurrent of the test direct-current circuit and the reverse filling voltage of the external power supply from the output port of the port P2 or the output port of the port P3 to obtain test data;
s603: based on the test data for a plurality of times, recording and counting the component parameter range of the protection branch circuit in a normal working state to generate a component parameter data table;
S604: based on the component parameter data table and the component basic parameter data, normal working thresholds and abnormal working state early warning prompts of a plurality of components of the protection branch circuit are set by combining the component history common fault data.
8. The method for controlling a through protection circuit of a battery according to claim 1, further comprising S7, for the through circuit, performing risk determination and maintenance on circuit components in response to the occurrence of an overcurrent and a counter-current voltage; the method comprises the following specific steps:
s701: collecting a first voltage value when the through circuit has overcurrent or reverse-filling voltage conditions based on a preset sensing device;
S702: when the first voltage value is smaller than a preset voltage value, acquiring the first voltage value;
S703: acquiring a corresponding component loss influence value according to a first voltage value based on a preset voltage value-component loss influence value matching template;
S704: accumulating a plurality of component loss influence values to obtain component accumulation loss influence values, acquiring corresponding component risk levels based on a preset component accumulation loss influence value-component risk level value template, and maintaining according to a preset maintenance strategy according to the component risk levels.
CN202211468100.8A 2022-11-22 2022-11-22 Battery through protection circuit and control method thereof Active CN115800439B (en)

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CN104659751A (en) * 2013-11-20 2015-05-27 艾默生网络能源系统北美公司 Protective circuit of rectifying circuit and power supply
CN208190282U (en) * 2018-03-27 2018-12-04 深圳市未来天使机器人有限公司 A kind of protection system for the straight charging circuit of battery
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