CN115794511A

CN115794511A - Product development test method, device, equipment and storage medium

Info

Publication number: CN115794511A
Application number: CN202211399736.1A
Authority: CN
Inventors: 谭世伟
Original assignee: Suzhou Inspur Intelligent Technology Co Ltd
Current assignee: Suzhou Inspur Intelligent Technology Co Ltd
Priority date: 2022-11-09
Filing date: 2022-11-09
Publication date: 2023-03-14

Abstract

The embodiment of the application provides a product development testing method, a device, equipment and a storage medium, which are applied to a product testing platform, wherein the method comprises the following steps: before a product is developed and tested, acquiring first test analysis data of the product; determining whether to start a development test of the product according to the first test analysis data; when the product is developed and tested, second test analysis data is obtained; and determining whether to start a field test in the development test of the product according to the second test analysis data. According to the embodiment of the application, before development testing and certain field testing in the development testing are carried out, the test analysis data can be obtained in advance, whether the testing is started or not is determined according to the test analysis data, the problem that the testing period is prolonged due to the fact that the product does not meet the testing conditions in the testing process can be solved, the development testing efficiency of the product is improved, the testing period is shortened, and the marketing period of the product is shortened.

Description

Product development test method, device, equipment and storage medium

Technical Field

The present application relates to the field of computer technologies, and in particular, to a method and an apparatus for product development testing, an electronic device, and a storage medium.

Background

At present, the problem of unclear test exit conditions exists in product test platforms such as intel arm or AMD and the like. For example, a CPU (Central Processing Unit) in the server does not have running performance, pressure, stability, and the like, but the CPU is planned to exit the EVT phase test, so that the condition for exiting the EVT phase test is found to be not met when the EVT phase test is actually exited, and the secondary tuning phase test is required to be the Pre-EVT phase test; for example, the CPU in the server only has compatible Hailier but does not support magnesium light and Samsung memory, so that when the DVT stage test is exited, the DVT stage test is temporarily changed into a Pre-DVT stage test and the like because the DVT stage test does not have redundancy, delivery requirements and high volume.

Therefore, the development and test efficiency of products such as servers is low, the test period is long, and the marketing period of the products is further prolonged.

Disclosure of Invention

The embodiment of the application provides a product development testing method, which aims to solve the problem that the development testing efficiency of the existing product is low.

Correspondingly, the embodiment of the application also provides a product development testing device, electronic equipment and a storage medium, which are used for ensuring the realization and application of the method.

In order to solve the above problem, an embodiment of the present application discloses a product development testing method, which is applied to a product testing platform, and the method includes:

before a product is developed and tested, acquiring first test analysis data of the product;

determining whether to start a development test of the product according to the first test analysis data;

when the product is developed and tested, second test analysis data is obtained;

and determining whether to start a field test in the development test of the product according to the second test analysis data.

In an optional example of the subject application, the first test analysis data comprises at least one of:

a testability analysis report for a central processor of the product;

all chips applied for the first time and lines applied for the first time are arranged on a mainboard of the product;

the test period of the product at each test stage of the development test is long; the test cycle duration is determined according to the workload analysis and prototype number analysis of each test stage;

exit criteria of the product at each test stage; the exit standard is determined according to the characteristics of a central processing unit, the characteristics of a memory and the characteristics of a VR chip of the product.

In an alternative example of the present application, the test phases include an EVT test phase, a DVT test phase, and a PVT test phase, the test phases including field testing.

In an alternative example of the present application,

exit criteria for the EVT test phase include at least the central processor of the product meeting conditions of no downtime, support of at least 1 section of memory, and no failure of the motherboard of the product exceeding a specified severity;

the exit standard of the DVT test stage at least comprises the condition that a central processing unit of the product meets the requirements of no 1/10000 probability of downtime, memory support of at least 2 manufacturers and no hardware change of a mainboard.

In an optional example of the subject application, the second test analysis data comprises at least one of:

in the development test of the product, the worst signal link, the longest power supply link, the worst backboard slot position and the longest power supply backboard slot position are provided in the SIV field test and the PIV field test;

the SIV field test in the development test of the product passes;

the hard disk with the highest power consumption, the hard disk with the largest capacity, the memory bank with the largest capacity, the solid state disk M.2 with the largest capacity and the network card with the highest power consumption are arranged in the product;

the firmware of the components of the product is all updated to the latest version;

the RMT test of the memory of the product is completed and passed;

the margen test of the part of the product is complete and passes;

the Operating System (OS), the driver and the RMP test of the product are latest;

the test field in the development test of the product does not experience failures that exceed a specified severity.

In an alternative example of the present application, the test order of the domain tests in the development test allows for adjustment.

In an alternative example of the present application, the article of manufacture includes at least a centralized storage, a server, and a switch.

The embodiment of the application also discloses a product development testing arrangement, is applied to product test platform, the device includes:

the system comprises a first data acquisition module, a first analysis module and a second analysis module, wherein the first data acquisition module is used for acquiring first test analysis data of a product before the product is developed and tested;

the first test starting module is used for determining whether to start the development test of the product according to the first test analysis data;

the second data acquisition module is used for acquiring second test analysis data when the product is developed and tested;

and the second test starting module is used for determining whether to start a field test in the development test of the product according to the second test analysis data.

In an optional example of the present application, the first test analysis data comprises at least one of:

a testability analysis report for a central processor of the product;

In an alternative example of the present application, the test phases include an EVT test phase, a DVT test phase, and a PVT test phase, and the test phases include field testing.

In an alternative example of the present application,

the exit criteria of the EVT test phase at least comprise that a central processing unit of the product meets the conditions of not being down, supporting at least 1 type of memory and that a main board of the product has no fault exceeding a specified severity;

In an optional example of the present application, the second test analysis data comprises at least one of:

in development test of the product, providing a worst signal link, a longest power supply link, a worst backboard slot position and a longest power supply backboard slot position in SIV field test and PIV field test;

the SIV field test in the development test of the product passes;

the RMT test of the memory of the product is finished and passed;

the margen test of the part of the product was complete and passed;

In an alternative example of the present application, the test order of the field tests in the development test allows for tuning.

The embodiment of the application also discloses an electronic device, which comprises: a processor; and a memory having executable code stored thereon, which when executed, causes the processor to perform a product development testing method as described in one or more of the embodiments of the present application.

One or more machine-readable media having stored thereon executable code that, when executed, causes a processor to perform a product development testing method as described in one or more of the embodiments of the present application are also disclosed.

Compared with the prior art, the embodiment of the application has the following advantages:

in the embodiment of the application, before the product is developed and tested, the first test analysis data of the product is acquired, so that whether the product is developed and tested can be determined according to the first test analysis data, and when the product is developed and tested, the second test analysis data is acquired, so that whether the field test in the product development and test is started can be determined according to the second test analysis data. According to the embodiment of the application, before development testing and certain field testing in the development testing are carried out, the test analysis data can be obtained in advance, whether the testing is started or not is determined according to the test analysis data, the problem that the testing period is prolonged due to the fact that the product does not meet the testing conditions in the testing process can be solved, the development testing efficiency of the product is improved, the testing period is shortened, and the marketing period of the product is shortened.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed to be used in the description of the embodiments of the present application will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art that other drawings can be obtained according to the drawings without creative efforts.

FIG. 1 is a flow chart of the steps of one embodiment of a product development testing method of the present application;

FIG. 2 is a schematic illustration of an application environment of the present application;

FIG. 3 is a block diagram of a product development testing apparatus according to an embodiment of the present application;

fig. 4 is a schematic structural diagram of an apparatus according to an embodiment of the present application.

Detailed Description

In order to make the aforementioned objects, features and advantages of the present application more comprehensible, the present application is described in further detail with reference to the accompanying drawings and the detailed description.

In a particular implementation, development and testing of a product may be inefficient for a variety of reasons. Specifically, taking a server as an example, the reasons for the low efficiency of the product development test may include:

1. due to the CPU of the product, the plan changes from one to another and from three to three, so that the test period is prolonged;

2. defining clear EVT test phases in the project planning of the server, and exiting the conditions and the capability of the server in the DVT test phases;

3. the test requirements of the server are confirmed, but due to reasons such as a CPU (central processing unit) and an internal memory of a product, the EVT test stage is not required to be exited, and the DVT test stage is not required to be exited by the whole server;

4. the test period of an EVT test stage and a DVT test stage in the project planning of the server is too short, and the workload of tasks is too much and unreasonable;

5. a plurality of shipment requirements are imported in the EVT testing stage of the server, and how to quickly complete the testing and shipment is very important under the condition of insufficient testing;

6. the characteristics of a CPU (Central processing Unit) in an EVT (electronic Transmission Unit) test stage of the server, the characteristics of a CPU firmware, the design of a mainboard, the selection of a chip and the like need to be adapted for multiple times, and the EVT test stage needs to be subjected to multiple rounds of evaluation;

7. the admission approval condition of the current EVT test phase of the server is not met, the process is disordered, and the server is delivered for delivery.

8. In order to catch up with the test progress, under the condition that the SIV field test (high-speed signal test), the PIV field test (power supply test) and the HW field test (low-speed signal quality test) are not tested, the SIT field test (complete machine system test), the rel field test (reliability test), the Thermal field test (heat dissipation test) and other tests are started, and the problems that the running stability of the SIT field test is down and the like are caused under the condition that the margin test of the memory is not passed are solved.

9. The input and output conditions of the server are insufficient, namely, the data about the server is insufficient when the test is developed;

10. the testing process of the server is disordered, the influence on a smaller project is small depending on the consciousness of each member of the project of the server, a standardized testing process system is not provided for a larger project, manpower, materials, testing period and the like are easily wasted, and the marketing period of a product is further prolonged;

in view of the above problems, an embodiment of the present application provides a product development testing method, and with the application of the method, at least the following problems can be solved:

1. the input and output are reasonable in the development stage of the server;

2. the planning cycle of the server phase is normal;

3. the server quitting condition is reasonable and correct;

4. the maximum workload that can be carried over in the development phase of the server;

5. the iteration of the prototype firmware version is correct and reasonable in the server development phase;

6. a set of new meals is added reasonably in the server development stage to meet the requirements;

7. the difficult points that the test period is long, the labor investment is large and one round of reproduction is needed in the iterative test in the development and test stage of the server are reduced;

8. and (3) reducing: when the result of RMT testing of a certain type of memory of the server is a failure (fail), other fields test that the memory running performance and stability of the type lead to CE (Corrected Error) and UCE (uncorrectable Error), even down and no reason for failure is analyzed;

9. and (3) reducing: the margen test result of the cable is often failed or critical in development test, but abnormal conditions such as speed reduction, bandwidth loss and the like occur when the cable is used for stability and performance running in other fields of test.

10. And (3) reducing: in the development and test stage, the margen result eye diagram of the part is poor frequently, and tests in other fields are not analyzed and tested in a targeted manner;

11. and (3) reducing: in the development and test stage, cables with worst signals, slot positions with worst signals and back plates with worst signals often appear, and then tests in other fields, such as the stability test of the whole machine, are not focused on testing;

12. and (3) reducing: in a development and test stage, a used component is not a highest power consumption component, and a used NVMe hard disk (Non-Volatile Memory host controller interface specification) is not a hard disk with the maximum capacity, so that a problem occurs when a component is introduced at a later stage;

13. on the premise that the signal level test of the server fails, the problem occurs in the whole system test, a large amount of research and development are invested, and test manpower is subjected to cross validation, so that the project is delayed, and even the project is delayed when being marketed.

14. Because the worst slot position, worst cable, worst part, highest capacity part and the like of the server are not tested in a critical way, the problem occurs in the test when the parts of the server are introduced in the later period;

15. in addition, in a new product test platform, involving a new kernel and a new system, fw (short for Firmware, also called Firmware, part, firmware) of a component of a server needs to use the latest Firmware, but in an actual test, since a test engineer checks the Firmware of the component to avoid a test problem, a test progress is delayed, and a development resource analysis problem is occupied.

Referring to fig. 1, a flowchart of steps of an embodiment of a product development testing method according to the present application is applied to a product testing platform, and the method includes the following steps:

step 101, before a product is developed and tested, first test analysis data of the product is obtained.

And step 102, determining whether to start the development test of the product according to the first test analysis data.

The product may include at least products such as a centralized storage, a server, and a switch, which is not necessarily limited in this embodiment of the present application. For convenience of explanation, the following description will be mainly given by taking a server as an example.

Referring to fig. 2, a schematic diagram of an application environment of the present application is shown, where the application environment includes servers to be tested 201 and a product testing platform, where the product testing platform is used to provide a testing environment for testing each server to be tested. When the server needs to be tested, the server can be connected with the product testing platform, so that the product testing platform can develop and test the server to verify whether the server passes the test or not.

In an optional example of the present application, the first test analysis data may comprise at least one of:

a testability analysis report for a central processor of the product;

the test cycle duration of the product at each test stage of the development test is long; the test cycle duration is determined according to the workload analysis and prototype number analysis of each test stage;

Specifically, in the embodiment of the application, before the development stage of the server, the first test analysis data is acquired, and then whether the development test of the product can be started is determined according to the first test analysis data, so that the extension of the test period of the product due to insufficient test data, unsatisfied test conditions and the like can be avoided, the development test efficiency of the product is improved, the test period is shortened, and the period of marketing of the product is shortened.

In practical applications, the development test of a product may be divided into a plurality of test phases, wherein the test phases may include an EVT test phase, a DVT test phase, and a PVT test phase. EVT test phase: design verification in the initial stage of product Development, and test verification in the initial stage when a designer realizes a sample, including function and safety test, generally, the sample is comprehensively verified by RD (Research & Development). DVT test stage: after the problem of the sample at the EVT stage is solved, the level and the time sequence of all signals are tested, the safety test is completed, and the product is basically shaped at the moment through the verification of RD and DQA (Design quality assessment). PVT test phase: and verifying the realization condition of each function of the new machine type and testing the stability and reliability. Wherein, each test stage comprises field tests, namely SIV field test, PIV field test, HW field test, SIT field test, rel field test, thermal field test, emcv (electromagnetic compatibility test) and the like.

Before development and test of a Server, the CPU characteristics of a product need SE (Security Server) analysis to obtain a testability analysis report, and then, if the testability analysis report determines that the product has testability, project stage test can be started, namely, the product is subjected to development and test.

Before a server is developed and tested, all chips applied for the first time and links applied for the first time on a mainboard of a product need to be carefully evaluated after research and development and risk description is given, and project stage test can be started only under the condition that the existing risk is confirmed.

Before a server develops a test, the test period of each test stage (i.e. EVT test stage, DVT test stage and PVT test stage) needs to be determined according to the number of test cases, the number of packages, the number of prototypes and the like.

Before a server develops and tests, the exit standard of each test stage (namely, an EVT test stage, a DVT test stage and a PVT test stage) needs to be determined by combining whether a CPU has relevant conditions or not, whether a memory has relevant conditions or not and the like. Specifically, before development and test of the server, characteristics of the CPU, characteristics of the memory, and characteristics of the VR chip are combined, for example, exit criteria in a DVT test stage satisfy that the memory supports at least 2 manufacturers, 2 manufacturers of the VR chip, and the like.

In an alternative example of the present application, the exit criteria for the EVT test phase include at least the central processor of the product satisfying conditions of no downtime, support of at least 1 portion of memory, and no failure of the main board of the product exceeding a specified severity; the exit standard of the DVT test stage at least comprises the condition that a central processing unit of the product meets the requirements of no 1/10000 probability of downtime, memory support of at least 2 manufacturers and no hardware change of a mainboard.

Before a server is developed and tested, the exit standard of an EVT test stage needs a CPU to have no downtime, support at least 1 memory, and have no serious fatal problem on a hardware mainboard.

Before a server is developed and tested, the exit standard of a DVT test stage needs that a CPU has the problem of no 1/10000 downtime, the memory of at least 2 manufacturers is supported, and the mainboard has no hardware board changing requirement and the like.

And 103, acquiring second test analysis data when the product is developed and tested.

And step 104, determining whether to start a field test in the development test of the product according to the second test analysis data.

According to the embodiment of the application, before the development stage of the server, the first test analysis data is acquired, whether the development test of the product can be started or not is determined according to the first test analysis data, and if the development test of the product can be started is confirmed based on the first test analysis data, the development test of the server can be started.

When the server is used for development and testing, before testing a certain field in development and testing, corresponding second test analysis data can be obtained in advance, and then whether testing of the certain field in development and testing of the product can be started or not is determined according to the second test analysis data, so that the problem that the testing period is prolonged due to insufficient testing data, unsatisfied testing conditions and the like can be avoided, the development and testing efficiency of the product is improved, the testing period is shortened, and the marketing period of the product is shortened.

In an optional example of the present application, the second test analysis data may comprise at least one of:

the SIV field test in the development test of the product passes;

the RMT test of the memory of the product is completed and passed;

the margen test of the part of the product is complete and passes;

the OS, driver and RMP test of the product are latest;

During development and testing of the server, in an EVT testing stage, after the worst signal link, the longest power supply link, the worst backboard slot position and the longest power supply backboard slot position are given out by SIV field testing and PIV field testing, restarting stability type testing such as SIT field testing and rel field testing is carried out by other field testing. Specifically, in the field of SIT, the test may be performed with emphasis on the worst signal link, the longest power supply link, the worst backplane slot, the longest power supply backplane slot, and the like.

During development and test of the server, in an EVT test stage, the SIV field tests completed component tests such as memory margin, network cards, signals and the like, and after the SIV field tests pass, other field tests such as SIT field tests, rel field tests and the like restart application tests.

During development and test of the server, in an EVT (electric variable transmission) test stage, all components with the highest capacity or the highest power consumption, such as a hard disk with the highest power consumption, a hard disk with the highest capacity, a memory bank with the highest capacity, a solid state disk M.2 with the highest capacity, a network card with the highest power consumption and the like in an AVL (authorized vendor list) are obtained to perform overall system test.

When the server is developed and tested, before the whole system is tested, the firmware of all the parts is updated to the latest firmware version and the latest drive version.

During development and testing of a server, before a complete machine System is tested, the complete machine System can be tested only after all firmware versions of the server, such as BMC, bios (Basic Input Output System), CPLD (Complex programmable logic device), and VR chip, are the latest versions.

During development and testing of the server, before testing of the whole System, all OS (Operating System) are the latest version, all drivers and RMT tests are the latest, and then testing of other fields such as testing of the whole System and testing of the rel field can be started.

In practical application, the test in the field of SIT, that is, the test content in the test of the whole system may include a long-term stability test, in the embodiment of the present application:

in the development test of the server, before the long-term stability test of the server, the server needs to be restarted after the hardware-level SIV field test, the PIV field test and the HW field test provide bug (fault) without more than serious bug.

At the time of server development testing, RMT testing of memory is required to complete and PASS before long-term stability testing of the server.

At the time of server development testing, the margen test of the component is required to complete and PASS before the server long-term stability test.

During development and testing of the server, before long-term stability testing of the server, an SIV field test provides the worst cable, the worst slot position, the worst backboard and the worst component.

During development and testing of the server, before long-term stability testing of the server, full-allocation full-coverage testing is performed on the components with the highest capacity, the components with the highest power consumption and the like in the SIT field testing.

During development and test of the server, before long-term stability test of the server, basic function development of a BMC (Baseboard Management Controller) is completed, that is, abnormal log information can be recorded normally, abnormal alarms can be generated normally, and the like.

It should be noted that the test sequence during the development and test can be adjusted, and it is only necessary to ensure that other tests are not performed on the premise that no test data exists, which leads to the difficult point that the server iteration test needs one round of recurrence, and further leads to the extension of the test period. For example, a testability analysis report of a CPU of a server is obtained in advance, and a development test can be performed on the server according to the testability analysis report, so that a change of project planning from one to another and from three can be avoided due to the CPU, or a long-term stability test of the server can be performed only after an RMT test of a memory is completed and PASS is performed before a long-term stability test of the server, or a complete system test is performed only after all firmware with the highest capacity and the highest power consumption, such as a hard disk with the highest power consumption, a hard disk with the highest capacity, a memory bank with the highest capacity, a solid state hard disk m.2 with the highest capacity, a network card with the highest power consumption, and the like, are obtained.

In the embodiment of the application, before the development test is performed on the product, the first test analysis data of the product is acquired, so that whether the development test of the product is started can be determined according to the first test analysis data, and when the development test is performed on the product, the second test analysis data is acquired, so that whether the field test in the development test of the product is started can be determined according to the second test analysis data. According to the embodiment of the application, before development testing and testing in a certain field, test analysis data can be obtained in advance, whether testing is started or not is determined according to the test analysis data, the problem that testing period is prolonged due to the fact that testing is conducted under the condition that a product does not meet testing conditions can be solved, the testing process is standardized, the development testing efficiency of the product is improved, the testing period is shortened, the marketing period of the product is shortened, and more values can be created for enterprises.

In order to make the embodiments of the present application better understood by those skilled in the art, a specific example is used for the following description. Taking a server as an example, the key points for developing and testing the server in the embodiment of the application mainly include the following contents:

1. before a server develops and tests, a testability analysis report of a CPU is given;

2. before development and test of a server, providing all chips applied for the first time on a mainboard and a circuit applied for the first time;

3. before a server develops and tests, the workload of each test stage (namely an EVT test stage, a DVT test stage and a PVT test stage) is analyzed, and the duration of each test period is determined after the number of prototype machines is analyzed;

4. before a server develops and tests, the exit standards of an EVT test stage and a DVT test stage are given by combining with the characteristics of a CPU (Central processing Unit), so that the CPU has the non-downtime of less than 1/1000 probability when the EVT test stage exits, and the CPU has the non-downtime of less than 1/10000 probability when the DVT test stage exits;

5. before development and test of a server, the CPU characteristic, the memory characteristic and the VR characteristic are combined, at least 2 factories are supported by the memory before the DVT test stage exits, and 2 factories are supported by the VR chip;

6. before a server is tested for long-term stability, the server needs to be started after a hardware-level SIV field test, a PIV field test and a HW field test provide no more than serious faults;

7. before the server tests the long-term stability, the RMT test of the memory is required to be completed and PASS (PASS);

8. before the server long-term stability test, margen test completion and PASS (PASS) of the component is required;

9. before a server is tested for long-term stability, cables, slot positions, back plates and parts of a most word are provided in the field of SIV (substrate integrated vision);

10. before the long-term stability test of the server, the SIT field test mainly selects the components with the largest capacity, the components with the highest power consumption and the like to carry out full-allocation full-coverage test.

11. Before the long-term stability test of the server, the development of the basic functions of the BMC of the server is completed, namely the BMC can normally record abnormal log information and can normally generate abnormal alarms;

12. aiming at the server test, after the 1-2-3-4-5-6-7-8-9-10-11 is finished, the long-term stability test of the whole system such as the SIT field test and the rel field test is started, wherein the test sequence can be reversed according to the actual situation, and when the test flow is established based on the 12 test main points, the corresponding other tests are carried out under the condition of meeting the corresponding conditions, so that the repeated iteration test is avoided, and the test efficiency is improved.

Aiming at the 12 test key points above the server, the test time and the cross validation time of the server are greatly reduced, and great help is provided for verifying the test problems and finding the problems in the fields of the storage server and the SIT of the server to ensure the quality improvement of the product. By applying the embodiment of the application, the iterative testing efficiency of the server product can be improved, the testing manpower is reduced, the product development testing efficiency and the per-capita productivity are improved, and more benefits can be created for enterprises.

It is further to be supplemented that, in the embodiments of the present application, an overall starting condition and a local starting condition are set for starting a test of a product, and specifically, before a development test of the product is performed, first test analysis data of the product is obtained, so as to determine whether to start the development test of the product according to the first test analysis data; and then, after the development test of the product is determined to be started according to the first test analysis data, when the product is developed and tested, the second test analysis data is continuously obtained, so that whether the field test in the development test of the product is started or not is determined according to the second test analysis data, the test period can be effectively shortened through the test of the whole and local control product, and the ordered performance of the test of the product is ensured.

It should be noted that, for simplicity of description, the method embodiments are described as a series of acts or combination of acts, but those skilled in the art will recognize that the embodiments are not limited by the order of acts described, as some steps may occur in other orders or concurrently depending on the embodiments. Further, those skilled in the art will also appreciate that the embodiments described in the specification are presently preferred and that no particular act is required of the embodiments of the application.

On the basis of the above embodiments, the embodiments of the present application further provide a product development testing apparatus, which is applied to electronic devices such as a terminal device and a server.

Referring to fig. 3, a block diagram of a product development testing apparatus according to an embodiment of the present application is shown, and the apparatus is applied to a product testing platform, and specifically may include the following modules:

the first data acquisition module 301 is configured to acquire first test analysis data of a product before development and test of the product;

a first test starting module 302, configured to determine whether to start a development test of the product according to the first test analysis data;

a second data acquisition module 303, configured to acquire second test analysis data when the product is developed and tested;

a second test starting module 304, configured to determine whether to start a field test in the development test of the product according to the second test analysis data.

a testability analysis report for a central processor of the product;

the test cycle duration of the product at each test stage of the development test is long; the test cycle duration is determined according to the analysis of the workload and the analysis of the number of the prototype machines in each test stage;

In an alternative example of the present application,

the SIV field test in the development test of the product passes;

the RMT test of the memory of the product is finished and passed;

the margen test of the part of the product is complete and passes;

In an alternative example of the present application, the product may include at least a centralized storage, a server, and a switch.

The embodiments of the present application also provide a non-volatile readable storage medium, where one or more modules (programs) are stored in the storage medium, and when the one or more modules are applied to a device, the one or more modules may cause the device to execute instructions (instructions) of method steps in the embodiments of the present application.

Embodiments of the present application provide one or more machine-readable media having instructions stored thereon, which when executed by one or more processors, cause an electronic device to perform the methods as described in one or more of the above embodiments. In the embodiment of the present application, the electronic device includes various types of devices such as a terminal device and a server (cluster).

Embodiments of the present disclosure may be implemented as an apparatus, which may include electronic devices such as a terminal device, a server (cluster), etc., using any suitable hardware, firmware, software, or any combination thereof, for a desired configuration. Fig. 4 schematically illustrates an example apparatus 400 that may be used to implement various embodiments described herein.

For one embodiment, fig. 4 illustrates an example apparatus 400 having one or more processors 402, a control module (chipset) 404 coupled to at least one of the processor(s) 402, memory 406 coupled to the control module 404, non-volatile memory (NVM)/storage 408 coupled to the control module 404, one or more input/output devices 410 coupled to the control module 404, and a network interface 412 coupled to the control module 404.

Processor 402 may include one or more single-core or multi-core processors, and processor 402 may include any combination of general-purpose or special-purpose processors (e.g., graphics processors, application processors, baseband processors, etc.). In some embodiments, the apparatus 400 can be used as a terminal device, a server (cluster), or the like in this embodiment.

In some embodiments, the apparatus 400 may include one or more computer-readable media (e.g., the memory 406 or the NVM/storage 408) having instructions 414 and one or more processors 402 in combination with the one or more computer-readable media and configured to execute the instructions 414 to implement modules to perform the actions described in this disclosure.

For one embodiment, control module 404 may include any suitable interface controllers to provide any suitable interface to at least one of processor(s) 402 and/or any suitable device or component in communication with control module 404.

The control module 404 may include a memory controller module to provide an interface to the memory 406. The memory controller module may be a hardware module, a software module, and/or a firmware module.

The memory 406 may be used, for example, to load and store data and/or instructions 414 for the apparatus 400. For one embodiment, memory 406 may comprise any suitable volatile memory, such as suitable DRAM. In some embodiments, the memory 406 may comprise a double data rate type four synchronous dynamic random access memory (DDR 4 SDRAM).

For one embodiment, control module 404 may include one or more input/output controllers to provide an interface to NVM/storage 408 and input/output device(s) 410.

For example, NVM/storage 408 may be used to store data and/or instructions 414. NVM/storage 408 may include any suitable non-volatile memory (e.g., flash memory) and/or may include any suitable non-volatile storage device(s) (e.g., one or more hard disk drive(s) (HDD (s)), one or more Compact Disc (CD) drive(s), and/or one or more Digital Versatile Disc (DVD) drive (s)).

NVM/storage 408 may include storage resources that are physically part of the device on which apparatus 400 is installed, or it may be accessible by the device and may not necessarily be part of the device. For example, NVM/storage 408 may be accessed over a network via input/output device(s) 410.

Input/output device(s) 410 may provide an interface for apparatus 400 to communicate with any other suitable device, and input/output devices 410 may include communication components, audio components, sensor components, and the like. The network interface 412 may provide an interface for the apparatus 400 to communicate over one or more networks, and the apparatus 400 may wirelessly communicate with one or more components of a wireless network according to any of one or more wireless network standards and/or protocols, such as access to a communication standard-based wireless network, such as WiFi, 2G, 3G, 4G, 5G, etc., or a combination thereof.

For one embodiment, at least one of the processor(s) 402 may be packaged together with logic for one or more controller(s) (e.g., memory controller module) of the control module 404. For one embodiment, at least one of the processor(s) 402 may be packaged together with logic for one or more controllers of control module 404 to form a System In Package (SiP). For one embodiment, at least one of the processor(s) 402 may be integrated on the same die with logic for one or more controller(s) of the control module 404. For one embodiment, at least one of the processor(s) 402 may be integrated on the same die with logic of one or more controllers of the control module 404 to form a system on a chip (SoC).

In various embodiments, the apparatus 400 may be, but is not limited to being: a server, a desktop computing device, or a mobile computing device (e.g., a laptop computing device, a handheld computing device, a tablet, a netbook, etc.), among other terminal devices. In various embodiments, apparatus 400 may have more or fewer components and/or different architectures. For example, in some embodiments, device 400 includes one or more cameras, a keyboard, a Liquid Crystal Display (LCD) screen (including a touch screen display), a non-volatile memory port, multiple antennas, a graphics chip, an Application Specific Integrated Circuit (ASIC), and speakers.

The detection device may adopt a main control chip as a processor or a control module, the sensor data, the position information and the like are stored in a memory or an NVM/storage device, the sensor group may serve as an input/output device, and the communication interface may include a network interface.

For the device embodiment, since it is basically similar to the method embodiment, the description is simple, and for the relevant points, refer to the partial description of the method embodiment.

The embodiments in the present specification are all described in a progressive manner, and each embodiment focuses on differences from other embodiments, and portions that are the same and similar between the embodiments may be referred to each other.

Embodiments of the present application are described with reference to flowchart illustrations and/or block diagrams of methods, terminal devices (systems), and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor or other programmable product development test terminal to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable product development test terminal, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.

These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable product development test terminal to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.

These computer program instructions may also be loaded onto a computer or other programmable product development test terminal to cause a series of operational steps to be performed on the computer or other programmable terminal to produce a computer implemented process such that the instructions which execute on the computer or other programmable terminal provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.

While preferred embodiments of the present application have been described, additional variations and modifications of these embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including the preferred embodiment and all changes and modifications that fall within the true scope of the embodiments of the present application.

Finally, it should also be noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or terminal that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or terminal. Without further limitation, an element defined by the phrase "comprising a … …" does not exclude the presence of another identical element in a process, method, article, or terminal apparatus that comprises the element.

The above detailed description is given to a product development testing method and apparatus, an electronic device and a storage medium, and specific examples are applied herein to explain the principles and embodiments of the present application, and the descriptions of the above embodiments are only used to help understand the method and core ideas of the present application; meanwhile, for a person skilled in the art, according to the idea of the present application, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present application.

Claims

1. A product development testing method is applied to a product testing platform, and the method comprises the following steps:

2. The method of claim 1, wherein the first test analysis data includes at least one of:

a testability analysis report for a central processor of the product;

3. The method of claim 2, wherein the test phases include an EVT test phase, a DVT test phase, and a PVT test phase, the test phases including field testing.

4. The method of claim 3,

5. The method of claim 1, wherein the second test analysis data includes at least one of:

the SIV field test in the development test of the product passes;

the RMT test of the memory of the product is finished and passed;

the margen test of the part of the product is complete and passes;

6. The method of claim 1, wherein a test order of field tests in the development test allows for tuning.

7. The method of claim 1, wherein the product comprises at least a centralized storage, a server, and a switch.

8. A product development testing device, which is applied to a product testing platform, the device comprises:

9. An electronic device, comprising: a processor; and

memory having stored thereon executable code which, when executed, causes the processor to perform a product development testing method as claimed in one or more of claims 1-7.

10. One or more machine-readable media having executable code stored thereon that, when executed, causes a processor to perform a product development testing method as recited in one or more of claims 1-7.